1// SPDX-License-Identifier: GPL-2.0
   2/dts-v1/;
   3
   4#include <dt-bindings/input/input.h>
   5#include <dt-bindings/mfd/max77620.h>
   6#include <dt-bindings/pinctrl/pinctrl-tegra.h>
   7
   8#include "tegra210.dtsi"
   9
  10/ {
  11	model = "Google Pixel C";
  12	compatible = "google,smaug-rev8", "google,smaug-rev7",
  13		     "google,smaug-rev6", "google,smaug-rev5",
  14		     "google,smaug-rev4", "google,smaug-rev3",
  15		     "google,smaug-rev2", "google,smaug-rev1",
  16		     "google,smaug", "nvidia,tegra210";
  17
  18	aliases {
  19		serial0 = &uarta;
  20		serial3 = &uartd;
  21	};
  22
  23	chosen {
  24		bootargs = "earlycon";
  25		stdout-path = "serial0:115200n8";
  26	};
  27
  28	memory@80000000 {
  29		device_type = "memory";
  30		reg = <0x0 0x80000000 0x0 0xc0000000>;
  31	};
  32
  33	host1x@50000000 {
  34		dsia: dsi@54300000 {
  35			avdd-dsi-csi-supply = <&vdd_dsi_csi>;
  36			status = "okay";
  37
  38			link2: panel@0 {
  39				compatible = "jdi,lpm102a188a";
  40				reg = <0>;
  41			};
  42		};
  43
  44		dsib: dsi@54400000 {
  45			avdd-dsi-csi-supply = <&vdd_dsi_csi>;
  46			nvidia,ganged-mode = <&dsia>;
  47			status = "okay";
  48
  49			link1: panel@0 {
  50				compatible = "jdi,lpm102a188a";
  51				reg = <0>;
  52				power-supply = <&pplcd_vdd>;
  53				ddi-supply = <&pp1800_lcdio>;
  54				enable-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
  55				reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
  56				link2 = <&link2>;
  57				backlight = <&backlight>;
  58			};
  59		};
  60
  61		dpaux: dpaux@545c0000 {
  62			status = "okay";
  63		};
  64	};
  65
  66	gpu@57000000 {
  67		vdd-supply = <&max77621_gpu>;
  68		status = "okay";
  69	};
  70
  71	pinmux: pinmux@700008d4 {
  72		pinctrl-names = "boot";
  73		pinctrl-0 = <&state_boot>;
  74
  75		state_boot: pinmux {
  76			pex_l0_rst_n_pa0 {
  77				nvidia,pins = "pex_l0_rst_n_pa0";
  78				nvidia,function = "rsvd1";
  79				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  80				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  81				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  82				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  83				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  84			};
  85			pex_l0_clkreq_n_pa1 {
  86				nvidia,pins = "pex_l0_clkreq_n_pa1";
  87				nvidia,function = "rsvd1";
  88				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  89				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  90				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  91				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  92				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  93			};
  94			pex_wake_n_pa2 {
  95				nvidia,pins = "pex_wake_n_pa2";
  96				nvidia,function = "rsvd1";
  97				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  98				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  99				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 100				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 101				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 102			};
 103			pex_l1_rst_n_pa3 {
 104				nvidia,pins = "pex_l1_rst_n_pa3";
 105				nvidia,function = "rsvd1";
 106				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 107				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 108				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 109				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 110				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 111			};
 112			pex_l1_clkreq_n_pa4 {
 113				nvidia,pins = "pex_l1_clkreq_n_pa4";
 114				nvidia,function = "rsvd1";
 115				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 116				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 117				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 118				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 119				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 120			};
 121			sata_led_active_pa5 {
 122				nvidia,pins = "sata_led_active_pa5";
 123				nvidia,function = "rsvd1";
 124				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 125				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 126				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 127				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 128			};
 129			pa6 {
 130				nvidia,pins = "pa6";
 131				nvidia,function = "rsvd1";
 132				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 133				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 134				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 135				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 136			};
 137			dap1_fs_pb0 {
 138				nvidia,pins = "dap1_fs_pb0";
 139				nvidia,function = "i2s1";
 140				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 141				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 142				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 143				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 144			};
 145			dap1_din_pb1 {
 146				nvidia,pins = "dap1_din_pb1";
 147				nvidia,function = "i2s1";
 148				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 149				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 150				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 151				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 152			};
 153			dap1_dout_pb2 {
 154				nvidia,pins = "dap1_dout_pb2";
 155				nvidia,function = "i2s1";
 156				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 157				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 158				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 159				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 160			};
 161			dap1_sclk_pb3 {
 162				nvidia,pins = "dap1_sclk_pb3";
 163				nvidia,function = "i2s1";
 164				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 165				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 166				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 167				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 168			};
 169			spi2_mosi_pb4 {
 170				nvidia,pins = "spi2_mosi_pb4";
 171				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 172				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 173				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 174				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 175			};
 176			spi2_miso_pb5 {
 177				nvidia,pins = "spi2_miso_pb5";
 178				nvidia,function = "rsvd2";
 179				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 180				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 181				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 182				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 183			};
 184			spi2_sck_pb6 {
 185				nvidia,pins = "spi2_sck_pb6";
 186				nvidia,function = "rsvd2";
 187				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 188				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 189				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 190				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 191			};
 192			spi2_cs0_pb7 {
 193				nvidia,pins = "spi2_cs0_pb7";
 194				nvidia,function = "rsvd2";
 195				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 196				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 197				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 198				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 199			};
 200			spi1_mosi_pc0 {
 201				nvidia,pins = "spi1_mosi_pc0";
 202				nvidia,function = "spi1";
 203				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 204				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 205				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 206				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 207			};
 208			spi1_miso_pc1 {
 209				nvidia,pins = "spi1_miso_pc1";
 210				nvidia,function = "spi1";
 211				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 212				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 213				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 214				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 215			};
 216			spi1_sck_pc2 {
 217				nvidia,pins = "spi1_sck_pc2";
 218				nvidia,function = "spi1";
 219				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 220				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 221				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 222				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 223			};
 224			spi1_cs0_pc3 {
 225				nvidia,pins = "spi1_cs0_pc3";
 226				nvidia,function = "spi1";
 227				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 228				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 229				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 230				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 231			};
 232			spi1_cs1_pc4 {
 233				nvidia,pins = "spi1_cs1_pc4";
 234				nvidia,function = "rsvd1";
 235				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 236				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 237				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 238				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 239			};
 240			spi4_sck_pc5 {
 241				nvidia,pins = "spi4_sck_pc5";
 242				nvidia,function = "rsvd1";
 243				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 244				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 245				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 246				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 247			};
 248			spi4_cs0_pc6 {
 249				nvidia,pins = "spi4_cs0_pc6";
 250				nvidia,function = "rsvd1";
 251				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 252				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 253				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 254				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 255			};
 256			spi4_mosi_pc7 {
 257				nvidia,pins = "spi4_mosi_pc7";
 258				nvidia,function = "rsvd1";
 259				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 260				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 261				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 262				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 263			};
 264			spi4_miso_pd0 {
 265				nvidia,pins = "spi4_miso_pd0";
 266				nvidia,function = "rsvd1";
 267				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 268				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 269				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 270				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 271			};
 272			uart3_tx_pd1 {
 273				nvidia,pins = "uart3_tx_pd1";
 274				nvidia,function = "uartc";
 275				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 276				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 277				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 278				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 279			};
 280			uart3_rx_pd2 {
 281				nvidia,pins = "uart3_rx_pd2";
 282				nvidia,function = "uartc";
 283				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 284				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 285				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 286				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 287			};
 288			uart3_rts_pd3 {
 289				nvidia,pins = "uart3_rts_pd3";
 290				nvidia,function = "uartc";
 291				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 292				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 293				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 294				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 295			};
 296			uart3_cts_pd4 {
 297				nvidia,pins = "uart3_cts_pd4";
 298				nvidia,function = "uartc";
 299				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 300				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 301				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 302				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 303			};
 304			dmic1_clk_pe0 {
 305				nvidia,pins = "dmic1_clk_pe0";
 306				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 307				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 308				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 309				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 310			};
 311			dmic1_dat_pe1 {
 312				nvidia,pins = "dmic1_dat_pe1";
 313				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 314				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 315				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 316				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 317			};
 318			dmic2_clk_pe2 {
 319				nvidia,pins = "dmic2_clk_pe2";
 320				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 321				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 322				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 323				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 324			};
 325			dmic2_dat_pe3 {
 326				nvidia,pins = "dmic2_dat_pe3";
 327				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 328				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 329				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 330				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 331			};
 332			dmic3_clk_pe4 {
 333				nvidia,pins = "dmic3_clk_pe4";
 334				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 335				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 336				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 337				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 338			};
 339			dmic3_dat_pe5 {
 340				nvidia,pins = "dmic3_dat_pe5";
 341				nvidia,function = "rsvd2";
 342				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 343				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 344				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 345				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 346			};
 347			pe6 {
 348				nvidia,pins = "pe6";
 349				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 350				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 351				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 352				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 353			};
 354			pe7 {
 355				nvidia,pins = "pe7";
 356				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 357				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 358				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 359				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 360			};
 361			gen3_i2c_scl_pf0 {
 362				nvidia,pins = "gen3_i2c_scl_pf0";
 363				nvidia,function = "i2c3";
 364				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 365				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 366				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 367				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 368				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 369			};
 370			gen3_i2c_sda_pf1 {
 371				nvidia,pins = "gen3_i2c_sda_pf1";
 372				nvidia,function = "i2c3";
 373				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 374				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 375				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 376				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 377				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 378			};
 379			uart2_tx_pg0 {
 380				nvidia,pins = "uart2_tx_pg0";
 381				nvidia,function = "uartb";
 382				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 383				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 384				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 385				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 386			};
 387			uart2_rx_pg1 {
 388				nvidia,pins = "uart2_rx_pg1";
 389				nvidia,function = "uartb";
 390				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 391				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 392				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 393				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 394			};
 395			uart2_rts_pg2 {
 396				nvidia,pins = "uart2_rts_pg2";
 397				nvidia,function = "rsvd2";
 398				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 399				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 400				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 401				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 402			};
 403			uart2_cts_pg3 {
 404				nvidia,pins = "uart2_cts_pg3";
 405				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 406				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 407				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 408				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 409			};
 410			wifi_en_ph0 {
 411				nvidia,pins = "wifi_en_ph0";
 412				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 413				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 414				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 415				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 416			};
 417			wifi_rst_ph1 {
 418				nvidia,pins = "wifi_rst_ph1";
 419				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 420				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 421				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 422				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 423			};
 424			wifi_wake_ap_ph2 {
 425				nvidia,pins = "wifi_wake_ap_ph2";
 426				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 427				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 428				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 429				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 430			};
 431			ap_wake_bt_ph3 {
 432				nvidia,pins = "ap_wake_bt_ph3";
 433				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 434				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 435				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 436				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 437			};
 438			bt_rst_ph4 {
 439				nvidia,pins = "bt_rst_ph4";
 440				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 441				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 442				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 443				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 444			};
 445			bt_wake_ap_ph5 {
 446				nvidia,pins = "bt_wake_ap_ph5";
 447				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 448				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 449				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 450				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 451			};
 452			ph6 {
 453				nvidia,pins = "ph6";
 454				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 455				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 456				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 457				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 458			};
 459			ap_wake_nfc_ph7 {
 460				nvidia,pins = "ap_wake_nfc_ph7";
 461				nvidia,function = "rsvd0";
 462				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 463				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 464				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 465				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 466			};
 467			nfc_en_pi0 {
 468				nvidia,pins = "nfc_en_pi0";
 469				nvidia,function = "rsvd0";
 470				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 471				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 472				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 473				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 474			};
 475			nfc_int_pi1 {
 476				nvidia,pins = "nfc_int_pi1";
 477				nvidia,function = "rsvd0";
 478				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 479				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 480				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 481				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 482			};
 483			gps_en_pi2 {
 484				nvidia,pins = "gps_en_pi2";
 485				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 486				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 487				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 488				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 489			};
 490			gps_rst_pi3 {
 491				nvidia,pins = "gps_rst_pi3";
 492				nvidia,function = "rsvd0";
 493				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 494				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 495				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 496				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 497			};
 498			uart4_tx_pi4 {
 499				nvidia,pins = "uart4_tx_pi4";
 500				nvidia,function = "uartd";
 501				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 502				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 503				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 504				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 505			};
 506			uart4_rx_pi5 {
 507				nvidia,pins = "uart4_rx_pi5";
 508				nvidia,function = "uartd";
 509				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 510				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 511				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 512				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 513			};
 514			uart4_rts_pi6 {
 515				nvidia,pins = "uart4_rts_pi6";
 516				nvidia,function = "uartd";
 517				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 518				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 519				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 520				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 521			};
 522			uart4_cts_pi7 {
 523				nvidia,pins = "uart4_cts_pi7";
 524				nvidia,function = "uartd";
 525				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 526				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 527				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 528				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 529			};
 530			gen1_i2c_sda_pj0 {
 531				nvidia,pins = "gen1_i2c_sda_pj0";
 532				nvidia,function = "i2c1";
 533				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 534				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 535				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 536				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 537				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 538			};
 539			gen1_i2c_scl_pj1 {
 540				nvidia,pins = "gen1_i2c_scl_pj1";
 541				nvidia,function = "i2c1";
 542				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 543				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 544				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 545				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 546				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 547			};
 548			gen2_i2c_scl_pj2 {
 549				nvidia,pins = "gen2_i2c_scl_pj2";
 550				nvidia,function = "i2c2";
 551				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 552				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 553				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 554				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 555				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
 556			};
 557			gen2_i2c_sda_pj3 {
 558				nvidia,pins = "gen2_i2c_sda_pj3";
 559				nvidia,function = "i2c2";
 560				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 561				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 562				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 563				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 564				nvidia,io-hv = <TEGRA_PIN_ENABLE>;
 565			};
 566			dap4_fs_pj4 {
 567				nvidia,pins = "dap4_fs_pj4";
 568				nvidia,function = "rsvd1";
 569				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 570				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 571				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 572				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 573			};
 574			dap4_din_pj5 {
 575				nvidia,pins = "dap4_din_pj5";
 576				nvidia,function = "rsvd1";
 577				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 578				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 579				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 580				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 581			};
 582			dap4_dout_pj6 {
 583				nvidia,pins = "dap4_dout_pj6";
 584				nvidia,function = "rsvd1";
 585				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 586				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 587				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 588				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 589			};
 590			dap4_sclk_pj7 {
 591				nvidia,pins = "dap4_sclk_pj7";
 592				nvidia,function = "rsvd1";
 593				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 594				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 595				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 596				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 597			};
 598			pk0 {
 599				nvidia,pins = "pk0";
 600				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 601				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 602				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 603				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 604			};
 605			pk1 {
 606				nvidia,pins = "pk1";
 607				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 608				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 609				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 610				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 611			};
 612			pk2 {
 613				nvidia,pins = "pk2";
 614				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 615				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 616				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 617				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 618			};
 619			pk3 {
 620				nvidia,pins = "pk3";
 621				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 622				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 623				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 624				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 625			};
 626			pk4 {
 627				nvidia,pins = "pk4";
 628				nvidia,function = "rsvd1";
 629				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 630				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 631				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 632				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 633			};
 634			pk5 {
 635				nvidia,pins = "pk5";
 636				nvidia,function = "rsvd1";
 637				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 638				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 639				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 640				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 641			};
 642			pk6 {
 643				nvidia,pins = "pk6";
 644				nvidia,function = "rsvd1";
 645				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 646				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 647				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 648				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 649			};
 650			pk7 {
 651				nvidia,pins = "pk7";
 652				nvidia,function = "rsvd1";
 653				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 654				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 655				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 656				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 657			};
 658			pl0 {
 659				nvidia,pins = "pl0";
 660				nvidia,function = "rsvd0";
 661				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 662				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 663				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 664				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 665			};
 666			pl1 {
 667				nvidia,pins = "pl1";
 668				nvidia,function = "rsvd1";
 669				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 670				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 671				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 672				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 673			};
 674			sdmmc1_clk_pm0 {
 675				nvidia,pins = "sdmmc1_clk_pm0";
 676				nvidia,function = "rsvd1";
 677				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 678				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 679				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 680				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 681			};
 682			sdmmc1_cmd_pm1 {
 683				nvidia,pins = "sdmmc1_cmd_pm1";
 684				nvidia,function = "rsvd2";
 685				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 686				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 687				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 688				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 689			};
 690			sdmmc1_dat3_pm2 {
 691				nvidia,pins = "sdmmc1_dat3_pm2";
 692				nvidia,function = "rsvd2";
 693				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 694				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 695				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 696				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 697			};
 698			sdmmc1_dat2_pm3 {
 699				nvidia,pins = "sdmmc1_dat2_pm3";
 700				nvidia,function = "rsvd2";
 701				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 702				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 703				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 704				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 705			};
 706			sdmmc1_dat1_pm4 {
 707				nvidia,pins = "sdmmc1_dat1_pm4";
 708				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 709				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 710				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 711				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 712			};
 713			sdmmc1_dat0_pm5 {
 714				nvidia,pins = "sdmmc1_dat0_pm5";
 715				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 716				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 717				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 718				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 719			};
 720			sdmmc3_clk_pp0 {
 721				nvidia,pins = "sdmmc3_clk_pp0";
 722				nvidia,function = "rsvd1";
 723				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 724				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 725				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 726				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 727			};
 728			sdmmc3_cmd_pp1 {
 729				nvidia,pins = "sdmmc3_cmd_pp1";
 730				nvidia,function = "rsvd1";
 731				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 732				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 733				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 734				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 735			};
 736			sdmmc3_dat3_pp2 {
 737				nvidia,pins = "sdmmc3_dat3_pp2";
 738				nvidia,function = "rsvd1";
 739				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 740				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 741				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 742				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 743			};
 744			sdmmc3_dat2_pp3 {
 745				nvidia,pins = "sdmmc3_dat2_pp3";
 746				nvidia,function = "rsvd1";
 747				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 748				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 749				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 750				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 751			};
 752			sdmmc3_dat1_pp4 {
 753				nvidia,pins = "sdmmc3_dat1_pp4";
 754				nvidia,function = "rsvd1";
 755				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 756				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 757				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 758				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 759			};
 760			sdmmc3_dat0_pp5 {
 761				nvidia,pins = "sdmmc3_dat0_pp5";
 762				nvidia,function = "rsvd1";
 763				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 764				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 765				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 766				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 767			};
 768			cam1_mclk_ps0 {
 769				nvidia,pins = "cam1_mclk_ps0";
 770				nvidia,function = "extperiph3";
 771				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 772				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 773				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 774				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 775			};
 776			cam2_mclk_ps1 {
 777				nvidia,pins = "cam2_mclk_ps1";
 778				nvidia,function = "extperiph3";
 779				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 780				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 781				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 782				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 783			};
 784			cam_i2c_scl_ps2 {
 785				nvidia,pins = "cam_i2c_scl_ps2";
 786				nvidia,function = "i2cvi";
 787				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 788				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 789				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 790				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 791				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 792			};
 793			cam_i2c_sda_ps3 {
 794				nvidia,pins = "cam_i2c_sda_ps3";
 795				nvidia,function = "i2cvi";
 796				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 797				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 798				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 799				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 800				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
 801			};
 802			cam_rst_ps4 {
 803				nvidia,pins = "cam_rst_ps4";
 804				nvidia,function = "rsvd1";
 805				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 806				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 807				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 808				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 809			};
 810			cam_af_en_ps5 {
 811				nvidia,pins = "cam_af_en_ps5";
 812				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 813				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 814				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 815				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 816			};
 817			cam_flash_en_ps6 {
 818				nvidia,pins = "cam_flash_en_ps6";
 819				nvidia,function = "rsvd2";
 820				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 821				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 822				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 823				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 824			};
 825			cam1_pwdn_ps7 {
 826				nvidia,pins = "cam1_pwdn_ps7";
 827				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 828				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 829				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 830				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 831			};
 832			cam2_pwdn_pt0 {
 833				nvidia,pins = "cam2_pwdn_pt0";
 834				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 835				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 836				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 837				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 838			};
 839			cam1_strobe_pt1 {
 840				nvidia,pins = "cam1_strobe_pt1";
 841				nvidia,function = "rsvd1";
 842				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 843				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 844				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 845				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 846			};
 847			uart1_tx_pu0 {
 848				nvidia,pins = "uart1_tx_pu0";
 849				nvidia,function = "uarta";
 850				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 851				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 852				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 853				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 854			};
 855			uart1_rx_pu1 {
 856				nvidia,pins = "uart1_rx_pu1";
 857				nvidia,function = "uarta";
 858				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 859				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 860				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 861				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 862			};
 863			uart1_rts_pu2 {
 864				nvidia,pins = "uart1_rts_pu2";
 865				nvidia,function = "rsvd1";
 866				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 867				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 868				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 869				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 870			};
 871			uart1_cts_pu3 {
 872				nvidia,pins = "uart1_cts_pu3";
 873				nvidia,function = "rsvd1";
 874				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 875				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 876				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 877				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 878			};
 879			lcd_bl_pwm_pv0 {
 880				nvidia,pins = "lcd_bl_pwm_pv0";
 881				nvidia,function = "rsvd3";
 882				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 883				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 884				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 885				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 886			};
 887			lcd_bl_en_pv1 {
 888				nvidia,pins = "lcd_bl_en_pv1";
 889				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 890				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 891				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 892				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 893			};
 894			lcd_rst_pv2 {
 895				nvidia,pins = "lcd_rst_pv2";
 896				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 897				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 898				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 899				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 900			};
 901			lcd_gpio1_pv3 {
 902				nvidia,pins = "lcd_gpio1_pv3";
 903				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 904				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 905				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 906				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 907			};
 908			lcd_gpio2_pv4 {
 909				nvidia,pins = "lcd_gpio2_pv4";
 910				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 911				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 912				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 913				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 914			};
 915			ap_ready_pv5 {
 916				nvidia,pins = "ap_ready_pv5";
 917				nvidia,function = "rsvd0";
 918				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 919				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 920				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 921				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 922			};
 923			touch_rst_pv6 {
 924				nvidia,pins = "touch_rst_pv6";
 925				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 926				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 927				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 928				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 929			};
 930			touch_clk_pv7 {
 931				nvidia,pins = "touch_clk_pv7";
 932				nvidia,function = "touch";
 933				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 934				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 935				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 936				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 937			};
 938			modem_wake_ap_px0 {
 939				nvidia,pins = "modem_wake_ap_px0";
 940				nvidia,function = "rsvd0";
 941				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 942				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 943				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 944				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 945			};
 946			touch_int_px1 {
 947				nvidia,pins = "touch_int_px1";
 948				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 949				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 950				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 951				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 952			};
 953			motion_int_px2 {
 954				nvidia,pins = "motion_int_px2";
 955				nvidia,function = "rsvd0";
 956				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 957				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 958				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 959				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 960			};
 961			als_prox_int_px3 {
 962				nvidia,pins = "als_prox_int_px3";
 963				nvidia,function = "rsvd0";
 964				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 965				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 966				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 967				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 968			};
 969			temp_alert_px4 {
 970				nvidia,pins = "temp_alert_px4";
 971				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 972				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 973				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 974				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 975			};
 976			button_power_on_px5 {
 977				nvidia,pins = "button_power_on_px5";
 978				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 979				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 980				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 981				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 982			};
 983			button_vol_up_px6 {
 984				nvidia,pins = "button_vol_up_px6";
 985				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 986				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 987				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 988				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 989			};
 990			button_vol_down_px7 {
 991				nvidia,pins = "button_vol_down_px7";
 992				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 993				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 994				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 995				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 996			};
 997			button_slide_sw_py0 {
 998				nvidia,pins = "button_slide_sw_py0";
 999				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1000				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1002				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1003			};
1004			button_home_py1 {
1005				nvidia,pins = "button_home_py1";
1006				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1007				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1008				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1009				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1010			};
1011			lcd_te_py2 {
1012				nvidia,pins = "lcd_te_py2";
1013				nvidia,function = "displaya";
1014				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1015				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1016				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1017				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1018			};
1019			pwr_i2c_scl_py3 {
1020				nvidia,pins = "pwr_i2c_scl_py3";
1021				nvidia,function = "i2cpmu";
1022				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1023				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1024				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1025				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1026				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1027			};
1028			pwr_i2c_sda_py4 {
1029				nvidia,pins = "pwr_i2c_sda_py4";
1030				nvidia,function = "i2cpmu";
1031				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1032				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1033				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1034				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1035				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1036			};
1037			clk_32k_out_py5 {
1038				nvidia,pins = "clk_32k_out_py5";
1039				nvidia,function = "soc";
1040				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1041				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1042				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1043				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1044			};
1045			pz0 {
1046				nvidia,pins = "pz0";
1047				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1048				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1049				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1050				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1051			};
1052			pz1 {
1053				nvidia,pins = "pz1";
1054				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1055				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1056				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1057				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1058			};
1059			pz2 {
1060				nvidia,pins = "pz2";
1061				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1062				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1063				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1064				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1065			};
1066			pz3 {
1067				nvidia,pins = "pz3";
1068				nvidia,function = "rsvd1";
1069				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1070				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1071				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1072				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1073			};
1074			pz4 {
1075				nvidia,pins = "pz4";
1076				nvidia,function = "rsvd1";
1077				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1078				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1079				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1080				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1081			};
1082			pz5 {
1083				nvidia,pins = "pz5";
1084				nvidia,function = "soc";
1085				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1086				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1088				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1089			};
1090			dap2_fs_paa0 {
1091				nvidia,pins = "dap2_fs_paa0";
1092				nvidia,function = "i2s2";
1093				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1094				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1095				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1096				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1097			};
1098			dap2_sclk_paa1 {
1099				nvidia,pins = "dap2_sclk_paa1";
1100				nvidia,function = "i2s2";
1101				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1102				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1103				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1104				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1105			};
1106			dap2_din_paa2 {
1107				nvidia,pins = "dap2_din_paa2";
1108				nvidia,function = "i2s2";
1109				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1110				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1111				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1112				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1113			};
1114			dap2_dout_paa3 {
1115				nvidia,pins = "dap2_dout_paa3";
1116				nvidia,function = "i2s2";
1117				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1118				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1119				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1120				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1121			};
1122			aud_mclk_pbb0 {
1123				nvidia,pins = "aud_mclk_pbb0";
1124				nvidia,function = "aud";
1125				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1126				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1127				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1128				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1129			};
1130			dvfs_pwm_pbb1 {
1131				nvidia,pins = "dvfs_pwm_pbb1";
1132				nvidia,function = "rsvd0";
1133				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1134				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1135				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1136				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1137			};
1138			dvfs_clk_pbb2 {
1139				nvidia,pins = "dvfs_clk_pbb2";
1140				nvidia,function = "rsvd0";
1141				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1142				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1143				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1144				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1145			};
1146			gpio_x1_aud_pbb3 {
1147				nvidia,pins = "gpio_x1_aud_pbb3";
1148				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1149				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1150				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1151				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1152			};
1153			gpio_x3_aud_pbb4 {
1154				nvidia,pins = "gpio_x3_aud_pbb4";
1155				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1156				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1157				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1158				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1159			};
1160			hdmi_cec_pcc0 {
1161				nvidia,pins = "hdmi_cec_pcc0";
1162				nvidia,function = "rsvd1";
1163				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1164				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1165				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1166				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1167				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1168			};
1169			hdmi_int_dp_hpd_pcc1 {
1170				nvidia,pins = "hdmi_int_dp_hpd_pcc1";
1171				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1172				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1173				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1174				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1175				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1176			};
1177			spdif_out_pcc2 {
1178				nvidia,pins = "spdif_out_pcc2";
1179				nvidia,function = "rsvd1";
1180				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1181				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1182				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1183				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1184			};
1185			spdif_in_pcc3 {
1186				nvidia,pins = "spdif_in_pcc3";
1187				nvidia,function = "rsvd1";
1188				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1189				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1190				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1191				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1192			};
1193			usb_vbus_en0_pcc4 {
1194				nvidia,pins = "usb_vbus_en0_pcc4";
1195				nvidia,function = "rsvd1";
1196				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1197				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1198				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1199				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1200				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1201			};
1202			usb_vbus_en1_pcc5 {
1203				nvidia,pins = "usb_vbus_en1_pcc5";
1204				nvidia,function = "rsvd1";
1205				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1206				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1207				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1208				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1209				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1210			};
1211			dp_hpd0_pcc6 {
1212				nvidia,pins = "dp_hpd0_pcc6";
1213				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1214				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1215				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1216				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1217			};
1218			pcc7 {
1219				nvidia,pins = "pcc7";
1220				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1221				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1222				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1223				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1224				nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1225			};
1226			spi2_cs1_pdd0 {
1227				nvidia,pins = "spi2_cs1_pdd0";
1228				nvidia,function = "rsvd1";
1229				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1230				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1231				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1232				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1233			};
1234			qspi_sck_pee0 {
1235				nvidia,pins = "qspi_sck_pee0";
1236				nvidia,function = "qspi";
1237				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1238				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1239				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1240				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1241			};
1242			qspi_cs_n_pee1 {
1243				nvidia,pins = "qspi_cs_n_pee1";
1244				nvidia,function = "qspi";
1245				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1246				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1247				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1248				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1249			};
1250			qspi_io0_pee2 {
1251				nvidia,pins = "qspi_io0_pee2";
1252				nvidia,function = "qspi";
1253				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1254				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1255				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1256				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1257			};
1258			qspi_io1_pee3 {
1259				nvidia,pins = "qspi_io1_pee3";
1260				nvidia,function = "qspi";
1261				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1262				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1263				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1264				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1265			};
1266			qspi_io2_pee4 {
1267				nvidia,pins = "qspi_io2_pee4";
1268				nvidia,function = "rsvd1";
1269				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1270				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1271				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1272				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1273			};
1274			qspi_io3_pee5 {
1275				nvidia,pins = "qspi_io3_pee5";
1276				nvidia,function = "rsvd1";
1277				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1278				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1279				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1280				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1281			};
1282			core_pwr_req {
1283				nvidia,pins = "core_pwr_req";
1284				nvidia,function = "core";
1285				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1286				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1287				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1288				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1289			};
1290			cpu_pwr_req {
1291				nvidia,pins = "cpu_pwr_req";
1292				nvidia,function = "cpu";
1293				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1294				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1295				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1296				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1297			};
1298			pwr_int_n {
1299				nvidia,pins = "pwr_int_n";
1300				nvidia,function = "pmi";
1301				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1302				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1303				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1304				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1305			};
1306			clk_32k_in {
1307				nvidia,pins = "clk_32k_in";
1308				nvidia,function = "clk";
1309				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1310				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1311				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1312				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1313			};
1314			jtag_rtck {
1315				nvidia,pins = "jtag_rtck";
1316				nvidia,function = "jtag";
1317				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1318				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1319				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1320				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1321			};
1322			clk_req {
1323				nvidia,pins = "clk_req";
1324				nvidia,function = "rsvd1";
1325				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1326				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1327				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1328				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1329			};
1330			shutdown {
1331				nvidia,pins = "shutdown";
1332				nvidia,function = "shutdown";
1333				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1334				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1335				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1336				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1337			};
1338		};
1339	};
1340
1341	serial@70006000 {
1342		/delete-property/ dmas;
1343		/delete-property/ dma-names;
1344		status = "okay";
1345	};
1346
1347	uartd: serial@70006300 {
1348		compatible = "nvidia,tegra30-hsuart";
1349		reset-names = "serial";
1350		/delete-property/ reg-shift;
1351		status = "okay";
1352
1353		bluetooth {
1354			compatible = "brcm,bcm43540-bt";
1355			max-speed = <4000000>;
1356			brcm,bt-pcm-int-params = [01 02 00 01 01];
1357			device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
1358			shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
1359			interrupt-parent = <&gpio>;
1360			interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>;
1361			interrupt-names = "host-wakeup";
1362		};
1363	};
1364
1365	i2c@7000c000 {
1366		status = "okay";
1367		clock-frequency = <1000000>;
1368
1369		touchscreen: i2c-hid-dev@20 {
1370				compatible = "hid-over-i2c";
1371				reg = <0x20>;
1372				hid-descr-addr = <0x0020>;
1373				interrupt-parent = <&gpio>;
1374				interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_FALLING>;
1375		};
1376	};
1377
1378	i2c@7000c400 {
1379		status = "okay";
1380		clock-frequency = <1000000>;
1381
1382		ec@1e {
1383			compatible = "google,cros-ec-i2c";
1384			reg = <0x1e>;
1385			interrupt-parent = <&gpio>;
1386			interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
1387			wakeup-source;
1388
1389			ec_i2c_0: i2c-tunnel {
1390				compatible = "google,cros-ec-i2c-tunnel";
1391				#address-cells = <1>;
1392				#size-cells = <0>;
1393
1394				google,remote-bus = <0>;
1395
1396				battery: bq27742@55 {
1397					compatible = "ti,bq27742";
1398					reg = <0x55>;
 
1399				};
1400			};
1401
1402			usbc_extcon0: extcon0 {
1403				compatible = "google,extcon-usbc-cros-ec";
1404				google,usb-port-id = <0>;
1405			};
1406		};
1407	};
1408
1409	i2c@7000d000 {
1410		status = "okay";
1411		clock-frequency = <1000000>;
1412
1413		max77621_cpu: max77621@1b {
1414			compatible = "maxim,max77621";
1415			reg = <0x1b>;
1416			interrupt-parent = <&gpio>;
1417			interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>;
1418			regulator-always-on;
1419			regulator-boot-on;
1420			regulator-min-microvolt = <800000>;
1421			regulator-max-microvolt = <1231250>;
1422			regulator-name = "PPVAR_CPU";
1423			regulator-ramp-delay = <12500>;
1424			maxim,dvs-default-state = <1>;
1425			maxim,enable-active-discharge;
1426			maxim,enable-bias-control;
1427			maxim,enable-gpio = <&pmic 5 0>;
1428			maxim,externally-enable;
1429		};
1430
1431		max77621_gpu: regulator@1c {
1432			compatible = "maxim,max77621";
1433			reg = <0x1c>;
1434			interrupt-parent = <&gpio>;
1435			interrupts = <TEGRA_GPIO(A, 6) IRQ_TYPE_LEVEL_LOW>;
1436			regulator-min-microvolt = <840000>;
1437			regulator-max-microvolt = <1150000>;
1438			regulator-name = "PPVAR_GPU";
1439			regulator-ramp-delay = <12500>;
1440			maxim,dvs-default-state = <1>;
1441			maxim,enable-active-discharge;
1442			maxim,enable-bias-control;
1443			maxim,enable-gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
1444			maxim,externally-enable;
1445		};
1446
1447		pmic: pmic@3c {
1448			compatible = "maxim,max77620";
1449			reg = <0x3c>;
1450			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1451
1452			#interrupt-cells = <2>;
1453			interrupt-controller;
1454
1455			gpio-controller;
1456			#gpio-cells = <2>;
1457
1458			pinctrl-names = "default";
1459			pinctrl-0 = <&max77620_default>;
1460
1461			fps {
1462				fps0 {
1463					maxim,shutdown-fps-time-period-us = <5120>;
1464					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1465				};
1466
1467				fps1 {
1468					maxim,shutdown-fps-time-period-us = <5120>;
1469					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1470					maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
1471				};
1472
1473				fps2 {
1474					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1475				};
1476			};
1477
1478			max77620_default: pinmux {
1479				gpio0_1_2_7 {
1480					pins = "gpio0", "gpio1", "gpio2", "gpio7";
1481					function = "gpio";
1482				};
1483
1484				/*
1485				 * GPIO3 is used to en_pp3300, and it is part of power
1486				 * sequence, So it must be sequenced up (automatically
1487				 * set by OTP) and down properly.
1488				 */
1489				gpio3 {
1490					pins = "gpio3";
1491					function = "fps-out";
1492					drive-open-drain = <1>;
1493					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1494					maxim,active-fps-power-up-slot = <4>;
1495					maxim,active-fps-power-down-slot = <2>;
1496				};
1497
1498				gpio4 {
 
 
 
 
 
 
1499					pins = "gpio4";
1500					function = "32k-out1";
1501				};
 
1502
1503				gpio5_6 {
1504					pins = "gpio5", "gpio6";
1505					function = "gpio";
1506					drive-push-pull = <1>;
 
 
 
 
 
 
 
 
 
 
1507				};
1508			};
1509
1510			regulators {
1511				in-ldo0-1-supply = <&pp1350>;
1512				in-ldo2-supply = <&pp3300>;
1513				in-ldo3-5-supply = <&pp3300>;
1514				in-ldo7-8-supply = <&pp1350>;
1515
1516				ppvar_soc: sd0 {
1517					regulator-name = "PPVAR_SOC";
1518					regulator-min-microvolt = <825000>;
1519					regulator-max-microvolt = <1125000>;
1520					regulator-always-on;
1521					regulator-boot-on;
1522					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1523					maxim,active-fps-power-up-slot = <1>;
1524					maxim,active-fps-power-down-slot = <7>;
1525				};
1526
1527				pp1100_sd1: sd1 {
1528					regulator-name = "PP1100";
1529					regulator-min-microvolt = <1125000>;
1530					regulator-max-microvolt = <1125000>;
1531					regulator-always-on;
1532					regulator-boot-on;
1533					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1534					maxim,active-fps-power-up-slot = <5>;
1535					maxim,active-fps-power-down-slot = <1>;
1536				};
1537
1538				pp1350: sd2 {
1539					regulator-name = "PP1350";
1540					regulator-min-microvolt = <1350000>;
1541					regulator-max-microvolt = <1350000>;
1542					regulator-always-on;
1543					regulator-boot-on;
1544					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1545					maxim,active-fps-power-up-slot = <2>;
1546					maxim,active-fps-power-down-slot = <5>;
1547				};
1548
1549				pp1800: sd3 {
1550					regulator-name = "PP1800";
1551					regulator-min-microvolt = <1800000>;
1552					regulator-max-microvolt = <1800000>;
1553					regulator-always-on;
1554					regulator-boot-on;
1555					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1556					maxim,active-fps-power-up-slot = <3>;
1557					maxim,active-fps-power-down-slot = <3>;
1558				};
1559
1560				pp1200_avdd: ldo0 {
1561					regulator-name = "PP1200_AVDD";
1562					regulator-min-microvolt = <1200000>;
1563					regulator-max-microvolt = <1200000>;
1564					regulator-enable-ramp-delay = <26>;
1565					regulator-ramp-delay = <100000>;
1566					regulator-boot-on;
1567					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1568					maxim,active-fps-power-up-slot = <0>;
1569					maxim,active-fps-power-down-slot = <7>;
1570				};
1571
1572				pp1200_rcam: ldo1 {
1573					regulator-name = "PP1200_RCAM";
1574					regulator-min-microvolt = <1200000>;
1575					regulator-max-microvolt = <1200000>;
1576					regulator-enable-ramp-delay = <22>;
1577					regulator-ramp-delay = <100000>;
1578					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1579					maxim,active-fps-power-up-slot = <0>;
1580					maxim,active-fps-power-down-slot = <7>;
1581				};
1582
1583				pp_ldo2: ldo2 {
1584					regulator-name = "PP_LDO2";
1585					regulator-min-microvolt = <1800000>;
1586					regulator-max-microvolt = <1800000>;
1587					regulator-enable-ramp-delay = <62>;
1588					regulator-ramp-delay = <11000>;
1589					regulator-always-on;
1590					regulator-boot-on;
1591					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1592					maxim,active-fps-power-up-slot = <0>;
1593					maxim,active-fps-power-down-slot = <7>;
1594				};
1595
1596				pp2800l_rcam: ldo3 {
1597					regulator-name = "PP2800L_RCAM";
1598					regulator-min-microvolt = <2800000>;
1599					regulator-max-microvolt = <2800000>;
1600					regulator-enable-ramp-delay = <50>;
1601					regulator-ramp-delay = <100000>;
1602					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1603					maxim,active-fps-power-up-slot = <0>;
1604					maxim,active-fps-power-down-slot = <7>;
1605				};
1606
1607				pp100_soc_rtc: ldo4 {
1608					regulator-name = "PP1100_SOC_RTC";
1609					regulator-min-microvolt = <850000>;
1610					regulator-max-microvolt = <850000>;
1611					regulator-enable-ramp-delay = <22>;
1612					regulator-ramp-delay = <100000>;
1613					regulator-always-on; /* Check this */
1614					regulator-boot-on;
1615					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1616					maxim,active-fps-power-up-slot = <1>;
1617					maxim,active-fps-power-down-slot = <7>;
1618				};
1619
1620				pp2800l_fcam: ldo5 {
1621					regulator-name = "PP2800L_FCAM";
1622					regulator-min-microvolt = <2800000>;
1623					regulator-max-microvolt = <2800000>;
1624					regulator-enable-ramp-delay = <62>;
1625					regulator-ramp-delay = <100000>;
1626					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1627					maxim,active-fps-power-up-slot = <0>;
1628					maxim,active-fps-power-down-slot = <7>;
1629				};
1630
1631				ldo6 {
1632					/* Unused. */
1633					regulator-name = "PP_LDO6";
1634					regulator-min-microvolt = <1800000>;
1635					regulator-max-microvolt = <1800000>;
1636					regulator-enable-ramp-delay = <36>;
1637					regulator-ramp-delay = <100000>;
1638					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1639					maxim,active-fps-power-up-slot = <0>;
1640					maxim,active-fps-power-down-slot = <7>;
1641				};
1642
1643				pp1050_avdd: ldo7 {
1644					regulator-name = "PP1050_AVDD";
1645					regulator-min-microvolt = <1050000>;
1646					regulator-max-microvolt = <1050000>;
1647					regulator-enable-ramp-delay = <24>;
1648					regulator-ramp-delay = <100000>;
1649					regulator-always-on;
1650					regulator-boot-on;
1651					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1652					maxim,active-fps-power-up-slot = <3>;
1653					maxim,active-fps-power-down-slot = <4>;
1654				};
1655
1656				avddio_1v05: ldo8 {
1657					regulator-name = "AVDDIO_1V05";
1658					regulator-min-microvolt = <1050000>;
1659					regulator-max-microvolt = <1050000>;
1660					regulator-enable-ramp-delay = <22>;
1661					regulator-ramp-delay = <100000>;
1662					regulator-boot-on;
1663					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1664					maxim,active-fps-power-up-slot = <0>;
1665					maxim,active-fps-power-down-slot = <7>;
1666				};
1667			};
1668		};
1669	};
1670
1671	i2c@7000d100 {
1672		status = "okay";
1673		clock-frequency = <400000>;
1674
1675		nau8825@1a {
1676			compatible = "nuvoton,nau8825";
1677			reg = <0x1a>;
1678			interrupt-parent = <&gpio>;
1679			interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>;
1680			clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>;
1681			clock-names = "mclk";
1682
1683			nuvoton,jkdet-enable;
1684			nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>;
1685			nuvoton,vref-impedance = <2>;
1686			nuvoton,micbias-voltage = <6>;
1687			nuvoton,sar-threshold-num = <4>;
1688			nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
1689			nuvoton,sar-hysteresis = <1>;
1690			nuvoton,sar-voltage = <0>;
1691			nuvoton,sar-compare-time = <0>;
1692			nuvoton,sar-sampling-time = <0>;
1693			nuvoton,short-key-debounce = <2>;
1694			nuvoton,jack-insert-debounce = <7>;
1695			nuvoton,jack-eject-debounce = <7>;
1696			status = "okay";
1697		};
1698
1699		backlight: backlight@2c {
1700			compatible = "ti,lp8557";
1701			reg = <0x2c>;
1702			power-supply = <&pplcd_vdd>;
1703			enable-supply = <&pp1800_lcdio>;
1704			bl-name = "lp8557-backlight";
1705			dev-ctrl = /bits/ 8 <0x01>;
1706			init-brt = /bits/ 8 <0x80>;
1707
1708			/* Full scale current, 20mA */
1709			rom-11h {
1710				rom-addr = /bits/ 8 <0x11>;
1711				rom-val = /bits/ 8 <0x05>;
1712			};
1713			/* Frequency = 4.9kHz, magic undocumented val */
1714			rom-12h {
1715				rom-addr = /bits/ 8 <0x12>;
1716				rom-val = /bits/ 8 <0x29>;
1717			};
1718			/* Boost freq = 1MHz, BComp option = 1 */
1719			rom-13h {
1720				rom-addr = /bits/ 8 <0x13>;
1721				rom-val = /bits/ 8 <0x03>;
1722			};
1723			/* 4V OV, 6 output LED string enabled */
1724			rom-14h {
1725				rom-addr = /bits/ 8 <0x14>;
1726				rom-val = /bits/ 8 <0xbf>;
1727			};
1728		};
1729
1730		audio-codec@2d {
1731			compatible = "realtek,rt5677";
1732			reg = <0x2d>;
1733			interrupt-parent = <&gpio>;
1734			interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>;
1735			realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>;
1736			gpio-controller;
1737			#gpio-cells = <2>;
1738			status = "okay";
1739		};
1740
1741		tmp451: temperature-sensor@4c {
1742			compatible = "ti,tmp451";
1743			reg = <0x4c>;
1744			interrupt-parent = <&gpio>;
1745			interrupts = <TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW>;
1746			vcc-supply = <&pp1800>;
1747			#thermal-sensor-cells = <1>;
1748		};
1749	};
1750
1751	pmc@7000e400 {
1752		nvidia,invert-interrupt;
1753		nvidia,suspend-mode = <0>;
1754		nvidia,cpu-pwr-good-time = <0>;
1755		nvidia,cpu-pwr-off-time = <0>;
1756		nvidia,core-pwr-good-time = <12000 6000>;
1757		nvidia,core-pwr-off-time = <39053>;
1758		nvidia,core-power-req-active-high;
1759		nvidia,sys-clock-req-active-high;
1760		status = "okay";
1761	};
1762
1763	usb@70090000 {
1764		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
1765		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>;
1766		phy-names = "usb2-0", "usb3-0";
1767
1768		dvddio-pex-supply = <&avddio_1v05>;
1769		hvddio-pex-supply = <&pp1800>;
1770		avdd-usb-supply = <&pp3300>;
 
 
 
 
1771
1772		status = "okay";
1773	};
1774
1775	padctl@7009f000 {
1776		status = "okay";
1777
1778		avdd-pll-utmip-supply = <&pp1800>;
1779		avdd-pll-uerefe-supply = <&pp1050_avdd>;
1780		dvdd-pex-pll-supply = <&avddio_1v05>;
1781		hvdd-pex-pll-e-supply = <&pp1800>;
1782
1783		pads {
1784			usb2 {
1785				status = "okay";
1786
1787				lanes {
1788					usb2-0 {
1789						nvidia,function = "xusb";
1790						status = "okay";
1791					};
1792				};
1793			};
1794
1795			pcie {
1796				status = "okay";
1797
1798				lanes {
1799					pcie-6 {
1800						nvidia,function = "usb3-ss";
1801						status = "okay";
1802					};
1803				};
1804			};
1805		};
1806
1807		ports {
1808			usb2-0 {
1809				status = "okay";
1810				vbus-supply = <&usbc_vbus>;
1811				mode = "otg";
1812			};
1813
1814			usb3-0 {
1815				nvidia,usb2-companion = <0>;
1816				status = "okay";
1817			};
1818		};
1819	};
1820
1821	mmc@700b0200 {
1822		power-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
1823		bus-width = <4>;
1824		non-removable;
1825		vqmmc-supply = <&pp1800>;
1826		vmmc-supply = <&pp3300>;
1827		#address-cells = <1>;
1828		#size-cells = <0>;
1829		status = "okay";
1830
1831		wifi@1 {
1832			compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac";
1833			reg = <1>;
1834			interrupt-parent = <&gpio>;
1835			interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>;
1836			interrupt-names = "host-wake";
1837		};
1838	};
1839
1840	mmc@700b0600 {
1841		bus-width = <8>;
1842		non-removable;
1843		status = "okay";
1844	};
1845
1846	clock@70110000 {
1847		status = "okay";
1848		nvidia,cf = <6>;
1849		nvidia,ci = <0>;
1850		nvidia,cg = <2>;
1851		nvidia,droop-ctrl = <0x00000f00>;
1852		nvidia,force-mode = <1>;
1853		nvidia,i2c-fs-rate = <400000>;
1854		nvidia,sample-rate = <12500>;
1855		vdd-cpu-supply = <&max77621_cpu>;
1856	};
1857
1858	aconnect@702c0000 {
1859		status = "okay";
1860
1861		dma-controller@702e2000 {
1862			status = "okay";
1863		};
1864
1865		interrupt-controller@702f9000 {
1866			status = "okay";
1867		};
1868	};
1869
1870	clk32k_in: clock-32k {
1871		compatible = "fixed-clock";
1872		clock-frequency = <32768>;
1873		#clock-cells = <0>;
 
 
 
 
 
 
 
1874	};
1875
1876	cpus {
1877		cpu@0 {
1878			enable-method = "psci";
1879		};
1880
1881		cpu@1 {
1882			enable-method = "psci";
1883		};
1884
1885		cpu@2 {
1886			enable-method = "psci";
1887		};
1888
1889		cpu@3 {
1890			enable-method = "psci";
1891		};
1892
1893		idle-states {
1894			cpu-sleep {
1895				arm,psci-suspend-param = <0x00010007>;
1896				status = "okay";
1897			};
1898		};
1899	};
1900
1901	gpio-keys {
1902		compatible = "gpio-keys";
 
1903
1904		key-power {
1905			label = "Power";
1906			gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
1907			linux,code = <KEY_POWER>;
1908			debounce-interval = <30>;
1909			wakeup-source;
1910		};
1911
1912		key-volume-down {
1913			label = "Volume Down";
1914			gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
1915			linux,code = <KEY_VOLUMEDOWN>;
1916		};
1917
1918		key-volume-up {
1919			label = "Volume Up";
1920			gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
1921			linux,code = <KEY_VOLUMEUP>;
1922		};
1923
1924		switch-lid {
1925			label = "Lid";
1926			gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
1927			linux,input-type = <EV_SW>;
1928			linux,code = <SW_LID>;
1929			wakeup-source;
1930		};
1931
1932		switch-tablet-mode {
1933			label = "Tablet Mode";
1934			gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
1935			linux,input-type = <EV_SW>;
1936			linux,code = <SW_TABLET_MODE>;
1937			wakeup-source;
1938		};
 
 
 
 
 
 
 
 
 
 
 
 
1939	};
1940
1941	max98357a {
1942		compatible = "maxim,max98357a";
1943		status = "okay";
1944	};
1945
1946	psci {
1947		compatible = "arm,psci-1.0";
1948		method = "smc";
1949	};
1950
1951	ppvar_sys: regulator-ppvar-sys {
1952		compatible = "regulator-fixed";
1953		regulator-name = "PPVAR_SYS";
1954		regulator-min-microvolt = <4400000>;
1955		regulator-max-microvolt = <4400000>;
1956		regulator-always-on;
1957	};
1958
1959	pplcd_vdd: regulator-pplcd-vdd {
1960		compatible = "regulator-fixed";
1961		regulator-name = "PPLCD_VDD";
1962		regulator-min-microvolt = <4400000>;
1963		regulator-max-microvolt = <4400000>;
1964		gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
1965		enable-active-high;
1966		regulator-boot-on;
1967	};
1968
1969	pp3000_always: regulator-pp3000-always {
1970		compatible = "regulator-fixed";
1971		regulator-name = "PP3000_ALWAYS";
1972		regulator-min-microvolt = <3000000>;
1973		regulator-max-microvolt = <3000000>;
1974		regulator-always-on;
1975	};
 
1976
1977	pp3300: regulator-pp3000 {
1978		compatible = "regulator-fixed";
1979		regulator-name = "PP3300";
1980		regulator-min-microvolt = <3300000>;
1981		regulator-max-microvolt = <3300000>;
1982		regulator-boot-on;
1983		regulator-always-on;
1984		enable-active-high;
1985	};
 
1986
1987	pp5000: regulator-pp5000 {
1988		compatible = "regulator-fixed";
1989		regulator-name = "PP5000";
1990		regulator-min-microvolt = <5000000>;
1991		regulator-max-microvolt = <5000000>;
1992		regulator-always-on;
1993	};
 
1994
1995	pp1800_lcdio: regulator-pp1800-lcdio {
1996		compatible = "regulator-fixed";
1997		regulator-name = "PP1800_LCDIO";
1998		regulator-min-microvolt = <1800000>;
1999		regulator-max-microvolt = <1800000>;
2000		gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
2001		enable-active-high;
2002		regulator-boot-on;
2003	};
 
2004
2005	pp1800_cam: regulator-pp1800-cam {
2006		compatible = "regulator-fixed";
2007		regulator-name = "PP1800_CAM";
2008		regulator-min-microvolt = <1800000>;
2009		regulator-max-microvolt = <1800000>;
2010		gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
2011		enable-active-high;
2012	};
2013
2014	usbc_vbus: regulator-usbc-vbus {
2015		compatible = "regulator-fixed";
2016		regulator-name = "USBC_VBUS";
2017		regulator-min-microvolt = <5000000>;
2018		regulator-max-microvolt = <5000000>;
2019	};
 
 
 
 
2020
2021	vdd_dsi_csi: regulator-vdd-dsi-csi {
2022		compatible = "regulator-fixed";
2023		regulator-name = "AVDD_DSI_CSI_1V2";
2024		regulator-min-microvolt = <1200000>;
2025		regulator-max-microvolt = <1200000>;
2026		vin-supply = <&pp1200_avdd>;
 
 
 
 
 
 
 
 
 
 
 
2027	};
2028};