1.. SPDX-License-Identifier: GPL-2.0+
  2
  3===============================================
  4Xilinx ZynqMP Ultrascale+ DisplayPort Subsystem
  5===============================================
  6
  7This subsystem handles DisplayPort video and audio output on the ZynqMP. It
  8supports in-memory framebuffers with the DisplayPort DMA controller
  9(xilinx-dpdma), as well as "live" video and audio from the programmable logic
 10(PL). This subsystem can perform several transformations, including color space
 11conversion, alpha blending, and audio mixing, although not all features are
 12currently supported.
 13
 14debugfs
 15-------
 16
 17To support debugging and compliance testing, several test modes can be enabled
 18though debugfs. The following files in /sys/kernel/debug/dri/X/DP-1/test/
 19control the DisplayPort test modes:
 20
 21active:
 22        Writing a 1 to this file will activate test mode, and writing a 0 will
 23        deactivate test mode. Writing a 1 or 0 when the test mode is already
 24        active/inactive will re-activate/re-deactivate test mode. When test
 25        mode is inactive, changes made to other files will have no (immediate)
 26        effect, although the settings will be saved for when test mode is
 27        activated. When test mode is active, changes made to other files will
 28        apply immediately.
 29
 30custom:
 31        Custom test pattern value
 32
 33downspread:
 34        Enable/disable clock downspreading (spread-spectrum clocking) by
 35        writing 1/0
 36
 37enhanced:
 38        Enable/disable enhanced framing
 39
 40ignore_aux_errors:
 41        Ignore AUX errors when set to 1. Writes to this file take effect
 42        immediately (regardless of whether test mode is active) and affect all
 43        AUX transfers.
 44
 45ignore_hpd:
 46        Ignore hotplug events (such as cable removals or monitor link
 47        retraining requests) when set to 1. Writes to this file take effect
 48        immediately (regardless of whether test mode is active).
 49
 50laneX_preemphasis:
 51        Preemphasis from 0 (lowest) to 2 (highest) for lane X
 52
 53laneX_swing:
 54        Voltage swing from 0 (lowest) to 3 (highest) for lane X
 55
 56lanes:
 57        Number of lanes to use (1, 2, or 4)
 58
 59pattern:
 60        Test pattern. May be one of:
 61
 62                video
 63                        Use regular video input
 64
 65                symbol-error
 66                        Symbol error measurement pattern
 67
 68                prbs7
 69                        Output of the PRBS7 (x^7 + x^6 + 1) polynomial
 70
 71                80bit-custom
 72                        A custom 80-bit pattern
 73
 74                cp2520
 75                        HBR2 compliance eye pattern
 76
 77                tps1
 78                        Link training symbol pattern TPS1 (/D10.2/)
 79
 80                tps2
 81                        Link training symbol pattern TPS2
 82
 83                tps3
 84                        Link training symbol pattern TPS3 (for HBR2)
 85
 86rate:
 87        Rate in hertz. One of
 88
 89                * 5400000000 (HBR2)
 90                * 2700000000 (HBR)
 91                * 1620000000 (RBR)
 92
 93You can dump the displayport test settings with the following command::
 94
 95        for prop in /sys/kernel/debug/dri/1/DP-1/test/*; do
 96                printf '%-17s ' ${prop##*/}
 97                if [ ${prop##*/} = custom ]; then
 98                        hexdump -C $prop | head -1
 99                else
100                        cat $prop
101                fi
102        done
103
104The output could look something like::
105
106        active            1
107        custom            00000000  00 00 00 00 00 00 00 00  00 00                    |..........|
108        downspread        0
109        enhanced          1
110        ignore_aux_errors 1
111        ignore_hpd        1
112        lane0_preemphasis 0
113        lane0_swing       3
114        lane1_preemphasis 0
115        lane1_swing       3
116        lanes             2
117        pattern           prbs7
118        rate              1620000000
119
120The recommended test procedure is to connect the board to a monitor,
121configure test mode, activate test mode, and then disconnect the cable
122and connect it to your test equipment of choice. For example, one
123sequence of commands could be::
124
125        echo 1 > /sys/kernel/debug/dri/1/DP-1/test/enhanced
126        echo tps1 > /sys/kernel/debug/dri/1/DP-1/test/pattern
127        echo 1620000000 > /sys/kernel/debug/dri/1/DP-1/test/rate
128        echo 1 > /sys/kernel/debug/dri/1/DP-1/test/ignore_aux_errors
129        echo 1 > /sys/kernel/debug/dri/1/DP-1/test/ignore_hpd
130        echo 1 > /sys/kernel/debug/dri/1/DP-1/test/active
131
132at which point the cable could be disconnected from the monitor.
133
134Internals
135---------
136
137.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_disp.h
138
139.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dpsub.h
140
141.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_kms.h
142
143.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_disp.c
144
145.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dp.c
146
147.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dpsub.c
148
149.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_kms.c