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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// MAX9867 ALSA SoC codec driver
  4//
  5// Copyright 2013-2015 Maxim Integrated Products
  6// Copyright 2018 Ladislav Michl <ladis@linux-mips.org>
  7//
 
 
  8
  9#include <linux/clk.h>
 10#include <linux/delay.h>
 11#include <linux/i2c.h>
 12#include <linux/module.h>
 13#include <linux/regmap.h>
 14#include <sound/pcm_params.h>
 15#include <sound/soc.h>
 16#include <sound/tlv.h>
 17#include "max9867.h"
 18
 19struct max9867_priv {
 20	struct clk *mclk;
 21	struct regmap *regmap;
 22	const struct snd_pcm_hw_constraint_list *constraints;
 23	unsigned int sysclk, pclk;
 24	bool provider, dsp_a;
 25	unsigned int adc_dac_active;
 26};
 27
 28static const char *const max9867_spmode[] = {
 29	"Stereo Diff", "Mono Diff",
 30	"Stereo Cap", "Mono Cap",
 31	"Stereo Single", "Mono Single",
 32	"Stereo Single Fast", "Mono Single Fast"
 33};
 
 
 
 34static const char *const max9867_filter_text[] = {"IIR", "FIR"};
 35
 36static const char *const max9867_adc_dac_filter_text[] = {
 37	"Disabled",
 38	"Elliptical/16/256",
 39	"Butterworth/16/500",
 40	"Elliptical/8/256",
 41	"Butterworth/8/500",
 42	"Butterworth/8-24"
 43};
 44
 45enum max9867_adc_dac {
 46	MAX9867_ADC_LEFT,
 47	MAX9867_ADC_RIGHT,
 48	MAX9867_DAC_LEFT,
 49	MAX9867_DAC_RIGHT,
 50};
 51
 52static int max9867_adc_dac_event(struct snd_soc_dapm_widget *w,
 53	struct snd_kcontrol *kcontrol, int event)
 54{
 55	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 56	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
 57	enum max9867_adc_dac adc_dac;
 58
 59	if (!snd_soc_dapm_widget_name_cmp(w, "ADCL"))
 60		adc_dac = MAX9867_ADC_LEFT;
 61	else if (!snd_soc_dapm_widget_name_cmp(w, "ADCR"))
 62		adc_dac = MAX9867_ADC_RIGHT;
 63	else if (!snd_soc_dapm_widget_name_cmp(w, "DACL"))
 64		adc_dac = MAX9867_DAC_LEFT;
 65	else if (!snd_soc_dapm_widget_name_cmp(w, "DACR"))
 66		adc_dac = MAX9867_DAC_RIGHT;
 67	else
 68		return 0;
 69
 70	if (SND_SOC_DAPM_EVENT_ON(event))
 71		max9867->adc_dac_active |= BIT(adc_dac);
 72	else if (SND_SOC_DAPM_EVENT_OFF(event))
 73		max9867->adc_dac_active &= ~BIT(adc_dac);
 74
 75	return 0;
 76}
 77
 78static int max9867_filter_get(struct snd_kcontrol *kcontrol,
 79			      struct snd_ctl_elem_value *ucontrol)
 80{
 81	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 82	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
 83	unsigned int reg;
 84	int ret;
 85
 86	ret = regmap_read(max9867->regmap, MAX9867_CODECFLTR, &reg);
 87	if (ret)
 88		return -EINVAL;
 89
 90	if (reg & MAX9867_CODECFLTR_MODE)
 91		ucontrol->value.enumerated.item[0] = 1;
 92	else
 93		ucontrol->value.enumerated.item[0] = 0;
 94
 95	return 0;
 96}
 97
 98static int max9867_filter_set(struct snd_kcontrol *kcontrol,
 99			      struct snd_ctl_elem_value *ucontrol)
100{
101	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
102	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
103	unsigned int reg, mode = ucontrol->value.enumerated.item[0];
104	int ret;
105
106	if (mode > 1)
107		return -EINVAL;
108
109	/* don't allow change if ADC/DAC active */
110	if (max9867->adc_dac_active)
111		return -EBUSY;
112
113	/* read current filter mode */
114	ret = regmap_read(max9867->regmap, MAX9867_CODECFLTR, &reg);
115	if (ret)
116		return -EINVAL;
117
118	if (mode)
119		mode = MAX9867_CODECFLTR_MODE;
120
121	/* check if change is needed */
122	if ((reg & MAX9867_CODECFLTR_MODE) == mode)
123		return 0;
124
125	/* shutdown codec before switching filter mode */
126	regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
127		MAX9867_PWRMAN_SHDN, 0);
128
129	/* switch filter mode */
130	regmap_update_bits(max9867->regmap, MAX9867_CODECFLTR,
131		MAX9867_CODECFLTR_MODE, mode);
132
133	/* out of shutdown now */
134	regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
135		MAX9867_PWRMAN_SHDN, MAX9867_PWRMAN_SHDN);
136
137	return 0;
138}
139
140static SOC_ENUM_SINGLE_EXT_DECL(max9867_filter, max9867_filter_text);
141static SOC_ENUM_SINGLE_DECL(max9867_dac_filter, MAX9867_CODECFLTR, 0,
142	max9867_adc_dac_filter_text);
143static SOC_ENUM_SINGLE_DECL(max9867_adc_filter, MAX9867_CODECFLTR, 4,
144	max9867_adc_dac_filter_text);
145static SOC_ENUM_SINGLE_DECL(max9867_spkmode, MAX9867_MODECONFIG, 0,
146	max9867_spmode);
147static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(max9867_master_tlv,
148	 0,  2, TLV_DB_SCALE_ITEM(-8600, 200, 1),
149	 3, 17, TLV_DB_SCALE_ITEM(-7800, 400, 0),
150	18, 25, TLV_DB_SCALE_ITEM(-2000, 200, 0),
151	26, 34, TLV_DB_SCALE_ITEM( -500, 100, 0),
152	35, 40, TLV_DB_SCALE_ITEM(  350,  50, 0),
153);
154static DECLARE_TLV_DB_SCALE(max9867_mic_tlv, 0, 100, 0);
155static DECLARE_TLV_DB_SCALE(max9867_line_tlv, -600, 200, 0);
156static DECLARE_TLV_DB_SCALE(max9867_adc_tlv, -1200, 100, 0);
157static DECLARE_TLV_DB_SCALE(max9867_dac_tlv, -1500, 100, 0);
158static DECLARE_TLV_DB_SCALE(max9867_dacboost_tlv, 0, 600, 0);
159static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(max9867_micboost_tlv,
160	0, 2, TLV_DB_SCALE_ITEM(-2000, 2000, 1),
161	3, 3, TLV_DB_SCALE_ITEM(3000, 0, 0),
162);
163
164static const struct snd_kcontrol_new max9867_snd_controls[] = {
165	SOC_DOUBLE_R_TLV("Master Playback Volume", MAX9867_LEFTVOL,
166			MAX9867_RIGHTVOL, 0, 40, 1, max9867_master_tlv),
167	SOC_DOUBLE_R_TLV("Line Capture Volume", MAX9867_LEFTLINELVL,
168			MAX9867_RIGHTLINELVL, 0, 15, 1, max9867_line_tlv),
169	SOC_DOUBLE_R_TLV("Mic Capture Volume", MAX9867_LEFTMICGAIN,
170			MAX9867_RIGHTMICGAIN, 0, 20, 1, max9867_mic_tlv),
171	SOC_DOUBLE_R_TLV("Mic Boost Capture Volume", MAX9867_LEFTMICGAIN,
172			MAX9867_RIGHTMICGAIN, 5, 3, 0, max9867_micboost_tlv),
173	SOC_SINGLE("Digital Sidetone Volume", MAX9867_SIDETONE, 0, 31, 1),
174	SOC_SINGLE_TLV("Digital Playback Volume", MAX9867_DACLEVEL, 0, 15, 1,
175			max9867_dac_tlv),
176	SOC_SINGLE_TLV("Digital Boost Playback Volume", MAX9867_DACLEVEL, 4, 3, 0,
177			max9867_dacboost_tlv),
178	SOC_DOUBLE_TLV("Digital Capture Volume", MAX9867_ADCLEVEL, 4, 0, 15, 1,
179			max9867_adc_tlv),
 
 
180	SOC_ENUM("Speaker Mode", max9867_spkmode),
181	SOC_SINGLE("Volume Smoothing Switch", MAX9867_MODECONFIG, 6, 1, 0),
182	SOC_SINGLE("Line ZC Switch", MAX9867_MODECONFIG, 5, 1, 0),
183	SOC_ENUM_EXT("DSP Filter", max9867_filter, max9867_filter_get, max9867_filter_set),
184	SOC_ENUM("ADC Filter", max9867_adc_filter),
185	SOC_ENUM("DAC Filter", max9867_dac_filter),
186	SOC_SINGLE("Mono Playback Switch", MAX9867_IFC1B, 3, 1, 0),
187};
188
189/* Input mixer */
190static const struct snd_kcontrol_new max9867_input_mixer_controls[] = {
191	SOC_DAPM_DOUBLE("Line Capture Switch", MAX9867_INPUTCONFIG, 7, 5, 1, 0),
192	SOC_DAPM_DOUBLE("Mic Capture Switch", MAX9867_INPUTCONFIG, 6, 4, 1, 0),
193};
194
195/* Output mixer */
196static const struct snd_kcontrol_new max9867_output_mixer_controls[] = {
197	SOC_DAPM_DOUBLE_R("Line Bypass Switch",
198			  MAX9867_LEFTLINELVL, MAX9867_RIGHTLINELVL, 6, 1, 1),
199};
200
201/* Sidetone mixer */
202static const struct snd_kcontrol_new max9867_sidetone_mixer_controls[] = {
203	SOC_DAPM_DOUBLE("Sidetone Switch", MAX9867_SIDETONE, 6, 7, 1, 0),
204};
205
206/* Line out switch */
207static const struct snd_kcontrol_new max9867_line_out_control =
208	SOC_DAPM_DOUBLE_R("Switch",
209			  MAX9867_LEFTVOL, MAX9867_RIGHTVOL, 6, 1, 1);
210
211/* DMIC mux */
212static const char *const dmic_mux_text[] = {
213	"ADC", "DMIC"
214};
215static SOC_ENUM_SINGLE_DECL(left_dmic_mux_enum,
216			    MAX9867_MICCONFIG, 5, dmic_mux_text);
217static SOC_ENUM_SINGLE_DECL(right_dmic_mux_enum,
218			    MAX9867_MICCONFIG, 4, dmic_mux_text);
219static const struct snd_kcontrol_new max9867_left_dmic_mux =
220	SOC_DAPM_ENUM("DMICL Mux", left_dmic_mux_enum);
221static const struct snd_kcontrol_new max9867_right_dmic_mux =
222	SOC_DAPM_ENUM("DMICR Mux", right_dmic_mux_enum);
223
224static const struct snd_soc_dapm_widget max9867_dapm_widgets[] = {
225	SND_SOC_DAPM_INPUT("MICL"),
226	SND_SOC_DAPM_INPUT("MICR"),
227	SND_SOC_DAPM_INPUT("DMICL"),
228	SND_SOC_DAPM_INPUT("DMICR"),
229	SND_SOC_DAPM_INPUT("LINL"),
230	SND_SOC_DAPM_INPUT("LINR"),
231
232	SND_SOC_DAPM_PGA("Left Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
233	SND_SOC_DAPM_PGA("Right Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
234	SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
235				     max9867_input_mixer_controls,
236				     ARRAY_SIZE(max9867_input_mixer_controls)),
237	SND_SOC_DAPM_MUX("DMICL Mux", SND_SOC_NOPM, 0, 0,
238			 &max9867_left_dmic_mux),
239	SND_SOC_DAPM_MUX("DMICR Mux", SND_SOC_NOPM, 0, 0,
240			 &max9867_right_dmic_mux),
241	SND_SOC_DAPM_ADC_E("ADCL", "HiFi Capture", SND_SOC_NOPM, 0, 0,
242			   max9867_adc_dac_event,
243			   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
244	SND_SOC_DAPM_ADC_E("ADCR", "HiFi Capture", SND_SOC_NOPM, 0, 0,
245			   max9867_adc_dac_event,
246			   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
247
248	SND_SOC_DAPM_MIXER("Digital", SND_SOC_NOPM, 0, 0,
249			   max9867_sidetone_mixer_controls,
250			   ARRAY_SIZE(max9867_sidetone_mixer_controls)),
251	SND_SOC_DAPM_MIXER_NAMED_CTL("Output Mixer", SND_SOC_NOPM, 0, 0,
252				     max9867_output_mixer_controls,
253				     ARRAY_SIZE(max9867_output_mixer_controls)),
254	SND_SOC_DAPM_DAC_E("DACL", "HiFi Playback", SND_SOC_NOPM, 0, 0,
255			   max9867_adc_dac_event,
256			   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
257	SND_SOC_DAPM_DAC_E("DACR", "HiFi Playback", SND_SOC_NOPM, 0, 0,
258			   max9867_adc_dac_event,
259			   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
260	SND_SOC_DAPM_SWITCH("Master Playback", SND_SOC_NOPM, 0, 0,
261			    &max9867_line_out_control),
262	SND_SOC_DAPM_OUTPUT("LOUT"),
263	SND_SOC_DAPM_OUTPUT("ROUT"),
264};
265
266static const struct snd_soc_dapm_route max9867_audio_map[] = {
267	{"Left Line Input", NULL, "LINL"},
268	{"Right Line Input", NULL, "LINR"},
269	{"Input Mixer", "Mic Capture Switch", "MICL"},
270	{"Input Mixer", "Mic Capture Switch", "MICR"},
271	{"Input Mixer", "Line Capture Switch", "Left Line Input"},
272	{"Input Mixer", "Line Capture Switch", "Right Line Input"},
273	{"DMICL Mux", "DMIC", "DMICL"},
274	{"DMICR Mux", "DMIC", "DMICR"},
275	{"DMICL Mux", "ADC", "Input Mixer"},
276	{"DMICR Mux", "ADC", "Input Mixer"},
277	{"ADCL", NULL, "DMICL Mux"},
278	{"ADCR", NULL, "DMICR Mux"},
279
280	{"Digital", "Sidetone Switch", "ADCL"},
281	{"Digital", "Sidetone Switch", "ADCR"},
282	{"DACL", NULL, "Digital"},
283	{"DACR", NULL, "Digital"},
284
285	{"Output Mixer", "Line Bypass Switch", "Left Line Input"},
286	{"Output Mixer", "Line Bypass Switch", "Right Line Input"},
287	{"Output Mixer", NULL, "DACL"},
288	{"Output Mixer", NULL, "DACR"},
289	{"Master Playback", "Switch", "Output Mixer"},
290	{"LOUT", NULL, "Master Playback"},
291	{"ROUT", NULL, "Master Playback"},
292};
293
294static const unsigned int max9867_rates_44k1[] = {
295	11025, 22050, 44100,
296};
 
 
 
297
298static const struct snd_pcm_hw_constraint_list max9867_constraints_44k1 = {
299	.list = max9867_rates_44k1,
300	.count = ARRAY_SIZE(max9867_rates_44k1),
301};
302
303static const unsigned int max9867_rates_48k[] = {
304	8000, 16000, 32000, 48000,
305};
306
307static const struct snd_pcm_hw_constraint_list max9867_constraints_48k = {
308	.list = max9867_rates_48k,
309	.count = ARRAY_SIZE(max9867_rates_48k),
 
 
 
 
 
 
 
 
 
310};
311
312static int max9867_startup(struct snd_pcm_substream *substream,
313			   struct snd_soc_dai *dai)
314{
315        struct max9867_priv *max9867 =
316		snd_soc_component_get_drvdata(dai->component);
317
318	if (max9867->constraints)
319		snd_pcm_hw_constraint_list(substream->runtime, 0,
320			SNDRV_PCM_HW_PARAM_RATE, max9867->constraints);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
321
322	return 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
323}
324
325static int max9867_dai_hw_params(struct snd_pcm_substream *substream,
326		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
327{
328	int value, freq = 0;
329	unsigned long int rate, ratio;
330	struct snd_soc_component *component = dai->component;
331	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
332	unsigned int ni = DIV_ROUND_CLOSEST_ULL(96ULL * 0x10000 * params_rate(params),
333						max9867->pclk);
 
 
334
 
 
335	/* set up the ni value */
336	regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH,
337		MAX9867_NI_HIGH_MASK, (0xFF00 & ni) >> 8);
338	regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW,
339		MAX9867_NI_LOW_MASK, 0x00FF & ni);
340	if (max9867->provider) {
341		if (max9867->dsp_a) {
342			value = MAX9867_IFC1B_48X;
343		} else {
344			rate = params_rate(params) * 2 * params_width(params);
345			ratio = max9867->pclk / rate;
346			switch (params_width(params)) {
347			case 8:
348			case 16:
349				switch (ratio) {
350				case 2:
351					value = MAX9867_IFC1B_PCLK_2;
352					break;
353				case 4:
354					value = MAX9867_IFC1B_PCLK_4;
355					break;
356				case 8:
357					value = MAX9867_IFC1B_PCLK_8;
358					break;
359				case 16:
360					value = MAX9867_IFC1B_PCLK_16;
361					break;
362				default:
363					return -EINVAL;
364				}
365				break;
366			case 24:
367				value = MAX9867_IFC1B_48X;
368				break;
369			case 32:
370				value = MAX9867_IFC1B_64X;
 
 
 
371				break;
372			default:
 
 
373				return -EINVAL;
374			}
 
 
 
 
 
 
 
 
 
 
375		}
376		regmap_update_bits(max9867->regmap, MAX9867_IFC1B,
377			MAX9867_IFC1B_BCLK_MASK, value);
 
 
 
378
379		/* Exact integer mode available for 8kHz and 16kHz sample rates
380		 * and certain PCLK (prescaled MCLK) values.
381		 */
382		if (params_rate(params) == 8000 ||
383		    params_rate(params) == 16000) {
384			switch (max9867->pclk) {
385			case 12000000:
386				freq = 0x08;
387				break;
388			case 13000000:
389				freq = 0x0A;
390				break;
391			case 16000000:
392				freq = 0x0C;
393				break;
394			case 19200000:
395				freq = 0x0E;
396				break;
397			}
398		}
399		if (freq && params_rate(params) == 16000)
400			freq++;
401
402		/* If exact integer mode not available, the freq value
403		 * remains zero, i.e. normal mode is used.
404		 */
405		regmap_update_bits(max9867->regmap, MAX9867_SYSCLK,
406				   MAX9867_FREQ_MASK, freq);
407	} else {
408		/*
409		 * digital pll locks on to any externally supplied LRCLK signal
410		 * and also enable rapid lock mode.
411		 */
412		regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW,
413			MAX9867_RAPID_LOCK, MAX9867_RAPID_LOCK);
414		regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH,
415			MAX9867_PLL, MAX9867_PLL);
416	}
417	return 0;
418}
419
420static int max9867_mute(struct snd_soc_dai *dai, int mute, int direction)
421{
422	struct snd_soc_component *component = dai->component;
423	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
424
425	return regmap_update_bits(max9867->regmap, MAX9867_DACLEVEL,
426				  1 << 6, !!mute << 6);
 
 
 
 
 
427}
428
429static int max9867_set_dai_sysclk(struct snd_soc_dai *codec_dai,
430		int clk_id, unsigned int freq, int dir)
431{
432	struct snd_soc_component *component = codec_dai->component;
433	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
434	int value = 0;
435
436	/* Set the prescaler based on the master clock frequency*/
437	if (freq >= 10000000 && freq <= 20000000) {
438		value |= MAX9867_PSCLK_10_20;
439		max9867->pclk = freq;
440	} else if (freq >= 20000000 && freq <= 40000000) {
441		value |= MAX9867_PSCLK_20_40;
442		max9867->pclk = freq / 2;
443	} else if (freq >= 40000000 && freq <= 60000000) {
444		value |= MAX9867_PSCLK_40_60;
445		max9867->pclk = freq / 4;
446	} else {
447		dev_err(component->dev,
448			"Invalid clock frequency %uHz (required 10-60MHz)\n",
449			freq);
450		return -EINVAL;
451	}
452	if (freq % 48000 == 0)
453		max9867->constraints = &max9867_constraints_48k;
454	else if (freq % 44100 == 0)
455		max9867->constraints = &max9867_constraints_44k1;
456	else
457		dev_warn(component->dev,
458			 "Unable to set exact rate with %uHz clock frequency\n",
459			 freq);
460	max9867->sysclk = freq;
461	value = value << MAX9867_PSCLK_SHIFT;
 
 
 
462	regmap_update_bits(max9867->regmap, MAX9867_SYSCLK,
463			MAX9867_PSCLK_MASK, value);
464	return 0;
465}
466
467static int max9867_dai_set_fmt(struct snd_soc_dai *codec_dai,
468		unsigned int fmt)
469{
470	struct snd_soc_component *component = codec_dai->component;
471	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
472	u8 iface1A, iface1B;
473
474	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
475	case SND_SOC_DAIFMT_CBP_CFP:
476		max9867->provider = true;
477		iface1A = MAX9867_MASTER;
478		iface1B = MAX9867_IFC1B_48X;
479		break;
480	case SND_SOC_DAIFMT_CBC_CFC:
481		max9867->provider = false;
482		iface1A = iface1B = 0;
483		break;
484	default:
485		return -EINVAL;
486	}
487
488	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
489	case SND_SOC_DAIFMT_I2S:
490		max9867->dsp_a = false;
491		iface1A |= MAX9867_I2S_DLY;
492		break;
493	case SND_SOC_DAIFMT_DSP_A:
494		max9867->dsp_a = true;
495		iface1A |= MAX9867_TDM_MODE | MAX9867_SDOUT_HIZ;
496		break;
497	default:
498		return -EINVAL;
499	}
500
 
 
 
 
 
501	/* Clock inversion bits, BCI and WCI */
502	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
503	case SND_SOC_DAIFMT_NB_NF:
504		break;
505	case SND_SOC_DAIFMT_IB_IF:
506		iface1A |= MAX9867_WCI_MODE | MAX9867_BCI_MODE;
507		break;
508	case SND_SOC_DAIFMT_IB_NF:
509		iface1A |= MAX9867_BCI_MODE;
510		break;
511	case SND_SOC_DAIFMT_NB_IF:
512		iface1A |= MAX9867_WCI_MODE;
513		break;
514	default:
515		return -EINVAL;
516	}
517
518	regmap_write(max9867->regmap, MAX9867_IFC1A, iface1A);
519	regmap_update_bits(max9867->regmap, MAX9867_IFC1B,
520			   MAX9867_IFC1B_BCLK_MASK, iface1B);
521
522	return 0;
523}
524
525static const struct snd_soc_dai_ops max9867_dai_ops = {
 
526	.set_sysclk	= max9867_set_dai_sysclk,
527	.set_fmt	= max9867_dai_set_fmt,
528	.mute_stream	= max9867_mute,
529	.startup	= max9867_startup,
530	.hw_params	= max9867_dai_hw_params,
531	.no_capture_mute = 1,
532};
533
 
 
 
 
534static struct snd_soc_dai_driver max9867_dai[] = {
535	{
536	.name = "max9867-aif1",
537	.playback = {
538		.stream_name = "HiFi Playback",
539		.channels_min = 2,
540		.channels_max = 2,
541		.rates = SNDRV_PCM_RATE_8000_48000,
542		.formats = SNDRV_PCM_FMTBIT_S16_LE,
543	},
544	.capture = {
545		.stream_name = "HiFi Capture",
546		.channels_min = 2,
547		.channels_max = 2,
548		.rates = SNDRV_PCM_RATE_8000_48000,
549		.formats = SNDRV_PCM_FMTBIT_S16_LE,
550	},
551	.ops = &max9867_dai_ops,
552	.symmetric_rate = 1,
553	}
554};
555
556#ifdef CONFIG_PM
557static int max9867_suspend(struct snd_soc_component *component)
558{
559	snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
560
 
 
 
561	return 0;
562}
563
564static int max9867_resume(struct snd_soc_component *component)
565{
566	snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
567
 
 
568	return 0;
569}
570#else
571#define max9867_suspend	NULL
572#define max9867_resume	NULL
573#endif
574
575static int max9867_set_bias_level(struct snd_soc_component *component,
576				  enum snd_soc_bias_level level)
577{
578	int err;
579	struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
580
581	switch (level) {
582	case SND_SOC_BIAS_ON:
583		err = clk_prepare_enable(max9867->mclk);
584		if (err)
585			return err;
586		break;
587	case SND_SOC_BIAS_STANDBY:
588		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
589			err = regcache_sync(max9867->regmap);
590			if (err)
591				return err;
592
593			err = regmap_write(max9867->regmap,
594					   MAX9867_PWRMAN, 0xff);
595			if (err)
596				return err;
597		}
598		break;
599	case SND_SOC_BIAS_OFF:
600		err = regmap_write(max9867->regmap, MAX9867_PWRMAN, 0);
601		if (err)
602			return err;
603
604		regcache_mark_dirty(max9867->regmap);
605		clk_disable_unprepare(max9867->mclk);
606		break;
607	default:
608		break;
609	}
610
 
 
611	return 0;
612}
613
614static const struct snd_soc_component_driver max9867_component = {
615	.controls		= max9867_snd_controls,
616	.num_controls		= ARRAY_SIZE(max9867_snd_controls),
617	.dapm_routes		= max9867_audio_map,
618	.num_dapm_routes	= ARRAY_SIZE(max9867_audio_map),
619	.dapm_widgets		= max9867_dapm_widgets,
620	.num_dapm_widgets	= ARRAY_SIZE(max9867_dapm_widgets),
621	.suspend		= max9867_suspend,
622	.resume			= max9867_resume,
623	.set_bias_level		= max9867_set_bias_level,
624	.idle_bias_on		= 1,
625	.use_pmdown_time	= 1,
626	.endianness		= 1,
627};
628
629static bool max9867_volatile_register(struct device *dev, unsigned int reg)
630{
631	switch (reg) {
632	case MAX9867_STATUS:
633	case MAX9867_JACKSTATUS:
634	case MAX9867_AUXHIGH:
635	case MAX9867_AUXLOW:
636		return true;
637	default:
638		return false;
639	}
640}
641
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
642static const struct regmap_config max9867_regmap = {
643	.reg_bits	= 8,
644	.val_bits	= 8,
645	.max_register	= MAX9867_REVISION,
 
 
646	.volatile_reg	= max9867_volatile_register,
647	.cache_type	= REGCACHE_RBTREE,
648};
649
650static int max9867_i2c_probe(struct i2c_client *i2c)
 
651{
652	struct max9867_priv *max9867;
653	int ret, reg;
654
655	max9867 = devm_kzalloc(&i2c->dev, sizeof(*max9867), GFP_KERNEL);
 
656	if (!max9867)
657		return -ENOMEM;
658
659	i2c_set_clientdata(i2c, max9867);
660	max9867->regmap = devm_regmap_init_i2c(i2c, &max9867_regmap);
661	if (IS_ERR(max9867->regmap)) {
662		ret = PTR_ERR(max9867->regmap);
663		dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
 
664		return ret;
665	}
666	ret = regmap_read(max9867->regmap, MAX9867_REVISION, &reg);
 
667	if (ret < 0) {
668		dev_err(&i2c->dev, "Failed to read: %d\n", ret);
669		return ret;
670	}
671	dev_info(&i2c->dev, "device revision: %x\n", reg);
672	ret = devm_snd_soc_register_component(&i2c->dev, &max9867_component,
673			max9867_dai, ARRAY_SIZE(max9867_dai));
674	if (ret < 0) {
675		dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
676		return ret;
677	}
 
 
678
679	max9867->mclk = devm_clk_get(&i2c->dev, NULL);
680	if (IS_ERR(max9867->mclk))
681		return PTR_ERR(max9867->mclk);
682
683	return 0;
684}
685
686static const struct i2c_device_id max9867_i2c_id[] = {
687	{ "max9867" },
688	{ }
689};
690MODULE_DEVICE_TABLE(i2c, max9867_i2c_id);
691
692#ifdef CONFIG_OF
693static const struct of_device_id max9867_of_match[] = {
694	{ .compatible = "maxim,max9867", },
695	{ }
696};
697MODULE_DEVICE_TABLE(of, max9867_of_match);
698#endif
 
 
 
 
699
700static struct i2c_driver max9867_i2c_driver = {
701	.driver = {
702		.name = "max9867",
703		.of_match_table = of_match_ptr(max9867_of_match),
 
704	},
705	.probe = max9867_i2c_probe,
 
706	.id_table = max9867_i2c_id,
707};
708
709module_i2c_driver(max9867_i2c_driver);
710
711MODULE_AUTHOR("Ladislav Michl <ladis@linux-mips.org>");
712MODULE_DESCRIPTION("ASoC MAX9867 driver");
713MODULE_LICENSE("GPL");
v4.10.11
  1/*
  2 * max9867.c -- max9867 ALSA SoC Audio driver
  3 *
  4 * Copyright 2013-15 Maxim Integrated Products
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License version 2 as
  8 * published by the Free Software Foundation.
  9 */
 10
 
 11#include <linux/delay.h>
 12#include <linux/i2c.h>
 13#include <linux/module.h>
 14#include <linux/regmap.h>
 15#include <sound/pcm_params.h>
 16#include <sound/soc.h>
 17#include <sound/tlv.h>
 18#include "max9867.h"
 19
 
 
 
 
 
 
 
 
 
 20static const char *const max9867_spmode[] = {
 21	"Stereo Diff", "Mono Diff",
 22	"Stereo Cap", "Mono Cap",
 23	"Stereo Single", "Mono Single",
 24	"Stereo Single Fast", "Mono Single Fast"
 25};
 26static const char *const max9867_sidetone_text[] = {
 27	"None", "Left", "Right", "LeftRight", "LeftRightDiv2",
 28};
 29static const char *const max9867_filter_text[] = {"IIR", "FIR"};
 30
 31static SOC_ENUM_SINGLE_DECL(max9867_filter, MAX9867_CODECFLTR, 7,
 32	max9867_filter_text);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 33static SOC_ENUM_SINGLE_DECL(max9867_spkmode, MAX9867_MODECONFIG, 0,
 34	max9867_spmode);
 35static SOC_ENUM_SINGLE_DECL(max9867_sidetone, MAX9867_DACGAIN, 6,
 36	max9867_sidetone_text);
 37static DECLARE_TLV_DB_SCALE(max9860_capture_tlv, -600, 200, 0);
 38static DECLARE_TLV_DB_SCALE(max9860_mic_tlv, 2000, 100, 1);
 39static DECLARE_TLV_DB_SCALE(max9860_adc_left_tlv, -1200, 100, 1);
 40static DECLARE_TLV_DB_SCALE(max9860_adc_right_tlv, -1200, 100, 1);
 41static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(max98088_micboost_tlv,
 42	0, 1, TLV_DB_SCALE_ITEM(0, 2000, 0),
 43	2, 2, TLV_DB_SCALE_ITEM(3000, 0, 0),
 
 
 
 
 
 
 44);
 45
 46static const struct snd_kcontrol_new max9867_snd_controls[] = {
 47	SOC_DOUBLE_R("Master Playback Volume", MAX9867_LEFTVOL,
 48				MAX9867_RIGHTVOL, 0, 63, 1),
 49	SOC_DOUBLE_R_TLV("Capture Volume", MAX9867_LEFTMICGAIN,
 50			MAX9867_RIGHTMICGAIN,
 51			0, 15, 1, max9860_capture_tlv),
 52	SOC_DOUBLE_R_TLV("Mic Volume", MAX9867_LEFTMICGAIN,
 53			MAX9867_RIGHTMICGAIN, 0, 31, 1, max9860_mic_tlv),
 54	SOC_DOUBLE_R_TLV("Mic Boost Volume", MAX9867_LEFTMICGAIN,
 55			MAX9867_RIGHTMICGAIN, 5, 3, 0, max98088_micboost_tlv),
 56	SOC_ENUM("Digital Sidetone Src", max9867_sidetone),
 57	SOC_SINGLE("Sidetone Volume", MAX9867_DACGAIN, 0, 31, 1),
 58	SOC_SINGLE("DAC Volume", MAX9867_DACLEVEL, 4, 3, 0),
 59	SOC_SINGLE("DAC Attenuation", MAX9867_DACLEVEL, 0, 15, 1),
 60	SOC_SINGLE_TLV("ADC Left Volume", MAX9867_ADCLEVEL,
 61			4, 15, 1, max9860_adc_left_tlv),
 62	SOC_SINGLE_TLV("ADC Right Volume", MAX9867_ADCLEVEL,
 63			0, 15, 1, max9860_adc_right_tlv),
 64	SOC_ENUM("Speaker Mode", max9867_spkmode),
 65	SOC_SINGLE("Volume Smoothing Switch", MAX9867_MODECONFIG, 6, 1, 0),
 66	SOC_SINGLE("ZCD Switch", MAX9867_MODECONFIG, 5, 1, 0),
 67	SOC_ENUM("DSP Filter", max9867_filter),
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 68};
 69
 70static const char *const max9867_mux[] = {"None", "Mic", "Line", "Mic_Line"};
 
 
 
 
 
 
 
 
 
 
 
 
 71
 72static SOC_ENUM_SINGLE_DECL(max9867_mux_enum,
 73	MAX9867_INPUTCONFIG, MAX9867_INPUT_SHIFT,
 74	max9867_mux);
 
 75
 76static const struct snd_kcontrol_new max9867_dapm_mux_controls =
 77	SOC_DAPM_ENUM("Route", max9867_mux_enum);
 
 
 
 
 
 
 78
 79static const struct snd_kcontrol_new max9867_left_dapm_control =
 80	SOC_DAPM_SINGLE("Switch", MAX9867_PWRMAN, 6, 1, 0);
 81static const struct snd_kcontrol_new max9867_right_dapm_control =
 82	SOC_DAPM_SINGLE("Switch", MAX9867_PWRMAN, 5, 1, 0);
 83static const struct snd_kcontrol_new max9867_line_dapm_control =
 84	SOC_DAPM_SINGLE("Switch", MAX9867_LEFTLINELVL, 6, 1, 1);
 85
 86static const struct snd_soc_dapm_widget max9867_dapm_widgets[] = {
 87	SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0, SND_SOC_NOPM, 0, 0),
 88	SND_SOC_DAPM_DAC("Left DAC", NULL, MAX9867_PWRMAN, 3, 0),
 89	SND_SOC_DAPM_DAC("Right DAC", NULL, MAX9867_PWRMAN, 2, 0),
 90	SND_SOC_DAPM_MIXER("Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
 91	SND_SOC_DAPM_OUTPUT("HPOUT"),
 92
 93	SND_SOC_DAPM_AIF_IN("DAI_IN", "HiFi Capture", 0, SND_SOC_NOPM, 0, 0),
 94	SND_SOC_DAPM_ADC("Left ADC", "HiFi Capture", MAX9867_PWRMAN, 1, 0),
 95	SND_SOC_DAPM_ADC("Right ADC", "HiFi Capture", MAX9867_PWRMAN, 0, 0),
 96	SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
 97		&max9867_dapm_mux_controls),
 98
 99	SND_SOC_DAPM_MIXER("Input Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
100	SND_SOC_DAPM_SWITCH("Left Line", MAX9867_LEFTLINELVL, 6, 1,
101		&max9867_left_dapm_control),
102	SND_SOC_DAPM_SWITCH("Right Line", MAX9867_RIGTHLINELVL, 6, 1,
103		&max9867_right_dapm_control),
104	SND_SOC_DAPM_SWITCH("Line Mixer", SND_SOC_NOPM, 0, 0,
105		&max9867_line_dapm_control),
106	SND_SOC_DAPM_INPUT("LINE_IN"),
107};
108
109static const struct snd_soc_dapm_route max9867_audio_map[] = {
110	{"Left DAC", NULL, "DAI_OUT"},
111	{"Right DAC", NULL, "DAI_OUT"},
112	{"Output Mixer", NULL, "Left DAC"},
113	{"Output Mixer", NULL, "Right DAC"},
114	{"HPOUT", NULL, "Output Mixer"},
115
116	{"Left ADC", NULL, "DAI_IN"},
117	{"Right ADC", NULL, "DAI_IN"},
118	{"Input Mixer", NULL, "Left ADC"},
119	{"Input Mixer", NULL, "Right ADC"},
120	{"Input Mux", "Line", "Input Mixer"},
121	{"Input Mux", "Mic", "Input Mixer"},
122	{"Input Mux", "Mic_Line", "Input Mixer"},
123	{"Right Line", "Switch", "Input Mux"},
124	{"Left Line", "Switch", "Input Mux"},
125	{"LINE_IN", NULL, "Left Line"},
126	{"LINE_IN", NULL, "Right Line"},
127};
128
129enum rates {
130	pcm_rate_8, pcm_rate_16, pcm_rate_24,
131	pcm_rate_32, pcm_rate_44,
132	pcm_rate_48, max_pcm_rate,
133};
134
135struct ni_div_rates {
136	u32 mclk;
137	u16 ni[max_pcm_rate];
138} ni_div[] = {
139	{11289600, {0x116A, 0x22D4, 0x343F, 0x45A9, 0x6000, 0x687D} },
140	{12000000, {0x1062, 0x20C5, 0x3127, 0x4189, 0x5A51, 0x624E} },
141	{12288000, {0x1000, 0x2000, 0x3000, 0x4000, 0x5833, 0x6000} },
142	{13000000, {0x0F20, 0x1E3F, 0x2D5F, 0x3C7F, 0x535F, 0x5ABE} },
143	{19200000, {0x0A3D, 0x147B, 0x1EB8, 0x28F6, 0x3873, 0x3D71} },
144	{24000000, {0x1062, 0x20C5, 0x1893, 0x4189, 0x5A51, 0x624E} },
145	{26000000, {0x0F20, 0x1E3F, 0x16AF, 0x3C7F, 0x535F, 0x5ABE} },
146	{27000000, {0x0E90, 0x1D21, 0x15D8, 0x3A41, 0x5048, 0x5762} },
147};
148
149static inline int get_ni_value(int mclk, int rate)
150{
151	int i, ret = 0;
152
153	/* find the closest rate index*/
154	for (i = 0; i < ARRAY_SIZE(ni_div); i++) {
155		if (ni_div[i].mclk >= mclk)
156			break;
157	}
158	if (i == ARRAY_SIZE(ni_div))
159		return -EINVAL;
160
161	switch (rate) {
162	case 8000:
163		return ni_div[i].ni[pcm_rate_8];
164	case 16000:
165		return ni_div[i].ni[pcm_rate_16];
166	case 32000:
167		return ni_div[i].ni[pcm_rate_32];
168	case 44100:
169		return ni_div[i].ni[pcm_rate_44];
170	case 48000:
171		return ni_div[i].ni[pcm_rate_48];
172	default:
173		pr_err("%s wrong rate %d\n", __func__, rate);
174		ret = -EINVAL;
175	}
176	return ret;
177}
178
179static int max9867_dai_hw_params(struct snd_pcm_substream *substream,
180		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
181{
182	struct snd_soc_codec *codec = dai->codec;
183	struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
184	unsigned int ni_h, ni_l;
185	int value;
186
187	value = get_ni_value(max9867->sysclk, params_rate(params));
188	if (value < 0)
189		return value;
190
191	ni_h = (0xFF00 & value) >> 8;
192	ni_l = 0x00FF & value;
193	/* set up the ni value */
194	regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH,
195		MAX9867_NI_HIGH_MASK, ni_h);
196	regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW,
197		MAX9867_NI_LOW_MASK, ni_l);
198	if (!max9867->master) {
199		/*
200		 * digital pll locks on to any externally supplied LRCLK signal
201		 * and also enable rapid lock mode.
202		 */
203		regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW,
204			MAX9867_RAPID_LOCK, MAX9867_RAPID_LOCK);
205		regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH,
206			MAX9867_PLL, MAX9867_PLL);
207	} else {
208		unsigned long int bclk_rate, pclk_bclk_ratio;
209		int bclk_value;
210
211		bclk_rate = params_rate(params) * 2 * params_width(params);
212		pclk_bclk_ratio = max9867->pclk/bclk_rate;
213		switch (params_width(params)) {
214		case 8:
215		case 16:
216			switch (pclk_bclk_ratio) {
217			case 2:
218				bclk_value = MAX9867_IFC1B_PCLK_2;
 
 
 
 
219				break;
220			case 4:
221				bclk_value = MAX9867_IFC1B_PCLK_4;
222				break;
223			case 8:
224				bclk_value = MAX9867_IFC1B_PCLK_8;
225				break;
226			case 16:
227				bclk_value = MAX9867_IFC1B_PCLK_16;
228				break;
229			default:
230				dev_err(codec->dev,
231					"unsupported sampling rate\n");
232				return -EINVAL;
233			}
234			break;
235		case 24:
236			bclk_value = MAX9867_IFC1B_24BIT;
237			break;
238		case 32:
239			bclk_value = MAX9867_IFC1B_32BIT;
240			break;
241		default:
242			dev_err(codec->dev, "unsupported sampling rate\n");
243			return -EINVAL;
244		}
245		regmap_update_bits(max9867->regmap, MAX9867_IFC1B,
246			MAX9867_IFC1B_BCLK_MASK, bclk_value);
247	}
248	return 0;
249}
250
251static int max9867_prepare(struct snd_pcm_substream *substream,
252			 struct snd_soc_dai *dai)
253{
254	struct snd_soc_codec *codec = dai->codec;
255	struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
256
257	regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
258		MAX9867_SHTDOWN_MASK, MAX9867_SHTDOWN_MASK);
 
 
 
 
 
 
 
 
 
 
 
 
 
259	return 0;
260}
261
262static int max9867_mute(struct snd_soc_dai *dai, int mute)
263{
264	struct snd_soc_codec *codec = dai->codec;
265	struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
266
267	if (mute)
268		regmap_update_bits(max9867->regmap, MAX9867_DACLEVEL,
269			MAX9867_DAC_MUTE_MASK, MAX9867_DAC_MUTE_MASK);
270	else
271		regmap_update_bits(max9867->regmap, MAX9867_DACLEVEL,
272			MAX9867_DAC_MUTE_MASK, 0);
273	return 0;
274}
275
276static int max9867_set_dai_sysclk(struct snd_soc_dai *codec_dai,
277		int clk_id, unsigned int freq, int dir)
278{
279	struct snd_soc_codec *codec = codec_dai->codec;
280	struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
281	int value = 0;
282
283	/* Set the prescaler based on the master clock frequency*/
284	if (freq >= 10000000 && freq <= 20000000) {
285		value |= MAX9867_PSCLK_10_20;
286		max9867->pclk =  freq;
287	} else if (freq >= 20000000 && freq <= 40000000) {
288		value |= MAX9867_PSCLK_20_40;
289		max9867->pclk =  freq/2;
290	} else if (freq >= 40000000 && freq <= 60000000) {
291		value |= MAX9867_PSCLK_40_60;
292		max9867->pclk =  freq/4;
293	} else {
294		pr_err("bad clock frequency %d", freq);
 
 
295		return -EINVAL;
296	}
 
 
 
 
 
 
 
 
 
297	value = value << MAX9867_PSCLK_SHIFT;
298	max9867->sysclk = freq;
299	/* exact integer mode is not supported */
300	value &= ~MAX9867_FREQ_MASK;
301	regmap_update_bits(max9867->regmap, MAX9867_SYSCLK,
302			MAX9867_PSCLK_MASK, value);
303	return 0;
304}
305
306static int max9867_dai_set_fmt(struct snd_soc_dai *codec_dai,
307		unsigned int fmt)
308{
309	struct snd_soc_codec *codec = codec_dai->codec;
310	struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
311	u8 iface1A = 0, iface1B = 0;
312	int ret;
 
 
 
 
 
 
 
 
 
 
 
 
 
313
314	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
315	case SND_SOC_DAIFMT_CBM_CFM:
316		max9867->master = 1;
317		iface1A |= MAX9867_MASTER;
318		break;
319	case SND_SOC_DAIFMT_CBS_CFS:
320		max9867->master = 0;
321		iface1A &= ~MAX9867_MASTER;
322		break;
323	default:
324		return -EINVAL;
325	}
326
327	/* for i2s compatible mode */
328	iface1A |= MAX9867_I2S_DLY;
329	/* SDOUT goes to hiz state after all data is transferred */
330	iface1A |= MAX9867_SDOUT_HIZ;
331
332	/* Clock inversion bits, BCI and WCI */
333	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
334	case SND_SOC_DAIFMT_NB_NF:
335		break;
336	case SND_SOC_DAIFMT_IB_IF:
337		iface1A |= MAX9867_WCI_MODE | MAX9867_BCI_MODE;
338		break;
339	case SND_SOC_DAIFMT_IB_NF:
340		iface1A |= MAX9867_BCI_MODE;
341		break;
342	case SND_SOC_DAIFMT_NB_IF:
343		iface1A |= MAX9867_WCI_MODE;
344		break;
345	default:
346		return -EINVAL;
347	}
348
349	ret = regmap_write(max9867->regmap, MAX9867_IFC1A, iface1A);
350	ret = regmap_write(max9867->regmap, MAX9867_IFC1B, iface1B);
 
 
351	return 0;
352}
353
354static struct snd_soc_dai_ops max9867_dai_ops = {
355	.set_fmt = max9867_dai_set_fmt,
356	.set_sysclk	= max9867_set_dai_sysclk,
357	.prepare	= max9867_prepare,
358	.digital_mute	= max9867_mute,
359	.hw_params = max9867_dai_hw_params,
 
 
360};
361
362#define MAX9867_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
363	SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
364#define MAX9867_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
365
366static struct snd_soc_dai_driver max9867_dai[] = {
367	{
368	.name = "max9867-aif1",
369	.playback = {
370		.stream_name = "HiFi Playback",
371		.channels_min = 1,
372		.channels_max = 2,
373		.rates = MAX9867_RATES,
374		.formats = MAX9867_FORMATS,
375	},
376	.capture = {
377		.stream_name = "HiFi Capture",
378		.channels_min = 1,
379		.channels_max = 2,
380		.rates = MAX9867_RATES,
381		.formats = MAX9867_FORMATS,
382	},
383	.ops = &max9867_dai_ops,
 
384	}
385};
386
387#ifdef CONFIG_PM_SLEEP
388static int max9867_suspend(struct device *dev)
389{
390	struct max9867_priv *max9867 = dev_get_drvdata(dev);
391
392	/* Drop down to power saving mode when system is suspended */
393	regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
394		MAX9867_SHTDOWN_MASK, ~MAX9867_SHTDOWN_MASK);
395	return 0;
396}
397
398static int max9867_resume(struct device *dev)
399{
400	struct max9867_priv *max9867 = dev_get_drvdata(dev);
401
402	regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
403		MAX9867_SHTDOWN_MASK, MAX9867_SHTDOWN_MASK);
404	return 0;
405}
 
 
 
406#endif
407
408static int max9867_probe(struct snd_soc_codec *codec)
 
409{
410	struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
411
412	dev_dbg(codec->dev, "max98090_probe\n");
413	max9867->codec = codec;
414	return 0;
415}
416
417static struct snd_soc_codec_driver max9867_codec = {
418	.probe = max9867_probe,
419	.component_driver = {
420		.controls		= max9867_snd_controls,
421		.num_controls		= ARRAY_SIZE(max9867_snd_controls),
422		.dapm_routes		= max9867_audio_map,
423		.num_dapm_routes	= ARRAY_SIZE(max9867_audio_map),
424		.dapm_widgets		= max9867_dapm_widgets,
425		.num_dapm_widgets	= ARRAY_SIZE(max9867_dapm_widgets),
426	},
 
 
 
427};
428
429static bool max9867_volatile_register(struct device *dev, unsigned int reg)
430{
431	switch (reg) {
432	case MAX9867_STATUS:
433	case MAX9867_JACKSTATUS:
434	case MAX9867_AUXHIGH:
435	case MAX9867_AUXLOW:
436		return true;
437	default:
438		return false;
439	}
440}
441
442static const struct reg_default max9867_reg[] = {
443	{ 0x04, 0x00 },
444	{ 0x05, 0x00 },
445	{ 0x06, 0x00 },
446	{ 0x07, 0x00 },
447	{ 0x08, 0x00 },
448	{ 0x09, 0x00 },
449	{ 0x0A, 0x00 },
450	{ 0x0B, 0x00 },
451	{ 0x0C, 0x00 },
452	{ 0x0D, 0x00 },
453	{ 0x0E, 0x00 },
454	{ 0x0F, 0x00 },
455	{ 0x10, 0x00 },
456	{ 0x11, 0x00 },
457	{ 0x12, 0x00 },
458	{ 0x13, 0x00 },
459	{ 0x14, 0x00 },
460	{ 0x15, 0x00 },
461	{ 0x16, 0x00 },
462	{ 0x17, 0x00 },
463};
464
465static const struct regmap_config max9867_regmap = {
466	.reg_bits	= 8,
467	.val_bits	= 8,
468	.max_register	= MAX9867_REVISION,
469	.reg_defaults	= max9867_reg,
470	.num_reg_defaults = ARRAY_SIZE(max9867_reg),
471	.volatile_reg	= max9867_volatile_register,
472	.cache_type	= REGCACHE_RBTREE,
473};
474
475static int max9867_i2c_probe(struct i2c_client *i2c,
476		const struct i2c_device_id *id)
477{
478	struct max9867_priv *max9867;
479	int ret = 0, reg;
480
481	max9867 = devm_kzalloc(&i2c->dev,
482			sizeof(*max9867), GFP_KERNEL);
483	if (!max9867)
484		return -ENOMEM;
485
486	i2c_set_clientdata(i2c, max9867);
487	max9867->regmap = devm_regmap_init_i2c(i2c, &max9867_regmap);
488	if (IS_ERR(max9867->regmap)) {
489		ret = PTR_ERR(max9867->regmap);
490		dev_err(&i2c->dev,
491				"Failed to allocate regmap: %d\n", ret);
492		return ret;
493	}
494	ret = regmap_read(max9867->regmap,
495			MAX9867_REVISION, &reg);
496	if (ret < 0) {
497		dev_err(&i2c->dev, "Failed to read: %d\n", ret);
498		return ret;
499	}
500	dev_info(&i2c->dev, "device revision: %x\n", reg);
501	ret = snd_soc_register_codec(&i2c->dev, &max9867_codec,
502			max9867_dai, ARRAY_SIZE(max9867_dai));
503	if (ret < 0) {
504		dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
505		return ret;
506	}
507	return ret;
508}
509
510static int max9867_i2c_remove(struct i2c_client *client)
511{
512	snd_soc_unregister_codec(&client->dev);
 
513	return 0;
514}
515
516static const struct i2c_device_id max9867_i2c_id[] = {
517	{ "max9867", 0 },
518	{ }
519};
 
520
 
521static const struct of_device_id max9867_of_match[] = {
522	{ .compatible = "maxim,max9867", },
523	{ }
524};
525
526MODULE_DEVICE_TABLE(i2c, max9867_i2c_id);
527
528static const struct dev_pm_ops max9867_pm_ops = {
529	SET_SYSTEM_SLEEP_PM_OPS(max9867_suspend, max9867_resume)
530};
531
532static struct i2c_driver max9867_i2c_driver = {
533	.driver = {
534		.name = "max9867",
535		.of_match_table = of_match_ptr(max9867_of_match),
536		.pm = &max9867_pm_ops,
537	},
538	.probe  = max9867_i2c_probe,
539	.remove = max9867_i2c_remove,
540	.id_table = max9867_i2c_id,
541};
542
543module_i2c_driver(max9867_i2c_driver);
544
545MODULE_AUTHOR("anish kumar <yesanishhere@gmail.com>");
546MODULE_DESCRIPTION("ALSA SoC MAX9867 driver");
547MODULE_LICENSE("GPL");