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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/* QLogic qed NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#ifndef _QED_ROCE_H
8#define _QED_ROCE_H
9#include <linux/types.h>
10#include <linux/slab.h>
11
12#if IS_ENABLED(CONFIG_QED_RDMA)
13void qed_roce_dpm_dcbx(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
14#else
15static inline void qed_roce_dpm_dcbx(struct qed_hwfn *p_hwfn,
16 struct qed_ptt *p_ptt) {}
17#endif
18
19int qed_roce_setup(struct qed_hwfn *p_hwfn);
20void qed_roce_stop(struct qed_hwfn *p_hwfn);
21int qed_roce_init_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
22int qed_roce_alloc_cid(struct qed_hwfn *p_hwfn, u16 *cid);
23int qed_roce_destroy_qp(struct qed_hwfn *p_hwfn, struct qed_rdma_qp *qp);
24
25int qed_roce_query_qp(struct qed_hwfn *p_hwfn,
26 struct qed_rdma_qp *qp,
27 struct qed_rdma_query_qp_out_params *out_params);
28
29int qed_roce_modify_qp(struct qed_hwfn *p_hwfn,
30 struct qed_rdma_qp *qp,
31 enum qed_roce_qp_state prev_state,
32 struct qed_rdma_modify_qp_in_params *params);
33
34#endif
1/* QLogic qed NIC Driver
2 * Copyright (c) 2015-2016 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#ifndef _QED_ROCE_H
33#define _QED_ROCE_H
34#include <linux/types.h>
35#include <linux/bitops.h>
36#include <linux/kernel.h>
37#include <linux/list.h>
38#include <linux/slab.h>
39#include <linux/spinlock.h>
40#include <linux/qed/qed_if.h>
41#include <linux/qed/qed_roce_if.h>
42#include "qed.h"
43#include "qed_dev_api.h"
44#include "qed_hsi.h"
45#include "qed_ll2.h"
46
47#define QED_RDMA_MAX_FMR (RDMA_MAX_TIDS)
48#define QED_RDMA_MAX_P_KEY (1)
49#define QED_RDMA_MAX_WQE (0x7FFF)
50#define QED_RDMA_MAX_SRQ_WQE_ELEM (0x7FFF)
51#define QED_RDMA_PAGE_SIZE_CAPS (0xFFFFF000)
52#define QED_RDMA_ACK_DELAY (15)
53#define QED_RDMA_MAX_MR_SIZE (0x10000000000ULL)
54#define QED_RDMA_MAX_CQS (RDMA_MAX_CQS)
55#define QED_RDMA_MAX_MRS (RDMA_MAX_TIDS)
56/* Add 1 for header element */
57#define QED_RDMA_MAX_SRQ_ELEM_PER_WQE (RDMA_MAX_SGE_PER_RQ_WQE + 1)
58#define QED_RDMA_MAX_SGE_PER_SRQ_WQE (RDMA_MAX_SGE_PER_RQ_WQE)
59#define QED_RDMA_SRQ_WQE_ELEM_SIZE (16)
60#define QED_RDMA_MAX_SRQS (32 * 1024)
61
62#define QED_RDMA_MAX_CQE_32_BIT (0x7FFFFFFF - 1)
63#define QED_RDMA_MAX_CQE_16_BIT (0x7FFF - 1)
64
65enum qed_rdma_toggle_bit {
66 QED_RDMA_TOGGLE_BIT_CLEAR = 0,
67 QED_RDMA_TOGGLE_BIT_SET = 1
68};
69
70struct qed_bmap {
71 unsigned long *bitmap;
72 u32 max_count;
73};
74
75struct qed_rdma_info {
76 /* spin lock to protect bitmaps */
77 spinlock_t lock;
78
79 struct qed_bmap cq_map;
80 struct qed_bmap pd_map;
81 struct qed_bmap tid_map;
82 struct qed_bmap qp_map;
83 struct qed_bmap srq_map;
84 struct qed_bmap cid_map;
85 struct qed_bmap dpi_map;
86 struct qed_bmap toggle_bits;
87 struct qed_rdma_events events;
88 struct qed_rdma_device *dev;
89 struct qed_rdma_port *port;
90 u32 last_tid;
91 u8 num_cnqs;
92 u32 num_qps;
93 u32 num_mrs;
94 u16 queue_zone_base;
95 enum protocol_type proto;
96};
97
98struct qed_rdma_qp {
99 struct regpair qp_handle;
100 struct regpair qp_handle_async;
101 u32 qpid;
102 u16 icid;
103 enum qed_roce_qp_state cur_state;
104 bool use_srq;
105 bool signal_all;
106 bool fmr_and_reserved_lkey;
107
108 bool incoming_rdma_read_en;
109 bool incoming_rdma_write_en;
110 bool incoming_atomic_en;
111 bool e2e_flow_control_en;
112
113 u16 pd;
114 u16 pkey;
115 u32 dest_qp;
116 u16 mtu;
117 u16 srq_id;
118 u8 traffic_class_tos;
119 u8 hop_limit_ttl;
120 u16 dpi;
121 u32 flow_label;
122 bool lb_indication;
123 u16 vlan_id;
124 u32 ack_timeout;
125 u8 retry_cnt;
126 u8 rnr_retry_cnt;
127 u8 min_rnr_nak_timer;
128 bool sqd_async;
129 union qed_gid sgid;
130 union qed_gid dgid;
131 enum roce_mode roce_mode;
132 u16 udp_src_port;
133 u8 stats_queue;
134
135 /* requeseter */
136 u8 max_rd_atomic_req;
137 u32 sq_psn;
138 u16 sq_cq_id;
139 u16 sq_num_pages;
140 dma_addr_t sq_pbl_ptr;
141 void *orq;
142 dma_addr_t orq_phys_addr;
143 u8 orq_num_pages;
144 bool req_offloaded;
145
146 /* responder */
147 u8 max_rd_atomic_resp;
148 u32 rq_psn;
149 u16 rq_cq_id;
150 u16 rq_num_pages;
151 dma_addr_t rq_pbl_ptr;
152 void *irq;
153 dma_addr_t irq_phys_addr;
154 u8 irq_num_pages;
155 bool resp_offloaded;
156
157 u8 remote_mac_addr[6];
158 u8 local_mac_addr[6];
159
160 void *shared_queue;
161 dma_addr_t shared_queue_phys_addr;
162};
163
164#if IS_ENABLED(CONFIG_QED_RDMA)
165void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
166void qed_async_roce_event(struct qed_hwfn *p_hwfn,
167 struct event_ring_entry *p_eqe);
168void qed_ll2b_complete_tx_gsi_packet(struct qed_hwfn *p_hwfn,
169 u8 connection_handle,
170 void *cookie,
171 dma_addr_t first_frag_addr,
172 bool b_last_fragment, bool b_last_packet);
173void qed_ll2b_release_tx_gsi_packet(struct qed_hwfn *p_hwfn,
174 u8 connection_handle,
175 void *cookie,
176 dma_addr_t first_frag_addr,
177 bool b_last_fragment, bool b_last_packet);
178void qed_ll2b_complete_rx_gsi_packet(struct qed_hwfn *p_hwfn,
179 u8 connection_handle,
180 void *cookie,
181 dma_addr_t rx_buf_addr,
182 u16 data_length,
183 u8 data_length_error,
184 u16 parse_flags,
185 u16 vlan,
186 u32 src_mac_addr_hi,
187 u16 src_mac_addr_lo, bool b_last_packet);
188#else
189static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) {}
190static inline void qed_async_roce_event(struct qed_hwfn *p_hwfn, struct event_ring_entry *p_eqe) {}
191static inline void qed_ll2b_complete_tx_gsi_packet(struct qed_hwfn *p_hwfn,
192 u8 connection_handle,
193 void *cookie,
194 dma_addr_t first_frag_addr,
195 bool b_last_fragment,
196 bool b_last_packet) {}
197static inline void qed_ll2b_release_tx_gsi_packet(struct qed_hwfn *p_hwfn,
198 u8 connection_handle,
199 void *cookie,
200 dma_addr_t first_frag_addr,
201 bool b_last_fragment,
202 bool b_last_packet) {}
203static inline void qed_ll2b_complete_rx_gsi_packet(struct qed_hwfn *p_hwfn,
204 u8 connection_handle,
205 void *cookie,
206 dma_addr_t rx_buf_addr,
207 u16 data_length,
208 u8 data_length_error,
209 u16 parse_flags,
210 u16 vlan,
211 u32 src_mac_addr_hi,
212 u16 src_mac_addr_lo,
213 bool b_last_packet) {}
214#endif
215#endif