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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e_type.h"
28#include "i40e_adminq.h"
29#include "i40e_prototype.h"
30#include "i40e_virtchnl.h"
31
32/**
33 * i40e_set_mac_type - Sets MAC type
34 * @hw: pointer to the HW structure
35 *
36 * This function sets the mac type of the adapter based on the
37 * vendor ID and device ID stored in the hw structure.
38 **/
39i40e_status i40e_set_mac_type(struct i40e_hw *hw)
40{
41 i40e_status status = 0;
42
43 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
44 switch (hw->device_id) {
45 case I40E_DEV_ID_SFP_XL710:
46 case I40E_DEV_ID_QEMU:
47 case I40E_DEV_ID_KX_B:
48 case I40E_DEV_ID_KX_C:
49 case I40E_DEV_ID_QSFP_A:
50 case I40E_DEV_ID_QSFP_B:
51 case I40E_DEV_ID_QSFP_C:
52 case I40E_DEV_ID_10G_BASE_T:
53 case I40E_DEV_ID_10G_BASE_T4:
54 case I40E_DEV_ID_20G_KR2:
55 case I40E_DEV_ID_20G_KR2_A:
56 case I40E_DEV_ID_25G_B:
57 case I40E_DEV_ID_25G_SFP28:
58 hw->mac.type = I40E_MAC_XL710;
59 break;
60 case I40E_DEV_ID_SFP_X722:
61 case I40E_DEV_ID_1G_BASE_T_X722:
62 case I40E_DEV_ID_10G_BASE_T_X722:
63 case I40E_DEV_ID_SFP_I_X722:
64 hw->mac.type = I40E_MAC_X722;
65 break;
66 case I40E_DEV_ID_X722_VF:
67 case I40E_DEV_ID_X722_VF_HV:
68 hw->mac.type = I40E_MAC_X722_VF;
69 break;
70 case I40E_DEV_ID_VF:
71 case I40E_DEV_ID_VF_HV:
72 hw->mac.type = I40E_MAC_VF;
73 break;
74 default:
75 hw->mac.type = I40E_MAC_GENERIC;
76 break;
77 }
78 } else {
79 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
80 }
81
82 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
83 hw->mac.type, status);
84 return status;
85}
86
87/**
88 * i40evf_aq_str - convert AQ err code to a string
89 * @hw: pointer to the HW structure
90 * @aq_err: the AQ error code to convert
91 **/
92const char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
93{
94 switch (aq_err) {
95 case I40E_AQ_RC_OK:
96 return "OK";
97 case I40E_AQ_RC_EPERM:
98 return "I40E_AQ_RC_EPERM";
99 case I40E_AQ_RC_ENOENT:
100 return "I40E_AQ_RC_ENOENT";
101 case I40E_AQ_RC_ESRCH:
102 return "I40E_AQ_RC_ESRCH";
103 case I40E_AQ_RC_EINTR:
104 return "I40E_AQ_RC_EINTR";
105 case I40E_AQ_RC_EIO:
106 return "I40E_AQ_RC_EIO";
107 case I40E_AQ_RC_ENXIO:
108 return "I40E_AQ_RC_ENXIO";
109 case I40E_AQ_RC_E2BIG:
110 return "I40E_AQ_RC_E2BIG";
111 case I40E_AQ_RC_EAGAIN:
112 return "I40E_AQ_RC_EAGAIN";
113 case I40E_AQ_RC_ENOMEM:
114 return "I40E_AQ_RC_ENOMEM";
115 case I40E_AQ_RC_EACCES:
116 return "I40E_AQ_RC_EACCES";
117 case I40E_AQ_RC_EFAULT:
118 return "I40E_AQ_RC_EFAULT";
119 case I40E_AQ_RC_EBUSY:
120 return "I40E_AQ_RC_EBUSY";
121 case I40E_AQ_RC_EEXIST:
122 return "I40E_AQ_RC_EEXIST";
123 case I40E_AQ_RC_EINVAL:
124 return "I40E_AQ_RC_EINVAL";
125 case I40E_AQ_RC_ENOTTY:
126 return "I40E_AQ_RC_ENOTTY";
127 case I40E_AQ_RC_ENOSPC:
128 return "I40E_AQ_RC_ENOSPC";
129 case I40E_AQ_RC_ENOSYS:
130 return "I40E_AQ_RC_ENOSYS";
131 case I40E_AQ_RC_ERANGE:
132 return "I40E_AQ_RC_ERANGE";
133 case I40E_AQ_RC_EFLUSHED:
134 return "I40E_AQ_RC_EFLUSHED";
135 case I40E_AQ_RC_BAD_ADDR:
136 return "I40E_AQ_RC_BAD_ADDR";
137 case I40E_AQ_RC_EMODE:
138 return "I40E_AQ_RC_EMODE";
139 case I40E_AQ_RC_EFBIG:
140 return "I40E_AQ_RC_EFBIG";
141 }
142
143 snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);
144 return hw->err_str;
145}
146
147/**
148 * i40evf_stat_str - convert status err code to a string
149 * @hw: pointer to the HW structure
150 * @stat_err: the status error code to convert
151 **/
152const char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err)
153{
154 switch (stat_err) {
155 case 0:
156 return "OK";
157 case I40E_ERR_NVM:
158 return "I40E_ERR_NVM";
159 case I40E_ERR_NVM_CHECKSUM:
160 return "I40E_ERR_NVM_CHECKSUM";
161 case I40E_ERR_PHY:
162 return "I40E_ERR_PHY";
163 case I40E_ERR_CONFIG:
164 return "I40E_ERR_CONFIG";
165 case I40E_ERR_PARAM:
166 return "I40E_ERR_PARAM";
167 case I40E_ERR_MAC_TYPE:
168 return "I40E_ERR_MAC_TYPE";
169 case I40E_ERR_UNKNOWN_PHY:
170 return "I40E_ERR_UNKNOWN_PHY";
171 case I40E_ERR_LINK_SETUP:
172 return "I40E_ERR_LINK_SETUP";
173 case I40E_ERR_ADAPTER_STOPPED:
174 return "I40E_ERR_ADAPTER_STOPPED";
175 case I40E_ERR_INVALID_MAC_ADDR:
176 return "I40E_ERR_INVALID_MAC_ADDR";
177 case I40E_ERR_DEVICE_NOT_SUPPORTED:
178 return "I40E_ERR_DEVICE_NOT_SUPPORTED";
179 case I40E_ERR_MASTER_REQUESTS_PENDING:
180 return "I40E_ERR_MASTER_REQUESTS_PENDING";
181 case I40E_ERR_INVALID_LINK_SETTINGS:
182 return "I40E_ERR_INVALID_LINK_SETTINGS";
183 case I40E_ERR_AUTONEG_NOT_COMPLETE:
184 return "I40E_ERR_AUTONEG_NOT_COMPLETE";
185 case I40E_ERR_RESET_FAILED:
186 return "I40E_ERR_RESET_FAILED";
187 case I40E_ERR_SWFW_SYNC:
188 return "I40E_ERR_SWFW_SYNC";
189 case I40E_ERR_NO_AVAILABLE_VSI:
190 return "I40E_ERR_NO_AVAILABLE_VSI";
191 case I40E_ERR_NO_MEMORY:
192 return "I40E_ERR_NO_MEMORY";
193 case I40E_ERR_BAD_PTR:
194 return "I40E_ERR_BAD_PTR";
195 case I40E_ERR_RING_FULL:
196 return "I40E_ERR_RING_FULL";
197 case I40E_ERR_INVALID_PD_ID:
198 return "I40E_ERR_INVALID_PD_ID";
199 case I40E_ERR_INVALID_QP_ID:
200 return "I40E_ERR_INVALID_QP_ID";
201 case I40E_ERR_INVALID_CQ_ID:
202 return "I40E_ERR_INVALID_CQ_ID";
203 case I40E_ERR_INVALID_CEQ_ID:
204 return "I40E_ERR_INVALID_CEQ_ID";
205 case I40E_ERR_INVALID_AEQ_ID:
206 return "I40E_ERR_INVALID_AEQ_ID";
207 case I40E_ERR_INVALID_SIZE:
208 return "I40E_ERR_INVALID_SIZE";
209 case I40E_ERR_INVALID_ARP_INDEX:
210 return "I40E_ERR_INVALID_ARP_INDEX";
211 case I40E_ERR_INVALID_FPM_FUNC_ID:
212 return "I40E_ERR_INVALID_FPM_FUNC_ID";
213 case I40E_ERR_QP_INVALID_MSG_SIZE:
214 return "I40E_ERR_QP_INVALID_MSG_SIZE";
215 case I40E_ERR_QP_TOOMANY_WRS_POSTED:
216 return "I40E_ERR_QP_TOOMANY_WRS_POSTED";
217 case I40E_ERR_INVALID_FRAG_COUNT:
218 return "I40E_ERR_INVALID_FRAG_COUNT";
219 case I40E_ERR_QUEUE_EMPTY:
220 return "I40E_ERR_QUEUE_EMPTY";
221 case I40E_ERR_INVALID_ALIGNMENT:
222 return "I40E_ERR_INVALID_ALIGNMENT";
223 case I40E_ERR_FLUSHED_QUEUE:
224 return "I40E_ERR_FLUSHED_QUEUE";
225 case I40E_ERR_INVALID_PUSH_PAGE_INDEX:
226 return "I40E_ERR_INVALID_PUSH_PAGE_INDEX";
227 case I40E_ERR_INVALID_IMM_DATA_SIZE:
228 return "I40E_ERR_INVALID_IMM_DATA_SIZE";
229 case I40E_ERR_TIMEOUT:
230 return "I40E_ERR_TIMEOUT";
231 case I40E_ERR_OPCODE_MISMATCH:
232 return "I40E_ERR_OPCODE_MISMATCH";
233 case I40E_ERR_CQP_COMPL_ERROR:
234 return "I40E_ERR_CQP_COMPL_ERROR";
235 case I40E_ERR_INVALID_VF_ID:
236 return "I40E_ERR_INVALID_VF_ID";
237 case I40E_ERR_INVALID_HMCFN_ID:
238 return "I40E_ERR_INVALID_HMCFN_ID";
239 case I40E_ERR_BACKING_PAGE_ERROR:
240 return "I40E_ERR_BACKING_PAGE_ERROR";
241 case I40E_ERR_NO_PBLCHUNKS_AVAILABLE:
242 return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE";
243 case I40E_ERR_INVALID_PBLE_INDEX:
244 return "I40E_ERR_INVALID_PBLE_INDEX";
245 case I40E_ERR_INVALID_SD_INDEX:
246 return "I40E_ERR_INVALID_SD_INDEX";
247 case I40E_ERR_INVALID_PAGE_DESC_INDEX:
248 return "I40E_ERR_INVALID_PAGE_DESC_INDEX";
249 case I40E_ERR_INVALID_SD_TYPE:
250 return "I40E_ERR_INVALID_SD_TYPE";
251 case I40E_ERR_MEMCPY_FAILED:
252 return "I40E_ERR_MEMCPY_FAILED";
253 case I40E_ERR_INVALID_HMC_OBJ_INDEX:
254 return "I40E_ERR_INVALID_HMC_OBJ_INDEX";
255 case I40E_ERR_INVALID_HMC_OBJ_COUNT:
256 return "I40E_ERR_INVALID_HMC_OBJ_COUNT";
257 case I40E_ERR_INVALID_SRQ_ARM_LIMIT:
258 return "I40E_ERR_INVALID_SRQ_ARM_LIMIT";
259 case I40E_ERR_SRQ_ENABLED:
260 return "I40E_ERR_SRQ_ENABLED";
261 case I40E_ERR_ADMIN_QUEUE_ERROR:
262 return "I40E_ERR_ADMIN_QUEUE_ERROR";
263 case I40E_ERR_ADMIN_QUEUE_TIMEOUT:
264 return "I40E_ERR_ADMIN_QUEUE_TIMEOUT";
265 case I40E_ERR_BUF_TOO_SHORT:
266 return "I40E_ERR_BUF_TOO_SHORT";
267 case I40E_ERR_ADMIN_QUEUE_FULL:
268 return "I40E_ERR_ADMIN_QUEUE_FULL";
269 case I40E_ERR_ADMIN_QUEUE_NO_WORK:
270 return "I40E_ERR_ADMIN_QUEUE_NO_WORK";
271 case I40E_ERR_BAD_IWARP_CQE:
272 return "I40E_ERR_BAD_IWARP_CQE";
273 case I40E_ERR_NVM_BLANK_MODE:
274 return "I40E_ERR_NVM_BLANK_MODE";
275 case I40E_ERR_NOT_IMPLEMENTED:
276 return "I40E_ERR_NOT_IMPLEMENTED";
277 case I40E_ERR_PE_DOORBELL_NOT_ENABLED:
278 return "I40E_ERR_PE_DOORBELL_NOT_ENABLED";
279 case I40E_ERR_DIAG_TEST_FAILED:
280 return "I40E_ERR_DIAG_TEST_FAILED";
281 case I40E_ERR_NOT_READY:
282 return "I40E_ERR_NOT_READY";
283 case I40E_NOT_SUPPORTED:
284 return "I40E_NOT_SUPPORTED";
285 case I40E_ERR_FIRMWARE_API_VERSION:
286 return "I40E_ERR_FIRMWARE_API_VERSION";
287 }
288
289 snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);
290 return hw->err_str;
291}
292
293/**
294 * i40evf_debug_aq
295 * @hw: debug mask related to admin queue
296 * @mask: debug mask
297 * @desc: pointer to admin queue descriptor
298 * @buffer: pointer to command buffer
299 * @buf_len: max length of buffer
300 *
301 * Dumps debug log about adminq command with descriptor contents.
302 **/
303void i40evf_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
304 void *buffer, u16 buf_len)
305{
306 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
307 u8 *buf = (u8 *)buffer;
308 u16 i = 0;
309
310 if ((!(mask & hw->debug_mask)) || (desc == NULL))
311 return;
312
313 i40e_debug(hw, mask,
314 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
315 le16_to_cpu(aq_desc->opcode),
316 le16_to_cpu(aq_desc->flags),
317 le16_to_cpu(aq_desc->datalen),
318 le16_to_cpu(aq_desc->retval));
319 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
320 le32_to_cpu(aq_desc->cookie_high),
321 le32_to_cpu(aq_desc->cookie_low));
322 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
323 le32_to_cpu(aq_desc->params.internal.param0),
324 le32_to_cpu(aq_desc->params.internal.param1));
325 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
326 le32_to_cpu(aq_desc->params.external.addr_high),
327 le32_to_cpu(aq_desc->params.external.addr_low));
328
329 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
330 u16 len = le16_to_cpu(aq_desc->datalen);
331
332 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
333 if (buf_len < len)
334 len = buf_len;
335 /* write the full 16-byte chunks */
336 for (i = 0; i < (len - 16); i += 16)
337 i40e_debug(hw, mask, "\t0x%04X %16ph\n", i, buf + i);
338 /* write whatever's left over without overrunning the buffer */
339 if (i < len)
340 i40e_debug(hw, mask, "\t0x%04X %*ph\n",
341 i, len - i, buf + i);
342 }
343}
344
345/**
346 * i40evf_check_asq_alive
347 * @hw: pointer to the hw struct
348 *
349 * Returns true if Queue is enabled else false.
350 **/
351bool i40evf_check_asq_alive(struct i40e_hw *hw)
352{
353 if (hw->aq.asq.len)
354 return !!(rd32(hw, hw->aq.asq.len) &
355 I40E_VF_ATQLEN1_ATQENABLE_MASK);
356 else
357 return false;
358}
359
360/**
361 * i40evf_aq_queue_shutdown
362 * @hw: pointer to the hw struct
363 * @unloading: is the driver unloading itself
364 *
365 * Tell the Firmware that we're shutting down the AdminQ and whether
366 * or not the driver is unloading as well.
367 **/
368i40e_status i40evf_aq_queue_shutdown(struct i40e_hw *hw,
369 bool unloading)
370{
371 struct i40e_aq_desc desc;
372 struct i40e_aqc_queue_shutdown *cmd =
373 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
374 i40e_status status;
375
376 i40evf_fill_default_direct_cmd_desc(&desc,
377 i40e_aqc_opc_queue_shutdown);
378
379 if (unloading)
380 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
381 status = i40evf_asq_send_command(hw, &desc, NULL, 0, NULL);
382
383 return status;
384}
385
386/**
387 * i40e_aq_get_set_rss_lut
388 * @hw: pointer to the hardware structure
389 * @vsi_id: vsi fw index
390 * @pf_lut: for PF table set true, for VSI table set false
391 * @lut: pointer to the lut buffer provided by the caller
392 * @lut_size: size of the lut buffer
393 * @set: set true to set the table, false to get the table
394 *
395 * Internal function to get or set RSS look up table
396 **/
397static i40e_status i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
398 u16 vsi_id, bool pf_lut,
399 u8 *lut, u16 lut_size,
400 bool set)
401{
402 i40e_status status;
403 struct i40e_aq_desc desc;
404 struct i40e_aqc_get_set_rss_lut *cmd_resp =
405 (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;
406
407 if (set)
408 i40evf_fill_default_direct_cmd_desc(&desc,
409 i40e_aqc_opc_set_rss_lut);
410 else
411 i40evf_fill_default_direct_cmd_desc(&desc,
412 i40e_aqc_opc_get_rss_lut);
413
414 /* Indirect command */
415 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
416 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
417
418 cmd_resp->vsi_id =
419 cpu_to_le16((u16)((vsi_id <<
420 I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
421 I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
422 cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);
423
424 if (pf_lut)
425 cmd_resp->flags |= cpu_to_le16((u16)
426 ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
427 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
428 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
429 else
430 cmd_resp->flags |= cpu_to_le16((u16)
431 ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
432 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
433 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
434
435 status = i40evf_asq_send_command(hw, &desc, lut, lut_size, NULL);
436
437 return status;
438}
439
440/**
441 * i40evf_aq_get_rss_lut
442 * @hw: pointer to the hardware structure
443 * @vsi_id: vsi fw index
444 * @pf_lut: for PF table set true, for VSI table set false
445 * @lut: pointer to the lut buffer provided by the caller
446 * @lut_size: size of the lut buffer
447 *
448 * get the RSS lookup table, PF or VSI type
449 **/
450i40e_status i40evf_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,
451 bool pf_lut, u8 *lut, u16 lut_size)
452{
453 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
454 false);
455}
456
457/**
458 * i40evf_aq_set_rss_lut
459 * @hw: pointer to the hardware structure
460 * @vsi_id: vsi fw index
461 * @pf_lut: for PF table set true, for VSI table set false
462 * @lut: pointer to the lut buffer provided by the caller
463 * @lut_size: size of the lut buffer
464 *
465 * set the RSS lookup table, PF or VSI type
466 **/
467i40e_status i40evf_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,
468 bool pf_lut, u8 *lut, u16 lut_size)
469{
470 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);
471}
472
473/**
474 * i40e_aq_get_set_rss_key
475 * @hw: pointer to the hw struct
476 * @vsi_id: vsi fw index
477 * @key: pointer to key info struct
478 * @set: set true to set the key, false to get the key
479 *
480 * get the RSS key per VSI
481 **/
482static i40e_status i40e_aq_get_set_rss_key(struct i40e_hw *hw,
483 u16 vsi_id,
484 struct i40e_aqc_get_set_rss_key_data *key,
485 bool set)
486{
487 i40e_status status;
488 struct i40e_aq_desc desc;
489 struct i40e_aqc_get_set_rss_key *cmd_resp =
490 (struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
491 u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);
492
493 if (set)
494 i40evf_fill_default_direct_cmd_desc(&desc,
495 i40e_aqc_opc_set_rss_key);
496 else
497 i40evf_fill_default_direct_cmd_desc(&desc,
498 i40e_aqc_opc_get_rss_key);
499
500 /* Indirect command */
501 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
502 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
503
504 cmd_resp->vsi_id =
505 cpu_to_le16((u16)((vsi_id <<
506 I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
507 I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
508 cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);
509
510 status = i40evf_asq_send_command(hw, &desc, key, key_size, NULL);
511
512 return status;
513}
514
515/**
516 * i40evf_aq_get_rss_key
517 * @hw: pointer to the hw struct
518 * @vsi_id: vsi fw index
519 * @key: pointer to key info struct
520 *
521 **/
522i40e_status i40evf_aq_get_rss_key(struct i40e_hw *hw,
523 u16 vsi_id,
524 struct i40e_aqc_get_set_rss_key_data *key)
525{
526 return i40e_aq_get_set_rss_key(hw, vsi_id, key, false);
527}
528
529/**
530 * i40evf_aq_set_rss_key
531 * @hw: pointer to the hw struct
532 * @vsi_id: vsi fw index
533 * @key: pointer to key info struct
534 *
535 * set the RSS key per VSI
536 **/
537i40e_status i40evf_aq_set_rss_key(struct i40e_hw *hw,
538 u16 vsi_id,
539 struct i40e_aqc_get_set_rss_key_data *key)
540{
541 return i40e_aq_get_set_rss_key(hw, vsi_id, key, true);
542}
543
544
545/* The i40evf_ptype_lookup table is used to convert from the 8-bit ptype in the
546 * hardware to a bit-field that can be used by SW to more easily determine the
547 * packet type.
548 *
549 * Macros are used to shorten the table lines and make this table human
550 * readable.
551 *
552 * We store the PTYPE in the top byte of the bit field - this is just so that
553 * we can check that the table doesn't have a row missing, as the index into
554 * the table should be the PTYPE.
555 *
556 * Typical work flow:
557 *
558 * IF NOT i40evf_ptype_lookup[ptype].known
559 * THEN
560 * Packet is unknown
561 * ELSE IF i40evf_ptype_lookup[ptype].outer_ip == I40E_RX_PTYPE_OUTER_IP
562 * Use the rest of the fields to look at the tunnels, inner protocols, etc
563 * ELSE
564 * Use the enum i40e_rx_l2_ptype to decode the packet type
565 * ENDIF
566 */
567
568/* macro to make the table lines short */
569#define I40E_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\
570 { PTYPE, \
571 1, \
572 I40E_RX_PTYPE_OUTER_##OUTER_IP, \
573 I40E_RX_PTYPE_OUTER_##OUTER_IP_VER, \
574 I40E_RX_PTYPE_##OUTER_FRAG, \
575 I40E_RX_PTYPE_TUNNEL_##T, \
576 I40E_RX_PTYPE_TUNNEL_END_##TE, \
577 I40E_RX_PTYPE_##TEF, \
578 I40E_RX_PTYPE_INNER_PROT_##I, \
579 I40E_RX_PTYPE_PAYLOAD_LAYER_##PL }
580
581#define I40E_PTT_UNUSED_ENTRY(PTYPE) \
582 { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
583
584/* shorter macros makes the table fit but are terse */
585#define I40E_RX_PTYPE_NOF I40E_RX_PTYPE_NOT_FRAG
586#define I40E_RX_PTYPE_FRG I40E_RX_PTYPE_FRAG
587#define I40E_RX_PTYPE_INNER_PROT_TS I40E_RX_PTYPE_INNER_PROT_TIMESYNC
588
589/* Lookup table mapping the HW PTYPE to the bit field for decoding */
590struct i40e_rx_ptype_decoded i40evf_ptype_lookup[] = {
591 /* L2 Packet types */
592 I40E_PTT_UNUSED_ENTRY(0),
593 I40E_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
594 I40E_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, TS, PAY2),
595 I40E_PTT(3, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
596 I40E_PTT_UNUSED_ENTRY(4),
597 I40E_PTT_UNUSED_ENTRY(5),
598 I40E_PTT(6, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
599 I40E_PTT(7, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
600 I40E_PTT_UNUSED_ENTRY(8),
601 I40E_PTT_UNUSED_ENTRY(9),
602 I40E_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
603 I40E_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
604 I40E_PTT(12, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
605 I40E_PTT(13, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
606 I40E_PTT(14, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
607 I40E_PTT(15, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
608 I40E_PTT(16, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
609 I40E_PTT(17, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
610 I40E_PTT(18, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
611 I40E_PTT(19, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
612 I40E_PTT(20, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
613 I40E_PTT(21, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
614
615 /* Non Tunneled IPv4 */
616 I40E_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
617 I40E_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
618 I40E_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4),
619 I40E_PTT_UNUSED_ENTRY(25),
620 I40E_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4),
621 I40E_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
622 I40E_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
623
624 /* IPv4 --> IPv4 */
625 I40E_PTT(29, IP, IPV4, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
626 I40E_PTT(30, IP, IPV4, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
627 I40E_PTT(31, IP, IPV4, NOF, IP_IP, IPV4, NOF, UDP, PAY4),
628 I40E_PTT_UNUSED_ENTRY(32),
629 I40E_PTT(33, IP, IPV4, NOF, IP_IP, IPV4, NOF, TCP, PAY4),
630 I40E_PTT(34, IP, IPV4, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
631 I40E_PTT(35, IP, IPV4, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
632
633 /* IPv4 --> IPv6 */
634 I40E_PTT(36, IP, IPV4, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
635 I40E_PTT(37, IP, IPV4, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
636 I40E_PTT(38, IP, IPV4, NOF, IP_IP, IPV6, NOF, UDP, PAY4),
637 I40E_PTT_UNUSED_ENTRY(39),
638 I40E_PTT(40, IP, IPV4, NOF, IP_IP, IPV6, NOF, TCP, PAY4),
639 I40E_PTT(41, IP, IPV4, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
640 I40E_PTT(42, IP, IPV4, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
641
642 /* IPv4 --> GRE/NAT */
643 I40E_PTT(43, IP, IPV4, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
644
645 /* IPv4 --> GRE/NAT --> IPv4 */
646 I40E_PTT(44, IP, IPV4, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
647 I40E_PTT(45, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
648 I40E_PTT(46, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4),
649 I40E_PTT_UNUSED_ENTRY(47),
650 I40E_PTT(48, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4),
651 I40E_PTT(49, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
652 I40E_PTT(50, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
653
654 /* IPv4 --> GRE/NAT --> IPv6 */
655 I40E_PTT(51, IP, IPV4, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
656 I40E_PTT(52, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
657 I40E_PTT(53, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4),
658 I40E_PTT_UNUSED_ENTRY(54),
659 I40E_PTT(55, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4),
660 I40E_PTT(56, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
661 I40E_PTT(57, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
662
663 /* IPv4 --> GRE/NAT --> MAC */
664 I40E_PTT(58, IP, IPV4, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
665
666 /* IPv4 --> GRE/NAT --> MAC --> IPv4 */
667 I40E_PTT(59, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
668 I40E_PTT(60, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
669 I40E_PTT(61, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4),
670 I40E_PTT_UNUSED_ENTRY(62),
671 I40E_PTT(63, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4),
672 I40E_PTT(64, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
673 I40E_PTT(65, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
674
675 /* IPv4 --> GRE/NAT -> MAC --> IPv6 */
676 I40E_PTT(66, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
677 I40E_PTT(67, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
678 I40E_PTT(68, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4),
679 I40E_PTT_UNUSED_ENTRY(69),
680 I40E_PTT(70, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4),
681 I40E_PTT(71, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
682 I40E_PTT(72, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
683
684 /* IPv4 --> GRE/NAT --> MAC/VLAN */
685 I40E_PTT(73, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
686
687 /* IPv4 ---> GRE/NAT -> MAC/VLAN --> IPv4 */
688 I40E_PTT(74, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
689 I40E_PTT(75, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
690 I40E_PTT(76, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4),
691 I40E_PTT_UNUSED_ENTRY(77),
692 I40E_PTT(78, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4),
693 I40E_PTT(79, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
694 I40E_PTT(80, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
695
696 /* IPv4 -> GRE/NAT -> MAC/VLAN --> IPv6 */
697 I40E_PTT(81, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
698 I40E_PTT(82, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
699 I40E_PTT(83, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4),
700 I40E_PTT_UNUSED_ENTRY(84),
701 I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
702 I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
703 I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
704
705 /* Non Tunneled IPv6 */
706 I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
707 I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
708 I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3),
709 I40E_PTT_UNUSED_ENTRY(91),
710 I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
711 I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),
712 I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),
713
714 /* IPv6 --> IPv4 */
715 I40E_PTT(95, IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
716 I40E_PTT(96, IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
717 I40E_PTT(97, IP, IPV6, NOF, IP_IP, IPV4, NOF, UDP, PAY4),
718 I40E_PTT_UNUSED_ENTRY(98),
719 I40E_PTT(99, IP, IPV6, NOF, IP_IP, IPV4, NOF, TCP, PAY4),
720 I40E_PTT(100, IP, IPV6, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
721 I40E_PTT(101, IP, IPV6, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
722
723 /* IPv6 --> IPv6 */
724 I40E_PTT(102, IP, IPV6, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
725 I40E_PTT(103, IP, IPV6, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
726 I40E_PTT(104, IP, IPV6, NOF, IP_IP, IPV6, NOF, UDP, PAY4),
727 I40E_PTT_UNUSED_ENTRY(105),
728 I40E_PTT(106, IP, IPV6, NOF, IP_IP, IPV6, NOF, TCP, PAY4),
729 I40E_PTT(107, IP, IPV6, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
730 I40E_PTT(108, IP, IPV6, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
731
732 /* IPv6 --> GRE/NAT */
733 I40E_PTT(109, IP, IPV6, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
734
735 /* IPv6 --> GRE/NAT -> IPv4 */
736 I40E_PTT(110, IP, IPV6, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
737 I40E_PTT(111, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
738 I40E_PTT(112, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4),
739 I40E_PTT_UNUSED_ENTRY(113),
740 I40E_PTT(114, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4),
741 I40E_PTT(115, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
742 I40E_PTT(116, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
743
744 /* IPv6 --> GRE/NAT -> IPv6 */
745 I40E_PTT(117, IP, IPV6, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
746 I40E_PTT(118, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
747 I40E_PTT(119, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4),
748 I40E_PTT_UNUSED_ENTRY(120),
749 I40E_PTT(121, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4),
750 I40E_PTT(122, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
751 I40E_PTT(123, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
752
753 /* IPv6 --> GRE/NAT -> MAC */
754 I40E_PTT(124, IP, IPV6, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
755
756 /* IPv6 --> GRE/NAT -> MAC -> IPv4 */
757 I40E_PTT(125, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
758 I40E_PTT(126, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
759 I40E_PTT(127, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4),
760 I40E_PTT_UNUSED_ENTRY(128),
761 I40E_PTT(129, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4),
762 I40E_PTT(130, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
763 I40E_PTT(131, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
764
765 /* IPv6 --> GRE/NAT -> MAC -> IPv6 */
766 I40E_PTT(132, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
767 I40E_PTT(133, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
768 I40E_PTT(134, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4),
769 I40E_PTT_UNUSED_ENTRY(135),
770 I40E_PTT(136, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4),
771 I40E_PTT(137, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
772 I40E_PTT(138, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
773
774 /* IPv6 --> GRE/NAT -> MAC/VLAN */
775 I40E_PTT(139, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
776
777 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv4 */
778 I40E_PTT(140, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
779 I40E_PTT(141, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
780 I40E_PTT(142, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4),
781 I40E_PTT_UNUSED_ENTRY(143),
782 I40E_PTT(144, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4),
783 I40E_PTT(145, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
784 I40E_PTT(146, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
785
786 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv6 */
787 I40E_PTT(147, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
788 I40E_PTT(148, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
789 I40E_PTT(149, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4),
790 I40E_PTT_UNUSED_ENTRY(150),
791 I40E_PTT(151, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
792 I40E_PTT(152, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
793 I40E_PTT(153, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
794
795 /* unused entries */
796 I40E_PTT_UNUSED_ENTRY(154),
797 I40E_PTT_UNUSED_ENTRY(155),
798 I40E_PTT_UNUSED_ENTRY(156),
799 I40E_PTT_UNUSED_ENTRY(157),
800 I40E_PTT_UNUSED_ENTRY(158),
801 I40E_PTT_UNUSED_ENTRY(159),
802
803 I40E_PTT_UNUSED_ENTRY(160),
804 I40E_PTT_UNUSED_ENTRY(161),
805 I40E_PTT_UNUSED_ENTRY(162),
806 I40E_PTT_UNUSED_ENTRY(163),
807 I40E_PTT_UNUSED_ENTRY(164),
808 I40E_PTT_UNUSED_ENTRY(165),
809 I40E_PTT_UNUSED_ENTRY(166),
810 I40E_PTT_UNUSED_ENTRY(167),
811 I40E_PTT_UNUSED_ENTRY(168),
812 I40E_PTT_UNUSED_ENTRY(169),
813
814 I40E_PTT_UNUSED_ENTRY(170),
815 I40E_PTT_UNUSED_ENTRY(171),
816 I40E_PTT_UNUSED_ENTRY(172),
817 I40E_PTT_UNUSED_ENTRY(173),
818 I40E_PTT_UNUSED_ENTRY(174),
819 I40E_PTT_UNUSED_ENTRY(175),
820 I40E_PTT_UNUSED_ENTRY(176),
821 I40E_PTT_UNUSED_ENTRY(177),
822 I40E_PTT_UNUSED_ENTRY(178),
823 I40E_PTT_UNUSED_ENTRY(179),
824
825 I40E_PTT_UNUSED_ENTRY(180),
826 I40E_PTT_UNUSED_ENTRY(181),
827 I40E_PTT_UNUSED_ENTRY(182),
828 I40E_PTT_UNUSED_ENTRY(183),
829 I40E_PTT_UNUSED_ENTRY(184),
830 I40E_PTT_UNUSED_ENTRY(185),
831 I40E_PTT_UNUSED_ENTRY(186),
832 I40E_PTT_UNUSED_ENTRY(187),
833 I40E_PTT_UNUSED_ENTRY(188),
834 I40E_PTT_UNUSED_ENTRY(189),
835
836 I40E_PTT_UNUSED_ENTRY(190),
837 I40E_PTT_UNUSED_ENTRY(191),
838 I40E_PTT_UNUSED_ENTRY(192),
839 I40E_PTT_UNUSED_ENTRY(193),
840 I40E_PTT_UNUSED_ENTRY(194),
841 I40E_PTT_UNUSED_ENTRY(195),
842 I40E_PTT_UNUSED_ENTRY(196),
843 I40E_PTT_UNUSED_ENTRY(197),
844 I40E_PTT_UNUSED_ENTRY(198),
845 I40E_PTT_UNUSED_ENTRY(199),
846
847 I40E_PTT_UNUSED_ENTRY(200),
848 I40E_PTT_UNUSED_ENTRY(201),
849 I40E_PTT_UNUSED_ENTRY(202),
850 I40E_PTT_UNUSED_ENTRY(203),
851 I40E_PTT_UNUSED_ENTRY(204),
852 I40E_PTT_UNUSED_ENTRY(205),
853 I40E_PTT_UNUSED_ENTRY(206),
854 I40E_PTT_UNUSED_ENTRY(207),
855 I40E_PTT_UNUSED_ENTRY(208),
856 I40E_PTT_UNUSED_ENTRY(209),
857
858 I40E_PTT_UNUSED_ENTRY(210),
859 I40E_PTT_UNUSED_ENTRY(211),
860 I40E_PTT_UNUSED_ENTRY(212),
861 I40E_PTT_UNUSED_ENTRY(213),
862 I40E_PTT_UNUSED_ENTRY(214),
863 I40E_PTT_UNUSED_ENTRY(215),
864 I40E_PTT_UNUSED_ENTRY(216),
865 I40E_PTT_UNUSED_ENTRY(217),
866 I40E_PTT_UNUSED_ENTRY(218),
867 I40E_PTT_UNUSED_ENTRY(219),
868
869 I40E_PTT_UNUSED_ENTRY(220),
870 I40E_PTT_UNUSED_ENTRY(221),
871 I40E_PTT_UNUSED_ENTRY(222),
872 I40E_PTT_UNUSED_ENTRY(223),
873 I40E_PTT_UNUSED_ENTRY(224),
874 I40E_PTT_UNUSED_ENTRY(225),
875 I40E_PTT_UNUSED_ENTRY(226),
876 I40E_PTT_UNUSED_ENTRY(227),
877 I40E_PTT_UNUSED_ENTRY(228),
878 I40E_PTT_UNUSED_ENTRY(229),
879
880 I40E_PTT_UNUSED_ENTRY(230),
881 I40E_PTT_UNUSED_ENTRY(231),
882 I40E_PTT_UNUSED_ENTRY(232),
883 I40E_PTT_UNUSED_ENTRY(233),
884 I40E_PTT_UNUSED_ENTRY(234),
885 I40E_PTT_UNUSED_ENTRY(235),
886 I40E_PTT_UNUSED_ENTRY(236),
887 I40E_PTT_UNUSED_ENTRY(237),
888 I40E_PTT_UNUSED_ENTRY(238),
889 I40E_PTT_UNUSED_ENTRY(239),
890
891 I40E_PTT_UNUSED_ENTRY(240),
892 I40E_PTT_UNUSED_ENTRY(241),
893 I40E_PTT_UNUSED_ENTRY(242),
894 I40E_PTT_UNUSED_ENTRY(243),
895 I40E_PTT_UNUSED_ENTRY(244),
896 I40E_PTT_UNUSED_ENTRY(245),
897 I40E_PTT_UNUSED_ENTRY(246),
898 I40E_PTT_UNUSED_ENTRY(247),
899 I40E_PTT_UNUSED_ENTRY(248),
900 I40E_PTT_UNUSED_ENTRY(249),
901
902 I40E_PTT_UNUSED_ENTRY(250),
903 I40E_PTT_UNUSED_ENTRY(251),
904 I40E_PTT_UNUSED_ENTRY(252),
905 I40E_PTT_UNUSED_ENTRY(253),
906 I40E_PTT_UNUSED_ENTRY(254),
907 I40E_PTT_UNUSED_ENTRY(255)
908};
909
910/**
911 * i40evf_aq_rx_ctl_read_register - use FW to read from an Rx control register
912 * @hw: pointer to the hw struct
913 * @reg_addr: register address
914 * @reg_val: ptr to register value
915 * @cmd_details: pointer to command details structure or NULL
916 *
917 * Use the firmware to read the Rx control register,
918 * especially useful if the Rx unit is under heavy pressure
919 **/
920i40e_status i40evf_aq_rx_ctl_read_register(struct i40e_hw *hw,
921 u32 reg_addr, u32 *reg_val,
922 struct i40e_asq_cmd_details *cmd_details)
923{
924 struct i40e_aq_desc desc;
925 struct i40e_aqc_rx_ctl_reg_read_write *cmd_resp =
926 (struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
927 i40e_status status;
928
929 if (!reg_val)
930 return I40E_ERR_PARAM;
931
932 i40evf_fill_default_direct_cmd_desc(&desc,
933 i40e_aqc_opc_rx_ctl_reg_read);
934
935 cmd_resp->address = cpu_to_le32(reg_addr);
936
937 status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
938
939 if (status == 0)
940 *reg_val = le32_to_cpu(cmd_resp->value);
941
942 return status;
943}
944
945/**
946 * i40evf_read_rx_ctl - read from an Rx control register
947 * @hw: pointer to the hw struct
948 * @reg_addr: register address
949 **/
950u32 i40evf_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
951{
952 i40e_status status = 0;
953 bool use_register;
954 int retry = 5;
955 u32 val = 0;
956
957 use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
958 if (!use_register) {
959do_retry:
960 status = i40evf_aq_rx_ctl_read_register(hw, reg_addr,
961 &val, NULL);
962 if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
963 usleep_range(1000, 2000);
964 retry--;
965 goto do_retry;
966 }
967 }
968
969 /* if the AQ access failed, try the old-fashioned way */
970 if (status || use_register)
971 val = rd32(hw, reg_addr);
972
973 return val;
974}
975
976/**
977 * i40evf_aq_rx_ctl_write_register
978 * @hw: pointer to the hw struct
979 * @reg_addr: register address
980 * @reg_val: register value
981 * @cmd_details: pointer to command details structure or NULL
982 *
983 * Use the firmware to write to an Rx control register,
984 * especially useful if the Rx unit is under heavy pressure
985 **/
986i40e_status i40evf_aq_rx_ctl_write_register(struct i40e_hw *hw,
987 u32 reg_addr, u32 reg_val,
988 struct i40e_asq_cmd_details *cmd_details)
989{
990 struct i40e_aq_desc desc;
991 struct i40e_aqc_rx_ctl_reg_read_write *cmd =
992 (struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
993 i40e_status status;
994
995 i40evf_fill_default_direct_cmd_desc(&desc,
996 i40e_aqc_opc_rx_ctl_reg_write);
997
998 cmd->address = cpu_to_le32(reg_addr);
999 cmd->value = cpu_to_le32(reg_val);
1000
1001 status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1002
1003 return status;
1004}
1005
1006/**
1007 * i40evf_write_rx_ctl - write to an Rx control register
1008 * @hw: pointer to the hw struct
1009 * @reg_addr: register address
1010 * @reg_val: register value
1011 **/
1012void i40evf_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
1013{
1014 i40e_status status = 0;
1015 bool use_register;
1016 int retry = 5;
1017
1018 use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
1019 if (!use_register) {
1020do_retry:
1021 status = i40evf_aq_rx_ctl_write_register(hw, reg_addr,
1022 reg_val, NULL);
1023 if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
1024 usleep_range(1000, 2000);
1025 retry--;
1026 goto do_retry;
1027 }
1028 }
1029
1030 /* if the AQ access failed, try the old-fashioned way */
1031 if (status || use_register)
1032 wr32(hw, reg_addr, reg_val);
1033}
1034
1035/**
1036 * i40e_aq_send_msg_to_pf
1037 * @hw: pointer to the hardware structure
1038 * @v_opcode: opcodes for VF-PF communication
1039 * @v_retval: return error code
1040 * @msg: pointer to the msg buffer
1041 * @msglen: msg length
1042 * @cmd_details: pointer to command details
1043 *
1044 * Send message to PF driver using admin queue. By default, this message
1045 * is sent asynchronously, i.e. i40evf_asq_send_command() does not wait for
1046 * completion before returning.
1047 **/
1048i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
1049 enum i40e_virtchnl_ops v_opcode,
1050 i40e_status v_retval,
1051 u8 *msg, u16 msglen,
1052 struct i40e_asq_cmd_details *cmd_details)
1053{
1054 struct i40e_aq_desc desc;
1055 struct i40e_asq_cmd_details details;
1056 i40e_status status;
1057
1058 i40evf_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_pf);
1059 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1060 desc.cookie_high = cpu_to_le32(v_opcode);
1061 desc.cookie_low = cpu_to_le32(v_retval);
1062 if (msglen) {
1063 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF
1064 | I40E_AQ_FLAG_RD));
1065 if (msglen > I40E_AQ_LARGE_BUF)
1066 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1067 desc.datalen = cpu_to_le16(msglen);
1068 }
1069 if (!cmd_details) {
1070 memset(&details, 0, sizeof(details));
1071 details.async = true;
1072 cmd_details = &details;
1073 }
1074 status = i40evf_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1075 return status;
1076}
1077
1078/**
1079 * i40e_vf_parse_hw_config
1080 * @hw: pointer to the hardware structure
1081 * @msg: pointer to the virtual channel VF resource structure
1082 *
1083 * Given a VF resource message from the PF, populate the hw struct
1084 * with appropriate information.
1085 **/
1086void i40e_vf_parse_hw_config(struct i40e_hw *hw,
1087 struct i40e_virtchnl_vf_resource *msg)
1088{
1089 struct i40e_virtchnl_vsi_resource *vsi_res;
1090 int i;
1091
1092 vsi_res = &msg->vsi_res[0];
1093
1094 hw->dev_caps.num_vsis = msg->num_vsis;
1095 hw->dev_caps.num_rx_qp = msg->num_queue_pairs;
1096 hw->dev_caps.num_tx_qp = msg->num_queue_pairs;
1097 hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;
1098 hw->dev_caps.dcb = msg->vf_offload_flags &
1099 I40E_VIRTCHNL_VF_OFFLOAD_L2;
1100 hw->dev_caps.fcoe = (msg->vf_offload_flags &
1101 I40E_VIRTCHNL_VF_OFFLOAD_FCOE) ? 1 : 0;
1102 for (i = 0; i < msg->num_vsis; i++) {
1103 if (vsi_res->vsi_type == I40E_VSI_SRIOV) {
1104 ether_addr_copy(hw->mac.perm_addr,
1105 vsi_res->default_mac_addr);
1106 ether_addr_copy(hw->mac.addr,
1107 vsi_res->default_mac_addr);
1108 }
1109 vsi_res++;
1110 }
1111}
1112
1113/**
1114 * i40e_vf_reset
1115 * @hw: pointer to the hardware structure
1116 *
1117 * Send a VF_RESET message to the PF. Does not wait for response from PF
1118 * as none will be forthcoming. Immediately after calling this function,
1119 * the admin queue should be shut down and (optionally) reinitialized.
1120 **/
1121i40e_status i40e_vf_reset(struct i40e_hw *hw)
1122{
1123 return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,
1124 0, NULL, 0, NULL);
1125}