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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/property.h>
25#include <linux/regmap.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28
29/* Address pointer is 16 bit. */
30#define AT24_FLAG_ADDR16 BIT(7)
31/* sysfs-entry will be read-only. */
32#define AT24_FLAG_READONLY BIT(6)
33/* sysfs-entry will be world-readable. */
34#define AT24_FLAG_IRUGO BIT(5)
35/* Take always 8 addresses (24c00). */
36#define AT24_FLAG_TAKE8ADDR BIT(4)
37/* Factory-programmed serial number. */
38#define AT24_FLAG_SERIAL BIT(3)
39/* Factory-programmed mac address. */
40#define AT24_FLAG_MAC BIT(2)
41/* Does not auto-rollover reads to the next slave address. */
42#define AT24_FLAG_NO_RDROL BIT(1)
43
44/*
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
50 *
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
56 *
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
60 *
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
64 * a bootloader.
65 *
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
70 */
71
72struct at24_data {
73 /*
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
76 */
77 struct mutex lock;
78
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
82
83 u32 byte_len;
84 u16 page_size;
85 u8 flags;
86
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
90
91 /*
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
93 * them for us.
94 */
95 u8 bank_addr_shift;
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
97};
98
99/*
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
105 *
106 * This value is forced to be a power of two so that writes align on pages.
107 */
108static unsigned int at24_io_limit = 128;
109module_param_named(io_limit, at24_io_limit, uint, 0);
110MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
111
112/*
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
115 */
116static unsigned int at24_write_timeout = 25;
117module_param_named(write_timeout, at24_write_timeout, uint, 0);
118MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
119
120struct at24_chip_data {
121 u32 byte_len;
122 u8 flags;
123 u8 bank_addr_shift;
124 void (*read_post)(unsigned int off, char *buf, size_t count);
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
136 }
137
138#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
142 }
143
144static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
145{
146 int i;
147
148 if (capable(CAP_SYS_ADMIN))
149 return;
150
151 /*
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
156 */
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
160 buf[i] = 0;
161 }
162}
163
164/* needs 8 addresses as A0-A2 are ignored */
165AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166/* old variants can't be handled with this generic entry! */
167AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8,
178 AT24_FLAG_READONLY);
179AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8,
180 AT24_FLAG_READONLY);
181/* spd is a 24c02 in memory DIMMs */
182AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
183 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
184/* 24c02_vaio is a 24c02 on some Sony laptops */
185AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
186 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
187 at24_read_post_vaio);
188AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
189AT24_CHIP_DATA(at24_data_24cs04, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191/* 24rf08 quirk is handled at i2c-core */
192AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
193AT24_CHIP_DATA(at24_data_24cs08, 16,
194 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
195AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
196AT24_CHIP_DATA(at24_data_24cs16, 16,
197 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
198AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
199/* M24C32-D Additional Write lockable page (M24C32-D order codes) */
200AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
201AT24_CHIP_DATA(at24_data_24cs32, 16,
202 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
203AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
204/* M24C64-D Additional Write lockable page (M24C64-D order codes) */
205AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
206AT24_CHIP_DATA(at24_data_24cs64, 16,
207 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
208AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
209AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
210/* M24256E Additional Write lockable page (M24256E-F order codes) */
211AT24_CHIP_DATA(at24_data_24256e_wlp, 64, AT24_FLAG_ADDR16);
212AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
213AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
214AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
215AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
216/* identical to 24c08 ? */
217AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
218
219static const struct i2c_device_id at24_ids[] = {
220 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
221 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
222 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
223 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
224 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
225 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
226 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
227 { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 },
228 { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 },
229 { "spd", (kernel_ulong_t)&at24_data_spd },
230 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
231 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
232 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
233 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
234 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
235 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
236 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
237 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
238 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
239 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
240 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
241 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
242 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
243 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
244 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
245 { "24256e-wl", (kernel_ulong_t)&at24_data_24256e_wlp },
246 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
247 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
248 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
249 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
250 { "at24", 0 },
251 { /* END OF LIST */ }
252};
253MODULE_DEVICE_TABLE(i2c, at24_ids);
254
255static const struct of_device_id __maybe_unused at24_of_match[] = {
256 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
257 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
258 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
259 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
260 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
261 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
262 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
263 { .compatible = "atmel,spd", .data = &at24_data_spd },
264 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
265 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
266 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
267 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
268 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
269 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
270 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
271 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
272 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
273 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
274 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
275 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
276 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
277 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
278 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
279 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
280 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
281 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
282 { .compatible = "microchip,24aa025e48", .data = &at24_data_24aa025e48 },
283 { .compatible = "microchip,24aa025e64", .data = &at24_data_24aa025e64 },
284 { .compatible = "st,24256e-wl", .data = &at24_data_24256e_wlp },
285 { /* END OF LIST */ },
286};
287MODULE_DEVICE_TABLE(of, at24_of_match);
288
289static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
290 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
291 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
292 { /* END OF LIST */ }
293};
294MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
295
296/*
297 * This routine supports chips which consume multiple I2C addresses. It
298 * computes the addressing information to be used for a given r/w request.
299 * Assumes that sanity checks for offset happened at sysfs-layer.
300 *
301 * Slave address and byte offset derive from the offset. Always
302 * set the byte address; on a multi-master board, another master
303 * may have changed the chip's "current" address pointer.
304 */
305static struct regmap *at24_translate_offset(struct at24_data *at24,
306 unsigned int *offset)
307{
308 unsigned int i;
309
310 if (at24->flags & AT24_FLAG_ADDR16) {
311 i = *offset >> 16;
312 *offset &= 0xffff;
313 } else {
314 i = *offset >> 8;
315 *offset &= 0xff;
316 }
317
318 return at24->client_regmaps[i];
319}
320
321static struct device *at24_base_client_dev(struct at24_data *at24)
322{
323 return regmap_get_device(at24->client_regmaps[0]);
324}
325
326static size_t at24_adjust_read_count(struct at24_data *at24,
327 unsigned int offset, size_t count)
328{
329 unsigned int bits;
330 size_t remainder;
331
332 /*
333 * In case of multi-address chips that don't rollover reads to
334 * the next slave address: truncate the count to the slave boundary,
335 * so that the read never straddles slaves.
336 */
337 if (at24->flags & AT24_FLAG_NO_RDROL) {
338 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
339 remainder = BIT(bits) - offset;
340 if (count > remainder)
341 count = remainder;
342 }
343
344 if (count > at24_io_limit)
345 count = at24_io_limit;
346
347 return count;
348}
349
350static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
351 unsigned int offset, size_t count)
352{
353 unsigned long timeout, read_time;
354 struct regmap *regmap;
355 int ret;
356
357 regmap = at24_translate_offset(at24, &offset);
358 count = at24_adjust_read_count(at24, offset, count);
359
360 /* adjust offset for mac and serial read ops */
361 offset += at24->offset_adj;
362
363 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
364 do {
365 /*
366 * The timestamp shall be taken before the actual operation
367 * to avoid a premature timeout in case of high CPU load.
368 */
369 read_time = jiffies;
370
371 ret = regmap_bulk_read(regmap, offset, buf, count);
372 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
373 count, offset, ret, jiffies);
374 if (!ret)
375 return count;
376
377 usleep_range(1000, 1500);
378 } while (time_before(read_time, timeout));
379
380 return -ETIMEDOUT;
381}
382
383/*
384 * Note that if the hardware write-protect pin is pulled high, the whole
385 * chip is normally write protected. But there are plenty of product
386 * variants here, including OTP fuses and partial chip protect.
387 *
388 * We only use page mode writes; the alternative is sloooow. These routines
389 * write at most one page.
390 */
391
392static size_t at24_adjust_write_count(struct at24_data *at24,
393 unsigned int offset, size_t count)
394{
395 unsigned int next_page;
396
397 /* write_max is at most a page */
398 if (count > at24->write_max)
399 count = at24->write_max;
400
401 /* Never roll over backwards, to the start of this page */
402 next_page = roundup(offset + 1, at24->page_size);
403 if (offset + count > next_page)
404 count = next_page - offset;
405
406 return count;
407}
408
409static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
410 unsigned int offset, size_t count)
411{
412 unsigned long timeout, write_time;
413 struct regmap *regmap;
414 int ret;
415
416 regmap = at24_translate_offset(at24, &offset);
417 count = at24_adjust_write_count(at24, offset, count);
418 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
419
420 do {
421 /*
422 * The timestamp shall be taken before the actual operation
423 * to avoid a premature timeout in case of high CPU load.
424 */
425 write_time = jiffies;
426
427 ret = regmap_bulk_write(regmap, offset, buf, count);
428 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
429 count, offset, ret, jiffies);
430 if (!ret)
431 return count;
432
433 usleep_range(1000, 1500);
434 } while (time_before(write_time, timeout));
435
436 return -ETIMEDOUT;
437}
438
439static int at24_read(void *priv, unsigned int off, void *val, size_t count)
440{
441 struct at24_data *at24;
442 struct device *dev;
443 char *buf = val;
444 int i, ret;
445
446 at24 = priv;
447 dev = at24_base_client_dev(at24);
448
449 if (unlikely(!count))
450 return count;
451
452 if (off + count > at24->byte_len)
453 return -EINVAL;
454
455 ret = pm_runtime_resume_and_get(dev);
456 if (ret)
457 return ret;
458 /*
459 * Read data from chip, protecting against concurrent updates
460 * from this host, but not from other I2C masters.
461 */
462 mutex_lock(&at24->lock);
463
464 for (i = 0; count; i += ret, count -= ret) {
465 ret = at24_regmap_read(at24, buf + i, off + i, count);
466 if (ret < 0) {
467 mutex_unlock(&at24->lock);
468 pm_runtime_put(dev);
469 return ret;
470 }
471 }
472
473 mutex_unlock(&at24->lock);
474
475 pm_runtime_put(dev);
476
477 if (unlikely(at24->read_post))
478 at24->read_post(off, buf, i);
479
480 return 0;
481}
482
483static int at24_write(void *priv, unsigned int off, void *val, size_t count)
484{
485 struct at24_data *at24;
486 struct device *dev;
487 char *buf = val;
488 int ret;
489
490 at24 = priv;
491 dev = at24_base_client_dev(at24);
492
493 if (unlikely(!count))
494 return -EINVAL;
495
496 if (off + count > at24->byte_len)
497 return -EINVAL;
498
499 ret = pm_runtime_resume_and_get(dev);
500 if (ret)
501 return ret;
502 /*
503 * Write data to chip, protecting against concurrent updates
504 * from this host, but not from other I2C masters.
505 */
506 mutex_lock(&at24->lock);
507
508 while (count) {
509 ret = at24_regmap_write(at24, buf, off, count);
510 if (ret < 0) {
511 mutex_unlock(&at24->lock);
512 pm_runtime_put(dev);
513 return ret;
514 }
515 buf += ret;
516 off += ret;
517 count -= ret;
518 }
519
520 mutex_unlock(&at24->lock);
521
522 pm_runtime_put(dev);
523
524 return 0;
525}
526
527static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
528 struct i2c_client *base_client,
529 struct regmap_config *regmap_config)
530{
531 struct i2c_client *dummy_client;
532 struct regmap *regmap;
533
534 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
535 base_client->adapter,
536 base_client->addr +
537 (index << at24->bank_addr_shift));
538 if (IS_ERR(dummy_client))
539 return PTR_ERR(dummy_client);
540
541 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
542 if (IS_ERR(regmap))
543 return PTR_ERR(regmap);
544
545 at24->client_regmaps[index] = regmap;
546
547 return 0;
548}
549
550static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
551{
552 if (flags & AT24_FLAG_MAC) {
553 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
554 return 0xa0 - byte_len;
555 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
556 /*
557 * For 16 bit address pointers, the word address must contain
558 * a '10' sequence in bits 11 and 10 regardless of the
559 * intended position of the address pointer.
560 */
561 return 0x0800;
562 } else if (flags & AT24_FLAG_SERIAL) {
563 /*
564 * Otherwise the word address must begin with a '10' sequence,
565 * regardless of the intended address.
566 */
567 return 0x0080;
568 } else {
569 return 0;
570 }
571}
572
573static void at24_probe_temp_sensor(struct i2c_client *client)
574{
575 struct at24_data *at24 = i2c_get_clientdata(client);
576 struct i2c_board_info info = { .type = "jc42" };
577 int ret;
578 u8 val;
579
580 /*
581 * Byte 2 has value 11 for DDR3, earlier versions don't
582 * support the thermal sensor present flag
583 */
584 ret = at24_read(at24, 2, &val, 1);
585 if (ret || val != 11)
586 return;
587
588 /* Byte 32, bit 7 is set if temp sensor is present */
589 ret = at24_read(at24, 32, &val, 1);
590 if (ret || !(val & BIT(7)))
591 return;
592
593 info.addr = 0x18 | (client->addr & 7);
594
595 i2c_new_client_device(client->adapter, &info);
596}
597
598static int at24_probe(struct i2c_client *client)
599{
600 struct regmap_config regmap_config = { };
601 struct nvmem_config nvmem_config = { };
602 u32 byte_len, page_size, flags, addrw;
603 const struct at24_chip_data *cdata;
604 struct device *dev = &client->dev;
605 bool i2c_fn_i2c, i2c_fn_block;
606 unsigned int i, num_addresses;
607 struct at24_data *at24;
608 bool full_power;
609 struct regmap *regmap;
610 bool writable;
611 u8 test_byte;
612 int err;
613
614 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
615 i2c_fn_block = i2c_check_functionality(client->adapter,
616 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
617
618 cdata = i2c_get_match_data(client);
619 if (!cdata)
620 return -ENODEV;
621
622 err = device_property_read_u32(dev, "pagesize", &page_size);
623 if (err)
624 /*
625 * This is slow, but we can't know all eeproms, so we better
626 * play safe. Specifying custom eeprom-types via device tree
627 * or properties is recommended anyhow.
628 */
629 page_size = 1;
630
631 flags = cdata->flags;
632 if (device_property_present(dev, "read-only"))
633 flags |= AT24_FLAG_READONLY;
634 if (device_property_present(dev, "no-read-rollover"))
635 flags |= AT24_FLAG_NO_RDROL;
636
637 err = device_property_read_u32(dev, "address-width", &addrw);
638 if (!err) {
639 switch (addrw) {
640 case 8:
641 if (flags & AT24_FLAG_ADDR16)
642 dev_warn(dev,
643 "Override address width to be 8, while default is 16\n");
644 flags &= ~AT24_FLAG_ADDR16;
645 break;
646 case 16:
647 flags |= AT24_FLAG_ADDR16;
648 break;
649 default:
650 dev_warn(dev, "Bad \"address-width\" property: %u\n",
651 addrw);
652 }
653 }
654
655 err = device_property_read_u32(dev, "size", &byte_len);
656 if (err)
657 byte_len = cdata->byte_len;
658
659 if (!i2c_fn_i2c && !i2c_fn_block)
660 page_size = 1;
661
662 if (!page_size) {
663 dev_err(dev, "page_size must not be 0!\n");
664 return -EINVAL;
665 }
666
667 if (!is_power_of_2(page_size))
668 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
669
670 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
671 if (err) {
672 if (flags & AT24_FLAG_TAKE8ADDR)
673 num_addresses = 8;
674 else
675 num_addresses = DIV_ROUND_UP(byte_len,
676 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
677 }
678
679 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
680 dev_err(dev,
681 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
682 return -EINVAL;
683 }
684
685 regmap_config.val_bits = 8;
686 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
687 regmap_config.disable_locking = true;
688
689 regmap = devm_regmap_init_i2c(client, ®map_config);
690 if (IS_ERR(regmap))
691 return PTR_ERR(regmap);
692
693 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
694 GFP_KERNEL);
695 if (!at24)
696 return -ENOMEM;
697
698 mutex_init(&at24->lock);
699 at24->byte_len = byte_len;
700 at24->page_size = page_size;
701 at24->flags = flags;
702 at24->read_post = cdata->read_post;
703 at24->bank_addr_shift = cdata->bank_addr_shift;
704 at24->num_addresses = num_addresses;
705 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
706 at24->client_regmaps[0] = regmap;
707
708 at24->vcc_reg = devm_regulator_get(dev, "vcc");
709 if (IS_ERR(at24->vcc_reg))
710 return PTR_ERR(at24->vcc_reg);
711
712 writable = !(flags & AT24_FLAG_READONLY);
713 if (writable) {
714 at24->write_max = min_t(unsigned int,
715 page_size, at24_io_limit);
716 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
717 at24->write_max = I2C_SMBUS_BLOCK_MAX;
718 }
719
720 /* use dummy devices for multiple-address chips */
721 for (i = 1; i < num_addresses; i++) {
722 err = at24_make_dummy_client(at24, i, client, ®map_config);
723 if (err)
724 return err;
725 }
726
727 /*
728 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
729 * label property is set as some platform can have multiple eeproms
730 * with same label and we can not register each of those with same
731 * label. Failing to register those eeproms trigger cascade failure
732 * on such platform.
733 */
734 nvmem_config.id = NVMEM_DEVID_AUTO;
735
736 if (device_property_present(dev, "label")) {
737 err = device_property_read_string(dev, "label",
738 &nvmem_config.name);
739 if (err)
740 return err;
741 } else {
742 nvmem_config.name = dev_name(dev);
743 }
744
745 nvmem_config.type = NVMEM_TYPE_EEPROM;
746 nvmem_config.dev = dev;
747 nvmem_config.read_only = !writable;
748 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
749 nvmem_config.owner = THIS_MODULE;
750 nvmem_config.compat = true;
751 nvmem_config.base_dev = dev;
752 nvmem_config.reg_read = at24_read;
753 nvmem_config.reg_write = at24_write;
754 nvmem_config.priv = at24;
755 nvmem_config.stride = 1;
756 nvmem_config.word_size = 1;
757 nvmem_config.size = byte_len;
758
759 i2c_set_clientdata(client, at24);
760
761 full_power = acpi_dev_state_d0(&client->dev);
762 if (full_power) {
763 err = regulator_enable(at24->vcc_reg);
764 if (err) {
765 dev_err(dev, "Failed to enable vcc regulator\n");
766 return err;
767 }
768
769 pm_runtime_set_active(dev);
770 }
771 pm_runtime_enable(dev);
772
773 /*
774 * Perform a one-byte test read to verify that the chip is functional,
775 * unless powering on the device is to be avoided during probe (i.e.
776 * it's powered off right now).
777 */
778 if (full_power) {
779 err = at24_read(at24, 0, &test_byte, 1);
780 if (err) {
781 pm_runtime_disable(dev);
782 if (!pm_runtime_status_suspended(dev))
783 regulator_disable(at24->vcc_reg);
784 return -ENODEV;
785 }
786 }
787
788 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
789 if (IS_ERR(at24->nvmem)) {
790 pm_runtime_disable(dev);
791 if (!pm_runtime_status_suspended(dev))
792 regulator_disable(at24->vcc_reg);
793 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
794 "failed to register nvmem\n");
795 }
796
797 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
798 if (cdata == &at24_data_spd)
799 at24_probe_temp_sensor(client);
800
801 pm_runtime_idle(dev);
802
803 if (writable)
804 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
805 byte_len, client->name, at24->write_max);
806 else
807 dev_info(dev, "%u byte %s EEPROM, read-only\n",
808 byte_len, client->name);
809
810 return 0;
811}
812
813static void at24_remove(struct i2c_client *client)
814{
815 struct at24_data *at24 = i2c_get_clientdata(client);
816
817 pm_runtime_disable(&client->dev);
818 if (acpi_dev_state_d0(&client->dev)) {
819 if (!pm_runtime_status_suspended(&client->dev))
820 regulator_disable(at24->vcc_reg);
821 pm_runtime_set_suspended(&client->dev);
822 }
823}
824
825static int __maybe_unused at24_suspend(struct device *dev)
826{
827 struct i2c_client *client = to_i2c_client(dev);
828 struct at24_data *at24 = i2c_get_clientdata(client);
829
830 return regulator_disable(at24->vcc_reg);
831}
832
833static int __maybe_unused at24_resume(struct device *dev)
834{
835 struct i2c_client *client = to_i2c_client(dev);
836 struct at24_data *at24 = i2c_get_clientdata(client);
837
838 return regulator_enable(at24->vcc_reg);
839}
840
841static const struct dev_pm_ops at24_pm_ops = {
842 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
843 pm_runtime_force_resume)
844 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
845};
846
847static struct i2c_driver at24_driver = {
848 .driver = {
849 .name = "at24",
850 .pm = &at24_pm_ops,
851 .of_match_table = of_match_ptr(at24_of_match),
852 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
853 },
854 .probe = at24_probe,
855 .remove = at24_remove,
856 .id_table = at24_ids,
857 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
858};
859
860static int __init at24_init(void)
861{
862 if (!at24_io_limit) {
863 pr_err("at24: at24_io_limit must not be 0!\n");
864 return -EINVAL;
865 }
866
867 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
868 return i2c_add_driver(&at24_driver);
869}
870module_init(at24_init);
871
872static void __exit at24_exit(void)
873{
874 i2c_del_driver(&at24_driver);
875}
876module_exit(at24_exit);
877
878MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
879MODULE_AUTHOR("David Brownell and Wolfram Sang");
880MODULE_LICENSE("GPL");
1/*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/mutex.h>
18#include <linux/mod_devicetable.h>
19#include <linux/log2.h>
20#include <linux/bitops.h>
21#include <linux/jiffies.h>
22#include <linux/of.h>
23#include <linux/acpi.h>
24#include <linux/i2c.h>
25#include <linux/nvmem-provider.h>
26#include <linux/platform_data/at24.h>
27
28/*
29 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
30 * Differences between different vendor product lines (like Atmel AT24C or
31 * MicroChip 24LC, etc) won't much matter for typical read/write access.
32 * There are also I2C RAM chips, likewise interchangeable. One example
33 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
34 *
35 * However, misconfiguration can lose data. "Set 16-bit memory address"
36 * to a part with 8-bit addressing will overwrite data. Writing with too
37 * big a page size also loses data. And it's not safe to assume that the
38 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
39 * uses 0x51, for just one example.
40 *
41 * Accordingly, explicit board-specific configuration data should be used
42 * in almost all cases. (One partial exception is an SMBus used to access
43 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
44 *
45 * So this driver uses "new style" I2C driver binding, expecting to be
46 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
47 * similar kernel-resident tables; or, configuration data coming from
48 * a bootloader.
49 *
50 * Other than binding model, current differences from "eeprom" driver are
51 * that this one handles write access and isn't restricted to 24c02 devices.
52 * It also handles larger devices (32 kbit and up) with two-byte addresses,
53 * which won't work on pure SMBus systems.
54 */
55
56struct at24_data {
57 struct at24_platform_data chip;
58 int use_smbus;
59 int use_smbus_write;
60
61 ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t);
62 ssize_t (*write_func)(struct at24_data *,
63 const char *, unsigned int, size_t);
64
65 /*
66 * Lock protects against activities from other Linux tasks,
67 * but not from changes by other I2C masters.
68 */
69 struct mutex lock;
70
71 u8 *writebuf;
72 unsigned write_max;
73 unsigned num_addresses;
74
75 struct nvmem_config nvmem_config;
76 struct nvmem_device *nvmem;
77
78 /*
79 * Some chips tie up multiple I2C addresses; dummy devices reserve
80 * them for us, and we'll use them with SMBus calls.
81 */
82 struct i2c_client *client[];
83};
84
85/*
86 * This parameter is to help this driver avoid blocking other drivers out
87 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
88 * clock, one 256 byte read takes about 1/43 second which is excessive;
89 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
90 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
91 *
92 * This value is forced to be a power of two so that writes align on pages.
93 */
94static unsigned io_limit = 128;
95module_param(io_limit, uint, 0);
96MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
97
98/*
99 * Specs often allow 5 msec for a page write, sometimes 20 msec;
100 * it's important to recover from write timeouts.
101 */
102static unsigned write_timeout = 25;
103module_param(write_timeout, uint, 0);
104MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
105
106#define AT24_SIZE_BYTELEN 5
107#define AT24_SIZE_FLAGS 8
108
109#define AT24_BITMASK(x) (BIT(x) - 1)
110
111/* create non-zero magic value for given eeprom parameters */
112#define AT24_DEVICE_MAGIC(_len, _flags) \
113 ((1 << AT24_SIZE_FLAGS | (_flags)) \
114 << AT24_SIZE_BYTELEN | ilog2(_len))
115
116/*
117 * Both reads and writes fail if the previous write didn't complete yet. This
118 * macro loops a few times waiting at least long enough for one entire page
119 * write to work while making sure that at least one iteration is run before
120 * checking the break condition.
121 *
122 * It takes two parameters: a variable in which the future timeout in jiffies
123 * will be stored and a temporary variable holding the time of the last
124 * iteration of processing the request. Both should be unsigned integers
125 * holding at least 32 bits.
126 */
127#define loop_until_timeout(tout, op_time) \
128 for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \
129 op_time ? time_before(op_time, tout) : true; \
130 usleep_range(1000, 1500), op_time = jiffies)
131
132static const struct i2c_device_id at24_ids[] = {
133 /* needs 8 addresses as A0-A2 are ignored */
134 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
135 /* old variants can't be handled with this generic entry! */
136 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
137 { "24cs01", AT24_DEVICE_MAGIC(16,
138 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
139 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
140 { "24cs02", AT24_DEVICE_MAGIC(16,
141 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
142 { "24mac402", AT24_DEVICE_MAGIC(48 / 8,
143 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
144 { "24mac602", AT24_DEVICE_MAGIC(64 / 8,
145 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
146 /* spd is a 24c02 in memory DIMMs */
147 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
148 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
149 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
150 { "24cs04", AT24_DEVICE_MAGIC(16,
151 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
152 /* 24rf08 quirk is handled at i2c-core */
153 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
154 { "24cs08", AT24_DEVICE_MAGIC(16,
155 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
156 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
157 { "24cs16", AT24_DEVICE_MAGIC(16,
158 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
159 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
160 { "24cs32", AT24_DEVICE_MAGIC(16,
161 AT24_FLAG_ADDR16 |
162 AT24_FLAG_SERIAL |
163 AT24_FLAG_READONLY) },
164 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
165 { "24cs64", AT24_DEVICE_MAGIC(16,
166 AT24_FLAG_ADDR16 |
167 AT24_FLAG_SERIAL |
168 AT24_FLAG_READONLY) },
169 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
170 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
171 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
172 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
173 { "at24", 0 },
174 { /* END OF LIST */ }
175};
176MODULE_DEVICE_TABLE(i2c, at24_ids);
177
178static const struct acpi_device_id at24_acpi_ids[] = {
179 { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
180 { }
181};
182MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
183
184/*-------------------------------------------------------------------------*/
185
186/*
187 * This routine supports chips which consume multiple I2C addresses. It
188 * computes the addressing information to be used for a given r/w request.
189 * Assumes that sanity checks for offset happened at sysfs-layer.
190 *
191 * Slave address and byte offset derive from the offset. Always
192 * set the byte address; on a multi-master board, another master
193 * may have changed the chip's "current" address pointer.
194 *
195 * REVISIT some multi-address chips don't rollover page reads to
196 * the next slave address, so we may need to truncate the count.
197 * Those chips might need another quirk flag.
198 *
199 * If the real hardware used four adjacent 24c02 chips and that
200 * were misconfigured as one 24c08, that would be a similar effect:
201 * one "eeprom" file not four, but larger reads would fail when
202 * they crossed certain pages.
203 */
204static struct i2c_client *at24_translate_offset(struct at24_data *at24,
205 unsigned int *offset)
206{
207 unsigned i;
208
209 if (at24->chip.flags & AT24_FLAG_ADDR16) {
210 i = *offset >> 16;
211 *offset &= 0xffff;
212 } else {
213 i = *offset >> 8;
214 *offset &= 0xff;
215 }
216
217 return at24->client[i];
218}
219
220static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf,
221 unsigned int offset, size_t count)
222{
223 unsigned long timeout, read_time;
224 struct i2c_client *client;
225 int status;
226
227 client = at24_translate_offset(at24, &offset);
228
229 if (count > io_limit)
230 count = io_limit;
231
232 /* Smaller eeproms can work given some SMBus extension calls */
233 if (count > I2C_SMBUS_BLOCK_MAX)
234 count = I2C_SMBUS_BLOCK_MAX;
235
236 loop_until_timeout(timeout, read_time) {
237 status = i2c_smbus_read_i2c_block_data_or_emulated(client,
238 offset,
239 count, buf);
240
241 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
242 count, offset, status, jiffies);
243
244 if (status == count)
245 return count;
246 }
247
248 return -ETIMEDOUT;
249}
250
251static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf,
252 unsigned int offset, size_t count)
253{
254 unsigned long timeout, read_time;
255 struct i2c_client *client;
256 struct i2c_msg msg[2];
257 int status, i;
258 u8 msgbuf[2];
259
260 memset(msg, 0, sizeof(msg));
261 client = at24_translate_offset(at24, &offset);
262
263 if (count > io_limit)
264 count = io_limit;
265
266 /*
267 * When we have a better choice than SMBus calls, use a combined I2C
268 * message. Write address; then read up to io_limit data bytes. Note
269 * that read page rollover helps us here (unlike writes). msgbuf is
270 * u8 and will cast to our needs.
271 */
272 i = 0;
273 if (at24->chip.flags & AT24_FLAG_ADDR16)
274 msgbuf[i++] = offset >> 8;
275 msgbuf[i++] = offset;
276
277 msg[0].addr = client->addr;
278 msg[0].buf = msgbuf;
279 msg[0].len = i;
280
281 msg[1].addr = client->addr;
282 msg[1].flags = I2C_M_RD;
283 msg[1].buf = buf;
284 msg[1].len = count;
285
286 loop_until_timeout(timeout, read_time) {
287 status = i2c_transfer(client->adapter, msg, 2);
288 if (status == 2)
289 status = count;
290
291 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
292 count, offset, status, jiffies);
293
294 if (status == count)
295 return count;
296 }
297
298 return -ETIMEDOUT;
299}
300
301static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf,
302 unsigned int offset, size_t count)
303{
304 unsigned long timeout, read_time;
305 struct i2c_client *client;
306 struct i2c_msg msg[2];
307 u8 addrbuf[2];
308 int status;
309
310 client = at24_translate_offset(at24, &offset);
311
312 memset(msg, 0, sizeof(msg));
313 msg[0].addr = client->addr;
314 msg[0].buf = addrbuf;
315
316 /*
317 * The address pointer of the device is shared between the regular
318 * EEPROM array and the serial number block. The dummy write (part of
319 * the sequential read protocol) ensures the address pointer is reset
320 * to the desired position.
321 */
322 if (at24->chip.flags & AT24_FLAG_ADDR16) {
323 /*
324 * For 16 bit address pointers, the word address must contain
325 * a '10' sequence in bits 11 and 10 regardless of the
326 * intended position of the address pointer.
327 */
328 addrbuf[0] = 0x08;
329 addrbuf[1] = offset;
330 msg[0].len = 2;
331 } else {
332 /*
333 * Otherwise the word address must begin with a '10' sequence,
334 * regardless of the intended address.
335 */
336 addrbuf[0] = 0x80 + offset;
337 msg[0].len = 1;
338 }
339
340 msg[1].addr = client->addr;
341 msg[1].flags = I2C_M_RD;
342 msg[1].buf = buf;
343 msg[1].len = count;
344
345 loop_until_timeout(timeout, read_time) {
346 status = i2c_transfer(client->adapter, msg, 2);
347 if (status == 2)
348 return count;
349 }
350
351 return -ETIMEDOUT;
352}
353
354static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf,
355 unsigned int offset, size_t count)
356{
357 unsigned long timeout, read_time;
358 struct i2c_client *client;
359 struct i2c_msg msg[2];
360 u8 addrbuf[2];
361 int status;
362
363 client = at24_translate_offset(at24, &offset);
364
365 memset(msg, 0, sizeof(msg));
366 msg[0].addr = client->addr;
367 msg[0].buf = addrbuf;
368 addrbuf[0] = 0x90 + offset;
369 msg[0].len = 1;
370 msg[1].addr = client->addr;
371 msg[1].flags = I2C_M_RD;
372 msg[1].buf = buf;
373 msg[1].len = count;
374
375 loop_until_timeout(timeout, read_time) {
376 status = i2c_transfer(client->adapter, msg, 2);
377 if (status == 2)
378 return count;
379 }
380
381 return -ETIMEDOUT;
382}
383
384/*
385 * Note that if the hardware write-protect pin is pulled high, the whole
386 * chip is normally write protected. But there are plenty of product
387 * variants here, including OTP fuses and partial chip protect.
388 *
389 * We only use page mode writes; the alternative is sloooow. These routines
390 * write at most one page.
391 */
392
393static size_t at24_adjust_write_count(struct at24_data *at24,
394 unsigned int offset, size_t count)
395{
396 unsigned next_page;
397
398 /* write_max is at most a page */
399 if (count > at24->write_max)
400 count = at24->write_max;
401
402 /* Never roll over backwards, to the start of this page */
403 next_page = roundup(offset + 1, at24->chip.page_size);
404 if (offset + count > next_page)
405 count = next_page - offset;
406
407 return count;
408}
409
410static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24,
411 const char *buf,
412 unsigned int offset, size_t count)
413{
414 unsigned long timeout, write_time;
415 struct i2c_client *client;
416 ssize_t status = 0;
417
418 client = at24_translate_offset(at24, &offset);
419 count = at24_adjust_write_count(at24, offset, count);
420
421 loop_until_timeout(timeout, write_time) {
422 status = i2c_smbus_write_i2c_block_data(client,
423 offset, count, buf);
424 if (status == 0)
425 status = count;
426
427 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
428 count, offset, status, jiffies);
429
430 if (status == count)
431 return count;
432 }
433
434 return -ETIMEDOUT;
435}
436
437static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24,
438 const char *buf,
439 unsigned int offset, size_t count)
440{
441 unsigned long timeout, write_time;
442 struct i2c_client *client;
443 ssize_t status = 0;
444
445 client = at24_translate_offset(at24, &offset);
446
447 loop_until_timeout(timeout, write_time) {
448 status = i2c_smbus_write_byte_data(client, offset, buf[0]);
449 if (status == 0)
450 status = count;
451
452 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
453 count, offset, status, jiffies);
454
455 if (status == count)
456 return count;
457 }
458
459 return -ETIMEDOUT;
460}
461
462static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf,
463 unsigned int offset, size_t count)
464{
465 unsigned long timeout, write_time;
466 struct i2c_client *client;
467 struct i2c_msg msg;
468 ssize_t status = 0;
469 int i = 0;
470
471 client = at24_translate_offset(at24, &offset);
472 count = at24_adjust_write_count(at24, offset, count);
473
474 msg.addr = client->addr;
475 msg.flags = 0;
476
477 /* msg.buf is u8 and casts will mask the values */
478 msg.buf = at24->writebuf;
479 if (at24->chip.flags & AT24_FLAG_ADDR16)
480 msg.buf[i++] = offset >> 8;
481
482 msg.buf[i++] = offset;
483 memcpy(&msg.buf[i], buf, count);
484 msg.len = i + count;
485
486 loop_until_timeout(timeout, write_time) {
487 status = i2c_transfer(client->adapter, &msg, 1);
488 if (status == 1)
489 status = count;
490
491 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
492 count, offset, status, jiffies);
493
494 if (status == count)
495 return count;
496 }
497
498 return -ETIMEDOUT;
499}
500
501static int at24_read(void *priv, unsigned int off, void *val, size_t count)
502{
503 struct at24_data *at24 = priv;
504 char *buf = val;
505
506 if (unlikely(!count))
507 return count;
508
509 /*
510 * Read data from chip, protecting against concurrent updates
511 * from this host, but not from other I2C masters.
512 */
513 mutex_lock(&at24->lock);
514
515 while (count) {
516 int status;
517
518 status = at24->read_func(at24, buf, off, count);
519 if (status < 0) {
520 mutex_unlock(&at24->lock);
521 return status;
522 }
523 buf += status;
524 off += status;
525 count -= status;
526 }
527
528 mutex_unlock(&at24->lock);
529
530 return 0;
531}
532
533static int at24_write(void *priv, unsigned int off, void *val, size_t count)
534{
535 struct at24_data *at24 = priv;
536 char *buf = val;
537
538 if (unlikely(!count))
539 return -EINVAL;
540
541 /*
542 * Write data to chip, protecting against concurrent updates
543 * from this host, but not from other I2C masters.
544 */
545 mutex_lock(&at24->lock);
546
547 while (count) {
548 int status;
549
550 status = at24->write_func(at24, buf, off, count);
551 if (status < 0) {
552 mutex_unlock(&at24->lock);
553 return status;
554 }
555 buf += status;
556 off += status;
557 count -= status;
558 }
559
560 mutex_unlock(&at24->lock);
561
562 return 0;
563}
564
565#ifdef CONFIG_OF
566static void at24_get_ofdata(struct i2c_client *client,
567 struct at24_platform_data *chip)
568{
569 const __be32 *val;
570 struct device_node *node = client->dev.of_node;
571
572 if (node) {
573 if (of_get_property(node, "read-only", NULL))
574 chip->flags |= AT24_FLAG_READONLY;
575 val = of_get_property(node, "pagesize", NULL);
576 if (val)
577 chip->page_size = be32_to_cpup(val);
578 }
579}
580#else
581static void at24_get_ofdata(struct i2c_client *client,
582 struct at24_platform_data *chip)
583{ }
584#endif /* CONFIG_OF */
585
586static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
587{
588 struct at24_platform_data chip;
589 kernel_ulong_t magic = 0;
590 bool writable;
591 int use_smbus = 0;
592 int use_smbus_write = 0;
593 struct at24_data *at24;
594 int err;
595 unsigned i, num_addresses;
596 u8 test_byte;
597
598 if (client->dev.platform_data) {
599 chip = *(struct at24_platform_data *)client->dev.platform_data;
600 } else {
601 if (id) {
602 magic = id->driver_data;
603 } else {
604 const struct acpi_device_id *aid;
605
606 aid = acpi_match_device(at24_acpi_ids, &client->dev);
607 if (aid)
608 magic = aid->driver_data;
609 }
610 if (!magic)
611 return -ENODEV;
612
613 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
614 magic >>= AT24_SIZE_BYTELEN;
615 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
616 /*
617 * This is slow, but we can't know all eeproms, so we better
618 * play safe. Specifying custom eeprom-types via platform_data
619 * is recommended anyhow.
620 */
621 chip.page_size = 1;
622
623 /* update chipdata if OF is present */
624 at24_get_ofdata(client, &chip);
625
626 chip.setup = NULL;
627 chip.context = NULL;
628 }
629
630 if (!is_power_of_2(chip.byte_len))
631 dev_warn(&client->dev,
632 "byte_len looks suspicious (no power of 2)!\n");
633 if (!chip.page_size) {
634 dev_err(&client->dev, "page_size must not be 0!\n");
635 return -EINVAL;
636 }
637 if (!is_power_of_2(chip.page_size))
638 dev_warn(&client->dev,
639 "page_size looks suspicious (no power of 2)!\n");
640
641 /* Use I2C operations unless we're stuck with SMBus extensions. */
642 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
643 if (chip.flags & AT24_FLAG_ADDR16)
644 return -EPFNOSUPPORT;
645
646 if (i2c_check_functionality(client->adapter,
647 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
648 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
649 } else if (i2c_check_functionality(client->adapter,
650 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
651 use_smbus = I2C_SMBUS_WORD_DATA;
652 } else if (i2c_check_functionality(client->adapter,
653 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
654 use_smbus = I2C_SMBUS_BYTE_DATA;
655 } else {
656 return -EPFNOSUPPORT;
657 }
658
659 if (i2c_check_functionality(client->adapter,
660 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
661 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
662 } else if (i2c_check_functionality(client->adapter,
663 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
664 use_smbus_write = I2C_SMBUS_BYTE_DATA;
665 chip.page_size = 1;
666 }
667 }
668
669 if (chip.flags & AT24_FLAG_TAKE8ADDR)
670 num_addresses = 8;
671 else
672 num_addresses = DIV_ROUND_UP(chip.byte_len,
673 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
674
675 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
676 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
677 if (!at24)
678 return -ENOMEM;
679
680 mutex_init(&at24->lock);
681 at24->use_smbus = use_smbus;
682 at24->use_smbus_write = use_smbus_write;
683 at24->chip = chip;
684 at24->num_addresses = num_addresses;
685
686 if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) {
687 dev_err(&client->dev,
688 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
689 return -EINVAL;
690 }
691
692 if (chip.flags & AT24_FLAG_SERIAL) {
693 at24->read_func = at24_eeprom_read_serial;
694 } else if (chip.flags & AT24_FLAG_MAC) {
695 at24->read_func = at24_eeprom_read_mac;
696 } else {
697 at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus
698 : at24_eeprom_read_i2c;
699 }
700
701 if (at24->use_smbus) {
702 if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA)
703 at24->write_func = at24_eeprom_write_smbus_block;
704 else
705 at24->write_func = at24_eeprom_write_smbus_byte;
706 } else {
707 at24->write_func = at24_eeprom_write_i2c;
708 }
709
710 writable = !(chip.flags & AT24_FLAG_READONLY);
711 if (writable) {
712 if (!use_smbus || use_smbus_write) {
713
714 unsigned write_max = chip.page_size;
715
716 if (write_max > io_limit)
717 write_max = io_limit;
718 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
719 write_max = I2C_SMBUS_BLOCK_MAX;
720 at24->write_max = write_max;
721
722 /* buffer (data + address at the beginning) */
723 at24->writebuf = devm_kzalloc(&client->dev,
724 write_max + 2, GFP_KERNEL);
725 if (!at24->writebuf)
726 return -ENOMEM;
727 } else {
728 dev_warn(&client->dev,
729 "cannot write due to controller restrictions.");
730 }
731 }
732
733 at24->client[0] = client;
734
735 /* use dummy devices for multiple-address chips */
736 for (i = 1; i < num_addresses; i++) {
737 at24->client[i] = i2c_new_dummy(client->adapter,
738 client->addr + i);
739 if (!at24->client[i]) {
740 dev_err(&client->dev, "address 0x%02x unavailable\n",
741 client->addr + i);
742 err = -EADDRINUSE;
743 goto err_clients;
744 }
745 }
746
747 i2c_set_clientdata(client, at24);
748
749 /*
750 * Perform a one-byte test read to verify that the
751 * chip is functional.
752 */
753 err = at24_read(at24, 0, &test_byte, 1);
754 if (err) {
755 err = -ENODEV;
756 goto err_clients;
757 }
758
759 at24->nvmem_config.name = dev_name(&client->dev);
760 at24->nvmem_config.dev = &client->dev;
761 at24->nvmem_config.read_only = !writable;
762 at24->nvmem_config.root_only = true;
763 at24->nvmem_config.owner = THIS_MODULE;
764 at24->nvmem_config.compat = true;
765 at24->nvmem_config.base_dev = &client->dev;
766 at24->nvmem_config.reg_read = at24_read;
767 at24->nvmem_config.reg_write = at24_write;
768 at24->nvmem_config.priv = at24;
769 at24->nvmem_config.stride = 4;
770 at24->nvmem_config.word_size = 1;
771 at24->nvmem_config.size = chip.byte_len;
772
773 at24->nvmem = nvmem_register(&at24->nvmem_config);
774
775 if (IS_ERR(at24->nvmem)) {
776 err = PTR_ERR(at24->nvmem);
777 goto err_clients;
778 }
779
780 dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
781 chip.byte_len, client->name,
782 writable ? "writable" : "read-only", at24->write_max);
783 if (use_smbus == I2C_SMBUS_WORD_DATA ||
784 use_smbus == I2C_SMBUS_BYTE_DATA) {
785 dev_notice(&client->dev, "Falling back to %s reads, "
786 "performance will suffer\n", use_smbus ==
787 I2C_SMBUS_WORD_DATA ? "word" : "byte");
788 }
789
790 /* export data to kernel code */
791 if (chip.setup)
792 chip.setup(at24->nvmem, chip.context);
793
794 return 0;
795
796err_clients:
797 for (i = 1; i < num_addresses; i++)
798 if (at24->client[i])
799 i2c_unregister_device(at24->client[i]);
800
801 return err;
802}
803
804static int at24_remove(struct i2c_client *client)
805{
806 struct at24_data *at24;
807 int i;
808
809 at24 = i2c_get_clientdata(client);
810
811 nvmem_unregister(at24->nvmem);
812
813 for (i = 1; i < at24->num_addresses; i++)
814 i2c_unregister_device(at24->client[i]);
815
816 return 0;
817}
818
819/*-------------------------------------------------------------------------*/
820
821static struct i2c_driver at24_driver = {
822 .driver = {
823 .name = "at24",
824 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
825 },
826 .probe = at24_probe,
827 .remove = at24_remove,
828 .id_table = at24_ids,
829};
830
831static int __init at24_init(void)
832{
833 if (!io_limit) {
834 pr_err("at24: io_limit must not be 0!\n");
835 return -EINVAL;
836 }
837
838 io_limit = rounddown_pow_of_two(io_limit);
839 return i2c_add_driver(&at24_driver);
840}
841module_init(at24_init);
842
843static void __exit at24_exit(void)
844{
845 i2c_del_driver(&at24_driver);
846}
847module_exit(at24_exit);
848
849MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
850MODULE_AUTHOR("David Brownell and Wolfram Sang");
851MODULE_LICENSE("GPL");