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1// SPDX-License-Identifier: GPL-2.0-only
2/**************************************************************************
3 * Copyright (c) 2007-2011, Intel Corporation.
4 * All Rights Reserved.
5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
6 * All Rights Reserved.
7 *
8 **************************************************************************/
9
10#include <linux/aperture.h>
11#include <linux/cpu.h>
12#include <linux/module.h>
13#include <linux/notifier.h>
14#include <linux/pm_runtime.h>
15#include <linux/spinlock.h>
16#include <linux/delay.h>
17
18#include <asm/set_memory.h>
19
20#include <acpi/video.h>
21
22#include <drm/drm.h>
23#include <drm/drm_client_setup.h>
24#include <drm/drm_drv.h>
25#include <drm/drm_file.h>
26#include <drm/drm_ioctl.h>
27#include <drm/drm_pciids.h>
28#include <drm/drm_vblank.h>
29
30#include "framebuffer.h"
31#include "gem.h"
32#include "intel_bios.h"
33#include "mid_bios.h"
34#include "power.h"
35#include "psb_drv.h"
36#include "psb_intel_reg.h"
37#include "psb_irq.h"
38#include "psb_reg.h"
39
40static const struct drm_driver driver;
41static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
42
43/*
44 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
45 * to the different groups of PowerVR 5-series chip designs
46 *
47 * 0x8086 = Intel Corporation
48 *
49 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
50 * PowerVR SGX535 - Moorestown - Intel GMA 600
51 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
52 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
53 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
54 * N2800
55 */
56static const struct pci_device_id pciidlist[] = {
57 /* Poulsbo */
58 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
59 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
60 /* Oak Trail */
61 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
69 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
70 /* Cedar Trail */
71 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
72 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
73 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
74 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
75 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
76 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
77 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
78 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
79 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
80 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
87 { 0, }
88};
89MODULE_DEVICE_TABLE(pci, pciidlist);
90
91/*
92 * Standard IOCTLs.
93 */
94static const struct drm_ioctl_desc psb_ioctls[] = {
95};
96
97/**
98 * psb_spank - reset the 2D engine
99 * @dev_priv: our PSB DRM device
100 *
101 * Soft reset the graphics engine and then reload the necessary registers.
102 */
103static void psb_spank(struct drm_psb_private *dev_priv)
104{
105 PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
106 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
107 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
108 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
109 PSB_RSGX32(PSB_CR_SOFT_RESET);
110
111 msleep(1);
112
113 PSB_WSGX32(0, PSB_CR_SOFT_RESET);
114 wmb();
115 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
116 PSB_CR_BIF_CTRL);
117 wmb();
118 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
119
120 msleep(1);
121 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
122 PSB_CR_BIF_CTRL);
123 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
124 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
125}
126
127static int psb_do_init(struct drm_device *dev)
128{
129 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
130 struct psb_gtt *pg = &dev_priv->gtt;
131
132 uint32_t stolen_gtt;
133
134 if (pg->mmu_gatt_start & 0x0FFFFFFF) {
135 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
136 return -EINVAL;
137 }
138
139 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
140 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
141 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
142
143 dev_priv->gatt_free_offset = pg->mmu_gatt_start +
144 (stolen_gtt << PAGE_SHIFT) * 1024;
145
146 spin_lock_init(&dev_priv->irqmask_lock);
147
148 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
149 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
150 PSB_RSGX32(PSB_CR_BIF_BANK1);
151
152 /* Do not bypass any MMU access, let them pagefault instead */
153 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
154 PSB_CR_BIF_CTRL);
155 PSB_RSGX32(PSB_CR_BIF_CTRL);
156
157 psb_spank(dev_priv);
158
159 /* mmu_gatt ?? */
160 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
161 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
162
163 return 0;
164}
165
166static void psb_driver_unload(struct drm_device *dev)
167{
168 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
169
170 /* TODO: Kill vblank etc here */
171
172 gma_backlight_exit(dev);
173 psb_modeset_cleanup(dev);
174
175 gma_irq_uninstall(dev);
176
177 if (dev_priv->ops->chip_teardown)
178 dev_priv->ops->chip_teardown(dev);
179
180 psb_intel_opregion_fini(dev);
181
182 if (dev_priv->pf_pd) {
183 psb_mmu_free_pagedir(dev_priv->pf_pd);
184 dev_priv->pf_pd = NULL;
185 }
186 if (dev_priv->mmu) {
187 struct psb_gtt *pg = &dev_priv->gtt;
188
189 psb_mmu_remove_pfn_sequence(
190 psb_mmu_get_default_pd
191 (dev_priv->mmu),
192 pg->mmu_gatt_start,
193 dev_priv->vram_stolen_size >> PAGE_SHIFT);
194 psb_mmu_driver_takedown(dev_priv->mmu);
195 dev_priv->mmu = NULL;
196 }
197 psb_gem_mm_fini(dev);
198 psb_gtt_fini(dev);
199 if (dev_priv->scratch_page) {
200 set_pages_wb(dev_priv->scratch_page, 1);
201 __free_page(dev_priv->scratch_page);
202 dev_priv->scratch_page = NULL;
203 }
204 if (dev_priv->vdc_reg) {
205 iounmap(dev_priv->vdc_reg);
206 dev_priv->vdc_reg = NULL;
207 }
208 if (dev_priv->sgx_reg) {
209 iounmap(dev_priv->sgx_reg);
210 dev_priv->sgx_reg = NULL;
211 }
212 if (dev_priv->aux_reg) {
213 iounmap(dev_priv->aux_reg);
214 dev_priv->aux_reg = NULL;
215 }
216 pci_dev_put(dev_priv->aux_pdev);
217 pci_dev_put(dev_priv->lpc_pdev);
218
219 /* Destroy VBT data */
220 psb_intel_destroy_bios(dev);
221
222 gma_power_uninit(dev);
223}
224
225static void psb_device_release(void *data)
226{
227 struct drm_device *dev = data;
228
229 psb_driver_unload(dev);
230}
231
232static int psb_driver_load(struct drm_device *dev, unsigned long flags)
233{
234 struct pci_dev *pdev = to_pci_dev(dev->dev);
235 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
236 unsigned long resource_start, resource_len;
237 unsigned long irqflags;
238 struct drm_connector_list_iter conn_iter;
239 struct drm_connector *connector;
240 struct gma_encoder *gma_encoder;
241 struct psb_gtt *pg;
242 int ret = -ENOMEM;
243
244 /* initializing driver private data */
245
246 dev_priv->ops = (struct psb_ops *)flags;
247
248 pg = &dev_priv->gtt;
249
250 pci_set_master(pdev);
251
252 dev_priv->num_pipe = dev_priv->ops->pipes;
253
254 resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
255
256 dev_priv->vdc_reg =
257 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
258 if (!dev_priv->vdc_reg)
259 goto out_err;
260
261 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
262 PSB_SGX_SIZE);
263 if (!dev_priv->sgx_reg)
264 goto out_err;
265
266 if (IS_MRST(dev)) {
267 int domain = pci_domain_nr(pdev->bus);
268
269 dev_priv->aux_pdev =
270 pci_get_domain_bus_and_slot(domain, 0,
271 PCI_DEVFN(3, 0));
272
273 if (dev_priv->aux_pdev) {
274 resource_start = pci_resource_start(dev_priv->aux_pdev,
275 PSB_AUX_RESOURCE);
276 resource_len = pci_resource_len(dev_priv->aux_pdev,
277 PSB_AUX_RESOURCE);
278 dev_priv->aux_reg = ioremap(resource_start,
279 resource_len);
280 if (!dev_priv->aux_reg)
281 goto out_err;
282
283 DRM_DEBUG_KMS("Found aux vdc");
284 } else {
285 /* Couldn't find the aux vdc so map to primary vdc */
286 dev_priv->aux_reg = dev_priv->vdc_reg;
287 DRM_DEBUG_KMS("Couldn't find aux pci device");
288 }
289 dev_priv->gmbus_reg = dev_priv->aux_reg;
290
291 dev_priv->lpc_pdev =
292 pci_get_domain_bus_and_slot(domain, 0,
293 PCI_DEVFN(31, 0));
294 if (dev_priv->lpc_pdev) {
295 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
296 &dev_priv->lpc_gpio_base);
297 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
298 (u32)dev_priv->lpc_gpio_base | (1L<<31));
299 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
300 &dev_priv->lpc_gpio_base);
301 dev_priv->lpc_gpio_base &= 0xffc0;
302 if (dev_priv->lpc_gpio_base)
303 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
304 dev_priv->lpc_gpio_base);
305 else {
306 pci_dev_put(dev_priv->lpc_pdev);
307 dev_priv->lpc_pdev = NULL;
308 }
309 }
310 } else {
311 dev_priv->gmbus_reg = dev_priv->vdc_reg;
312 }
313
314 psb_intel_opregion_setup(dev);
315
316 ret = dev_priv->ops->chip_setup(dev);
317 if (ret)
318 goto out_err;
319
320 /* Init OSPM support */
321 gma_power_init(dev);
322
323 ret = -ENOMEM;
324
325 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
326 if (!dev_priv->scratch_page)
327 goto out_err;
328
329 set_pages_uc(dev_priv->scratch_page, 1);
330
331 ret = psb_gtt_init(dev);
332 if (ret)
333 goto out_err;
334 ret = psb_gem_mm_init(dev);
335 if (ret)
336 goto out_err;
337
338 ret = -ENOMEM;
339
340 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
341 if (!dev_priv->mmu)
342 goto out_err;
343
344 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
345 if (!dev_priv->pf_pd)
346 goto out_err;
347
348 ret = psb_do_init(dev);
349 if (ret)
350 return ret;
351
352 /* Add stolen memory to SGX MMU */
353 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
354 dev_priv->stolen_base >> PAGE_SHIFT,
355 pg->gatt_start,
356 pg->stolen_size >> PAGE_SHIFT, 0);
357
358 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
359 psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
360
361 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
362 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
363
364 acpi_video_register();
365
366 /* Setup vertical blanking handling */
367 ret = drm_vblank_init(dev, dev_priv->num_pipe);
368 if (ret)
369 goto out_err;
370
371 /*
372 * Install interrupt handlers prior to powering off SGX or else we will
373 * crash.
374 */
375 dev_priv->vdc_irq_mask = 0;
376 dev_priv->pipestat[0] = 0;
377 dev_priv->pipestat[1] = 0;
378 dev_priv->pipestat[2] = 0;
379 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
380 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
381 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
382 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
383 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
384
385 gma_irq_install(dev);
386
387 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
388
389 psb_modeset_init(dev);
390 drm_kms_helper_poll_init(dev);
391
392 /* Only add backlight support if we have LVDS or MIPI output */
393 drm_connector_list_iter_begin(dev, &conn_iter);
394 drm_for_each_connector_iter(connector, &conn_iter) {
395 gma_encoder = gma_attached_encoder(connector);
396
397 if (gma_encoder->type == INTEL_OUTPUT_LVDS ||
398 gma_encoder->type == INTEL_OUTPUT_MIPI) {
399 ret = gma_backlight_init(dev);
400 if (ret == 0)
401 acpi_video_register_backlight();
402 break;
403 }
404 }
405 drm_connector_list_iter_end(&conn_iter);
406
407 if (ret)
408 return ret;
409 psb_intel_opregion_enable_asle(dev);
410
411 return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
412
413out_err:
414 psb_driver_unload(dev);
415 return ret;
416}
417
418/*
419 * Hardware for gma500 is a hybrid device, which both acts as a PCI
420 * device (for legacy vga functionality) but also more like an
421 * integrated display on a SoC where the framebuffer simply
422 * resides in main memory and not in a special PCI bar (that
423 * internally redirects to a stolen range of main memory) like all
424 * other integrated PCI display devices implement it.
425 *
426 * To catch all cases we need to remove conflicting firmware devices
427 * for the stolen system memory and for the VGA functionality. As we
428 * currently cannot easily find the framebuffer's location in stolen
429 * memory, we remove all framebuffers here.
430 *
431 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then
432 * we might be able to read the framebuffer range from the
433 * device.
434 */
435static int gma_remove_conflicting_framebuffers(struct pci_dev *pdev,
436 const struct drm_driver *req_driver)
437{
438 resource_size_t base = 0;
439 resource_size_t size = U32_MAX; /* 4 GiB HW limit */
440 const char *name = req_driver->name;
441 int ret;
442
443 ret = aperture_remove_conflicting_devices(base, size, name);
444 if (ret)
445 return ret;
446
447 return __aperture_remove_legacy_vga_devices(pdev);
448}
449
450static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
451{
452 struct drm_psb_private *dev_priv;
453 struct drm_device *dev;
454 int ret;
455
456 ret = gma_remove_conflicting_framebuffers(pdev, &driver);
457 if (ret)
458 return ret;
459
460 ret = pcim_enable_device(pdev);
461 if (ret)
462 return ret;
463
464 dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
465 if (IS_ERR(dev_priv))
466 return PTR_ERR(dev_priv);
467 dev = &dev_priv->dev;
468
469 pci_set_drvdata(pdev, dev);
470
471 ret = psb_driver_load(dev, ent->driver_data);
472 if (ret)
473 return ret;
474
475 ret = drm_dev_register(dev, ent->driver_data);
476 if (ret)
477 return ret;
478
479 drm_client_setup(dev, NULL);
480
481 return 0;
482}
483
484static void psb_pci_remove(struct pci_dev *pdev)
485{
486 struct drm_device *dev = pci_get_drvdata(pdev);
487
488 drm_dev_unregister(dev);
489}
490
491static DEFINE_RUNTIME_DEV_PM_OPS(psb_pm_ops, gma_power_suspend, gma_power_resume, NULL);
492
493static const struct file_operations psb_gem_fops = {
494 .owner = THIS_MODULE,
495 .open = drm_open,
496 .release = drm_release,
497 .unlocked_ioctl = drm_ioctl,
498 .compat_ioctl = drm_compat_ioctl,
499 .mmap = drm_gem_mmap,
500 .poll = drm_poll,
501 .read = drm_read,
502 .fop_flags = FOP_UNSIGNED_OFFSET,
503};
504
505static const struct drm_driver driver = {
506 .driver_features = DRIVER_MODESET | DRIVER_GEM,
507
508 .num_ioctls = ARRAY_SIZE(psb_ioctls),
509
510 .dumb_create = psb_gem_dumb_create,
511 PSB_FBDEV_DRIVER_OPS,
512 .ioctls = psb_ioctls,
513 .fops = &psb_gem_fops,
514 .name = DRIVER_NAME,
515 .desc = DRIVER_DESC,
516 .date = DRIVER_DATE,
517 .major = DRIVER_MAJOR,
518 .minor = DRIVER_MINOR,
519 .patchlevel = DRIVER_PATCHLEVEL
520};
521
522static struct pci_driver psb_pci_driver = {
523 .name = DRIVER_NAME,
524 .id_table = pciidlist,
525 .probe = psb_pci_probe,
526 .remove = psb_pci_remove,
527 .driver.pm = &psb_pm_ops,
528};
529
530static int __init psb_init(void)
531{
532 if (drm_firmware_drivers_only())
533 return -ENODEV;
534
535 return pci_register_driver(&psb_pci_driver);
536}
537
538static void __exit psb_exit(void)
539{
540 pci_unregister_driver(&psb_pci_driver);
541}
542
543late_initcall(psb_init);
544module_exit(psb_exit);
545
546MODULE_AUTHOR(DRIVER_AUTHOR);
547MODULE_DESCRIPTION(DRIVER_DESC);
548MODULE_LICENSE("GPL");
1/**************************************************************************
2 * Copyright (c) 2007-2011, Intel Corporation.
3 * All Rights Reserved.
4 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
5 * All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 **************************************************************************/
21
22#include <drm/drmP.h>
23#include <drm/drm.h>
24#include "psb_drv.h"
25#include "framebuffer.h"
26#include "psb_reg.h"
27#include "psb_intel_reg.h"
28#include "intel_bios.h"
29#include "mid_bios.h"
30#include <drm/drm_pciids.h>
31#include "power.h"
32#include <linux/cpu.h>
33#include <linux/notifier.h>
34#include <linux/spinlock.h>
35#include <linux/pm_runtime.h>
36#include <acpi/video.h>
37#include <linux/module.h>
38
39static struct drm_driver driver;
40static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
41
42/*
43 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
44 * to the different groups of PowerVR 5-series chip designs
45 *
46 * 0x8086 = Intel Corporation
47 *
48 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
49 * PowerVR SGX535 - Moorestown - Intel GMA 600
50 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
51 * PowerVR SGX540 - Medfield - Intel Atom Z2460
52 * PowerVR SGX544MP2 - Medfield -
53 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
54 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
55 * N2800
56 */
57static const struct pci_device_id pciidlist[] = {
58 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
59 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
60#if defined(CONFIG_DRM_GMA600)
61 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
69 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
70#endif
71#if defined(CONFIG_DRM_MEDFIELD)
72 { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
73 { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
74 { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
75 { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
76 { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
77 { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
78 { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
79 { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
80#endif
81#if defined(CONFIG_DRM_GMA3600)
82 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
87 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
88 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
89 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
90 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
91 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
92 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
93 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
94 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
95 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
96 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
97 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
98#endif
99 { 0, }
100};
101MODULE_DEVICE_TABLE(pci, pciidlist);
102
103/*
104 * Standard IOCTLs.
105 */
106static const struct drm_ioctl_desc psb_ioctls[] = {
107};
108
109static void psb_driver_lastclose(struct drm_device *dev)
110{
111 int ret;
112 struct drm_psb_private *dev_priv = dev->dev_private;
113 struct psb_fbdev *fbdev = dev_priv->fbdev;
114
115 ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper);
116 if (ret)
117 DRM_DEBUG("failed to restore crtc mode\n");
118
119 return;
120}
121
122static int psb_do_init(struct drm_device *dev)
123{
124 struct drm_psb_private *dev_priv = dev->dev_private;
125 struct psb_gtt *pg = &dev_priv->gtt;
126
127 uint32_t stolen_gtt;
128
129 if (pg->mmu_gatt_start & 0x0FFFFFFF) {
130 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
131 return -EINVAL;
132 }
133
134 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
135 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
136 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
137
138 dev_priv->gatt_free_offset = pg->mmu_gatt_start +
139 (stolen_gtt << PAGE_SHIFT) * 1024;
140
141 spin_lock_init(&dev_priv->irqmask_lock);
142 spin_lock_init(&dev_priv->lock_2d);
143
144 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
145 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
146 PSB_RSGX32(PSB_CR_BIF_BANK1);
147
148 /* Do not bypass any MMU access, let them pagefault instead */
149 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
150 PSB_CR_BIF_CTRL);
151 PSB_RSGX32(PSB_CR_BIF_CTRL);
152
153 psb_spank(dev_priv);
154
155 /* mmu_gatt ?? */
156 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
157 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
158
159 return 0;
160}
161
162static int psb_driver_unload(struct drm_device *dev)
163{
164 struct drm_psb_private *dev_priv = dev->dev_private;
165
166 /* TODO: Kill vblank etc here */
167
168 if (dev_priv) {
169 if (dev_priv->backlight_device)
170 gma_backlight_exit(dev);
171 psb_modeset_cleanup(dev);
172
173 if (dev_priv->ops->chip_teardown)
174 dev_priv->ops->chip_teardown(dev);
175
176 psb_intel_opregion_fini(dev);
177
178 if (dev_priv->pf_pd) {
179 psb_mmu_free_pagedir(dev_priv->pf_pd);
180 dev_priv->pf_pd = NULL;
181 }
182 if (dev_priv->mmu) {
183 struct psb_gtt *pg = &dev_priv->gtt;
184
185 down_read(&pg->sem);
186 psb_mmu_remove_pfn_sequence(
187 psb_mmu_get_default_pd
188 (dev_priv->mmu),
189 pg->mmu_gatt_start,
190 dev_priv->vram_stolen_size >> PAGE_SHIFT);
191 up_read(&pg->sem);
192 psb_mmu_driver_takedown(dev_priv->mmu);
193 dev_priv->mmu = NULL;
194 }
195 psb_gtt_takedown(dev);
196 if (dev_priv->scratch_page) {
197 set_pages_wb(dev_priv->scratch_page, 1);
198 __free_page(dev_priv->scratch_page);
199 dev_priv->scratch_page = NULL;
200 }
201 if (dev_priv->vdc_reg) {
202 iounmap(dev_priv->vdc_reg);
203 dev_priv->vdc_reg = NULL;
204 }
205 if (dev_priv->sgx_reg) {
206 iounmap(dev_priv->sgx_reg);
207 dev_priv->sgx_reg = NULL;
208 }
209 if (dev_priv->aux_reg) {
210 iounmap(dev_priv->aux_reg);
211 dev_priv->aux_reg = NULL;
212 }
213 pci_dev_put(dev_priv->aux_pdev);
214 pci_dev_put(dev_priv->lpc_pdev);
215
216 /* Destroy VBT data */
217 psb_intel_destroy_bios(dev);
218
219 kfree(dev_priv);
220 dev->dev_private = NULL;
221 }
222 gma_power_uninit(dev);
223 return 0;
224}
225
226static int psb_driver_load(struct drm_device *dev, unsigned long flags)
227{
228 struct drm_psb_private *dev_priv;
229 unsigned long resource_start, resource_len;
230 unsigned long irqflags;
231 int ret = -ENOMEM;
232 struct drm_connector *connector;
233 struct gma_encoder *gma_encoder;
234 struct psb_gtt *pg;
235
236 /* allocating and initializing driver private data */
237 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
238 if (dev_priv == NULL)
239 return -ENOMEM;
240
241 dev_priv->ops = (struct psb_ops *)flags;
242 dev_priv->dev = dev;
243 dev->dev_private = (void *) dev_priv;
244
245 pg = &dev_priv->gtt;
246
247 pci_set_master(dev->pdev);
248
249 dev_priv->num_pipe = dev_priv->ops->pipes;
250
251 resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
252
253 dev_priv->vdc_reg =
254 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
255 if (!dev_priv->vdc_reg)
256 goto out_err;
257
258 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
259 PSB_SGX_SIZE);
260 if (!dev_priv->sgx_reg)
261 goto out_err;
262
263 if (IS_MRST(dev)) {
264 dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0));
265
266 if (dev_priv->aux_pdev) {
267 resource_start = pci_resource_start(dev_priv->aux_pdev,
268 PSB_AUX_RESOURCE);
269 resource_len = pci_resource_len(dev_priv->aux_pdev,
270 PSB_AUX_RESOURCE);
271 dev_priv->aux_reg = ioremap_nocache(resource_start,
272 resource_len);
273 if (!dev_priv->aux_reg)
274 goto out_err;
275
276 DRM_DEBUG_KMS("Found aux vdc");
277 } else {
278 /* Couldn't find the aux vdc so map to primary vdc */
279 dev_priv->aux_reg = dev_priv->vdc_reg;
280 DRM_DEBUG_KMS("Couldn't find aux pci device");
281 }
282 dev_priv->gmbus_reg = dev_priv->aux_reg;
283
284 dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0));
285 if (dev_priv->lpc_pdev) {
286 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
287 &dev_priv->lpc_gpio_base);
288 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
289 (u32)dev_priv->lpc_gpio_base | (1L<<31));
290 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
291 &dev_priv->lpc_gpio_base);
292 dev_priv->lpc_gpio_base &= 0xffc0;
293 if (dev_priv->lpc_gpio_base)
294 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
295 dev_priv->lpc_gpio_base);
296 else {
297 pci_dev_put(dev_priv->lpc_pdev);
298 dev_priv->lpc_pdev = NULL;
299 }
300 }
301 } else {
302 dev_priv->gmbus_reg = dev_priv->vdc_reg;
303 }
304
305 psb_intel_opregion_setup(dev);
306
307 ret = dev_priv->ops->chip_setup(dev);
308 if (ret)
309 goto out_err;
310
311 /* Init OSPM support */
312 gma_power_init(dev);
313
314 ret = -ENOMEM;
315
316 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
317 if (!dev_priv->scratch_page)
318 goto out_err;
319
320 set_pages_uc(dev_priv->scratch_page, 1);
321
322 ret = psb_gtt_init(dev, 0);
323 if (ret)
324 goto out_err;
325
326 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
327 if (!dev_priv->mmu)
328 goto out_err;
329
330 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
331 if (!dev_priv->pf_pd)
332 goto out_err;
333
334 ret = psb_do_init(dev);
335 if (ret)
336 return ret;
337
338 /* Add stolen memory to SGX MMU */
339 down_read(&pg->sem);
340 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
341 dev_priv->stolen_base >> PAGE_SHIFT,
342 pg->gatt_start,
343 pg->stolen_size >> PAGE_SHIFT, 0);
344 up_read(&pg->sem);
345
346 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
347 psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
348
349 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
350 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
351
352 acpi_video_register();
353
354 /* Setup vertical blanking handling */
355 ret = drm_vblank_init(dev, dev_priv->num_pipe);
356 if (ret)
357 goto out_err;
358
359 /*
360 * Install interrupt handlers prior to powering off SGX or else we will
361 * crash.
362 */
363 dev_priv->vdc_irq_mask = 0;
364 dev_priv->pipestat[0] = 0;
365 dev_priv->pipestat[1] = 0;
366 dev_priv->pipestat[2] = 0;
367 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
368 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
369 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
370 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
371 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
372
373 drm_irq_install(dev, dev->pdev->irq);
374
375 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
376 dev->driver->get_vblank_counter = psb_get_vblank_counter;
377
378 psb_modeset_init(dev);
379 psb_fbdev_init(dev);
380 drm_kms_helper_poll_init(dev);
381
382 /* Only add backlight support if we have LVDS output */
383 list_for_each_entry(connector, &dev->mode_config.connector_list,
384 head) {
385 gma_encoder = gma_attached_encoder(connector);
386
387 switch (gma_encoder->type) {
388 case INTEL_OUTPUT_LVDS:
389 case INTEL_OUTPUT_MIPI:
390 ret = gma_backlight_init(dev);
391 break;
392 }
393 }
394
395 if (ret)
396 return ret;
397 psb_intel_opregion_enable_asle(dev);
398#if 0
399 /* Enable runtime pm at last */
400 pm_runtime_enable(&dev->pdev->dev);
401 pm_runtime_set_active(&dev->pdev->dev);
402#endif
403 /* Intel drm driver load is done, continue doing pvr load */
404 return 0;
405out_err:
406 psb_driver_unload(dev);
407 return ret;
408}
409
410static int psb_driver_device_is_agp(struct drm_device *dev)
411{
412 return 0;
413}
414
415static inline void get_brightness(struct backlight_device *bd)
416{
417#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
418 if (bd) {
419 bd->props.brightness = bd->ops->get_brightness(bd);
420 backlight_update_status(bd);
421 }
422#endif
423}
424
425static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
426 unsigned long arg)
427{
428 struct drm_file *file_priv = filp->private_data;
429 struct drm_device *dev = file_priv->minor->dev;
430 struct drm_psb_private *dev_priv = dev->dev_private;
431 static unsigned int runtime_allowed;
432
433 if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
434 runtime_allowed++;
435 pm_runtime_allow(&dev->pdev->dev);
436 dev_priv->rpm_enabled = 1;
437 }
438 return drm_ioctl(filp, cmd, arg);
439 /* FIXME: do we need to wrap the other side of this */
440}
441
442static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
443{
444 return drm_get_pci_dev(pdev, ent, &driver);
445}
446
447
448static void psb_pci_remove(struct pci_dev *pdev)
449{
450 struct drm_device *dev = pci_get_drvdata(pdev);
451 drm_put_dev(dev);
452}
453
454static const struct dev_pm_ops psb_pm_ops = {
455 .resume = gma_power_resume,
456 .suspend = gma_power_suspend,
457 .thaw = gma_power_thaw,
458 .freeze = gma_power_freeze,
459 .restore = gma_power_restore,
460 .runtime_suspend = psb_runtime_suspend,
461 .runtime_resume = psb_runtime_resume,
462 .runtime_idle = psb_runtime_idle,
463};
464
465static const struct vm_operations_struct psb_gem_vm_ops = {
466 .fault = psb_gem_fault,
467 .open = drm_gem_vm_open,
468 .close = drm_gem_vm_close,
469};
470
471static const struct file_operations psb_gem_fops = {
472 .owner = THIS_MODULE,
473 .open = drm_open,
474 .release = drm_release,
475 .unlocked_ioctl = psb_unlocked_ioctl,
476 .compat_ioctl = drm_compat_ioctl,
477 .mmap = drm_gem_mmap,
478 .poll = drm_poll,
479 .read = drm_read,
480};
481
482static struct drm_driver driver = {
483 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
484 DRIVER_MODESET | DRIVER_GEM,
485 .load = psb_driver_load,
486 .unload = psb_driver_unload,
487 .lastclose = psb_driver_lastclose,
488 .set_busid = drm_pci_set_busid,
489
490 .num_ioctls = ARRAY_SIZE(psb_ioctls),
491 .device_is_agp = psb_driver_device_is_agp,
492 .irq_preinstall = psb_irq_preinstall,
493 .irq_postinstall = psb_irq_postinstall,
494 .irq_uninstall = psb_irq_uninstall,
495 .irq_handler = psb_irq_handler,
496 .enable_vblank = psb_enable_vblank,
497 .disable_vblank = psb_disable_vblank,
498 .get_vblank_counter = psb_get_vblank_counter,
499
500 .gem_free_object = psb_gem_free_object,
501 .gem_vm_ops = &psb_gem_vm_ops,
502
503 .dumb_create = psb_gem_dumb_create,
504 .dumb_map_offset = psb_gem_dumb_map_gtt,
505 .dumb_destroy = drm_gem_dumb_destroy,
506 .ioctls = psb_ioctls,
507 .fops = &psb_gem_fops,
508 .name = DRIVER_NAME,
509 .desc = DRIVER_DESC,
510 .date = DRIVER_DATE,
511 .major = DRIVER_MAJOR,
512 .minor = DRIVER_MINOR,
513 .patchlevel = DRIVER_PATCHLEVEL
514};
515
516static struct pci_driver psb_pci_driver = {
517 .name = DRIVER_NAME,
518 .id_table = pciidlist,
519 .probe = psb_pci_probe,
520 .remove = psb_pci_remove,
521 .driver.pm = &psb_pm_ops,
522};
523
524static int __init psb_init(void)
525{
526 return drm_pci_init(&driver, &psb_pci_driver);
527}
528
529static void __exit psb_exit(void)
530{
531 drm_pci_exit(&driver, &psb_pci_driver);
532}
533
534late_initcall(psb_init);
535module_exit(psb_exit);
536
537MODULE_AUTHOR(DRIVER_AUTHOR);
538MODULE_DESCRIPTION(DRIVER_DESC);
539MODULE_LICENSE(DRIVER_LICENSE);