1/*
 2 * arch/score/kernel/time.c
 3 *
 4 * Score Processor version.
 5 *
 6 * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
 7 *  Chen Liqin <liqin.chen@sunplusct.com>
 8 *  Lennox Wu <lennox.wu@sunplusct.com>
 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, see the file COPYING, or write
22 * to the Free Software Foundation, Inc.,
23 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
24 */
25
26#include <linux/clockchips.h>
27#include <linux/interrupt.h>
28
29#include <asm/scoreregs.h>
30
31static irqreturn_t timer_interrupt(int irq, void *dev_id)
32{
33	struct clock_event_device *evdev = dev_id;
34
35	/* clear timer interrupt flag */
36	outl(1, P_TIMER0_CPP_REG);
37	evdev->event_handler(evdev);
38
39	return IRQ_HANDLED;
40}
41
42static struct irqaction timer_irq = {
43	.handler = timer_interrupt,
44	.flags = IRQF_TIMER,
45	.name = "timer",
46};
47
48static int score_timer_set_next_event(unsigned long delta,
49		struct clock_event_device *evdev)
50{
51	outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL);
52	outl(delta, P_TIMER0_PRELOAD);
53	outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL);
54
55	return 0;
56}
57
58static int score_timer_set_periodic(struct clock_event_device *evt)
59{
60	outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL);
61	outl(SYSTEM_CLOCK / HZ, P_TIMER0_PRELOAD);
62	outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL);
63	return 0;
64}
65
66static struct clock_event_device score_clockevent = {
67	.name			= "score_clockevent",
68	.features		= CLOCK_EVT_FEAT_PERIODIC,
69	.shift			= 16,
70	.set_next_event		= score_timer_set_next_event,
71	.set_state_periodic	= score_timer_set_periodic,
72};
73
74void __init time_init(void)
75{
76	timer_irq.dev_id = &score_clockevent;
77	setup_irq(IRQ_TIMER , &timer_irq);
78
79	/* setup COMPARE clockevent */
80	score_clockevent.mult = div_sc(SYSTEM_CLOCK, NSEC_PER_SEC,
81					score_clockevent.shift);
82	score_clockevent.max_delta_ns = clockevent_delta2ns((u32)~0,
83					&score_clockevent);
84	score_clockevent.min_delta_ns = clockevent_delta2ns(50,
85						&score_clockevent) + 1;
86	score_clockevent.cpumask = cpumask_of(0);
87	clockevents_register_device(&score_clockevent);
88}