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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * omap_hwmod implementation for OMAP2/3/4
4 *
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 *
8 * Paul Walmsley, Benoît Cousson, Kevin Hilman
9 *
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
13 *
14 * Introduction
15 * ------------
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
24 *
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
31 *
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
40 *
41 * Using hwmod
42 * -----------
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
50 *
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
53 *
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
74 *
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
80 * platforms.
81 *
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
87 * bugs.
88 *
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
100 *
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
105 * functions.
106 *
107 * References
108 * ----------
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
115 *
116 * To do:
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
119 *
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
123 * appropriate
124 */
125#undef DEBUG
126
127#include <linux/kernel.h>
128#include <linux/errno.h>
129#include <linux/io.h>
130#include <linux/clk.h>
131#include <linux/clk-provider.h>
132#include <linux/delay.h>
133#include <linux/err.h>
134#include <linux/list.h>
135#include <linux/mutex.h>
136#include <linux/spinlock.h>
137#include <linux/slab.h>
138#include <linux/cpu.h>
139#include <linux/of.h>
140#include <linux/of_address.h>
141#include <linux/memblock.h>
142
143#include <linux/platform_data/ti-sysc.h>
144
145#include <dt-bindings/bus/ti-sysc.h>
146
147#include <asm/system_misc.h>
148
149#include "clock.h"
150#include "omap_hwmod.h"
151
152#include "soc.h"
153#include "common.h"
154#include "clockdomain.h"
155#include "hdq1w.h"
156#include "mmc.h"
157#include "powerdomain.h"
158#include "cm2xxx.h"
159#include "cm3xxx.h"
160#include "cm33xx.h"
161#include "prm.h"
162#include "prm3xxx.h"
163#include "prm44xx.h"
164#include "prm33xx.h"
165#include "prminst44xx.h"
166#include "pm.h"
167#include "wd_timer.h"
168
169/* Name of the OMAP hwmod for the MPU */
170#define MPU_INITIATOR_NAME "mpu"
171
172/*
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
175 */
176#define LINKS_PER_OCP_IF 2
177
178/*
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
181 */
182#define OMAP4_RST_CTRL_ST_OFFSET 4
183
184/*
185 * Maximum length for module clock handle names
186 */
187#define MOD_CLK_MAX_NAME_LEN 32
188
189/**
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
195 * @link: list link
196 */
197struct clkctrl_provider {
198 int num_addrs;
199 u32 *addr;
200 u32 *size;
201 struct device_node *node;
202 struct list_head link;
203};
204
205static LIST_HEAD(clkctrl_providers);
206
207/**
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
212 *
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
214 */
215struct omap_hwmod_reset {
216 const char *match;
217 int len;
218 int (*reset)(struct omap_hwmod *oh);
219};
220
221/**
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
225 *
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
229 */
230struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
245};
246
247/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248static struct omap_hwmod_soc_ops soc_ops;
249
250/* omap_hwmod_list contains all registered struct omap_hwmods */
251static LIST_HEAD(omap_hwmod_list);
252static DEFINE_MUTEX(list_lock);
253
254/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255static struct omap_hwmod *mpu_oh;
256
257/* inited: set to true once the hwmod code is initialized */
258static bool inited;
259
260/* Private functions */
261
262/**
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
265 *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
269 */
270static int _update_sysc_cache(struct omap_hwmod *oh)
271{
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
274 return -EINVAL;
275 }
276
277 /* XXX ensure module interface clock is up */
278
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
280
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
283
284 return 0;
285}
286
287/**
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
291 *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
294 */
295static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
296{
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
299 return;
300 }
301
302 /* XXX ensure module interface clock is up */
303
304 /* Module might have lost context, always update cache and register */
305 oh->_sysc_cache = v;
306
307 /*
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
312 */
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
315
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
317
318 if (oh->class->lock)
319 oh->class->lock(oh);
320}
321
322/**
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
327 *
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
331 */
332static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
333 u32 *v)
334{
335 u32 mstandby_mask;
336 u8 mstandby_shift;
337
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
340 return -EINVAL;
341
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
344 return -EINVAL;
345 }
346
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
349
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
352
353 return 0;
354}
355
356/**
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
361 *
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
364 * or 0 upon success.
365 */
366static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
367{
368 u32 sidle_mask;
369 u8 sidle_shift;
370
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
373 return -EINVAL;
374
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
377 return -EINVAL;
378 }
379
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
382
383 *v &= ~sidle_mask;
384 *v |= __ffs(idlemode) << sidle_shift;
385
386 return 0;
387}
388
389/**
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
394 *
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
398 * success.
399 */
400static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
401{
402 u32 clkact_mask;
403 u8 clkact_shift;
404
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
407 return -EINVAL;
408
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
411 return -EINVAL;
412 }
413
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
416
417 *v &= ~clkact_mask;
418 *v |= clockact << clkact_shift;
419
420 return 0;
421}
422
423/**
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
427 *
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
430 */
431static int _set_softreset(struct omap_hwmod *oh, u32 *v)
432{
433 u32 softrst_mask;
434
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
437 return -EINVAL;
438
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
441 return -EINVAL;
442 }
443
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
445
446 *v |= softrst_mask;
447
448 return 0;
449}
450
451/**
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
455 *
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
458 */
459static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
460{
461 u32 softrst_mask;
462
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
465 return -EINVAL;
466
467 if (!oh->class->sysc->sysc_fields) {
468 WARN(1,
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
470 oh->name);
471 return -EINVAL;
472 }
473
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
475
476 *v &= ~softrst_mask;
477
478 return 0;
479}
480
481/**
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
484 *
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
490 */
491static int _wait_softreset_complete(struct omap_hwmod *oh)
492{
493 struct omap_hwmod_class_sysconfig *sysc;
494 u32 softrst_mask;
495 int c = 0;
496
497 sysc = oh->class->sysc;
498
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
506 & softrst_mask),
507 MAX_MODULE_SOFTRESET_WAIT, c);
508 }
509
510 return c;
511}
512
513/**
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
516 *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
521 *
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
524 */
525static int _set_dmadisable(struct omap_hwmod *oh)
526{
527 u32 v;
528 u32 dmadisable_mask;
529
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
532 return -EINVAL;
533
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
536 return -EINVAL;
537 }
538
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
542 return -EINVAL;
543 }
544
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
546
547 v = oh->_sysc_cache;
548 dmadisable_mask =
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
552
553 return 0;
554}
555
556/**
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
561 *
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
568 */
569static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
570 u32 *v)
571{
572 u32 autoidle_mask;
573 u8 autoidle_shift;
574
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
577 return -EINVAL;
578
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
581 return -EINVAL;
582 }
583
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
586
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
589
590 return 0;
591}
592
593/**
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
596 *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
599 */
600static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
601{
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
606 return -EINVAL;
607
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
610 return -EINVAL;
611 }
612
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
615
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
620
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
622
623 return 0;
624}
625
626static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
627{
628 struct clk_hw_omap *clk;
629
630 if (!oh)
631 return NULL;
632
633 if (oh->clkdm) {
634 return oh->clkdm;
635 } else if (oh->_clk) {
636 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
637 return NULL;
638 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
639 return clk->clkdm;
640 }
641 return NULL;
642}
643
644/**
645 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
646 * @oh: struct omap_hwmod *
647 *
648 * Prevent the hardware module @oh from entering idle while the
649 * hardare module initiator @init_oh is active. Useful when a module
650 * will be accessed by a particular initiator (e.g., if a module will
651 * be accessed by the IVA, there should be a sleepdep between the IVA
652 * initiator and the module). Only applies to modules in smart-idle
653 * mode. If the clockdomain is marked as not needing autodeps, return
654 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
655 * passes along clkdm_add_sleepdep() value upon success.
656 */
657static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
658{
659 struct clockdomain *clkdm, *init_clkdm;
660
661 clkdm = _get_clkdm(oh);
662 init_clkdm = _get_clkdm(init_oh);
663
664 if (!clkdm || !init_clkdm)
665 return -EINVAL;
666
667 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
668 return 0;
669
670 return clkdm_add_sleepdep(clkdm, init_clkdm);
671}
672
673/**
674 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
675 * @oh: struct omap_hwmod *
676 *
677 * Allow the hardware module @oh to enter idle while the hardare
678 * module initiator @init_oh is active. Useful when a module will not
679 * be accessed by a particular initiator (e.g., if a module will not
680 * be accessed by the IVA, there should be no sleepdep between the IVA
681 * initiator and the module). Only applies to modules in smart-idle
682 * mode. If the clockdomain is marked as not needing autodeps, return
683 * 0 without doing anything. Returns -EINVAL upon error or passes
684 * along clkdm_del_sleepdep() value upon success.
685 */
686static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
687{
688 struct clockdomain *clkdm, *init_clkdm;
689
690 clkdm = _get_clkdm(oh);
691 init_clkdm = _get_clkdm(init_oh);
692
693 if (!clkdm || !init_clkdm)
694 return -EINVAL;
695
696 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
697 return 0;
698
699 return clkdm_del_sleepdep(clkdm, init_clkdm);
700}
701
702static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
703 { .compatible = "ti,clkctrl" },
704 { }
705};
706
707static int __init _setup_clkctrl_provider(struct device_node *np)
708{
709 struct clkctrl_provider *provider;
710 int i;
711
712 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
713 if (!provider)
714 return -ENOMEM;
715
716 provider->node = np;
717
718 provider->num_addrs = of_address_count(np);
719
720 provider->addr =
721 memblock_alloc(sizeof(void *) * provider->num_addrs,
722 SMP_CACHE_BYTES);
723 if (!provider->addr)
724 return -ENOMEM;
725
726 provider->size =
727 memblock_alloc(sizeof(u32) * provider->num_addrs,
728 SMP_CACHE_BYTES);
729 if (!provider->size)
730 return -ENOMEM;
731
732 for (i = 0; i < provider->num_addrs; i++) {
733 struct resource res;
734 of_address_to_resource(np, i, &res);
735 provider->addr[i] = res.start;
736 provider->size[i] = resource_size(&res);
737 pr_debug("%s: %pOF: %pR\n", __func__, np, &res);
738 }
739
740 list_add(&provider->link, &clkctrl_providers);
741
742 return 0;
743}
744
745static int __init _init_clkctrl_providers(void)
746{
747 struct device_node *np;
748 int ret = 0;
749
750 for_each_matching_node(np, ti_clkctrl_match_table) {
751 ret = _setup_clkctrl_provider(np);
752 if (ret) {
753 of_node_put(np);
754 break;
755 }
756 }
757
758 return ret;
759}
760
761static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
762{
763 if (!oh->prcm.omap4.modulemode)
764 return 0;
765
766 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
767 oh->clkdm->cm_inst,
768 oh->prcm.omap4.clkctrl_offs);
769}
770
771static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
772{
773 struct clkctrl_provider *provider;
774 struct clk *clk;
775 u32 addr;
776
777 if (!soc_ops.xlate_clkctrl)
778 return NULL;
779
780 addr = soc_ops.xlate_clkctrl(oh);
781 if (!addr)
782 return NULL;
783
784 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
785
786 list_for_each_entry(provider, &clkctrl_providers, link) {
787 int i;
788
789 for (i = 0; i < provider->num_addrs; i++) {
790 if (provider->addr[i] <= addr &&
791 provider->addr[i] + provider->size[i] > addr) {
792 struct of_phandle_args clkspec;
793
794 clkspec.np = provider->node;
795 clkspec.args_count = 2;
796 clkspec.args[0] = addr - provider->addr[0];
797 clkspec.args[1] = 0;
798
799 clk = of_clk_get_from_provider(&clkspec);
800
801 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
802 __func__, oh->name, clk,
803 clkspec.args[0], provider->node);
804
805 return clk;
806 }
807 }
808 }
809
810 return NULL;
811}
812
813/**
814 * _init_main_clk - get a struct clk * for the hwmod's main functional clk
815 * @oh: struct omap_hwmod *
816 *
817 * Called from _init_clocks(). Populates the @oh _clk (main
818 * functional clock pointer) if a clock matching the hwmod name is found,
819 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
820 */
821static int _init_main_clk(struct omap_hwmod *oh)
822{
823 int ret = 0;
824 struct clk *clk = NULL;
825
826 clk = _lookup_clkctrl_clk(oh);
827
828 if (!IS_ERR_OR_NULL(clk)) {
829 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
830 __clk_get_name(clk), oh->name);
831 oh->main_clk = __clk_get_name(clk);
832 oh->_clk = clk;
833 soc_ops.disable_direct_prcm(oh);
834 } else {
835 if (!oh->main_clk)
836 return 0;
837
838 oh->_clk = clk_get(NULL, oh->main_clk);
839 }
840
841 if (IS_ERR(oh->_clk)) {
842 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
843 oh->name, oh->main_clk);
844 return -EINVAL;
845 }
846 /*
847 * HACK: This needs a re-visit once clk_prepare() is implemented
848 * to do something meaningful. Today its just a no-op.
849 * If clk_prepare() is used at some point to do things like
850 * voltage scaling etc, then this would have to be moved to
851 * some point where subsystems like i2c and pmic become
852 * available.
853 */
854 clk_prepare(oh->_clk);
855
856 if (!_get_clkdm(oh))
857 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
858 oh->name, oh->main_clk);
859
860 return ret;
861}
862
863/**
864 * _init_interface_clks - get a struct clk * for the hwmod's interface clks
865 * @oh: struct omap_hwmod *
866 *
867 * Called from _init_clocks(). Populates the @oh OCP slave interface
868 * clock pointers. Returns 0 on success or -EINVAL on error.
869 */
870static int _init_interface_clks(struct omap_hwmod *oh)
871{
872 struct omap_hwmod_ocp_if *os;
873 struct clk *c;
874 int ret = 0;
875
876 list_for_each_entry(os, &oh->slave_ports, node) {
877 if (!os->clk)
878 continue;
879
880 c = clk_get(NULL, os->clk);
881 if (IS_ERR(c)) {
882 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
883 oh->name, os->clk);
884 ret = -EINVAL;
885 continue;
886 }
887 os->_clk = c;
888 /*
889 * HACK: This needs a re-visit once clk_prepare() is implemented
890 * to do something meaningful. Today its just a no-op.
891 * If clk_prepare() is used at some point to do things like
892 * voltage scaling etc, then this would have to be moved to
893 * some point where subsystems like i2c and pmic become
894 * available.
895 */
896 clk_prepare(os->_clk);
897 }
898
899 return ret;
900}
901
902/**
903 * _init_opt_clks - get a struct clk * for the hwmod's optional clocks
904 * @oh: struct omap_hwmod *
905 *
906 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
907 * clock pointers. Returns 0 on success or -EINVAL on error.
908 */
909static int _init_opt_clks(struct omap_hwmod *oh)
910{
911 struct omap_hwmod_opt_clk *oc;
912 struct clk *c;
913 int i;
914 int ret = 0;
915
916 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
917 c = clk_get(NULL, oc->clk);
918 if (IS_ERR(c)) {
919 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
920 oh->name, oc->clk);
921 ret = -EINVAL;
922 continue;
923 }
924 oc->_clk = c;
925 /*
926 * HACK: This needs a re-visit once clk_prepare() is implemented
927 * to do something meaningful. Today its just a no-op.
928 * If clk_prepare() is used at some point to do things like
929 * voltage scaling etc, then this would have to be moved to
930 * some point where subsystems like i2c and pmic become
931 * available.
932 */
933 clk_prepare(oc->_clk);
934 }
935
936 return ret;
937}
938
939static void _enable_optional_clocks(struct omap_hwmod *oh)
940{
941 struct omap_hwmod_opt_clk *oc;
942 int i;
943
944 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
945
946 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
947 if (oc->_clk) {
948 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
949 __clk_get_name(oc->_clk));
950 clk_enable(oc->_clk);
951 }
952}
953
954static void _disable_optional_clocks(struct omap_hwmod *oh)
955{
956 struct omap_hwmod_opt_clk *oc;
957 int i;
958
959 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
960
961 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
962 if (oc->_clk) {
963 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
964 __clk_get_name(oc->_clk));
965 clk_disable(oc->_clk);
966 }
967}
968
969/**
970 * _enable_clocks - enable hwmod main clock and interface clocks
971 * @oh: struct omap_hwmod *
972 *
973 * Enables all clocks necessary for register reads and writes to succeed
974 * on the hwmod @oh. Returns 0.
975 */
976static int _enable_clocks(struct omap_hwmod *oh)
977{
978 struct omap_hwmod_ocp_if *os;
979
980 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
981
982 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
983 _enable_optional_clocks(oh);
984
985 if (oh->_clk)
986 clk_enable(oh->_clk);
987
988 list_for_each_entry(os, &oh->slave_ports, node) {
989 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
990 omap2_clk_deny_idle(os->_clk);
991 clk_enable(os->_clk);
992 }
993 }
994
995 /* The opt clocks are controlled by the device driver. */
996
997 return 0;
998}
999
1000/**
1001 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1002 * @oh: struct omap_hwmod *
1003 */
1004static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1005{
1006 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1007 return true;
1008
1009 return false;
1010}
1011
1012/**
1013 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1014 * @oh: struct omap_hwmod *
1015 */
1016static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1017{
1018 if (oh->prcm.omap4.clkctrl_offs)
1019 return true;
1020
1021 if (!oh->prcm.omap4.clkctrl_offs &&
1022 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1023 return true;
1024
1025 return false;
1026}
1027
1028/**
1029 * _disable_clocks - disable hwmod main clock and interface clocks
1030 * @oh: struct omap_hwmod *
1031 *
1032 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1033 */
1034static int _disable_clocks(struct omap_hwmod *oh)
1035{
1036 struct omap_hwmod_ocp_if *os;
1037
1038 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1039
1040 if (oh->_clk)
1041 clk_disable(oh->_clk);
1042
1043 list_for_each_entry(os, &oh->slave_ports, node) {
1044 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1045 clk_disable(os->_clk);
1046 omap2_clk_allow_idle(os->_clk);
1047 }
1048 }
1049
1050 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1051 _disable_optional_clocks(oh);
1052
1053 /* The opt clocks are controlled by the device driver. */
1054
1055 return 0;
1056}
1057
1058/**
1059 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1060 * @oh: struct omap_hwmod *
1061 *
1062 * Enables the PRCM module mode related to the hwmod @oh.
1063 * No return value.
1064 */
1065static void _omap4_enable_module(struct omap_hwmod *oh)
1066{
1067 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1068 _omap4_clkctrl_managed_by_clkfwk(oh))
1069 return;
1070
1071 pr_debug("omap_hwmod: %s: %s: %d\n",
1072 oh->name, __func__, oh->prcm.omap4.modulemode);
1073
1074 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1075 oh->clkdm->prcm_partition,
1076 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1077}
1078
1079/**
1080 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1081 * @oh: struct omap_hwmod *
1082 *
1083 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1084 * does not have an IDLEST bit or if the module successfully enters
1085 * slave idle; otherwise, pass along the return value of the
1086 * appropriate *_cm*_wait_module_idle() function.
1087 */
1088static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1089{
1090 if (!oh)
1091 return -EINVAL;
1092
1093 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1094 return 0;
1095
1096 if (oh->flags & HWMOD_NO_IDLEST)
1097 return 0;
1098
1099 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1100 return 0;
1101
1102 if (!_omap4_has_clkctrl_clock(oh))
1103 return 0;
1104
1105 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1106 oh->clkdm->cm_inst,
1107 oh->prcm.omap4.clkctrl_offs, 0);
1108}
1109
1110/**
1111 * _save_mpu_port_index - find and save the index to @oh's MPU port
1112 * @oh: struct omap_hwmod *
1113 *
1114 * Determines the array index of the OCP slave port that the MPU uses
1115 * to address the device, and saves it into the struct omap_hwmod.
1116 * Intended to be called during hwmod registration only. No return
1117 * value.
1118 */
1119static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1120{
1121 struct omap_hwmod_ocp_if *os = NULL;
1122
1123 if (!oh)
1124 return;
1125
1126 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1127
1128 list_for_each_entry(os, &oh->slave_ports, node) {
1129 if (os->user & OCP_USER_MPU) {
1130 oh->_mpu_port = os;
1131 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1132 break;
1133 }
1134 }
1135
1136 return;
1137}
1138
1139/**
1140 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1141 * @oh: struct omap_hwmod *
1142 *
1143 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1144 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1145 * communicate with the IP block. This interface need not be directly
1146 * connected to the MPU (and almost certainly is not), but is directly
1147 * connected to the IP block represented by @oh. Returns a pointer
1148 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1149 * error or if there does not appear to be a path from the MPU to this
1150 * IP block.
1151 */
1152static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1153{
1154 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1155 return NULL;
1156
1157 return oh->_mpu_port;
1158};
1159
1160/**
1161 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1162 * @oh: struct omap_hwmod *
1163 *
1164 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1165 * by @oh is set to indicate to the PRCM that the IP block is active.
1166 * Usually this means placing the module into smart-idle mode and
1167 * smart-standby, but if there is a bug in the automatic idle handling
1168 * for the IP block, it may need to be placed into the force-idle or
1169 * no-idle variants of these modes. No return value.
1170 */
1171static void _enable_sysc(struct omap_hwmod *oh)
1172{
1173 u8 idlemode, sf;
1174 u32 v;
1175 bool clkdm_act;
1176 struct clockdomain *clkdm;
1177
1178 if (!oh->class->sysc)
1179 return;
1180
1181 /*
1182 * Wait until reset has completed, this is needed as the IP
1183 * block is reset automatically by hardware in some cases
1184 * (off-mode for example), and the drivers require the
1185 * IP to be ready when they access it
1186 */
1187 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1188 _enable_optional_clocks(oh);
1189 _wait_softreset_complete(oh);
1190 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1191 _disable_optional_clocks(oh);
1192
1193 v = oh->_sysc_cache;
1194 sf = oh->class->sysc->sysc_flags;
1195
1196 clkdm = _get_clkdm(oh);
1197 if (sf & SYSC_HAS_SIDLEMODE) {
1198 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1199 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1200 idlemode = HWMOD_IDLEMODE_NO;
1201 } else {
1202 if (sf & SYSC_HAS_ENAWAKEUP)
1203 _enable_wakeup(oh, &v);
1204 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1205 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1206 else
1207 idlemode = HWMOD_IDLEMODE_SMART;
1208 }
1209
1210 /*
1211 * This is special handling for some IPs like
1212 * 32k sync timer. Force them to idle!
1213 */
1214 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1215 if (clkdm_act && !(oh->class->sysc->idlemodes &
1216 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1217 idlemode = HWMOD_IDLEMODE_FORCE;
1218
1219 _set_slave_idlemode(oh, idlemode, &v);
1220 }
1221
1222 if (sf & SYSC_HAS_MIDLEMODE) {
1223 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1224 idlemode = HWMOD_IDLEMODE_FORCE;
1225 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1226 idlemode = HWMOD_IDLEMODE_NO;
1227 } else {
1228 if (sf & SYSC_HAS_ENAWAKEUP)
1229 _enable_wakeup(oh, &v);
1230 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1231 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1232 else
1233 idlemode = HWMOD_IDLEMODE_SMART;
1234 }
1235 _set_master_standbymode(oh, idlemode, &v);
1236 }
1237
1238 /*
1239 * XXX The clock framework should handle this, by
1240 * calling into this code. But this must wait until the
1241 * clock structures are tagged with omap_hwmod entries
1242 */
1243 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1244 (sf & SYSC_HAS_CLOCKACTIVITY))
1245 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1246
1247 _write_sysconfig(v, oh);
1248
1249 /*
1250 * Set the autoidle bit only after setting the smartidle bit
1251 * Setting this will not have any impact on the other modules.
1252 */
1253 if (sf & SYSC_HAS_AUTOIDLE) {
1254 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1255 0 : 1;
1256 _set_module_autoidle(oh, idlemode, &v);
1257 _write_sysconfig(v, oh);
1258 }
1259}
1260
1261/**
1262 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1263 * @oh: struct omap_hwmod *
1264 *
1265 * If module is marked as SWSUP_SIDLE, force the module into slave
1266 * idle; otherwise, configure it for smart-idle. If module is marked
1267 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1268 * configure it for smart-standby. No return value.
1269 */
1270static void _idle_sysc(struct omap_hwmod *oh)
1271{
1272 u8 idlemode, sf;
1273 u32 v;
1274
1275 if (!oh->class->sysc)
1276 return;
1277
1278 v = oh->_sysc_cache;
1279 sf = oh->class->sysc->sysc_flags;
1280
1281 if (sf & SYSC_HAS_SIDLEMODE) {
1282 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1283 idlemode = HWMOD_IDLEMODE_FORCE;
1284 } else {
1285 if (sf & SYSC_HAS_ENAWAKEUP)
1286 _enable_wakeup(oh, &v);
1287 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1288 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1289 else
1290 idlemode = HWMOD_IDLEMODE_SMART;
1291 }
1292 _set_slave_idlemode(oh, idlemode, &v);
1293 }
1294
1295 if (sf & SYSC_HAS_MIDLEMODE) {
1296 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1297 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1298 idlemode = HWMOD_IDLEMODE_FORCE;
1299 } else {
1300 if (sf & SYSC_HAS_ENAWAKEUP)
1301 _enable_wakeup(oh, &v);
1302 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1303 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1304 else
1305 idlemode = HWMOD_IDLEMODE_SMART;
1306 }
1307 _set_master_standbymode(oh, idlemode, &v);
1308 }
1309
1310 /* If the cached value is the same as the new value, skip the write */
1311 if (oh->_sysc_cache != v)
1312 _write_sysconfig(v, oh);
1313}
1314
1315/**
1316 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1317 * @oh: struct omap_hwmod *
1318 *
1319 * Force the module into slave idle and master suspend. No return
1320 * value.
1321 */
1322static void _shutdown_sysc(struct omap_hwmod *oh)
1323{
1324 u32 v;
1325 u8 sf;
1326
1327 if (!oh->class->sysc)
1328 return;
1329
1330 v = oh->_sysc_cache;
1331 sf = oh->class->sysc->sysc_flags;
1332
1333 if (sf & SYSC_HAS_SIDLEMODE)
1334 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1335
1336 if (sf & SYSC_HAS_MIDLEMODE)
1337 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1338
1339 if (sf & SYSC_HAS_AUTOIDLE)
1340 _set_module_autoidle(oh, 1, &v);
1341
1342 _write_sysconfig(v, oh);
1343}
1344
1345/**
1346 * _lookup - find an omap_hwmod by name
1347 * @name: find an omap_hwmod by name
1348 *
1349 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1350 */
1351static struct omap_hwmod *_lookup(const char *name)
1352{
1353 struct omap_hwmod *oh, *temp_oh;
1354
1355 oh = NULL;
1356
1357 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1358 if (!strcmp(name, temp_oh->name)) {
1359 oh = temp_oh;
1360 break;
1361 }
1362 }
1363
1364 return oh;
1365}
1366
1367/**
1368 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1369 * @oh: struct omap_hwmod *
1370 *
1371 * Convert a clockdomain name stored in a struct omap_hwmod into a
1372 * clockdomain pointer, and save it into the struct omap_hwmod.
1373 * Return -EINVAL if the clkdm_name lookup failed.
1374 */
1375static int _init_clkdm(struct omap_hwmod *oh)
1376{
1377 if (!oh->clkdm_name) {
1378 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1379 return 0;
1380 }
1381
1382 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1383 if (!oh->clkdm) {
1384 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1385 oh->name, oh->clkdm_name);
1386 return 0;
1387 }
1388
1389 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1390 oh->name, oh->clkdm_name);
1391
1392 return 0;
1393}
1394
1395/**
1396 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1397 * well the clockdomain.
1398 * @oh: struct omap_hwmod *
1399 * @np: device_node mapped to this hwmod
1400 *
1401 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1402 * Resolves all clock names embedded in the hwmod. Returns 0 on
1403 * success, or a negative error code on failure.
1404 */
1405static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1406{
1407 int ret = 0;
1408
1409 if (oh->_state != _HWMOD_STATE_REGISTERED)
1410 return 0;
1411
1412 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1413
1414 if (soc_ops.init_clkdm)
1415 ret |= soc_ops.init_clkdm(oh);
1416
1417 ret |= _init_main_clk(oh);
1418 ret |= _init_interface_clks(oh);
1419 ret |= _init_opt_clks(oh);
1420
1421 if (!ret)
1422 oh->_state = _HWMOD_STATE_CLKS_INITED;
1423 else
1424 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1425
1426 return ret;
1427}
1428
1429/**
1430 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1431 * @oh: struct omap_hwmod *
1432 * @name: name of the reset line in the context of this hwmod
1433 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1434 *
1435 * Return the bit position of the reset line that match the
1436 * input name. Return -ENOENT if not found.
1437 */
1438static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1439 struct omap_hwmod_rst_info *ohri)
1440{
1441 int i;
1442
1443 for (i = 0; i < oh->rst_lines_cnt; i++) {
1444 const char *rst_line = oh->rst_lines[i].name;
1445 if (!strcmp(rst_line, name)) {
1446 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1447 ohri->st_shift = oh->rst_lines[i].st_shift;
1448 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1449 oh->name, __func__, rst_line, ohri->rst_shift,
1450 ohri->st_shift);
1451
1452 return 0;
1453 }
1454 }
1455
1456 return -ENOENT;
1457}
1458
1459/**
1460 * _assert_hardreset - assert the HW reset line of submodules
1461 * contained in the hwmod module.
1462 * @oh: struct omap_hwmod *
1463 * @name: name of the reset line to lookup and assert
1464 *
1465 * Some IP like dsp, ipu or iva contain processor that require an HW
1466 * reset line to be assert / deassert in order to enable fully the IP.
1467 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1468 * asserting the hardreset line on the currently-booted SoC, or passes
1469 * along the return value from _lookup_hardreset() or the SoC's
1470 * assert_hardreset code.
1471 */
1472static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1473{
1474 struct omap_hwmod_rst_info ohri;
1475 int ret = -EINVAL;
1476
1477 if (!oh)
1478 return -EINVAL;
1479
1480 if (!soc_ops.assert_hardreset)
1481 return -ENOSYS;
1482
1483 ret = _lookup_hardreset(oh, name, &ohri);
1484 if (ret < 0)
1485 return ret;
1486
1487 ret = soc_ops.assert_hardreset(oh, &ohri);
1488
1489 return ret;
1490}
1491
1492/**
1493 * _deassert_hardreset - deassert the HW reset line of submodules contained
1494 * in the hwmod module.
1495 * @oh: struct omap_hwmod *
1496 * @name: name of the reset line to look up and deassert
1497 *
1498 * Some IP like dsp, ipu or iva contain processor that require an HW
1499 * reset line to be assert / deassert in order to enable fully the IP.
1500 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1501 * deasserting the hardreset line on the currently-booted SoC, or passes
1502 * along the return value from _lookup_hardreset() or the SoC's
1503 * deassert_hardreset code.
1504 */
1505static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1506{
1507 struct omap_hwmod_rst_info ohri;
1508 int ret = -EINVAL;
1509
1510 if (!oh)
1511 return -EINVAL;
1512
1513 if (!soc_ops.deassert_hardreset)
1514 return -ENOSYS;
1515
1516 ret = _lookup_hardreset(oh, name, &ohri);
1517 if (ret < 0)
1518 return ret;
1519
1520 if (oh->clkdm) {
1521 /*
1522 * A clockdomain must be in SW_SUP otherwise reset
1523 * might not be completed. The clockdomain can be set
1524 * in HW_AUTO only when the module become ready.
1525 */
1526 clkdm_deny_idle(oh->clkdm);
1527 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1528 if (ret) {
1529 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1530 oh->name, oh->clkdm->name, ret);
1531 return ret;
1532 }
1533 }
1534
1535 _enable_clocks(oh);
1536 if (soc_ops.enable_module)
1537 soc_ops.enable_module(oh);
1538
1539 ret = soc_ops.deassert_hardreset(oh, &ohri);
1540
1541 if (soc_ops.disable_module)
1542 soc_ops.disable_module(oh);
1543 _disable_clocks(oh);
1544
1545 if (ret == -EBUSY)
1546 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1547
1548 if (oh->clkdm) {
1549 /*
1550 * Set the clockdomain to HW_AUTO, assuming that the
1551 * previous state was HW_AUTO.
1552 */
1553 clkdm_allow_idle(oh->clkdm);
1554
1555 clkdm_hwmod_disable(oh->clkdm, oh);
1556 }
1557
1558 return ret;
1559}
1560
1561/**
1562 * _read_hardreset - read the HW reset line state of submodules
1563 * contained in the hwmod module
1564 * @oh: struct omap_hwmod *
1565 * @name: name of the reset line to look up and read
1566 *
1567 * Return the state of the reset line. Returns -EINVAL if @oh is
1568 * null, -ENOSYS if we have no way of reading the hardreset line
1569 * status on the currently-booted SoC, or passes along the return
1570 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1571 * code.
1572 */
1573static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1574{
1575 struct omap_hwmod_rst_info ohri;
1576 int ret = -EINVAL;
1577
1578 if (!oh)
1579 return -EINVAL;
1580
1581 if (!soc_ops.is_hardreset_asserted)
1582 return -ENOSYS;
1583
1584 ret = _lookup_hardreset(oh, name, &ohri);
1585 if (ret < 0)
1586 return ret;
1587
1588 return soc_ops.is_hardreset_asserted(oh, &ohri);
1589}
1590
1591/**
1592 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1593 * @oh: struct omap_hwmod *
1594 *
1595 * If all hardreset lines associated with @oh are asserted, then return true.
1596 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1597 * associated with @oh are asserted, then return false.
1598 * This function is used to avoid executing some parts of the IP block
1599 * enable/disable sequence if its hardreset line is set.
1600 */
1601static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1602{
1603 int i, rst_cnt = 0;
1604
1605 if (oh->rst_lines_cnt == 0)
1606 return false;
1607
1608 for (i = 0; i < oh->rst_lines_cnt; i++)
1609 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1610 rst_cnt++;
1611
1612 if (oh->rst_lines_cnt == rst_cnt)
1613 return true;
1614
1615 return false;
1616}
1617
1618/**
1619 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1620 * hard-reset
1621 * @oh: struct omap_hwmod *
1622 *
1623 * If any hardreset lines associated with @oh are asserted, then
1624 * return true. Otherwise, if no hardreset lines associated with @oh
1625 * are asserted, or if @oh has no hardreset lines, then return false.
1626 * This function is used to avoid executing some parts of the IP block
1627 * enable/disable sequence if any hardreset line is set.
1628 */
1629static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1630{
1631 int rst_cnt = 0;
1632 int i;
1633
1634 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1635 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1636 rst_cnt++;
1637
1638 return (rst_cnt) ? true : false;
1639}
1640
1641/**
1642 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1643 * @oh: struct omap_hwmod *
1644 *
1645 * Disable the PRCM module mode related to the hwmod @oh.
1646 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1647 */
1648static int _omap4_disable_module(struct omap_hwmod *oh)
1649{
1650 int v;
1651
1652 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1653 _omap4_clkctrl_managed_by_clkfwk(oh))
1654 return -EINVAL;
1655
1656 /*
1657 * Since integration code might still be doing something, only
1658 * disable if all lines are under hardreset.
1659 */
1660 if (_are_any_hardreset_lines_asserted(oh))
1661 return 0;
1662
1663 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1664
1665 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1666 oh->prcm.omap4.clkctrl_offs);
1667
1668 v = _omap4_wait_target_disable(oh);
1669 if (v)
1670 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1671 oh->name);
1672
1673 return 0;
1674}
1675
1676/**
1677 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1678 * @oh: struct omap_hwmod *
1679 *
1680 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1681 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1682 * reset this way, -EINVAL if the hwmod is in the wrong state,
1683 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1684 *
1685 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1686 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1687 * use the SYSCONFIG softreset bit to provide the status.
1688 *
1689 * Note that some IP like McBSP do have reset control but don't have
1690 * reset status.
1691 */
1692static int _ocp_softreset(struct omap_hwmod *oh)
1693{
1694 u32 v;
1695 int c = 0;
1696 int ret = 0;
1697
1698 if (!oh->class->sysc ||
1699 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1700 return -ENOENT;
1701
1702 /* clocks must be on for this operation */
1703 if (oh->_state != _HWMOD_STATE_ENABLED) {
1704 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1705 oh->name);
1706 return -EINVAL;
1707 }
1708
1709 /* For some modules, all optionnal clocks need to be enabled as well */
1710 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1711 _enable_optional_clocks(oh);
1712
1713 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1714
1715 v = oh->_sysc_cache;
1716 ret = _set_softreset(oh, &v);
1717 if (ret)
1718 goto dis_opt_clks;
1719
1720 _write_sysconfig(v, oh);
1721
1722 if (oh->class->sysc->srst_udelay)
1723 udelay(oh->class->sysc->srst_udelay);
1724
1725 c = _wait_softreset_complete(oh);
1726 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1727 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1728 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1729 ret = -ETIMEDOUT;
1730 goto dis_opt_clks;
1731 } else {
1732 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1733 }
1734
1735 ret = _clear_softreset(oh, &v);
1736 if (ret)
1737 goto dis_opt_clks;
1738
1739 _write_sysconfig(v, oh);
1740
1741 /*
1742 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1743 * _wait_target_ready() or _reset()
1744 */
1745
1746dis_opt_clks:
1747 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1748 _disable_optional_clocks(oh);
1749
1750 return ret;
1751}
1752
1753/**
1754 * _reset - reset an omap_hwmod
1755 * @oh: struct omap_hwmod *
1756 *
1757 * Resets an omap_hwmod @oh. If the module has a custom reset
1758 * function pointer defined, then call it to reset the IP block, and
1759 * pass along its return value to the caller. Otherwise, if the IP
1760 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1761 * associated with it, call a function to reset the IP block via that
1762 * method, and pass along the return value to the caller. Finally, if
1763 * the IP block has some hardreset lines associated with it, assert
1764 * all of those, but do _not_ deassert them. (This is because driver
1765 * authors have expressed an apparent requirement to control the
1766 * deassertion of the hardreset lines themselves.)
1767 *
1768 * The default software reset mechanism for most OMAP IP blocks is
1769 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1770 * hwmods cannot be reset via this method. Some are not targets and
1771 * therefore have no OCP header registers to access. Others (like the
1772 * IVA) have idiosyncratic reset sequences. So for these relatively
1773 * rare cases, custom reset code can be supplied in the struct
1774 * omap_hwmod_class .reset function pointer.
1775 *
1776 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1777 * does not prevent idling of the system. This is necessary for cases
1778 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1779 * kernel without disabling dma.
1780 *
1781 * Passes along the return value from either _ocp_softreset() or the
1782 * custom reset function - these must return -EINVAL if the hwmod
1783 * cannot be reset this way or if the hwmod is in the wrong state,
1784 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1785 */
1786static int _reset(struct omap_hwmod *oh)
1787{
1788 int i, r;
1789
1790 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1791
1792 if (oh->class->reset) {
1793 r = oh->class->reset(oh);
1794 } else {
1795 if (oh->rst_lines_cnt > 0) {
1796 for (i = 0; i < oh->rst_lines_cnt; i++)
1797 _assert_hardreset(oh, oh->rst_lines[i].name);
1798 return 0;
1799 } else {
1800 r = _ocp_softreset(oh);
1801 if (r == -ENOENT)
1802 r = 0;
1803 }
1804 }
1805
1806 _set_dmadisable(oh);
1807
1808 /*
1809 * OCP_SYSCONFIG bits need to be reprogrammed after a
1810 * softreset. The _enable() function should be split to avoid
1811 * the rewrite of the OCP_SYSCONFIG register.
1812 */
1813 if (oh->class->sysc) {
1814 _update_sysc_cache(oh);
1815 _enable_sysc(oh);
1816 }
1817
1818 return r;
1819}
1820
1821/**
1822 * _omap4_update_context_lost - increment hwmod context loss counter if
1823 * hwmod context was lost, and clear hardware context loss reg
1824 * @oh: hwmod to check for context loss
1825 *
1826 * If the PRCM indicates that the hwmod @oh lost context, increment
1827 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1828 * bits. No return value.
1829 */
1830static void _omap4_update_context_lost(struct omap_hwmod *oh)
1831{
1832 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1833 return;
1834
1835 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1836 oh->clkdm->pwrdm.ptr->prcm_offs,
1837 oh->prcm.omap4.context_offs))
1838 return;
1839
1840 oh->prcm.omap4.context_lost_counter++;
1841 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1842 oh->clkdm->pwrdm.ptr->prcm_offs,
1843 oh->prcm.omap4.context_offs);
1844}
1845
1846/**
1847 * _omap4_get_context_lost - get context loss counter for a hwmod
1848 * @oh: hwmod to get context loss counter for
1849 *
1850 * Returns the in-memory context loss counter for a hwmod.
1851 */
1852static int _omap4_get_context_lost(struct omap_hwmod *oh)
1853{
1854 return oh->prcm.omap4.context_lost_counter;
1855}
1856
1857/**
1858 * _enable - enable an omap_hwmod
1859 * @oh: struct omap_hwmod *
1860 *
1861 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1862 * register target. Returns -EINVAL if the hwmod is in the wrong
1863 * state or passes along the return value of _wait_target_ready().
1864 */
1865static int _enable(struct omap_hwmod *oh)
1866{
1867 int r;
1868
1869 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1870
1871 /*
1872 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1873 * state at init.
1874 */
1875 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1876 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1877 return 0;
1878 }
1879
1880 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1881 oh->_state != _HWMOD_STATE_IDLE &&
1882 oh->_state != _HWMOD_STATE_DISABLED) {
1883 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1884 oh->name);
1885 return -EINVAL;
1886 }
1887
1888 /*
1889 * If an IP block contains HW reset lines and all of them are
1890 * asserted, we let integration code associated with that
1891 * block handle the enable. We've received very little
1892 * information on what those driver authors need, and until
1893 * detailed information is provided and the driver code is
1894 * posted to the public lists, this is probably the best we
1895 * can do.
1896 */
1897 if (_are_all_hardreset_lines_asserted(oh))
1898 return 0;
1899
1900 _add_initiator_dep(oh, mpu_oh);
1901
1902 if (oh->clkdm) {
1903 /*
1904 * A clockdomain must be in SW_SUP before enabling
1905 * completely the module. The clockdomain can be set
1906 * in HW_AUTO only when the module become ready.
1907 */
1908 clkdm_deny_idle(oh->clkdm);
1909 r = clkdm_hwmod_enable(oh->clkdm, oh);
1910 if (r) {
1911 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1912 oh->name, oh->clkdm->name, r);
1913 return r;
1914 }
1915 }
1916
1917 _enable_clocks(oh);
1918 if (soc_ops.enable_module)
1919 soc_ops.enable_module(oh);
1920 if (oh->flags & HWMOD_BLOCK_WFI)
1921 cpu_idle_poll_ctrl(true);
1922
1923 if (soc_ops.update_context_lost)
1924 soc_ops.update_context_lost(oh);
1925
1926 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1927 -EINVAL;
1928 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1929 clkdm_allow_idle(oh->clkdm);
1930
1931 if (!r) {
1932 oh->_state = _HWMOD_STATE_ENABLED;
1933
1934 /* Access the sysconfig only if the target is ready */
1935 if (oh->class->sysc) {
1936 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1937 _update_sysc_cache(oh);
1938 _enable_sysc(oh);
1939 }
1940 } else {
1941 if (soc_ops.disable_module)
1942 soc_ops.disable_module(oh);
1943 _disable_clocks(oh);
1944 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1945 oh->name, r);
1946
1947 if (oh->clkdm)
1948 clkdm_hwmod_disable(oh->clkdm, oh);
1949 }
1950
1951 return r;
1952}
1953
1954/**
1955 * _idle - idle an omap_hwmod
1956 * @oh: struct omap_hwmod *
1957 *
1958 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1959 * no further work. Returns -EINVAL if the hwmod is in the wrong
1960 * state or returns 0.
1961 */
1962static int _idle(struct omap_hwmod *oh)
1963{
1964 if (oh->flags & HWMOD_NO_IDLE) {
1965 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1966 return 0;
1967 }
1968
1969 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1970
1971 if (_are_all_hardreset_lines_asserted(oh))
1972 return 0;
1973
1974 if (oh->_state != _HWMOD_STATE_ENABLED) {
1975 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1976 oh->name);
1977 return -EINVAL;
1978 }
1979
1980 if (oh->class->sysc)
1981 _idle_sysc(oh);
1982 _del_initiator_dep(oh, mpu_oh);
1983
1984 /*
1985 * If HWMOD_CLKDM_NOAUTO is set then we don't
1986 * deny idle the clkdm again since idle was already denied
1987 * in _enable()
1988 */
1989 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1990 clkdm_deny_idle(oh->clkdm);
1991
1992 if (oh->flags & HWMOD_BLOCK_WFI)
1993 cpu_idle_poll_ctrl(false);
1994 if (soc_ops.disable_module)
1995 soc_ops.disable_module(oh);
1996
1997 /*
1998 * The module must be in idle mode before disabling any parents
1999 * clocks. Otherwise, the parent clock might be disabled before
2000 * the module transition is done, and thus will prevent the
2001 * transition to complete properly.
2002 */
2003 _disable_clocks(oh);
2004 if (oh->clkdm) {
2005 clkdm_allow_idle(oh->clkdm);
2006 clkdm_hwmod_disable(oh->clkdm, oh);
2007 }
2008
2009 oh->_state = _HWMOD_STATE_IDLE;
2010
2011 return 0;
2012}
2013
2014/**
2015 * _shutdown - shutdown an omap_hwmod
2016 * @oh: struct omap_hwmod *
2017 *
2018 * Shut down an omap_hwmod @oh. This should be called when the driver
2019 * used for the hwmod is removed or unloaded or if the driver is not
2020 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2021 * state or returns 0.
2022 */
2023static int _shutdown(struct omap_hwmod *oh)
2024{
2025 int ret, i;
2026 u8 prev_state;
2027
2028 if (_are_all_hardreset_lines_asserted(oh))
2029 return 0;
2030
2031 if (oh->_state != _HWMOD_STATE_IDLE &&
2032 oh->_state != _HWMOD_STATE_ENABLED) {
2033 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2034 oh->name);
2035 return -EINVAL;
2036 }
2037
2038 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2039
2040 if (oh->class->pre_shutdown) {
2041 prev_state = oh->_state;
2042 if (oh->_state == _HWMOD_STATE_IDLE)
2043 _enable(oh);
2044 ret = oh->class->pre_shutdown(oh);
2045 if (ret) {
2046 if (prev_state == _HWMOD_STATE_IDLE)
2047 _idle(oh);
2048 return ret;
2049 }
2050 }
2051
2052 if (oh->class->sysc) {
2053 if (oh->_state == _HWMOD_STATE_IDLE)
2054 _enable(oh);
2055 _shutdown_sysc(oh);
2056 }
2057
2058 /* clocks and deps are already disabled in idle */
2059 if (oh->_state == _HWMOD_STATE_ENABLED) {
2060 _del_initiator_dep(oh, mpu_oh);
2061 /* XXX what about the other system initiators here? dma, dsp */
2062 if (oh->flags & HWMOD_BLOCK_WFI)
2063 cpu_idle_poll_ctrl(false);
2064 if (soc_ops.disable_module)
2065 soc_ops.disable_module(oh);
2066 _disable_clocks(oh);
2067 if (oh->clkdm)
2068 clkdm_hwmod_disable(oh->clkdm, oh);
2069 }
2070 /* XXX Should this code also force-disable the optional clocks? */
2071
2072 for (i = 0; i < oh->rst_lines_cnt; i++)
2073 _assert_hardreset(oh, oh->rst_lines[i].name);
2074
2075 oh->_state = _HWMOD_STATE_DISABLED;
2076
2077 return 0;
2078}
2079
2080static int of_dev_find_hwmod(struct device_node *np,
2081 struct omap_hwmod *oh)
2082{
2083 int count, i, res;
2084 const char *p;
2085
2086 count = of_property_count_strings(np, "ti,hwmods");
2087 if (count < 1)
2088 return -ENODEV;
2089
2090 for (i = 0; i < count; i++) {
2091 res = of_property_read_string_index(np, "ti,hwmods",
2092 i, &p);
2093 if (res)
2094 continue;
2095 if (!strcmp(p, oh->name)) {
2096 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2097 np, i, oh->name);
2098 return i;
2099 }
2100 }
2101
2102 return -ENODEV;
2103}
2104
2105/**
2106 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2107 * @np: struct device_node *
2108 * @oh: struct omap_hwmod *
2109 * @index: index of the entry found
2110 * @found: struct device_node * found or NULL
2111 *
2112 * Parse the dt blob and find out needed hwmod. Recursive function is
2113 * implemented to take care hierarchical dt blob parsing.
2114 * Return: Returns 0 on success, -ENODEV when not found.
2115 */
2116static int of_dev_hwmod_lookup(struct device_node *np,
2117 struct omap_hwmod *oh,
2118 int *index,
2119 struct device_node **found)
2120{
2121 struct device_node *np0 = NULL;
2122 int res;
2123
2124 res = of_dev_find_hwmod(np, oh);
2125 if (res >= 0) {
2126 *found = np;
2127 *index = res;
2128 return 0;
2129 }
2130
2131 for_each_child_of_node(np, np0) {
2132 struct device_node *fc;
2133 int i;
2134
2135 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2136 if (res == 0) {
2137 *found = fc;
2138 *index = i;
2139 of_node_put(np0);
2140 return 0;
2141 }
2142 }
2143
2144 *found = NULL;
2145 *index = 0;
2146
2147 return -ENODEV;
2148}
2149
2150/**
2151 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2152 *
2153 * @oh: struct omap_hwmod *
2154 * @np: struct device_node *
2155 *
2156 * Fix up module register offsets for modules with mpu_rt_idx.
2157 * Only needed for cpsw with interconnect target module defined
2158 * in device tree while still using legacy hwmod platform data
2159 * for rev, sysc and syss registers.
2160 *
2161 * Can be removed when all cpsw hwmod platform data has been
2162 * dropped.
2163 */
2164static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2165 struct device_node *np,
2166 struct resource *res)
2167{
2168 struct device_node *child = NULL;
2169 int error;
2170
2171 child = of_get_next_child(np, child);
2172 if (!child)
2173 return;
2174
2175 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2176 if (error)
2177 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2178 __func__, error);
2179}
2180
2181/**
2182 * omap_hwmod_parse_module_range - map module IO range from device tree
2183 * @oh: struct omap_hwmod *
2184 * @np: struct device_node *
2185 *
2186 * Parse the device tree range an interconnect target module provides
2187 * for it's child device IP blocks. This way we can support the old
2188 * "ti,hwmods" property with just dts data without a need for platform
2189 * data for IO resources. And we don't need all the child IP device
2190 * nodes available in the dts.
2191 */
2192int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2193 struct device_node *np,
2194 struct resource *res)
2195{
2196 struct property *prop;
2197 const char *name;
2198 int err;
2199
2200 of_property_for_each_string(np, "compatible", prop, name)
2201 if (!strncmp("ti,sysc-", name, 8))
2202 break;
2203
2204 if (!name)
2205 return -ENOENT;
2206
2207 err = of_range_to_resource(np, 0, res);
2208 if (err)
2209 return err;
2210
2211 pr_debug("omap_hwmod: %s %pOFn at %pR\n",
2212 oh->name, np, res);
2213
2214 if (oh && oh->mpu_rt_idx) {
2215 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2216
2217 return 0;
2218 }
2219
2220 return 0;
2221}
2222
2223/**
2224 * _init_mpu_rt_base - populate the virtual address for a hwmod
2225 * @oh: struct omap_hwmod * to locate the virtual address
2226 * @data: (unused, caller should pass NULL)
2227 * @index: index of the reg entry iospace in device tree
2228 * @np: struct device_node * of the IP block's device node in the DT data
2229 *
2230 * Cache the virtual address used by the MPU to access this IP block's
2231 * registers. This address is needed early so the OCP registers that
2232 * are part of the device's address space can be ioremapped properly.
2233 *
2234 * If SYSC access is not needed, the registers will not be remapped
2235 * and non-availability of MPU access is not treated as an error.
2236 *
2237 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2238 * -ENXIO on absent or invalid register target address space.
2239 */
2240static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2241 int index, struct device_node *np)
2242{
2243 void __iomem *va_start = NULL;
2244 struct resource res;
2245 int error;
2246
2247 if (!oh)
2248 return -EINVAL;
2249
2250 _save_mpu_port_index(oh);
2251
2252 /* if we don't need sysc access we don't need to ioremap */
2253 if (!oh->class->sysc)
2254 return 0;
2255
2256 /* we can't continue without MPU PORT if we need sysc access */
2257 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2258 return -ENXIO;
2259
2260 if (!np) {
2261 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2262 return -ENXIO;
2263 }
2264
2265 /* Do we have a dts range for the interconnect target module? */
2266 error = omap_hwmod_parse_module_range(oh, np, &res);
2267 if (!error)
2268 va_start = ioremap(res.start, resource_size(&res));
2269
2270 /* No ranges, rely on device reg entry */
2271 if (!va_start)
2272 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2273 if (!va_start) {
2274 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2275 oh->name, index, np);
2276 return -ENXIO;
2277 }
2278
2279 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2280 oh->name, va_start);
2281
2282 oh->_mpu_rt_va = va_start;
2283 return 0;
2284}
2285
2286static void __init parse_module_flags(struct omap_hwmod *oh,
2287 struct device_node *np)
2288{
2289 if (of_property_read_bool(np, "ti,no-reset-on-init"))
2290 oh->flags |= HWMOD_INIT_NO_RESET;
2291 if (of_property_read_bool(np, "ti,no-idle-on-init"))
2292 oh->flags |= HWMOD_INIT_NO_IDLE;
2293 if (of_property_read_bool(np, "ti,no-idle"))
2294 oh->flags |= HWMOD_NO_IDLE;
2295}
2296
2297/**
2298 * _init - initialize internal data for the hwmod @oh
2299 * @oh: struct omap_hwmod *
2300 * @data: (unused)
2301 *
2302 * Look up the clocks and the address space used by the MPU to access
2303 * registers belonging to the hwmod @oh. @oh must already be
2304 * registered at this point. This is the first of two phases for
2305 * hwmod initialization. Code called here does not touch any hardware
2306 * registers, it simply prepares internal data structures. Returns 0
2307 * upon success or if the hwmod isn't registered or if the hwmod's
2308 * address space is not defined, or -EINVAL upon failure.
2309 */
2310static int __init _init(struct omap_hwmod *oh, void *data)
2311{
2312 int r, index;
2313 struct device_node *np = NULL;
2314 struct device_node *bus;
2315
2316 if (oh->_state != _HWMOD_STATE_REGISTERED)
2317 return 0;
2318
2319 bus = of_find_node_by_name(NULL, "ocp");
2320 if (!bus)
2321 return -ENODEV;
2322
2323 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2324 if (r)
2325 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2326 else if (np && index)
2327 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2328 oh->name, np);
2329
2330 r = _init_mpu_rt_base(oh, NULL, index, np);
2331 if (r < 0) {
2332 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2333 oh->name);
2334 return 0;
2335 }
2336
2337 r = _init_clocks(oh, np);
2338 if (r < 0) {
2339 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2340 return -EINVAL;
2341 }
2342
2343 if (np) {
2344 struct device_node *child;
2345
2346 parse_module_flags(oh, np);
2347 child = of_get_next_child(np, NULL);
2348 if (child)
2349 parse_module_flags(oh, child);
2350 }
2351
2352 oh->_state = _HWMOD_STATE_INITIALIZED;
2353
2354 return 0;
2355}
2356
2357/**
2358 * _setup_iclk_autoidle - configure an IP block's interface clocks
2359 * @oh: struct omap_hwmod *
2360 *
2361 * Set up the module's interface clocks. XXX This function is still mostly
2362 * a stub; implementing this properly requires iclk autoidle usecounting in
2363 * the clock code. No return value.
2364 */
2365static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2366{
2367 struct omap_hwmod_ocp_if *os;
2368
2369 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2370 return;
2371
2372 list_for_each_entry(os, &oh->slave_ports, node) {
2373 if (!os->_clk)
2374 continue;
2375
2376 if (os->flags & OCPIF_SWSUP_IDLE) {
2377 /*
2378 * we might have multiple users of one iclk with
2379 * different requirements, disable autoidle when
2380 * the module is enabled, e.g. dss iclk
2381 */
2382 } else {
2383 /* we are enabling autoidle afterwards anyways */
2384 clk_enable(os->_clk);
2385 }
2386 }
2387
2388 return;
2389}
2390
2391/**
2392 * _setup_reset - reset an IP block during the setup process
2393 * @oh: struct omap_hwmod *
2394 *
2395 * Reset the IP block corresponding to the hwmod @oh during the setup
2396 * process. The IP block is first enabled so it can be successfully
2397 * reset. Returns 0 upon success or a negative error code upon
2398 * failure.
2399 */
2400static int _setup_reset(struct omap_hwmod *oh)
2401{
2402 int r = 0;
2403
2404 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2405 return -EINVAL;
2406
2407 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2408 return -EPERM;
2409
2410 if (oh->rst_lines_cnt == 0) {
2411 r = _enable(oh);
2412 if (r) {
2413 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2414 oh->name, oh->_state);
2415 return -EINVAL;
2416 }
2417 }
2418
2419 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2420 r = _reset(oh);
2421
2422 return r;
2423}
2424
2425/**
2426 * _setup_postsetup - transition to the appropriate state after _setup
2427 * @oh: struct omap_hwmod *
2428 *
2429 * Place an IP block represented by @oh into a "post-setup" state --
2430 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2431 * this function is called at the end of _setup().) The postsetup
2432 * state for an IP block can be changed by calling
2433 * omap_hwmod_enter_postsetup_state() early in the boot process,
2434 * before one of the omap_hwmod_setup*() functions are called for the
2435 * IP block.
2436 *
2437 * The IP block stays in this state until a PM runtime-based driver is
2438 * loaded for that IP block. A post-setup state of IDLE is
2439 * appropriate for almost all IP blocks with runtime PM-enabled
2440 * drivers, since those drivers are able to enable the IP block. A
2441 * post-setup state of ENABLED is appropriate for kernels with PM
2442 * runtime disabled. The DISABLED state is appropriate for unusual IP
2443 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2444 * included, since the WDTIMER starts running on reset and will reset
2445 * the MPU if left active.
2446 *
2447 * This post-setup mechanism is deprecated. Once all of the OMAP
2448 * drivers have been converted to use PM runtime, and all of the IP
2449 * block data and interconnect data is available to the hwmod code, it
2450 * should be possible to replace this mechanism with a "lazy reset"
2451 * arrangement. In a "lazy reset" setup, each IP block is enabled
2452 * when the driver first probes, then all remaining IP blocks without
2453 * drivers are either shut down or enabled after the drivers have
2454 * loaded. However, this cannot take place until the above
2455 * preconditions have been met, since otherwise the late reset code
2456 * has no way of knowing which IP blocks are in use by drivers, and
2457 * which ones are unused.
2458 *
2459 * No return value.
2460 */
2461static void _setup_postsetup(struct omap_hwmod *oh)
2462{
2463 u8 postsetup_state;
2464
2465 if (oh->rst_lines_cnt > 0)
2466 return;
2467
2468 postsetup_state = oh->_postsetup_state;
2469 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2470 postsetup_state = _HWMOD_STATE_ENABLED;
2471
2472 /*
2473 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2474 * it should be set by the core code as a runtime flag during startup
2475 */
2476 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2477 (postsetup_state == _HWMOD_STATE_IDLE)) {
2478 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2479 postsetup_state = _HWMOD_STATE_ENABLED;
2480 }
2481
2482 if (postsetup_state == _HWMOD_STATE_IDLE)
2483 _idle(oh);
2484 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2485 _shutdown(oh);
2486 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2487 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2488 oh->name, postsetup_state);
2489
2490 return;
2491}
2492
2493/**
2494 * _setup - prepare IP block hardware for use
2495 * @oh: struct omap_hwmod *
2496 * @data: (unused, pass NULL)
2497 *
2498 * Configure the IP block represented by @oh. This may include
2499 * enabling the IP block, resetting it, and placing it into a
2500 * post-setup state, depending on the type of IP block and applicable
2501 * flags. IP blocks are reset to prevent any previous configuration
2502 * by the bootloader or previous operating system from interfering
2503 * with power management or other parts of the system. The reset can
2504 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2505 * two phases for hwmod initialization. Code called here generally
2506 * affects the IP block hardware, or system integration hardware
2507 * associated with the IP block. Returns 0.
2508 */
2509static int _setup(struct omap_hwmod *oh, void *data)
2510{
2511 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2512 return 0;
2513
2514 if (oh->parent_hwmod) {
2515 int r;
2516
2517 r = _enable(oh->parent_hwmod);
2518 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2519 oh->name, oh->parent_hwmod->name);
2520 }
2521
2522 _setup_iclk_autoidle(oh);
2523
2524 if (!_setup_reset(oh))
2525 _setup_postsetup(oh);
2526
2527 if (oh->parent_hwmod) {
2528 u8 postsetup_state;
2529
2530 postsetup_state = oh->parent_hwmod->_postsetup_state;
2531
2532 if (postsetup_state == _HWMOD_STATE_IDLE)
2533 _idle(oh->parent_hwmod);
2534 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2535 _shutdown(oh->parent_hwmod);
2536 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2537 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2538 oh->parent_hwmod->name, postsetup_state);
2539 }
2540
2541 return 0;
2542}
2543
2544/**
2545 * _register - register a struct omap_hwmod
2546 * @oh: struct omap_hwmod *
2547 *
2548 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2549 * already has been registered by the same name; -EINVAL if the
2550 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2551 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2552 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2553 * success.
2554 *
2555 * XXX The data should be copied into bootmem, so the original data
2556 * should be marked __initdata and freed after init. This would allow
2557 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2558 * that the copy process would be relatively complex due to the large number
2559 * of substructures.
2560 */
2561static int _register(struct omap_hwmod *oh)
2562{
2563 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2564 (oh->_state != _HWMOD_STATE_UNKNOWN))
2565 return -EINVAL;
2566
2567 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2568
2569 if (_lookup(oh->name))
2570 return -EEXIST;
2571
2572 list_add_tail(&oh->node, &omap_hwmod_list);
2573
2574 INIT_LIST_HEAD(&oh->slave_ports);
2575 spin_lock_init(&oh->_lock);
2576 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2577
2578 oh->_state = _HWMOD_STATE_REGISTERED;
2579
2580 /*
2581 * XXX Rather than doing a strcmp(), this should test a flag
2582 * set in the hwmod data, inserted by the autogenerator code.
2583 */
2584 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2585 mpu_oh = oh;
2586
2587 return 0;
2588}
2589
2590/**
2591 * _add_link - add an interconnect between two IP blocks
2592 * @oi: pointer to a struct omap_hwmod_ocp_if record
2593 *
2594 * Add struct omap_hwmod_link records connecting the slave IP block
2595 * specified in @oi->slave to @oi. This code is assumed to run before
2596 * preemption or SMP has been enabled, thus avoiding the need for
2597 * locking in this code. Changes to this assumption will require
2598 * additional locking. Returns 0.
2599 */
2600static int _add_link(struct omap_hwmod_ocp_if *oi)
2601{
2602 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2603 oi->slave->name);
2604
2605 list_add(&oi->node, &oi->slave->slave_ports);
2606 oi->slave->slaves_cnt++;
2607
2608 return 0;
2609}
2610
2611/**
2612 * _register_link - register a struct omap_hwmod_ocp_if
2613 * @oi: struct omap_hwmod_ocp_if *
2614 *
2615 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2616 * has already been registered; -EINVAL if @oi is NULL or if the
2617 * record pointed to by @oi is missing required fields; or 0 upon
2618 * success.
2619 *
2620 * XXX The data should be copied into bootmem, so the original data
2621 * should be marked __initdata and freed after init. This would allow
2622 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2623 */
2624static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2625{
2626 if (!oi || !oi->master || !oi->slave || !oi->user)
2627 return -EINVAL;
2628
2629 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2630 return -EEXIST;
2631
2632 pr_debug("omap_hwmod: registering link from %s to %s\n",
2633 oi->master->name, oi->slave->name);
2634
2635 /*
2636 * Register the connected hwmods, if they haven't been
2637 * registered already
2638 */
2639 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2640 _register(oi->master);
2641
2642 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2643 _register(oi->slave);
2644
2645 _add_link(oi);
2646
2647 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2648
2649 return 0;
2650}
2651
2652/* Static functions intended only for use in soc_ops field function pointers */
2653
2654/**
2655 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2656 * @oh: struct omap_hwmod *
2657 *
2658 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2659 * does not have an IDLEST bit or if the module successfully leaves
2660 * slave idle; otherwise, pass along the return value of the
2661 * appropriate *_cm*_wait_module_ready() function.
2662 */
2663static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2664{
2665 if (!oh)
2666 return -EINVAL;
2667
2668 if (oh->flags & HWMOD_NO_IDLEST)
2669 return 0;
2670
2671 if (!_find_mpu_rt_port(oh))
2672 return 0;
2673
2674 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2675
2676 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2677 oh->prcm.omap2.idlest_reg_id,
2678 oh->prcm.omap2.idlest_idle_bit);
2679}
2680
2681/**
2682 * _omap4_wait_target_ready - wait for a module to leave slave idle
2683 * @oh: struct omap_hwmod *
2684 *
2685 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2686 * does not have an IDLEST bit or if the module successfully leaves
2687 * slave idle; otherwise, pass along the return value of the
2688 * appropriate *_cm*_wait_module_ready() function.
2689 */
2690static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2691{
2692 if (!oh)
2693 return -EINVAL;
2694
2695 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2696 return 0;
2697
2698 if (!_find_mpu_rt_port(oh))
2699 return 0;
2700
2701 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2702 return 0;
2703
2704 if (!_omap4_has_clkctrl_clock(oh))
2705 return 0;
2706
2707 /* XXX check module SIDLEMODE, hardreset status */
2708
2709 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2710 oh->clkdm->cm_inst,
2711 oh->prcm.omap4.clkctrl_offs, 0);
2712}
2713
2714/**
2715 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2716 * @oh: struct omap_hwmod * to assert hardreset
2717 * @ohri: hardreset line data
2718 *
2719 * Call omap2_prm_assert_hardreset() with parameters extracted from
2720 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2721 * use as an soc_ops function pointer. Passes along the return value
2722 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2723 * for removal when the PRM code is moved into drivers/.
2724 */
2725static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2726 struct omap_hwmod_rst_info *ohri)
2727{
2728 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2729 oh->prcm.omap2.module_offs, 0);
2730}
2731
2732/**
2733 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2734 * @oh: struct omap_hwmod * to deassert hardreset
2735 * @ohri: hardreset line data
2736 *
2737 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2738 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2739 * use as an soc_ops function pointer. Passes along the return value
2740 * from omap2_prm_deassert_hardreset(). XXX This function is
2741 * scheduled for removal when the PRM code is moved into drivers/.
2742 */
2743static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2744 struct omap_hwmod_rst_info *ohri)
2745{
2746 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2747 oh->prcm.omap2.module_offs, 0, 0);
2748}
2749
2750/**
2751 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2752 * @oh: struct omap_hwmod * to test hardreset
2753 * @ohri: hardreset line data
2754 *
2755 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2756 * from the hwmod @oh and the hardreset line data @ohri. Only
2757 * intended for use as an soc_ops function pointer. Passes along the
2758 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2759 * function is scheduled for removal when the PRM code is moved into
2760 * drivers/.
2761 */
2762static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2763 struct omap_hwmod_rst_info *ohri)
2764{
2765 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2766 oh->prcm.omap2.module_offs, 0);
2767}
2768
2769/**
2770 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2771 * @oh: struct omap_hwmod * to assert hardreset
2772 * @ohri: hardreset line data
2773 *
2774 * Call omap4_prminst_assert_hardreset() with parameters extracted
2775 * from the hwmod @oh and the hardreset line data @ohri. Only
2776 * intended for use as an soc_ops function pointer. Passes along the
2777 * return value from omap4_prminst_assert_hardreset(). XXX This
2778 * function is scheduled for removal when the PRM code is moved into
2779 * drivers/.
2780 */
2781static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2782 struct omap_hwmod_rst_info *ohri)
2783{
2784 if (!oh->clkdm)
2785 return -EINVAL;
2786
2787 return omap_prm_assert_hardreset(ohri->rst_shift,
2788 oh->clkdm->pwrdm.ptr->prcm_partition,
2789 oh->clkdm->pwrdm.ptr->prcm_offs,
2790 oh->prcm.omap4.rstctrl_offs);
2791}
2792
2793/**
2794 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2795 * @oh: struct omap_hwmod * to deassert hardreset
2796 * @ohri: hardreset line data
2797 *
2798 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2799 * from the hwmod @oh and the hardreset line data @ohri. Only
2800 * intended for use as an soc_ops function pointer. Passes along the
2801 * return value from omap4_prminst_deassert_hardreset(). XXX This
2802 * function is scheduled for removal when the PRM code is moved into
2803 * drivers/.
2804 */
2805static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2806 struct omap_hwmod_rst_info *ohri)
2807{
2808 if (!oh->clkdm)
2809 return -EINVAL;
2810
2811 if (ohri->st_shift)
2812 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2813 oh->name, ohri->name);
2814 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2815 oh->clkdm->pwrdm.ptr->prcm_partition,
2816 oh->clkdm->pwrdm.ptr->prcm_offs,
2817 oh->prcm.omap4.rstctrl_offs,
2818 oh->prcm.omap4.rstctrl_offs +
2819 OMAP4_RST_CTRL_ST_OFFSET);
2820}
2821
2822/**
2823 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2824 * @oh: struct omap_hwmod * to test hardreset
2825 * @ohri: hardreset line data
2826 *
2827 * Call omap4_prminst_is_hardreset_asserted() with parameters
2828 * extracted from the hwmod @oh and the hardreset line data @ohri.
2829 * Only intended for use as an soc_ops function pointer. Passes along
2830 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2831 * This function is scheduled for removal when the PRM code is moved
2832 * into drivers/.
2833 */
2834static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2835 struct omap_hwmod_rst_info *ohri)
2836{
2837 if (!oh->clkdm)
2838 return -EINVAL;
2839
2840 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2841 oh->clkdm->pwrdm.ptr->
2842 prcm_partition,
2843 oh->clkdm->pwrdm.ptr->prcm_offs,
2844 oh->prcm.omap4.rstctrl_offs);
2845}
2846
2847/**
2848 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2849 * @oh: struct omap_hwmod * to disable control for
2850 *
2851 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2852 * will be using its main_clk to enable/disable the module. Returns
2853 * 0 if successful.
2854 */
2855static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2856{
2857 if (!oh)
2858 return -EINVAL;
2859
2860 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2861
2862 return 0;
2863}
2864
2865/**
2866 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2867 * @oh: struct omap_hwmod * to deassert hardreset
2868 * @ohri: hardreset line data
2869 *
2870 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2871 * from the hwmod @oh and the hardreset line data @ohri. Only
2872 * intended for use as an soc_ops function pointer. Passes along the
2873 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2874 * function is scheduled for removal when the PRM code is moved into
2875 * drivers/.
2876 */
2877static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2878 struct omap_hwmod_rst_info *ohri)
2879{
2880 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2881 oh->clkdm->pwrdm.ptr->prcm_partition,
2882 oh->clkdm->pwrdm.ptr->prcm_offs,
2883 oh->prcm.omap4.rstctrl_offs,
2884 oh->prcm.omap4.rstst_offs);
2885}
2886
2887/* Public functions */
2888
2889u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2890{
2891 if (oh->flags & HWMOD_16BIT_REG)
2892 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2893 else
2894 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2895}
2896
2897void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2898{
2899 if (oh->flags & HWMOD_16BIT_REG)
2900 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2901 else
2902 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2903}
2904
2905/**
2906 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2907 * @oh: struct omap_hwmod *
2908 *
2909 * This is a public function exposed to drivers. Some drivers may need to do
2910 * some settings before and after resetting the device. Those drivers after
2911 * doing the necessary settings could use this function to start a reset by
2912 * setting the SYSCONFIG.SOFTRESET bit.
2913 */
2914int omap_hwmod_softreset(struct omap_hwmod *oh)
2915{
2916 u32 v;
2917 int ret;
2918
2919 if (!oh || !(oh->_sysc_cache))
2920 return -EINVAL;
2921
2922 v = oh->_sysc_cache;
2923 ret = _set_softreset(oh, &v);
2924 if (ret)
2925 goto error;
2926 _write_sysconfig(v, oh);
2927
2928 ret = _clear_softreset(oh, &v);
2929 if (ret)
2930 goto error;
2931 _write_sysconfig(v, oh);
2932
2933error:
2934 return ret;
2935}
2936
2937/**
2938 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2939 * @name: name of the omap_hwmod to look up
2940 *
2941 * Given a @name of an omap_hwmod, return a pointer to the registered
2942 * struct omap_hwmod *, or NULL upon error.
2943 */
2944struct omap_hwmod *omap_hwmod_lookup(const char *name)
2945{
2946 struct omap_hwmod *oh;
2947
2948 if (!name)
2949 return NULL;
2950
2951 oh = _lookup(name);
2952
2953 return oh;
2954}
2955
2956/**
2957 * omap_hwmod_for_each - call function for each registered omap_hwmod
2958 * @fn: pointer to a callback function
2959 * @data: void * data to pass to callback function
2960 *
2961 * Call @fn for each registered omap_hwmod, passing @data to each
2962 * function. @fn must return 0 for success or any other value for
2963 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2964 * will stop and the non-zero return value will be passed to the
2965 * caller of omap_hwmod_for_each(). @fn is called with
2966 * omap_hwmod_for_each() held.
2967 */
2968int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2969 void *data)
2970{
2971 struct omap_hwmod *temp_oh;
2972 int ret = 0;
2973
2974 if (!fn)
2975 return -EINVAL;
2976
2977 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2978 ret = (*fn)(temp_oh, data);
2979 if (ret)
2980 break;
2981 }
2982
2983 return ret;
2984}
2985
2986/**
2987 * omap_hwmod_register_links - register an array of hwmod links
2988 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2989 *
2990 * Intended to be called early in boot before the clock framework is
2991 * initialized. If @ois is not null, will register all omap_hwmods
2992 * listed in @ois that are valid for this chip. Returns -EINVAL if
2993 * omap_hwmod_init() hasn't been called before calling this function,
2994 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2995 * success.
2996 */
2997int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2998{
2999 int r, i;
3000
3001 if (!inited)
3002 return -EINVAL;
3003
3004 if (!ois)
3005 return 0;
3006
3007 if (ois[0] == NULL) /* Empty list */
3008 return 0;
3009
3010 i = 0;
3011 do {
3012 r = _register_link(ois[i]);
3013 WARN(r && r != -EEXIST,
3014 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3015 ois[i]->master->name, ois[i]->slave->name, r);
3016 } while (ois[++i]);
3017
3018 return 0;
3019}
3020
3021static int __init omap_hwmod_setup_one(const char *oh_name);
3022
3023/**
3024 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3025 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3026 *
3027 * If the hwmod data corresponding to the MPU subsystem IP block
3028 * hasn't been initialized and set up yet, do so now. This must be
3029 * done first since sleep dependencies may be added from other hwmods
3030 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3031 * return value.
3032 */
3033static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3034{
3035 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3036 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3037 __func__, MPU_INITIATOR_NAME);
3038 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3039 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3040}
3041
3042/**
3043 * omap_hwmod_setup_one - set up a single hwmod
3044 * @oh_name: const char * name of the already-registered hwmod to set up
3045 *
3046 * Initialize and set up a single hwmod. Intended to be used for a
3047 * small number of early devices, such as the timer IP blocks used for
3048 * the scheduler clock. Must be called after omap2_clk_init().
3049 * Resolves the struct clk names to struct clk pointers for each
3050 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3051 * -EINVAL upon error or 0 upon success.
3052 */
3053static int __init omap_hwmod_setup_one(const char *oh_name)
3054{
3055 struct omap_hwmod *oh;
3056
3057 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3058
3059 oh = _lookup(oh_name);
3060 if (!oh) {
3061 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3062 return -EINVAL;
3063 }
3064
3065 _ensure_mpu_hwmod_is_setup(oh);
3066
3067 _init(oh, NULL);
3068 _setup(oh, NULL);
3069
3070 return 0;
3071}
3072
3073static void omap_hwmod_check_one(struct device *dev,
3074 const char *name, s8 v1, u8 v2)
3075{
3076 if (v1 < 0)
3077 return;
3078
3079 if (v1 != v2)
3080 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3081}
3082
3083/**
3084 * omap_hwmod_check_sysc - check sysc against platform sysc
3085 * @dev: struct device
3086 * @data: module data
3087 * @sysc_fields: new sysc configuration
3088 */
3089static int omap_hwmod_check_sysc(struct device *dev,
3090 const struct ti_sysc_module_data *data,
3091 struct sysc_regbits *sysc_fields)
3092{
3093 const struct sysc_regbits *regbits = data->cap->regbits;
3094
3095 omap_hwmod_check_one(dev, "dmadisable_shift",
3096 regbits->dmadisable_shift,
3097 sysc_fields->dmadisable_shift);
3098 omap_hwmod_check_one(dev, "midle_shift",
3099 regbits->midle_shift,
3100 sysc_fields->midle_shift);
3101 omap_hwmod_check_one(dev, "sidle_shift",
3102 regbits->sidle_shift,
3103 sysc_fields->sidle_shift);
3104 omap_hwmod_check_one(dev, "clkact_shift",
3105 regbits->clkact_shift,
3106 sysc_fields->clkact_shift);
3107 omap_hwmod_check_one(dev, "enwkup_shift",
3108 regbits->enwkup_shift,
3109 sysc_fields->enwkup_shift);
3110 omap_hwmod_check_one(dev, "srst_shift",
3111 regbits->srst_shift,
3112 sysc_fields->srst_shift);
3113 omap_hwmod_check_one(dev, "autoidle_shift",
3114 regbits->autoidle_shift,
3115 sysc_fields->autoidle_shift);
3116
3117 return 0;
3118}
3119
3120/**
3121 * omap_hwmod_init_regbits - init sysconfig specific register bits
3122 * @dev: struct device
3123 * @oh: module
3124 * @data: module data
3125 * @sysc_fields: new sysc configuration
3126 */
3127static int omap_hwmod_init_regbits(struct device *dev, struct omap_hwmod *oh,
3128 const struct ti_sysc_module_data *data,
3129 struct sysc_regbits **sysc_fields)
3130{
3131 switch (data->cap->type) {
3132 case TI_SYSC_OMAP2:
3133 case TI_SYSC_OMAP2_TIMER:
3134 *sysc_fields = &omap_hwmod_sysc_type1;
3135 break;
3136 case TI_SYSC_OMAP3_SHAM:
3137 *sysc_fields = &omap3_sham_sysc_fields;
3138 break;
3139 case TI_SYSC_OMAP3_AES:
3140 *sysc_fields = &omap3xxx_aes_sysc_fields;
3141 break;
3142 case TI_SYSC_OMAP4:
3143 case TI_SYSC_OMAP4_TIMER:
3144 *sysc_fields = &omap_hwmod_sysc_type2;
3145 break;
3146 case TI_SYSC_OMAP4_SIMPLE:
3147 *sysc_fields = &omap_hwmod_sysc_type3;
3148 break;
3149 case TI_SYSC_OMAP34XX_SR:
3150 *sysc_fields = &omap34xx_sr_sysc_fields;
3151 break;
3152 case TI_SYSC_OMAP36XX_SR:
3153 *sysc_fields = &omap36xx_sr_sysc_fields;
3154 break;
3155 case TI_SYSC_OMAP4_SR:
3156 *sysc_fields = &omap36xx_sr_sysc_fields;
3157 break;
3158 case TI_SYSC_OMAP4_MCASP:
3159 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3160 break;
3161 case TI_SYSC_OMAP4_USB_HOST_FS:
3162 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3163 break;
3164 default:
3165 *sysc_fields = NULL;
3166 if (!oh->class->sysc->sysc_fields)
3167 return 0;
3168
3169 dev_err(dev, "sysc_fields not found\n");
3170
3171 return -EINVAL;
3172 }
3173
3174 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3175}
3176
3177/**
3178 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3179 * @dev: struct device
3180 * @data: module data
3181 * @rev_offs: revision register offset
3182 * @sysc_offs: sysc register offset
3183 * @syss_offs: syss register offset
3184 */
3185static int omap_hwmod_init_reg_offs(struct device *dev,
3186 const struct ti_sysc_module_data *data,
3187 s32 *rev_offs, s32 *sysc_offs,
3188 s32 *syss_offs)
3189{
3190 *rev_offs = -ENODEV;
3191 *sysc_offs = 0;
3192 *syss_offs = 0;
3193
3194 if (data->offsets[SYSC_REVISION] >= 0)
3195 *rev_offs = data->offsets[SYSC_REVISION];
3196
3197 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3198 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3199
3200 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3201 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3202
3203 return 0;
3204}
3205
3206/**
3207 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3208 * @dev: struct device
3209 * @data: module data
3210 * @sysc_flags: module configuration
3211 */
3212static int omap_hwmod_init_sysc_flags(struct device *dev,
3213 const struct ti_sysc_module_data *data,
3214 u32 *sysc_flags)
3215{
3216 *sysc_flags = 0;
3217
3218 switch (data->cap->type) {
3219 case TI_SYSC_OMAP2:
3220 case TI_SYSC_OMAP2_TIMER:
3221 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3222 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3223 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3224 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3225 *sysc_flags |= SYSC_HAS_EMUFREE;
3226 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3227 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3228 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3229 *sysc_flags |= SYSC_HAS_SOFTRESET;
3230 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3231 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3232 break;
3233 case TI_SYSC_OMAP4:
3234 case TI_SYSC_OMAP4_TIMER:
3235 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3236 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3237 *sysc_flags |= SYSC_HAS_DMADISABLE;
3238 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3239 *sysc_flags |= SYSC_HAS_EMUFREE;
3240 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3241 *sysc_flags |= SYSC_HAS_SOFTRESET;
3242 break;
3243 case TI_SYSC_OMAP34XX_SR:
3244 case TI_SYSC_OMAP36XX_SR:
3245 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3246 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3247 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3248 break;
3249 default:
3250 if (data->cap->regbits->emufree_shift >= 0)
3251 *sysc_flags |= SYSC_HAS_EMUFREE;
3252 if (data->cap->regbits->enwkup_shift >= 0)
3253 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3254 if (data->cap->regbits->srst_shift >= 0)
3255 *sysc_flags |= SYSC_HAS_SOFTRESET;
3256 if (data->cap->regbits->autoidle_shift >= 0)
3257 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3258 break;
3259 }
3260
3261 if (data->cap->regbits->midle_shift >= 0 &&
3262 data->cfg->midlemodes)
3263 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3264
3265 if (data->cap->regbits->sidle_shift >= 0 &&
3266 data->cfg->sidlemodes)
3267 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3268
3269 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3270 *sysc_flags |= SYSC_NO_CACHE;
3271 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3272 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3273
3274 if (data->cfg->syss_mask & 1)
3275 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3276
3277 return 0;
3278}
3279
3280/**
3281 * omap_hwmod_init_idlemodes - initialize module idle modes
3282 * @dev: struct device
3283 * @data: module data
3284 * @idlemodes: module supported idle modes
3285 */
3286static int omap_hwmod_init_idlemodes(struct device *dev,
3287 const struct ti_sysc_module_data *data,
3288 u32 *idlemodes)
3289{
3290 *idlemodes = 0;
3291
3292 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3293 *idlemodes |= MSTANDBY_FORCE;
3294 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3295 *idlemodes |= MSTANDBY_NO;
3296 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3297 *idlemodes |= MSTANDBY_SMART;
3298 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3299 *idlemodes |= MSTANDBY_SMART_WKUP;
3300
3301 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3302 *idlemodes |= SIDLE_FORCE;
3303 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3304 *idlemodes |= SIDLE_NO;
3305 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3306 *idlemodes |= SIDLE_SMART;
3307 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3308 *idlemodes |= SIDLE_SMART_WKUP;
3309
3310 return 0;
3311}
3312
3313/**
3314 * omap_hwmod_check_module - check new module against platform data
3315 * @dev: struct device
3316 * @oh: module
3317 * @data: new module data
3318 * @sysc_fields: sysc register bits
3319 * @rev_offs: revision register offset
3320 * @sysc_offs: sysconfig register offset
3321 * @syss_offs: sysstatus register offset
3322 * @sysc_flags: sysc specific flags
3323 * @idlemodes: sysc supported idlemodes
3324 */
3325static int omap_hwmod_check_module(struct device *dev,
3326 struct omap_hwmod *oh,
3327 const struct ti_sysc_module_data *data,
3328 struct sysc_regbits *sysc_fields,
3329 s32 rev_offs, s32 sysc_offs,
3330 s32 syss_offs, u32 sysc_flags,
3331 u32 idlemodes)
3332{
3333 if (!oh->class->sysc)
3334 return -ENODEV;
3335
3336 if (oh->class->sysc->sysc_fields &&
3337 sysc_fields != oh->class->sysc->sysc_fields)
3338 dev_warn(dev, "sysc_fields mismatch\n");
3339
3340 if (rev_offs != oh->class->sysc->rev_offs)
3341 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3342 oh->class->sysc->rev_offs);
3343 if (sysc_offs != oh->class->sysc->sysc_offs)
3344 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3345 oh->class->sysc->sysc_offs);
3346 if (syss_offs != oh->class->sysc->syss_offs)
3347 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3348 oh->class->sysc->syss_offs);
3349
3350 if (sysc_flags != oh->class->sysc->sysc_flags)
3351 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3352 oh->class->sysc->sysc_flags);
3353
3354 if (idlemodes != oh->class->sysc->idlemodes)
3355 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3356 oh->class->sysc->idlemodes);
3357
3358 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3359 dev_warn(dev, "srst_udelay %i != %i\n",
3360 data->cfg->srst_udelay,
3361 oh->class->sysc->srst_udelay);
3362
3363 return 0;
3364}
3365
3366/**
3367 * omap_hwmod_allocate_module - allocate new module
3368 * @dev: struct device
3369 * @oh: module
3370 * @data: module data
3371 * @sysc_fields: sysc register bits
3372 * @clkdm: clockdomain
3373 * @rev_offs: revision register offset
3374 * @sysc_offs: sysconfig register offset
3375 * @syss_offs: sysstatus register offset
3376 * @sysc_flags: sysc specific flags
3377 * @idlemodes: sysc supported idlemodes
3378 *
3379 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3380 */
3381static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3382 const struct ti_sysc_module_data *data,
3383 struct sysc_regbits *sysc_fields,
3384 struct clockdomain *clkdm,
3385 s32 rev_offs, s32 sysc_offs,
3386 s32 syss_offs, u32 sysc_flags,
3387 u32 idlemodes)
3388{
3389 struct omap_hwmod_class_sysconfig *sysc;
3390 struct omap_hwmod_class *class = NULL;
3391 struct omap_hwmod_ocp_if *oi = NULL;
3392 void __iomem *regs = NULL;
3393 unsigned long flags;
3394
3395 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3396 if (!sysc)
3397 return -ENOMEM;
3398
3399 sysc->sysc_fields = sysc_fields;
3400 sysc->rev_offs = rev_offs;
3401 sysc->sysc_offs = sysc_offs;
3402 sysc->syss_offs = syss_offs;
3403 sysc->sysc_flags = sysc_flags;
3404 sysc->idlemodes = idlemodes;
3405 sysc->srst_udelay = data->cfg->srst_udelay;
3406
3407 if (!oh->_mpu_rt_va) {
3408 regs = ioremap(data->module_pa,
3409 data->module_size);
3410 if (!regs)
3411 goto out_free_sysc;
3412 }
3413
3414 /*
3415 * We may need a new oh->class as the other devices in the same class
3416 * may not yet have ioremapped their registers.
3417 */
3418 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3419 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3420 if (!class)
3421 goto out_unmap;
3422 }
3423
3424 if (list_empty(&oh->slave_ports)) {
3425 oi = kzalloc(sizeof(*oi), GFP_KERNEL);
3426 if (!oi)
3427 goto out_free_class;
3428
3429 /*
3430 * Note that we assume interconnect interface clocks will be
3431 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3432 * on omap24xx and omap3.
3433 */
3434 oi->slave = oh;
3435 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3436 }
3437
3438 spin_lock_irqsave(&oh->_lock, flags);
3439 if (regs)
3440 oh->_mpu_rt_va = regs;
3441 if (class)
3442 oh->class = class;
3443 oh->class->sysc = sysc;
3444 if (oi)
3445 _add_link(oi);
3446 if (clkdm)
3447 oh->clkdm = clkdm;
3448 oh->_state = _HWMOD_STATE_INITIALIZED;
3449 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3450 _setup(oh, NULL);
3451 spin_unlock_irqrestore(&oh->_lock, flags);
3452
3453 return 0;
3454
3455out_free_class:
3456 kfree(class);
3457out_unmap:
3458 iounmap(regs);
3459out_free_sysc:
3460 kfree(sysc);
3461 return -ENOMEM;
3462}
3463
3464static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3465 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3466};
3467
3468static const struct omap_hwmod_reset omap_reset_quirks[] = {
3469 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3470 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3471 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3472 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3473};
3474
3475static void
3476omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3477 const struct ti_sysc_module_data *data,
3478 const struct omap_hwmod_reset *quirks,
3479 int quirks_sz)
3480{
3481 const struct omap_hwmod_reset *quirk;
3482 int i;
3483
3484 for (i = 0; i < quirks_sz; i++) {
3485 quirk = &quirks[i];
3486 if (!strncmp(data->name, quirk->match, quirk->len)) {
3487 oh->class->reset = quirk->reset;
3488
3489 return;
3490 }
3491 }
3492}
3493
3494static void
3495omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3496 const struct ti_sysc_module_data *data)
3497{
3498 if (soc_is_omap24xx())
3499 omap_hwmod_init_reset_quirk(dev, oh, data,
3500 omap24xx_reset_quirks,
3501 ARRAY_SIZE(omap24xx_reset_quirks));
3502
3503 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3504 ARRAY_SIZE(omap_reset_quirks));
3505}
3506
3507/**
3508 * omap_hwmod_init_module - initialize new module
3509 * @dev: struct device
3510 * @data: module data
3511 * @cookie: cookie for the caller to use for later calls
3512 */
3513int omap_hwmod_init_module(struct device *dev,
3514 const struct ti_sysc_module_data *data,
3515 struct ti_sysc_cookie *cookie)
3516{
3517 struct omap_hwmod *oh;
3518 struct sysc_regbits *sysc_fields;
3519 s32 rev_offs, sysc_offs, syss_offs;
3520 u32 sysc_flags, idlemodes;
3521 int error;
3522
3523 if (!dev || !data || !data->name || !cookie)
3524 return -EINVAL;
3525
3526 oh = _lookup(data->name);
3527 if (!oh) {
3528 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3529 if (!oh)
3530 return -ENOMEM;
3531
3532 oh->name = data->name;
3533 oh->_state = _HWMOD_STATE_UNKNOWN;
3534 lockdep_register_key(&oh->hwmod_key);
3535
3536 /* Unused, can be handled by PRM driver handling resets */
3537 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3538
3539 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3540 if (!oh->class) {
3541 kfree(oh);
3542 return -ENOMEM;
3543 }
3544
3545 omap_hwmod_init_reset_quirks(dev, oh, data);
3546
3547 oh->class->name = data->name;
3548 mutex_lock(&list_lock);
3549 error = _register(oh);
3550 mutex_unlock(&list_lock);
3551 }
3552
3553 cookie->data = oh;
3554
3555 error = omap_hwmod_init_regbits(dev, oh, data, &sysc_fields);
3556 if (error)
3557 return error;
3558
3559 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3560 &sysc_offs, &syss_offs);
3561 if (error)
3562 return error;
3563
3564 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3565 if (error)
3566 return error;
3567
3568 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3569 if (error)
3570 return error;
3571
3572 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3573 oh->flags |= HWMOD_NO_IDLE;
3574 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3575 oh->flags |= HWMOD_INIT_NO_IDLE;
3576 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3577 oh->flags |= HWMOD_INIT_NO_RESET;
3578 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3579 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3580 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3581 oh->flags |= HWMOD_SWSUP_SIDLE;
3582 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3583 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3584 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3585 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3586 if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
3587 oh->flags |= HWMOD_CLKDM_NOAUTO;
3588
3589 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3590 rev_offs, sysc_offs, syss_offs,
3591 sysc_flags, idlemodes);
3592 if (!error)
3593 return error;
3594
3595 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3596 cookie->clkdm, rev_offs,
3597 sysc_offs, syss_offs,
3598 sysc_flags, idlemodes);
3599}
3600
3601/**
3602 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3603 *
3604 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3605 * early concole so that hwmod core doesn't reset and keep it in idle
3606 * that specific uart.
3607 */
3608#ifdef CONFIG_SERIAL_EARLYCON
3609static void __init omap_hwmod_setup_earlycon_flags(void)
3610{
3611 struct device_node *np;
3612 struct omap_hwmod *oh;
3613 const char *uart;
3614
3615 np = of_find_node_by_path("/chosen");
3616 if (np) {
3617 uart = of_get_property(np, "stdout-path", NULL);
3618 if (uart) {
3619 np = of_find_node_by_path(uart);
3620 if (np) {
3621 uart = of_get_property(np, "ti,hwmods", NULL);
3622 oh = omap_hwmod_lookup(uart);
3623 if (!oh) {
3624 uart = of_get_property(np->parent,
3625 "ti,hwmods",
3626 NULL);
3627 oh = omap_hwmod_lookup(uart);
3628 }
3629 if (oh)
3630 oh->flags |= DEBUG_OMAPUART_FLAGS;
3631 }
3632 }
3633 }
3634}
3635#endif
3636
3637/**
3638 * omap_hwmod_setup_all - set up all registered IP blocks
3639 *
3640 * Initialize and set up all IP blocks registered with the hwmod code.
3641 * Must be called after omap2_clk_init(). Resolves the struct clk
3642 * names to struct clk pointers for each registered omap_hwmod. Also
3643 * calls _setup() on each hwmod. Returns 0 upon success.
3644 */
3645static int __init omap_hwmod_setup_all(void)
3646{
3647 if (!inited)
3648 return 0;
3649
3650 _ensure_mpu_hwmod_is_setup(NULL);
3651
3652 omap_hwmod_for_each(_init, NULL);
3653#ifdef CONFIG_SERIAL_EARLYCON
3654 omap_hwmod_setup_earlycon_flags();
3655#endif
3656 omap_hwmod_for_each(_setup, NULL);
3657
3658 return 0;
3659}
3660omap_postcore_initcall(omap_hwmod_setup_all);
3661
3662/**
3663 * omap_hwmod_enable - enable an omap_hwmod
3664 * @oh: struct omap_hwmod *
3665 *
3666 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3667 * Returns -EINVAL on error or passes along the return value from _enable().
3668 */
3669int omap_hwmod_enable(struct omap_hwmod *oh)
3670{
3671 int r;
3672 unsigned long flags;
3673
3674 if (!oh)
3675 return -EINVAL;
3676
3677 spin_lock_irqsave(&oh->_lock, flags);
3678 r = _enable(oh);
3679 spin_unlock_irqrestore(&oh->_lock, flags);
3680
3681 return r;
3682}
3683
3684/**
3685 * omap_hwmod_idle - idle an omap_hwmod
3686 * @oh: struct omap_hwmod *
3687 *
3688 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3689 * Returns -EINVAL on error or passes along the return value from _idle().
3690 */
3691int omap_hwmod_idle(struct omap_hwmod *oh)
3692{
3693 int r;
3694 unsigned long flags;
3695
3696 if (!oh)
3697 return -EINVAL;
3698
3699 spin_lock_irqsave(&oh->_lock, flags);
3700 r = _idle(oh);
3701 spin_unlock_irqrestore(&oh->_lock, flags);
3702
3703 return r;
3704}
3705
3706/**
3707 * omap_hwmod_shutdown - shutdown an omap_hwmod
3708 * @oh: struct omap_hwmod *
3709 *
3710 * Shutdown an omap_hwmod @oh. Intended to be called by
3711 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3712 * the return value from _shutdown().
3713 */
3714int omap_hwmod_shutdown(struct omap_hwmod *oh)
3715{
3716 int r;
3717 unsigned long flags;
3718
3719 if (!oh)
3720 return -EINVAL;
3721
3722 spin_lock_irqsave(&oh->_lock, flags);
3723 r = _shutdown(oh);
3724 spin_unlock_irqrestore(&oh->_lock, flags);
3725
3726 return r;
3727}
3728
3729/*
3730 * IP block data retrieval functions
3731 */
3732
3733/**
3734 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3735 * @oh: struct omap_hwmod *
3736 *
3737 * Returns the virtual address corresponding to the beginning of the
3738 * module's register target, in the address range that is intended to
3739 * be used by the MPU. Returns the virtual address upon success or NULL
3740 * upon error.
3741 */
3742void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3743{
3744 if (!oh)
3745 return NULL;
3746
3747 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3748 return NULL;
3749
3750 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3751 return NULL;
3752
3753 return oh->_mpu_rt_va;
3754}
3755
3756/*
3757 * XXX what about functions for drivers to save/restore ocp_sysconfig
3758 * for context save/restore operations?
3759 */
3760
3761/**
3762 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3763 * contained in the hwmod module.
3764 * @oh: struct omap_hwmod *
3765 * @name: name of the reset line to lookup and assert
3766 *
3767 * Some IP like dsp, ipu or iva contain processor that require
3768 * an HW reset line to be assert / deassert in order to enable fully
3769 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3770 * yet supported on this OMAP; otherwise, passes along the return value
3771 * from _assert_hardreset().
3772 */
3773int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3774{
3775 int ret;
3776 unsigned long flags;
3777
3778 if (!oh)
3779 return -EINVAL;
3780
3781 spin_lock_irqsave(&oh->_lock, flags);
3782 ret = _assert_hardreset(oh, name);
3783 spin_unlock_irqrestore(&oh->_lock, flags);
3784
3785 return ret;
3786}
3787
3788/**
3789 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3790 * contained in the hwmod module.
3791 * @oh: struct omap_hwmod *
3792 * @name: name of the reset line to look up and deassert
3793 *
3794 * Some IP like dsp, ipu or iva contain processor that require
3795 * an HW reset line to be assert / deassert in order to enable fully
3796 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3797 * yet supported on this OMAP; otherwise, passes along the return value
3798 * from _deassert_hardreset().
3799 */
3800int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3801{
3802 int ret;
3803 unsigned long flags;
3804
3805 if (!oh)
3806 return -EINVAL;
3807
3808 spin_lock_irqsave(&oh->_lock, flags);
3809 ret = _deassert_hardreset(oh, name);
3810 spin_unlock_irqrestore(&oh->_lock, flags);
3811
3812 return ret;
3813}
3814
3815/**
3816 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3817 * @classname: struct omap_hwmod_class name to search for
3818 * @fn: callback function pointer to call for each hwmod in class @classname
3819 * @user: arbitrary context data to pass to the callback function
3820 *
3821 * For each omap_hwmod of class @classname, call @fn.
3822 * If the callback function returns something other than
3823 * zero, the iterator is terminated, and the callback function's return
3824 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3825 * if @classname or @fn are NULL, or passes back the error code from @fn.
3826 */
3827int omap_hwmod_for_each_by_class(const char *classname,
3828 int (*fn)(struct omap_hwmod *oh,
3829 void *user),
3830 void *user)
3831{
3832 struct omap_hwmod *temp_oh;
3833 int ret = 0;
3834
3835 if (!classname || !fn)
3836 return -EINVAL;
3837
3838 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3839 __func__, classname);
3840
3841 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3842 if (!strcmp(temp_oh->class->name, classname)) {
3843 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3844 __func__, temp_oh->name);
3845 ret = (*fn)(temp_oh, user);
3846 if (ret)
3847 break;
3848 }
3849 }
3850
3851 if (ret)
3852 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3853 __func__, ret);
3854
3855 return ret;
3856}
3857
3858/**
3859 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3860 * @oh: struct omap_hwmod *
3861 * @state: state that _setup() should leave the hwmod in
3862 *
3863 * Sets the hwmod state that @oh will enter at the end of _setup()
3864 * (called by omap_hwmod_setup_*()). See also the documentation
3865 * for _setup_postsetup(), above. Returns 0 upon success or
3866 * -EINVAL if there is a problem with the arguments or if the hwmod is
3867 * in the wrong state.
3868 */
3869int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3870{
3871 int ret;
3872 unsigned long flags;
3873
3874 if (!oh)
3875 return -EINVAL;
3876
3877 if (state != _HWMOD_STATE_DISABLED &&
3878 state != _HWMOD_STATE_ENABLED &&
3879 state != _HWMOD_STATE_IDLE)
3880 return -EINVAL;
3881
3882 spin_lock_irqsave(&oh->_lock, flags);
3883
3884 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3885 ret = -EINVAL;
3886 goto ohsps_unlock;
3887 }
3888
3889 oh->_postsetup_state = state;
3890 ret = 0;
3891
3892ohsps_unlock:
3893 spin_unlock_irqrestore(&oh->_lock, flags);
3894
3895 return ret;
3896}
3897
3898/**
3899 * omap_hwmod_init - initialize the hwmod code
3900 *
3901 * Sets up some function pointers needed by the hwmod code to operate on the
3902 * currently-booted SoC. Intended to be called once during kernel init
3903 * before any hwmods are registered. No return value.
3904 */
3905void __init omap_hwmod_init(void)
3906{
3907 if (cpu_is_omap24xx()) {
3908 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3909 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3910 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3911 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3912 } else if (cpu_is_omap34xx()) {
3913 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3914 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3915 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3916 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3917 soc_ops.init_clkdm = _init_clkdm;
3918 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3919 soc_ops.enable_module = _omap4_enable_module;
3920 soc_ops.disable_module = _omap4_disable_module;
3921 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3922 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3923 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3924 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3925 soc_ops.init_clkdm = _init_clkdm;
3926 soc_ops.update_context_lost = _omap4_update_context_lost;
3927 soc_ops.get_context_lost = _omap4_get_context_lost;
3928 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3929 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3930 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3931 soc_is_am43xx()) {
3932 soc_ops.enable_module = _omap4_enable_module;
3933 soc_ops.disable_module = _omap4_disable_module;
3934 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3935 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3936 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3937 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3938 soc_ops.init_clkdm = _init_clkdm;
3939 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3940 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3941 } else {
3942 WARN(1, "omap_hwmod: unknown SoC type\n");
3943 }
3944
3945 _init_clkctrl_providers();
3946
3947 inited = true;
3948}
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/clk-provider.h>
135#include <linux/delay.h>
136#include <linux/err.h>
137#include <linux/list.h>
138#include <linux/mutex.h>
139#include <linux/spinlock.h>
140#include <linux/slab.h>
141#include <linux/bootmem.h>
142#include <linux/cpu.h>
143#include <linux/of.h>
144#include <linux/of_address.h>
145
146#include <asm/system_misc.h>
147
148#include "clock.h"
149#include "omap_hwmod.h"
150
151#include "soc.h"
152#include "common.h"
153#include "clockdomain.h"
154#include "powerdomain.h"
155#include "cm2xxx.h"
156#include "cm3xxx.h"
157#include "cm33xx.h"
158#include "prm.h"
159#include "prm3xxx.h"
160#include "prm44xx.h"
161#include "prm33xx.h"
162#include "prminst44xx.h"
163#include "pm.h"
164
165/* Name of the OMAP hwmod for the MPU */
166#define MPU_INITIATOR_NAME "mpu"
167
168/*
169 * Number of struct omap_hwmod_link records per struct
170 * omap_hwmod_ocp_if record (master->slave and slave->master)
171 */
172#define LINKS_PER_OCP_IF 2
173
174/*
175 * Address offset (in bytes) between the reset control and the reset
176 * status registers: 4 bytes on OMAP4
177 */
178#define OMAP4_RST_CTRL_ST_OFFSET 4
179
180/*
181 * Maximum length for module clock handle names
182 */
183#define MOD_CLK_MAX_NAME_LEN 32
184
185/**
186 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
187 * @enable_module: function to enable a module (via MODULEMODE)
188 * @disable_module: function to disable a module (via MODULEMODE)
189 *
190 * XXX Eventually this functionality will be hidden inside the PRM/CM
191 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
192 * conditionals in this code.
193 */
194struct omap_hwmod_soc_ops {
195 void (*enable_module)(struct omap_hwmod *oh);
196 int (*disable_module)(struct omap_hwmod *oh);
197 int (*wait_target_ready)(struct omap_hwmod *oh);
198 int (*assert_hardreset)(struct omap_hwmod *oh,
199 struct omap_hwmod_rst_info *ohri);
200 int (*deassert_hardreset)(struct omap_hwmod *oh,
201 struct omap_hwmod_rst_info *ohri);
202 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
203 struct omap_hwmod_rst_info *ohri);
204 int (*init_clkdm)(struct omap_hwmod *oh);
205 void (*update_context_lost)(struct omap_hwmod *oh);
206 int (*get_context_lost)(struct omap_hwmod *oh);
207 int (*disable_direct_prcm)(struct omap_hwmod *oh);
208};
209
210/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
211static struct omap_hwmod_soc_ops soc_ops;
212
213/* omap_hwmod_list contains all registered struct omap_hwmods */
214static LIST_HEAD(omap_hwmod_list);
215
216/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
217static struct omap_hwmod *mpu_oh;
218
219/*
220 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
221 * allocated from - used to reduce the number of small memory
222 * allocations, which has a significant impact on performance
223 */
224static struct omap_hwmod_link *linkspace;
225
226/*
227 * free_ls, max_ls: array indexes into linkspace; representing the
228 * next free struct omap_hwmod_link index, and the maximum number of
229 * struct omap_hwmod_link records allocated (respectively)
230 */
231static unsigned short free_ls, max_ls, ls_supp;
232
233/* inited: set to true once the hwmod code is initialized */
234static bool inited;
235
236/* Private functions */
237
238/**
239 * _fetch_next_ocp_if - return the next OCP interface in a list
240 * @p: ptr to a ptr to the list_head inside the ocp_if to return
241 * @i: pointer to the index of the element pointed to by @p in the list
242 *
243 * Return a pointer to the struct omap_hwmod_ocp_if record
244 * containing the struct list_head pointed to by @p, and increment
245 * @p such that a future call to this routine will return the next
246 * record.
247 */
248static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
249 int *i)
250{
251 struct omap_hwmod_ocp_if *oi;
252
253 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
254 *p = (*p)->next;
255
256 *i = *i + 1;
257
258 return oi;
259}
260
261/**
262 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
263 * @oh: struct omap_hwmod *
264 *
265 * Load the current value of the hwmod OCP_SYSCONFIG register into the
266 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
267 * OCP_SYSCONFIG register or 0 upon success.
268 */
269static int _update_sysc_cache(struct omap_hwmod *oh)
270{
271 if (!oh->class->sysc) {
272 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
273 return -EINVAL;
274 }
275
276 /* XXX ensure module interface clock is up */
277
278 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
279
280 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
281 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
282
283 return 0;
284}
285
286/**
287 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
288 * @v: OCP_SYSCONFIG value to write
289 * @oh: struct omap_hwmod *
290 *
291 * Write @v into the module class' OCP_SYSCONFIG register, if it has
292 * one. No return value.
293 */
294static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
295{
296 if (!oh->class->sysc) {
297 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
298 return;
299 }
300
301 /* XXX ensure module interface clock is up */
302
303 /* Module might have lost context, always update cache and register */
304 oh->_sysc_cache = v;
305
306 /*
307 * Some IP blocks (such as RTC) require unlocking of IP before
308 * accessing its registers. If a function pointer is present
309 * to unlock, then call it before accessing sysconfig and
310 * call lock after writing sysconfig.
311 */
312 if (oh->class->unlock)
313 oh->class->unlock(oh);
314
315 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
316
317 if (oh->class->lock)
318 oh->class->lock(oh);
319}
320
321/**
322 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
323 * @oh: struct omap_hwmod *
324 * @standbymode: MIDLEMODE field bits
325 * @v: pointer to register contents to modify
326 *
327 * Update the master standby mode bits in @v to be @standbymode for
328 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
329 * upon error or 0 upon success.
330 */
331static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
332 u32 *v)
333{
334 u32 mstandby_mask;
335 u8 mstandby_shift;
336
337 if (!oh->class->sysc ||
338 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
339 return -EINVAL;
340
341 if (!oh->class->sysc->sysc_fields) {
342 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
343 return -EINVAL;
344 }
345
346 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
347 mstandby_mask = (0x3 << mstandby_shift);
348
349 *v &= ~mstandby_mask;
350 *v |= __ffs(standbymode) << mstandby_shift;
351
352 return 0;
353}
354
355/**
356 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
357 * @oh: struct omap_hwmod *
358 * @idlemode: SIDLEMODE field bits
359 * @v: pointer to register contents to modify
360 *
361 * Update the slave idle mode bits in @v to be @idlemode for the @oh
362 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
363 * or 0 upon success.
364 */
365static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
366{
367 u32 sidle_mask;
368 u8 sidle_shift;
369
370 if (!oh->class->sysc ||
371 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
372 return -EINVAL;
373
374 if (!oh->class->sysc->sysc_fields) {
375 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
376 return -EINVAL;
377 }
378
379 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
380 sidle_mask = (0x3 << sidle_shift);
381
382 *v &= ~sidle_mask;
383 *v |= __ffs(idlemode) << sidle_shift;
384
385 return 0;
386}
387
388/**
389 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
390 * @oh: struct omap_hwmod *
391 * @clockact: CLOCKACTIVITY field bits
392 * @v: pointer to register contents to modify
393 *
394 * Update the clockactivity mode bits in @v to be @clockact for the
395 * @oh hwmod. Used for additional powersaving on some modules. Does
396 * not write to the hardware. Returns -EINVAL upon error or 0 upon
397 * success.
398 */
399static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
400{
401 u32 clkact_mask;
402 u8 clkact_shift;
403
404 if (!oh->class->sysc ||
405 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
406 return -EINVAL;
407
408 if (!oh->class->sysc->sysc_fields) {
409 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
410 return -EINVAL;
411 }
412
413 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
414 clkact_mask = (0x3 << clkact_shift);
415
416 *v &= ~clkact_mask;
417 *v |= clockact << clkact_shift;
418
419 return 0;
420}
421
422/**
423 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
424 * @oh: struct omap_hwmod *
425 * @v: pointer to register contents to modify
426 *
427 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
428 * error or 0 upon success.
429 */
430static int _set_softreset(struct omap_hwmod *oh, u32 *v)
431{
432 u32 softrst_mask;
433
434 if (!oh->class->sysc ||
435 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
436 return -EINVAL;
437
438 if (!oh->class->sysc->sysc_fields) {
439 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
440 return -EINVAL;
441 }
442
443 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
444
445 *v |= softrst_mask;
446
447 return 0;
448}
449
450/**
451 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
452 * @oh: struct omap_hwmod *
453 * @v: pointer to register contents to modify
454 *
455 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
456 * error or 0 upon success.
457 */
458static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
459{
460 u32 softrst_mask;
461
462 if (!oh->class->sysc ||
463 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
464 return -EINVAL;
465
466 if (!oh->class->sysc->sysc_fields) {
467 WARN(1,
468 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
469 oh->name);
470 return -EINVAL;
471 }
472
473 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
474
475 *v &= ~softrst_mask;
476
477 return 0;
478}
479
480/**
481 * _wait_softreset_complete - wait for an OCP softreset to complete
482 * @oh: struct omap_hwmod * to wait on
483 *
484 * Wait until the IP block represented by @oh reports that its OCP
485 * softreset is complete. This can be triggered by software (see
486 * _ocp_softreset()) or by hardware upon returning from off-mode (one
487 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
488 * microseconds. Returns the number of microseconds waited.
489 */
490static int _wait_softreset_complete(struct omap_hwmod *oh)
491{
492 struct omap_hwmod_class_sysconfig *sysc;
493 u32 softrst_mask;
494 int c = 0;
495
496 sysc = oh->class->sysc;
497
498 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
499 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
500 & SYSS_RESETDONE_MASK),
501 MAX_MODULE_SOFTRESET_WAIT, c);
502 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
503 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
504 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
505 & softrst_mask),
506 MAX_MODULE_SOFTRESET_WAIT, c);
507 }
508
509 return c;
510}
511
512/**
513 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
514 * @oh: struct omap_hwmod *
515 *
516 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
517 * of some modules. When the DMA must perform read/write accesses, the
518 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
519 * for power management, software must set the DMADISABLE bit back to 1.
520 *
521 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
522 * error or 0 upon success.
523 */
524static int _set_dmadisable(struct omap_hwmod *oh)
525{
526 u32 v;
527 u32 dmadisable_mask;
528
529 if (!oh->class->sysc ||
530 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
531 return -EINVAL;
532
533 if (!oh->class->sysc->sysc_fields) {
534 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
535 return -EINVAL;
536 }
537
538 /* clocks must be on for this operation */
539 if (oh->_state != _HWMOD_STATE_ENABLED) {
540 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
541 return -EINVAL;
542 }
543
544 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
545
546 v = oh->_sysc_cache;
547 dmadisable_mask =
548 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
549 v |= dmadisable_mask;
550 _write_sysconfig(v, oh);
551
552 return 0;
553}
554
555/**
556 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
557 * @oh: struct omap_hwmod *
558 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
559 * @v: pointer to register contents to modify
560 *
561 * Update the module autoidle bit in @v to be @autoidle for the @oh
562 * hwmod. The autoidle bit controls whether the module can gate
563 * internal clocks automatically when it isn't doing anything; the
564 * exact function of this bit varies on a per-module basis. This
565 * function does not write to the hardware. Returns -EINVAL upon
566 * error or 0 upon success.
567 */
568static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
569 u32 *v)
570{
571 u32 autoidle_mask;
572 u8 autoidle_shift;
573
574 if (!oh->class->sysc ||
575 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
576 return -EINVAL;
577
578 if (!oh->class->sysc->sysc_fields) {
579 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
580 return -EINVAL;
581 }
582
583 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
584 autoidle_mask = (0x1 << autoidle_shift);
585
586 *v &= ~autoidle_mask;
587 *v |= autoidle << autoidle_shift;
588
589 return 0;
590}
591
592/**
593 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
594 * @oh: struct omap_hwmod *
595 *
596 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
597 * upon error or 0 upon success.
598 */
599static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
600{
601 if (!oh->class->sysc ||
602 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
603 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
604 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
605 return -EINVAL;
606
607 if (!oh->class->sysc->sysc_fields) {
608 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
609 return -EINVAL;
610 }
611
612 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
613 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
614
615 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
616 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
617 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
618 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
619
620 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
621
622 return 0;
623}
624
625/**
626 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
627 * @oh: struct omap_hwmod *
628 *
629 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
630 * upon error or 0 upon success.
631 */
632static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
633{
634 if (!oh->class->sysc ||
635 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
636 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
637 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
638 return -EINVAL;
639
640 if (!oh->class->sysc->sysc_fields) {
641 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
642 return -EINVAL;
643 }
644
645 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
646 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
647
648 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
649 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
650 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
651 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
652
653 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
654
655 return 0;
656}
657
658static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
659{
660 struct clk_hw_omap *clk;
661
662 if (oh->clkdm) {
663 return oh->clkdm;
664 } else if (oh->_clk) {
665 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
666 return NULL;
667 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
668 return clk->clkdm;
669 }
670 return NULL;
671}
672
673/**
674 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
675 * @oh: struct omap_hwmod *
676 *
677 * Prevent the hardware module @oh from entering idle while the
678 * hardare module initiator @init_oh is active. Useful when a module
679 * will be accessed by a particular initiator (e.g., if a module will
680 * be accessed by the IVA, there should be a sleepdep between the IVA
681 * initiator and the module). Only applies to modules in smart-idle
682 * mode. If the clockdomain is marked as not needing autodeps, return
683 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
684 * passes along clkdm_add_sleepdep() value upon success.
685 */
686static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
687{
688 struct clockdomain *clkdm, *init_clkdm;
689
690 clkdm = _get_clkdm(oh);
691 init_clkdm = _get_clkdm(init_oh);
692
693 if (!clkdm || !init_clkdm)
694 return -EINVAL;
695
696 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
697 return 0;
698
699 return clkdm_add_sleepdep(clkdm, init_clkdm);
700}
701
702/**
703 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
704 * @oh: struct omap_hwmod *
705 *
706 * Allow the hardware module @oh to enter idle while the hardare
707 * module initiator @init_oh is active. Useful when a module will not
708 * be accessed by a particular initiator (e.g., if a module will not
709 * be accessed by the IVA, there should be no sleepdep between the IVA
710 * initiator and the module). Only applies to modules in smart-idle
711 * mode. If the clockdomain is marked as not needing autodeps, return
712 * 0 without doing anything. Returns -EINVAL upon error or passes
713 * along clkdm_del_sleepdep() value upon success.
714 */
715static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
716{
717 struct clockdomain *clkdm, *init_clkdm;
718
719 clkdm = _get_clkdm(oh);
720 init_clkdm = _get_clkdm(init_oh);
721
722 if (!clkdm || !init_clkdm)
723 return -EINVAL;
724
725 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
726 return 0;
727
728 return clkdm_del_sleepdep(clkdm, init_clkdm);
729}
730
731/**
732 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
733 * @oh: struct omap_hwmod *
734 *
735 * Called from _init_clocks(). Populates the @oh _clk (main
736 * functional clock pointer) if a clock matching the hwmod name is found,
737 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
738 */
739static int _init_main_clk(struct omap_hwmod *oh)
740{
741 int ret = 0;
742 char name[MOD_CLK_MAX_NAME_LEN];
743 struct clk *clk;
744 static const char modck[] = "_mod_ck";
745
746 if (strlen(oh->name) >= MOD_CLK_MAX_NAME_LEN - strlen(modck))
747 pr_warn("%s: warning: cropping name for %s\n", __func__,
748 oh->name);
749
750 strlcpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - strlen(modck));
751 strlcat(name, modck, MOD_CLK_MAX_NAME_LEN);
752
753 clk = clk_get(NULL, name);
754 if (!IS_ERR(clk)) {
755 oh->_clk = clk;
756 soc_ops.disable_direct_prcm(oh);
757 oh->main_clk = kstrdup(name, GFP_KERNEL);
758 } else {
759 if (!oh->main_clk)
760 return 0;
761
762 oh->_clk = clk_get(NULL, oh->main_clk);
763 }
764
765 if (IS_ERR(oh->_clk)) {
766 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
767 oh->name, oh->main_clk);
768 return -EINVAL;
769 }
770 /*
771 * HACK: This needs a re-visit once clk_prepare() is implemented
772 * to do something meaningful. Today its just a no-op.
773 * If clk_prepare() is used at some point to do things like
774 * voltage scaling etc, then this would have to be moved to
775 * some point where subsystems like i2c and pmic become
776 * available.
777 */
778 clk_prepare(oh->_clk);
779
780 if (!_get_clkdm(oh))
781 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
782 oh->name, oh->main_clk);
783
784 return ret;
785}
786
787/**
788 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
789 * @oh: struct omap_hwmod *
790 *
791 * Called from _init_clocks(). Populates the @oh OCP slave interface
792 * clock pointers. Returns 0 on success or -EINVAL on error.
793 */
794static int _init_interface_clks(struct omap_hwmod *oh)
795{
796 struct omap_hwmod_ocp_if *os;
797 struct list_head *p;
798 struct clk *c;
799 int i = 0;
800 int ret = 0;
801
802 p = oh->slave_ports.next;
803
804 while (i < oh->slaves_cnt) {
805 os = _fetch_next_ocp_if(&p, &i);
806 if (!os->clk)
807 continue;
808
809 c = clk_get(NULL, os->clk);
810 if (IS_ERR(c)) {
811 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
812 oh->name, os->clk);
813 ret = -EINVAL;
814 continue;
815 }
816 os->_clk = c;
817 /*
818 * HACK: This needs a re-visit once clk_prepare() is implemented
819 * to do something meaningful. Today its just a no-op.
820 * If clk_prepare() is used at some point to do things like
821 * voltage scaling etc, then this would have to be moved to
822 * some point where subsystems like i2c and pmic become
823 * available.
824 */
825 clk_prepare(os->_clk);
826 }
827
828 return ret;
829}
830
831/**
832 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
833 * @oh: struct omap_hwmod *
834 *
835 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
836 * clock pointers. Returns 0 on success or -EINVAL on error.
837 */
838static int _init_opt_clks(struct omap_hwmod *oh)
839{
840 struct omap_hwmod_opt_clk *oc;
841 struct clk *c;
842 int i;
843 int ret = 0;
844
845 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
846 c = clk_get(NULL, oc->clk);
847 if (IS_ERR(c)) {
848 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
849 oh->name, oc->clk);
850 ret = -EINVAL;
851 continue;
852 }
853 oc->_clk = c;
854 /*
855 * HACK: This needs a re-visit once clk_prepare() is implemented
856 * to do something meaningful. Today its just a no-op.
857 * If clk_prepare() is used at some point to do things like
858 * voltage scaling etc, then this would have to be moved to
859 * some point where subsystems like i2c and pmic become
860 * available.
861 */
862 clk_prepare(oc->_clk);
863 }
864
865 return ret;
866}
867
868static void _enable_optional_clocks(struct omap_hwmod *oh)
869{
870 struct omap_hwmod_opt_clk *oc;
871 int i;
872
873 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
874
875 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
876 if (oc->_clk) {
877 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
878 __clk_get_name(oc->_clk));
879 clk_enable(oc->_clk);
880 }
881}
882
883static void _disable_optional_clocks(struct omap_hwmod *oh)
884{
885 struct omap_hwmod_opt_clk *oc;
886 int i;
887
888 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
889
890 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
891 if (oc->_clk) {
892 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
893 __clk_get_name(oc->_clk));
894 clk_disable(oc->_clk);
895 }
896}
897
898/**
899 * _enable_clocks - enable hwmod main clock and interface clocks
900 * @oh: struct omap_hwmod *
901 *
902 * Enables all clocks necessary for register reads and writes to succeed
903 * on the hwmod @oh. Returns 0.
904 */
905static int _enable_clocks(struct omap_hwmod *oh)
906{
907 struct omap_hwmod_ocp_if *os;
908 struct list_head *p;
909 int i = 0;
910
911 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
912
913 if (oh->_clk)
914 clk_enable(oh->_clk);
915
916 p = oh->slave_ports.next;
917
918 while (i < oh->slaves_cnt) {
919 os = _fetch_next_ocp_if(&p, &i);
920
921 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
922 clk_enable(os->_clk);
923 }
924
925 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
926 _enable_optional_clocks(oh);
927
928 /* The opt clocks are controlled by the device driver. */
929
930 return 0;
931}
932
933/**
934 * _disable_clocks - disable hwmod main clock and interface clocks
935 * @oh: struct omap_hwmod *
936 *
937 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
938 */
939static int _disable_clocks(struct omap_hwmod *oh)
940{
941 struct omap_hwmod_ocp_if *os;
942 struct list_head *p;
943 int i = 0;
944
945 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
946
947 if (oh->_clk)
948 clk_disable(oh->_clk);
949
950 p = oh->slave_ports.next;
951
952 while (i < oh->slaves_cnt) {
953 os = _fetch_next_ocp_if(&p, &i);
954
955 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
956 clk_disable(os->_clk);
957 }
958
959 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
960 _disable_optional_clocks(oh);
961
962 /* The opt clocks are controlled by the device driver. */
963
964 return 0;
965}
966
967/**
968 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
969 * @oh: struct omap_hwmod *
970 *
971 * Enables the PRCM module mode related to the hwmod @oh.
972 * No return value.
973 */
974static void _omap4_enable_module(struct omap_hwmod *oh)
975{
976 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
977 return;
978
979 pr_debug("omap_hwmod: %s: %s: %d\n",
980 oh->name, __func__, oh->prcm.omap4.modulemode);
981
982 omap_cm_module_enable(oh->prcm.omap4.modulemode,
983 oh->clkdm->prcm_partition,
984 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
985}
986
987/**
988 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
989 * @oh: struct omap_hwmod *
990 *
991 * Wait for a module @oh to enter slave idle. Returns 0 if the module
992 * does not have an IDLEST bit or if the module successfully enters
993 * slave idle; otherwise, pass along the return value of the
994 * appropriate *_cm*_wait_module_idle() function.
995 */
996static int _omap4_wait_target_disable(struct omap_hwmod *oh)
997{
998 if (!oh)
999 return -EINVAL;
1000
1001 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1002 return 0;
1003
1004 if (oh->flags & HWMOD_NO_IDLEST)
1005 return 0;
1006
1007 if (!oh->prcm.omap4.clkctrl_offs &&
1008 !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
1009 return 0;
1010
1011 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1012 oh->clkdm->cm_inst,
1013 oh->prcm.omap4.clkctrl_offs, 0);
1014}
1015
1016/**
1017 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1018 * @oh: struct omap_hwmod *oh
1019 *
1020 * Count and return the number of MPU IRQs associated with the hwmod
1021 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1022 * NULL.
1023 */
1024static int _count_mpu_irqs(struct omap_hwmod *oh)
1025{
1026 struct omap_hwmod_irq_info *ohii;
1027 int i = 0;
1028
1029 if (!oh || !oh->mpu_irqs)
1030 return 0;
1031
1032 do {
1033 ohii = &oh->mpu_irqs[i++];
1034 } while (ohii->irq != -1);
1035
1036 return i-1;
1037}
1038
1039/**
1040 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1041 * @oh: struct omap_hwmod *oh
1042 *
1043 * Count and return the number of SDMA request lines associated with
1044 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1045 * if @oh is NULL.
1046 */
1047static int _count_sdma_reqs(struct omap_hwmod *oh)
1048{
1049 struct omap_hwmod_dma_info *ohdi;
1050 int i = 0;
1051
1052 if (!oh || !oh->sdma_reqs)
1053 return 0;
1054
1055 do {
1056 ohdi = &oh->sdma_reqs[i++];
1057 } while (ohdi->dma_req != -1);
1058
1059 return i-1;
1060}
1061
1062/**
1063 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1064 * @oh: struct omap_hwmod *oh
1065 *
1066 * Count and return the number of address space ranges associated with
1067 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1068 * if @oh is NULL.
1069 */
1070static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1071{
1072 struct omap_hwmod_addr_space *mem;
1073 int i = 0;
1074
1075 if (!os || !os->addr)
1076 return 0;
1077
1078 do {
1079 mem = &os->addr[i++];
1080 } while (mem->pa_start != mem->pa_end);
1081
1082 return i-1;
1083}
1084
1085/**
1086 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1087 * @oh: struct omap_hwmod * to operate on
1088 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1089 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1090 *
1091 * Retrieve a MPU hardware IRQ line number named by @name associated
1092 * with the IP block pointed to by @oh. The IRQ number will be filled
1093 * into the address pointed to by @dma. When @name is non-null, the
1094 * IRQ line number associated with the named entry will be returned.
1095 * If @name is null, the first matching entry will be returned. Data
1096 * order is not meaningful in hwmod data, so callers are strongly
1097 * encouraged to use a non-null @name whenever possible to avoid
1098 * unpredictable effects if hwmod data is later added that causes data
1099 * ordering to change. Returns 0 upon success or a negative error
1100 * code upon error.
1101 */
1102static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1103 unsigned int *irq)
1104{
1105 int i;
1106 bool found = false;
1107
1108 if (!oh->mpu_irqs)
1109 return -ENOENT;
1110
1111 i = 0;
1112 while (oh->mpu_irqs[i].irq != -1) {
1113 if (name == oh->mpu_irqs[i].name ||
1114 !strcmp(name, oh->mpu_irqs[i].name)) {
1115 found = true;
1116 break;
1117 }
1118 i++;
1119 }
1120
1121 if (!found)
1122 return -ENOENT;
1123
1124 *irq = oh->mpu_irqs[i].irq;
1125
1126 return 0;
1127}
1128
1129/**
1130 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1131 * @oh: struct omap_hwmod * to operate on
1132 * @name: pointer to the name of the SDMA request line to fetch (optional)
1133 * @dma: pointer to an unsigned int to store the request line ID to
1134 *
1135 * Retrieve an SDMA request line ID named by @name on the IP block
1136 * pointed to by @oh. The ID will be filled into the address pointed
1137 * to by @dma. When @name is non-null, the request line ID associated
1138 * with the named entry will be returned. If @name is null, the first
1139 * matching entry will be returned. Data order is not meaningful in
1140 * hwmod data, so callers are strongly encouraged to use a non-null
1141 * @name whenever possible to avoid unpredictable effects if hwmod
1142 * data is later added that causes data ordering to change. Returns 0
1143 * upon success or a negative error code upon error.
1144 */
1145static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1146 unsigned int *dma)
1147{
1148 int i;
1149 bool found = false;
1150
1151 if (!oh->sdma_reqs)
1152 return -ENOENT;
1153
1154 i = 0;
1155 while (oh->sdma_reqs[i].dma_req != -1) {
1156 if (name == oh->sdma_reqs[i].name ||
1157 !strcmp(name, oh->sdma_reqs[i].name)) {
1158 found = true;
1159 break;
1160 }
1161 i++;
1162 }
1163
1164 if (!found)
1165 return -ENOENT;
1166
1167 *dma = oh->sdma_reqs[i].dma_req;
1168
1169 return 0;
1170}
1171
1172/**
1173 * _get_addr_space_by_name - fetch address space start & end by name
1174 * @oh: struct omap_hwmod * to operate on
1175 * @name: pointer to the name of the address space to fetch (optional)
1176 * @pa_start: pointer to a u32 to store the starting address to
1177 * @pa_end: pointer to a u32 to store the ending address to
1178 *
1179 * Retrieve address space start and end addresses for the IP block
1180 * pointed to by @oh. The data will be filled into the addresses
1181 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1182 * address space data associated with the named entry will be
1183 * returned. If @name is null, the first matching entry will be
1184 * returned. Data order is not meaningful in hwmod data, so callers
1185 * are strongly encouraged to use a non-null @name whenever possible
1186 * to avoid unpredictable effects if hwmod data is later added that
1187 * causes data ordering to change. Returns 0 upon success or a
1188 * negative error code upon error.
1189 */
1190static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1191 u32 *pa_start, u32 *pa_end)
1192{
1193 int i, j;
1194 struct omap_hwmod_ocp_if *os;
1195 struct list_head *p = NULL;
1196 bool found = false;
1197
1198 p = oh->slave_ports.next;
1199
1200 i = 0;
1201 while (i < oh->slaves_cnt) {
1202 os = _fetch_next_ocp_if(&p, &i);
1203
1204 if (!os->addr)
1205 return -ENOENT;
1206
1207 j = 0;
1208 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1209 if (name == os->addr[j].name ||
1210 !strcmp(name, os->addr[j].name)) {
1211 found = true;
1212 break;
1213 }
1214 j++;
1215 }
1216
1217 if (found)
1218 break;
1219 }
1220
1221 if (!found)
1222 return -ENOENT;
1223
1224 *pa_start = os->addr[j].pa_start;
1225 *pa_end = os->addr[j].pa_end;
1226
1227 return 0;
1228}
1229
1230/**
1231 * _save_mpu_port_index - find and save the index to @oh's MPU port
1232 * @oh: struct omap_hwmod *
1233 *
1234 * Determines the array index of the OCP slave port that the MPU uses
1235 * to address the device, and saves it into the struct omap_hwmod.
1236 * Intended to be called during hwmod registration only. No return
1237 * value.
1238 */
1239static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1240{
1241 struct omap_hwmod_ocp_if *os = NULL;
1242 struct list_head *p;
1243 int i = 0;
1244
1245 if (!oh)
1246 return;
1247
1248 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1249
1250 p = oh->slave_ports.next;
1251
1252 while (i < oh->slaves_cnt) {
1253 os = _fetch_next_ocp_if(&p, &i);
1254 if (os->user & OCP_USER_MPU) {
1255 oh->_mpu_port = os;
1256 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1257 break;
1258 }
1259 }
1260
1261 return;
1262}
1263
1264/**
1265 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1266 * @oh: struct omap_hwmod *
1267 *
1268 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1269 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1270 * communicate with the IP block. This interface need not be directly
1271 * connected to the MPU (and almost certainly is not), but is directly
1272 * connected to the IP block represented by @oh. Returns a pointer
1273 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1274 * error or if there does not appear to be a path from the MPU to this
1275 * IP block.
1276 */
1277static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1278{
1279 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1280 return NULL;
1281
1282 return oh->_mpu_port;
1283};
1284
1285/**
1286 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1287 * @oh: struct omap_hwmod *
1288 *
1289 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1290 * the register target MPU address space; or returns NULL upon error.
1291 */
1292static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1293{
1294 struct omap_hwmod_ocp_if *os;
1295 struct omap_hwmod_addr_space *mem;
1296 int found = 0, i = 0;
1297
1298 os = _find_mpu_rt_port(oh);
1299 if (!os || !os->addr)
1300 return NULL;
1301
1302 do {
1303 mem = &os->addr[i++];
1304 if (mem->flags & ADDR_TYPE_RT)
1305 found = 1;
1306 } while (!found && mem->pa_start != mem->pa_end);
1307
1308 return (found) ? mem : NULL;
1309}
1310
1311/**
1312 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1313 * @oh: struct omap_hwmod *
1314 *
1315 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1316 * by @oh is set to indicate to the PRCM that the IP block is active.
1317 * Usually this means placing the module into smart-idle mode and
1318 * smart-standby, but if there is a bug in the automatic idle handling
1319 * for the IP block, it may need to be placed into the force-idle or
1320 * no-idle variants of these modes. No return value.
1321 */
1322static void _enable_sysc(struct omap_hwmod *oh)
1323{
1324 u8 idlemode, sf;
1325 u32 v;
1326 bool clkdm_act;
1327 struct clockdomain *clkdm;
1328
1329 if (!oh->class->sysc)
1330 return;
1331
1332 /*
1333 * Wait until reset has completed, this is needed as the IP
1334 * block is reset automatically by hardware in some cases
1335 * (off-mode for example), and the drivers require the
1336 * IP to be ready when they access it
1337 */
1338 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1339 _enable_optional_clocks(oh);
1340 _wait_softreset_complete(oh);
1341 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1342 _disable_optional_clocks(oh);
1343
1344 v = oh->_sysc_cache;
1345 sf = oh->class->sysc->sysc_flags;
1346
1347 clkdm = _get_clkdm(oh);
1348 if (sf & SYSC_HAS_SIDLEMODE) {
1349 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1350 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1351 idlemode = HWMOD_IDLEMODE_NO;
1352 } else {
1353 if (sf & SYSC_HAS_ENAWAKEUP)
1354 _enable_wakeup(oh, &v);
1355 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1356 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1357 else
1358 idlemode = HWMOD_IDLEMODE_SMART;
1359 }
1360
1361 /*
1362 * This is special handling for some IPs like
1363 * 32k sync timer. Force them to idle!
1364 */
1365 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1366 if (clkdm_act && !(oh->class->sysc->idlemodes &
1367 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1368 idlemode = HWMOD_IDLEMODE_FORCE;
1369
1370 _set_slave_idlemode(oh, idlemode, &v);
1371 }
1372
1373 if (sf & SYSC_HAS_MIDLEMODE) {
1374 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1375 idlemode = HWMOD_IDLEMODE_FORCE;
1376 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1377 idlemode = HWMOD_IDLEMODE_NO;
1378 } else {
1379 if (sf & SYSC_HAS_ENAWAKEUP)
1380 _enable_wakeup(oh, &v);
1381 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1382 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1383 else
1384 idlemode = HWMOD_IDLEMODE_SMART;
1385 }
1386 _set_master_standbymode(oh, idlemode, &v);
1387 }
1388
1389 /*
1390 * XXX The clock framework should handle this, by
1391 * calling into this code. But this must wait until the
1392 * clock structures are tagged with omap_hwmod entries
1393 */
1394 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1395 (sf & SYSC_HAS_CLOCKACTIVITY))
1396 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1397
1398 _write_sysconfig(v, oh);
1399
1400 /*
1401 * Set the autoidle bit only after setting the smartidle bit
1402 * Setting this will not have any impact on the other modules.
1403 */
1404 if (sf & SYSC_HAS_AUTOIDLE) {
1405 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1406 0 : 1;
1407 _set_module_autoidle(oh, idlemode, &v);
1408 _write_sysconfig(v, oh);
1409 }
1410}
1411
1412/**
1413 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1414 * @oh: struct omap_hwmod *
1415 *
1416 * If module is marked as SWSUP_SIDLE, force the module into slave
1417 * idle; otherwise, configure it for smart-idle. If module is marked
1418 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1419 * configure it for smart-standby. No return value.
1420 */
1421static void _idle_sysc(struct omap_hwmod *oh)
1422{
1423 u8 idlemode, sf;
1424 u32 v;
1425
1426 if (!oh->class->sysc)
1427 return;
1428
1429 v = oh->_sysc_cache;
1430 sf = oh->class->sysc->sysc_flags;
1431
1432 if (sf & SYSC_HAS_SIDLEMODE) {
1433 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1434 idlemode = HWMOD_IDLEMODE_FORCE;
1435 } else {
1436 if (sf & SYSC_HAS_ENAWAKEUP)
1437 _enable_wakeup(oh, &v);
1438 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1439 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1440 else
1441 idlemode = HWMOD_IDLEMODE_SMART;
1442 }
1443 _set_slave_idlemode(oh, idlemode, &v);
1444 }
1445
1446 if (sf & SYSC_HAS_MIDLEMODE) {
1447 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1448 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1449 idlemode = HWMOD_IDLEMODE_FORCE;
1450 } else {
1451 if (sf & SYSC_HAS_ENAWAKEUP)
1452 _enable_wakeup(oh, &v);
1453 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1454 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1455 else
1456 idlemode = HWMOD_IDLEMODE_SMART;
1457 }
1458 _set_master_standbymode(oh, idlemode, &v);
1459 }
1460
1461 /* If the cached value is the same as the new value, skip the write */
1462 if (oh->_sysc_cache != v)
1463 _write_sysconfig(v, oh);
1464}
1465
1466/**
1467 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1468 * @oh: struct omap_hwmod *
1469 *
1470 * Force the module into slave idle and master suspend. No return
1471 * value.
1472 */
1473static void _shutdown_sysc(struct omap_hwmod *oh)
1474{
1475 u32 v;
1476 u8 sf;
1477
1478 if (!oh->class->sysc)
1479 return;
1480
1481 v = oh->_sysc_cache;
1482 sf = oh->class->sysc->sysc_flags;
1483
1484 if (sf & SYSC_HAS_SIDLEMODE)
1485 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1486
1487 if (sf & SYSC_HAS_MIDLEMODE)
1488 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1489
1490 if (sf & SYSC_HAS_AUTOIDLE)
1491 _set_module_autoidle(oh, 1, &v);
1492
1493 _write_sysconfig(v, oh);
1494}
1495
1496/**
1497 * _lookup - find an omap_hwmod by name
1498 * @name: find an omap_hwmod by name
1499 *
1500 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1501 */
1502static struct omap_hwmod *_lookup(const char *name)
1503{
1504 struct omap_hwmod *oh, *temp_oh;
1505
1506 oh = NULL;
1507
1508 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1509 if (!strcmp(name, temp_oh->name)) {
1510 oh = temp_oh;
1511 break;
1512 }
1513 }
1514
1515 return oh;
1516}
1517
1518/**
1519 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1520 * @oh: struct omap_hwmod *
1521 *
1522 * Convert a clockdomain name stored in a struct omap_hwmod into a
1523 * clockdomain pointer, and save it into the struct omap_hwmod.
1524 * Return -EINVAL if the clkdm_name lookup failed.
1525 */
1526static int _init_clkdm(struct omap_hwmod *oh)
1527{
1528 if (!oh->clkdm_name) {
1529 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1530 return 0;
1531 }
1532
1533 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1534 if (!oh->clkdm) {
1535 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1536 oh->name, oh->clkdm_name);
1537 return 0;
1538 }
1539
1540 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1541 oh->name, oh->clkdm_name);
1542
1543 return 0;
1544}
1545
1546/**
1547 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1548 * well the clockdomain.
1549 * @oh: struct omap_hwmod *
1550 * @data: not used; pass NULL
1551 *
1552 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1553 * Resolves all clock names embedded in the hwmod. Returns 0 on
1554 * success, or a negative error code on failure.
1555 */
1556static int _init_clocks(struct omap_hwmod *oh, void *data)
1557{
1558 int ret = 0;
1559
1560 if (oh->_state != _HWMOD_STATE_REGISTERED)
1561 return 0;
1562
1563 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1564
1565 if (soc_ops.init_clkdm)
1566 ret |= soc_ops.init_clkdm(oh);
1567
1568 ret |= _init_main_clk(oh);
1569 ret |= _init_interface_clks(oh);
1570 ret |= _init_opt_clks(oh);
1571
1572 if (!ret)
1573 oh->_state = _HWMOD_STATE_CLKS_INITED;
1574 else
1575 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1576
1577 return ret;
1578}
1579
1580/**
1581 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1582 * @oh: struct omap_hwmod *
1583 * @name: name of the reset line in the context of this hwmod
1584 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1585 *
1586 * Return the bit position of the reset line that match the
1587 * input name. Return -ENOENT if not found.
1588 */
1589static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1590 struct omap_hwmod_rst_info *ohri)
1591{
1592 int i;
1593
1594 for (i = 0; i < oh->rst_lines_cnt; i++) {
1595 const char *rst_line = oh->rst_lines[i].name;
1596 if (!strcmp(rst_line, name)) {
1597 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1598 ohri->st_shift = oh->rst_lines[i].st_shift;
1599 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1600 oh->name, __func__, rst_line, ohri->rst_shift,
1601 ohri->st_shift);
1602
1603 return 0;
1604 }
1605 }
1606
1607 return -ENOENT;
1608}
1609
1610/**
1611 * _assert_hardreset - assert the HW reset line of submodules
1612 * contained in the hwmod module.
1613 * @oh: struct omap_hwmod *
1614 * @name: name of the reset line to lookup and assert
1615 *
1616 * Some IP like dsp, ipu or iva contain processor that require an HW
1617 * reset line to be assert / deassert in order to enable fully the IP.
1618 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1619 * asserting the hardreset line on the currently-booted SoC, or passes
1620 * along the return value from _lookup_hardreset() or the SoC's
1621 * assert_hardreset code.
1622 */
1623static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1624{
1625 struct omap_hwmod_rst_info ohri;
1626 int ret = -EINVAL;
1627
1628 if (!oh)
1629 return -EINVAL;
1630
1631 if (!soc_ops.assert_hardreset)
1632 return -ENOSYS;
1633
1634 ret = _lookup_hardreset(oh, name, &ohri);
1635 if (ret < 0)
1636 return ret;
1637
1638 ret = soc_ops.assert_hardreset(oh, &ohri);
1639
1640 return ret;
1641}
1642
1643/**
1644 * _deassert_hardreset - deassert the HW reset line of submodules contained
1645 * in the hwmod module.
1646 * @oh: struct omap_hwmod *
1647 * @name: name of the reset line to look up and deassert
1648 *
1649 * Some IP like dsp, ipu or iva contain processor that require an HW
1650 * reset line to be assert / deassert in order to enable fully the IP.
1651 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1652 * deasserting the hardreset line on the currently-booted SoC, or passes
1653 * along the return value from _lookup_hardreset() or the SoC's
1654 * deassert_hardreset code.
1655 */
1656static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1657{
1658 struct omap_hwmod_rst_info ohri;
1659 int ret = -EINVAL;
1660
1661 if (!oh)
1662 return -EINVAL;
1663
1664 if (!soc_ops.deassert_hardreset)
1665 return -ENOSYS;
1666
1667 ret = _lookup_hardreset(oh, name, &ohri);
1668 if (ret < 0)
1669 return ret;
1670
1671 if (oh->clkdm) {
1672 /*
1673 * A clockdomain must be in SW_SUP otherwise reset
1674 * might not be completed. The clockdomain can be set
1675 * in HW_AUTO only when the module become ready.
1676 */
1677 clkdm_deny_idle(oh->clkdm);
1678 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1679 if (ret) {
1680 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1681 oh->name, oh->clkdm->name, ret);
1682 return ret;
1683 }
1684 }
1685
1686 _enable_clocks(oh);
1687 if (soc_ops.enable_module)
1688 soc_ops.enable_module(oh);
1689
1690 ret = soc_ops.deassert_hardreset(oh, &ohri);
1691
1692 if (soc_ops.disable_module)
1693 soc_ops.disable_module(oh);
1694 _disable_clocks(oh);
1695
1696 if (ret == -EBUSY)
1697 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1698
1699 if (oh->clkdm) {
1700 /*
1701 * Set the clockdomain to HW_AUTO, assuming that the
1702 * previous state was HW_AUTO.
1703 */
1704 clkdm_allow_idle(oh->clkdm);
1705
1706 clkdm_hwmod_disable(oh->clkdm, oh);
1707 }
1708
1709 return ret;
1710}
1711
1712/**
1713 * _read_hardreset - read the HW reset line state of submodules
1714 * contained in the hwmod module
1715 * @oh: struct omap_hwmod *
1716 * @name: name of the reset line to look up and read
1717 *
1718 * Return the state of the reset line. Returns -EINVAL if @oh is
1719 * null, -ENOSYS if we have no way of reading the hardreset line
1720 * status on the currently-booted SoC, or passes along the return
1721 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1722 * code.
1723 */
1724static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1725{
1726 struct omap_hwmod_rst_info ohri;
1727 int ret = -EINVAL;
1728
1729 if (!oh)
1730 return -EINVAL;
1731
1732 if (!soc_ops.is_hardreset_asserted)
1733 return -ENOSYS;
1734
1735 ret = _lookup_hardreset(oh, name, &ohri);
1736 if (ret < 0)
1737 return ret;
1738
1739 return soc_ops.is_hardreset_asserted(oh, &ohri);
1740}
1741
1742/**
1743 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1744 * @oh: struct omap_hwmod *
1745 *
1746 * If all hardreset lines associated with @oh are asserted, then return true.
1747 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1748 * associated with @oh are asserted, then return false.
1749 * This function is used to avoid executing some parts of the IP block
1750 * enable/disable sequence if its hardreset line is set.
1751 */
1752static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1753{
1754 int i, rst_cnt = 0;
1755
1756 if (oh->rst_lines_cnt == 0)
1757 return false;
1758
1759 for (i = 0; i < oh->rst_lines_cnt; i++)
1760 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1761 rst_cnt++;
1762
1763 if (oh->rst_lines_cnt == rst_cnt)
1764 return true;
1765
1766 return false;
1767}
1768
1769/**
1770 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1771 * hard-reset
1772 * @oh: struct omap_hwmod *
1773 *
1774 * If any hardreset lines associated with @oh are asserted, then
1775 * return true. Otherwise, if no hardreset lines associated with @oh
1776 * are asserted, or if @oh has no hardreset lines, then return false.
1777 * This function is used to avoid executing some parts of the IP block
1778 * enable/disable sequence if any hardreset line is set.
1779 */
1780static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1781{
1782 int rst_cnt = 0;
1783 int i;
1784
1785 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1786 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1787 rst_cnt++;
1788
1789 return (rst_cnt) ? true : false;
1790}
1791
1792/**
1793 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1794 * @oh: struct omap_hwmod *
1795 *
1796 * Disable the PRCM module mode related to the hwmod @oh.
1797 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1798 */
1799static int _omap4_disable_module(struct omap_hwmod *oh)
1800{
1801 int v;
1802
1803 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1804 return -EINVAL;
1805
1806 /*
1807 * Since integration code might still be doing something, only
1808 * disable if all lines are under hardreset.
1809 */
1810 if (_are_any_hardreset_lines_asserted(oh))
1811 return 0;
1812
1813 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1814
1815 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1816 oh->prcm.omap4.clkctrl_offs);
1817
1818 v = _omap4_wait_target_disable(oh);
1819 if (v)
1820 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1821 oh->name);
1822
1823 return 0;
1824}
1825
1826/**
1827 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1828 * @oh: struct omap_hwmod *
1829 *
1830 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1831 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1832 * reset this way, -EINVAL if the hwmod is in the wrong state,
1833 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1834 *
1835 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1836 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1837 * use the SYSCONFIG softreset bit to provide the status.
1838 *
1839 * Note that some IP like McBSP do have reset control but don't have
1840 * reset status.
1841 */
1842static int _ocp_softreset(struct omap_hwmod *oh)
1843{
1844 u32 v;
1845 int c = 0;
1846 int ret = 0;
1847
1848 if (!oh->class->sysc ||
1849 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1850 return -ENOENT;
1851
1852 /* clocks must be on for this operation */
1853 if (oh->_state != _HWMOD_STATE_ENABLED) {
1854 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1855 oh->name);
1856 return -EINVAL;
1857 }
1858
1859 /* For some modules, all optionnal clocks need to be enabled as well */
1860 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1861 _enable_optional_clocks(oh);
1862
1863 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1864
1865 v = oh->_sysc_cache;
1866 ret = _set_softreset(oh, &v);
1867 if (ret)
1868 goto dis_opt_clks;
1869
1870 _write_sysconfig(v, oh);
1871
1872 if (oh->class->sysc->srst_udelay)
1873 udelay(oh->class->sysc->srst_udelay);
1874
1875 c = _wait_softreset_complete(oh);
1876 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1877 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1878 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1879 ret = -ETIMEDOUT;
1880 goto dis_opt_clks;
1881 } else {
1882 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1883 }
1884
1885 ret = _clear_softreset(oh, &v);
1886 if (ret)
1887 goto dis_opt_clks;
1888
1889 _write_sysconfig(v, oh);
1890
1891 /*
1892 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1893 * _wait_target_ready() or _reset()
1894 */
1895
1896dis_opt_clks:
1897 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1898 _disable_optional_clocks(oh);
1899
1900 return ret;
1901}
1902
1903/**
1904 * _reset - reset an omap_hwmod
1905 * @oh: struct omap_hwmod *
1906 *
1907 * Resets an omap_hwmod @oh. If the module has a custom reset
1908 * function pointer defined, then call it to reset the IP block, and
1909 * pass along its return value to the caller. Otherwise, if the IP
1910 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1911 * associated with it, call a function to reset the IP block via that
1912 * method, and pass along the return value to the caller. Finally, if
1913 * the IP block has some hardreset lines associated with it, assert
1914 * all of those, but do _not_ deassert them. (This is because driver
1915 * authors have expressed an apparent requirement to control the
1916 * deassertion of the hardreset lines themselves.)
1917 *
1918 * The default software reset mechanism for most OMAP IP blocks is
1919 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1920 * hwmods cannot be reset via this method. Some are not targets and
1921 * therefore have no OCP header registers to access. Others (like the
1922 * IVA) have idiosyncratic reset sequences. So for these relatively
1923 * rare cases, custom reset code can be supplied in the struct
1924 * omap_hwmod_class .reset function pointer.
1925 *
1926 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1927 * does not prevent idling of the system. This is necessary for cases
1928 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1929 * kernel without disabling dma.
1930 *
1931 * Passes along the return value from either _ocp_softreset() or the
1932 * custom reset function - these must return -EINVAL if the hwmod
1933 * cannot be reset this way or if the hwmod is in the wrong state,
1934 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1935 */
1936static int _reset(struct omap_hwmod *oh)
1937{
1938 int i, r;
1939
1940 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1941
1942 if (oh->class->reset) {
1943 r = oh->class->reset(oh);
1944 } else {
1945 if (oh->rst_lines_cnt > 0) {
1946 for (i = 0; i < oh->rst_lines_cnt; i++)
1947 _assert_hardreset(oh, oh->rst_lines[i].name);
1948 return 0;
1949 } else {
1950 r = _ocp_softreset(oh);
1951 if (r == -ENOENT)
1952 r = 0;
1953 }
1954 }
1955
1956 _set_dmadisable(oh);
1957
1958 /*
1959 * OCP_SYSCONFIG bits need to be reprogrammed after a
1960 * softreset. The _enable() function should be split to avoid
1961 * the rewrite of the OCP_SYSCONFIG register.
1962 */
1963 if (oh->class->sysc) {
1964 _update_sysc_cache(oh);
1965 _enable_sysc(oh);
1966 }
1967
1968 return r;
1969}
1970
1971/**
1972 * _omap4_update_context_lost - increment hwmod context loss counter if
1973 * hwmod context was lost, and clear hardware context loss reg
1974 * @oh: hwmod to check for context loss
1975 *
1976 * If the PRCM indicates that the hwmod @oh lost context, increment
1977 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1978 * bits. No return value.
1979 */
1980static void _omap4_update_context_lost(struct omap_hwmod *oh)
1981{
1982 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1983 return;
1984
1985 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1986 oh->clkdm->pwrdm.ptr->prcm_offs,
1987 oh->prcm.omap4.context_offs))
1988 return;
1989
1990 oh->prcm.omap4.context_lost_counter++;
1991 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1992 oh->clkdm->pwrdm.ptr->prcm_offs,
1993 oh->prcm.omap4.context_offs);
1994}
1995
1996/**
1997 * _omap4_get_context_lost - get context loss counter for a hwmod
1998 * @oh: hwmod to get context loss counter for
1999 *
2000 * Returns the in-memory context loss counter for a hwmod.
2001 */
2002static int _omap4_get_context_lost(struct omap_hwmod *oh)
2003{
2004 return oh->prcm.omap4.context_lost_counter;
2005}
2006
2007/**
2008 * _enable_preprogram - Pre-program an IP block during the _enable() process
2009 * @oh: struct omap_hwmod *
2010 *
2011 * Some IP blocks (such as AESS) require some additional programming
2012 * after enable before they can enter idle. If a function pointer to
2013 * do so is present in the hwmod data, then call it and pass along the
2014 * return value; otherwise, return 0.
2015 */
2016static int _enable_preprogram(struct omap_hwmod *oh)
2017{
2018 if (!oh->class->enable_preprogram)
2019 return 0;
2020
2021 return oh->class->enable_preprogram(oh);
2022}
2023
2024/**
2025 * _enable - enable an omap_hwmod
2026 * @oh: struct omap_hwmod *
2027 *
2028 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2029 * register target. Returns -EINVAL if the hwmod is in the wrong
2030 * state or passes along the return value of _wait_target_ready().
2031 */
2032static int _enable(struct omap_hwmod *oh)
2033{
2034 int r;
2035
2036 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2037
2038 /*
2039 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2040 * state at init.
2041 */
2042 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2043 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2044 return 0;
2045 }
2046
2047 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2048 oh->_state != _HWMOD_STATE_IDLE &&
2049 oh->_state != _HWMOD_STATE_DISABLED) {
2050 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2051 oh->name);
2052 return -EINVAL;
2053 }
2054
2055 /*
2056 * If an IP block contains HW reset lines and all of them are
2057 * asserted, we let integration code associated with that
2058 * block handle the enable. We've received very little
2059 * information on what those driver authors need, and until
2060 * detailed information is provided and the driver code is
2061 * posted to the public lists, this is probably the best we
2062 * can do.
2063 */
2064 if (_are_all_hardreset_lines_asserted(oh))
2065 return 0;
2066
2067 _add_initiator_dep(oh, mpu_oh);
2068
2069 if (oh->clkdm) {
2070 /*
2071 * A clockdomain must be in SW_SUP before enabling
2072 * completely the module. The clockdomain can be set
2073 * in HW_AUTO only when the module become ready.
2074 */
2075 clkdm_deny_idle(oh->clkdm);
2076 r = clkdm_hwmod_enable(oh->clkdm, oh);
2077 if (r) {
2078 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2079 oh->name, oh->clkdm->name, r);
2080 return r;
2081 }
2082 }
2083
2084 _enable_clocks(oh);
2085 if (soc_ops.enable_module)
2086 soc_ops.enable_module(oh);
2087 if (oh->flags & HWMOD_BLOCK_WFI)
2088 cpu_idle_poll_ctrl(true);
2089
2090 if (soc_ops.update_context_lost)
2091 soc_ops.update_context_lost(oh);
2092
2093 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2094 -EINVAL;
2095 if (oh->clkdm)
2096 clkdm_allow_idle(oh->clkdm);
2097
2098 if (!r) {
2099 oh->_state = _HWMOD_STATE_ENABLED;
2100
2101 /* Access the sysconfig only if the target is ready */
2102 if (oh->class->sysc) {
2103 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2104 _update_sysc_cache(oh);
2105 _enable_sysc(oh);
2106 }
2107 r = _enable_preprogram(oh);
2108 } else {
2109 if (soc_ops.disable_module)
2110 soc_ops.disable_module(oh);
2111 _disable_clocks(oh);
2112 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
2113 oh->name, r);
2114
2115 if (oh->clkdm)
2116 clkdm_hwmod_disable(oh->clkdm, oh);
2117 }
2118
2119 return r;
2120}
2121
2122/**
2123 * _idle - idle an omap_hwmod
2124 * @oh: struct omap_hwmod *
2125 *
2126 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2127 * no further work. Returns -EINVAL if the hwmod is in the wrong
2128 * state or returns 0.
2129 */
2130static int _idle(struct omap_hwmod *oh)
2131{
2132 if (oh->flags & HWMOD_NO_IDLE) {
2133 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2134 return 0;
2135 }
2136
2137 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2138
2139 if (_are_all_hardreset_lines_asserted(oh))
2140 return 0;
2141
2142 if (oh->_state != _HWMOD_STATE_ENABLED) {
2143 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2144 oh->name);
2145 return -EINVAL;
2146 }
2147
2148 if (oh->class->sysc)
2149 _idle_sysc(oh);
2150 _del_initiator_dep(oh, mpu_oh);
2151
2152 if (oh->clkdm)
2153 clkdm_deny_idle(oh->clkdm);
2154
2155 if (oh->flags & HWMOD_BLOCK_WFI)
2156 cpu_idle_poll_ctrl(false);
2157 if (soc_ops.disable_module)
2158 soc_ops.disable_module(oh);
2159
2160 /*
2161 * The module must be in idle mode before disabling any parents
2162 * clocks. Otherwise, the parent clock might be disabled before
2163 * the module transition is done, and thus will prevent the
2164 * transition to complete properly.
2165 */
2166 _disable_clocks(oh);
2167 if (oh->clkdm) {
2168 clkdm_allow_idle(oh->clkdm);
2169 clkdm_hwmod_disable(oh->clkdm, oh);
2170 }
2171
2172 oh->_state = _HWMOD_STATE_IDLE;
2173
2174 return 0;
2175}
2176
2177/**
2178 * _shutdown - shutdown an omap_hwmod
2179 * @oh: struct omap_hwmod *
2180 *
2181 * Shut down an omap_hwmod @oh. This should be called when the driver
2182 * used for the hwmod is removed or unloaded or if the driver is not
2183 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2184 * state or returns 0.
2185 */
2186static int _shutdown(struct omap_hwmod *oh)
2187{
2188 int ret, i;
2189 u8 prev_state;
2190
2191 if (_are_all_hardreset_lines_asserted(oh))
2192 return 0;
2193
2194 if (oh->_state != _HWMOD_STATE_IDLE &&
2195 oh->_state != _HWMOD_STATE_ENABLED) {
2196 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2197 oh->name);
2198 return -EINVAL;
2199 }
2200
2201 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2202
2203 if (oh->class->pre_shutdown) {
2204 prev_state = oh->_state;
2205 if (oh->_state == _HWMOD_STATE_IDLE)
2206 _enable(oh);
2207 ret = oh->class->pre_shutdown(oh);
2208 if (ret) {
2209 if (prev_state == _HWMOD_STATE_IDLE)
2210 _idle(oh);
2211 return ret;
2212 }
2213 }
2214
2215 if (oh->class->sysc) {
2216 if (oh->_state == _HWMOD_STATE_IDLE)
2217 _enable(oh);
2218 _shutdown_sysc(oh);
2219 }
2220
2221 /* clocks and deps are already disabled in idle */
2222 if (oh->_state == _HWMOD_STATE_ENABLED) {
2223 _del_initiator_dep(oh, mpu_oh);
2224 /* XXX what about the other system initiators here? dma, dsp */
2225 if (oh->flags & HWMOD_BLOCK_WFI)
2226 cpu_idle_poll_ctrl(false);
2227 if (soc_ops.disable_module)
2228 soc_ops.disable_module(oh);
2229 _disable_clocks(oh);
2230 if (oh->clkdm)
2231 clkdm_hwmod_disable(oh->clkdm, oh);
2232 }
2233 /* XXX Should this code also force-disable the optional clocks? */
2234
2235 for (i = 0; i < oh->rst_lines_cnt; i++)
2236 _assert_hardreset(oh, oh->rst_lines[i].name);
2237
2238 oh->_state = _HWMOD_STATE_DISABLED;
2239
2240 return 0;
2241}
2242
2243static int of_dev_find_hwmod(struct device_node *np,
2244 struct omap_hwmod *oh)
2245{
2246 int count, i, res;
2247 const char *p;
2248
2249 count = of_property_count_strings(np, "ti,hwmods");
2250 if (count < 1)
2251 return -ENODEV;
2252
2253 for (i = 0; i < count; i++) {
2254 res = of_property_read_string_index(np, "ti,hwmods",
2255 i, &p);
2256 if (res)
2257 continue;
2258 if (!strcmp(p, oh->name)) {
2259 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2260 np->name, i, oh->name);
2261 return i;
2262 }
2263 }
2264
2265 return -ENODEV;
2266}
2267
2268/**
2269 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2270 * @np: struct device_node *
2271 * @oh: struct omap_hwmod *
2272 * @index: index of the entry found
2273 * @found: struct device_node * found or NULL
2274 *
2275 * Parse the dt blob and find out needed hwmod. Recursive function is
2276 * implemented to take care hierarchical dt blob parsing.
2277 * Return: Returns 0 on success, -ENODEV when not found.
2278 */
2279static int of_dev_hwmod_lookup(struct device_node *np,
2280 struct omap_hwmod *oh,
2281 int *index,
2282 struct device_node **found)
2283{
2284 struct device_node *np0 = NULL;
2285 int res;
2286
2287 res = of_dev_find_hwmod(np, oh);
2288 if (res >= 0) {
2289 *found = np;
2290 *index = res;
2291 return 0;
2292 }
2293
2294 for_each_child_of_node(np, np0) {
2295 struct device_node *fc;
2296 int i;
2297
2298 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2299 if (res == 0) {
2300 *found = fc;
2301 *index = i;
2302 return 0;
2303 }
2304 }
2305
2306 *found = NULL;
2307 *index = 0;
2308
2309 return -ENODEV;
2310}
2311
2312/**
2313 * _init_mpu_rt_base - populate the virtual address for a hwmod
2314 * @oh: struct omap_hwmod * to locate the virtual address
2315 * @data: (unused, caller should pass NULL)
2316 * @index: index of the reg entry iospace in device tree
2317 * @np: struct device_node * of the IP block's device node in the DT data
2318 *
2319 * Cache the virtual address used by the MPU to access this IP block's
2320 * registers. This address is needed early so the OCP registers that
2321 * are part of the device's address space can be ioremapped properly.
2322 *
2323 * If SYSC access is not needed, the registers will not be remapped
2324 * and non-availability of MPU access is not treated as an error.
2325 *
2326 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2327 * -ENXIO on absent or invalid register target address space.
2328 */
2329static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2330 int index, struct device_node *np)
2331{
2332 struct omap_hwmod_addr_space *mem;
2333 void __iomem *va_start = NULL;
2334
2335 if (!oh)
2336 return -EINVAL;
2337
2338 _save_mpu_port_index(oh);
2339
2340 /* if we don't need sysc access we don't need to ioremap */
2341 if (!oh->class->sysc)
2342 return 0;
2343
2344 /* we can't continue without MPU PORT if we need sysc access */
2345 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2346 return -ENXIO;
2347
2348 mem = _find_mpu_rt_addr_space(oh);
2349 if (!mem) {
2350 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2351 oh->name);
2352
2353 /* Extract the IO space from device tree blob */
2354 if (!np) {
2355 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2356 return -ENXIO;
2357 }
2358
2359 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2360 } else {
2361 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2362 }
2363
2364 if (!va_start) {
2365 if (mem)
2366 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2367 else
2368 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2369 oh->name, index, np->full_name);
2370 return -ENXIO;
2371 }
2372
2373 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2374 oh->name, va_start);
2375
2376 oh->_mpu_rt_va = va_start;
2377 return 0;
2378}
2379
2380/**
2381 * _init - initialize internal data for the hwmod @oh
2382 * @oh: struct omap_hwmod *
2383 * @n: (unused)
2384 *
2385 * Look up the clocks and the address space used by the MPU to access
2386 * registers belonging to the hwmod @oh. @oh must already be
2387 * registered at this point. This is the first of two phases for
2388 * hwmod initialization. Code called here does not touch any hardware
2389 * registers, it simply prepares internal data structures. Returns 0
2390 * upon success or if the hwmod isn't registered or if the hwmod's
2391 * address space is not defined, or -EINVAL upon failure.
2392 */
2393static int __init _init(struct omap_hwmod *oh, void *data)
2394{
2395 int r, index;
2396 struct device_node *np = NULL;
2397
2398 if (oh->_state != _HWMOD_STATE_REGISTERED)
2399 return 0;
2400
2401 if (of_have_populated_dt()) {
2402 struct device_node *bus;
2403
2404 bus = of_find_node_by_name(NULL, "ocp");
2405 if (!bus)
2406 return -ENODEV;
2407
2408 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2409 if (r)
2410 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2411 else if (np && index)
2412 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2413 oh->name, np->name);
2414 }
2415
2416 r = _init_mpu_rt_base(oh, NULL, index, np);
2417 if (r < 0) {
2418 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2419 oh->name);
2420 return 0;
2421 }
2422
2423 r = _init_clocks(oh, NULL);
2424 if (r < 0) {
2425 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2426 return -EINVAL;
2427 }
2428
2429 if (np) {
2430 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2431 oh->flags |= HWMOD_INIT_NO_RESET;
2432 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2433 oh->flags |= HWMOD_INIT_NO_IDLE;
2434 if (of_find_property(np, "ti,no-idle", NULL))
2435 oh->flags |= HWMOD_NO_IDLE;
2436 }
2437
2438 oh->_state = _HWMOD_STATE_INITIALIZED;
2439
2440 return 0;
2441}
2442
2443/**
2444 * _setup_iclk_autoidle - configure an IP block's interface clocks
2445 * @oh: struct omap_hwmod *
2446 *
2447 * Set up the module's interface clocks. XXX This function is still mostly
2448 * a stub; implementing this properly requires iclk autoidle usecounting in
2449 * the clock code. No return value.
2450 */
2451static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2452{
2453 struct omap_hwmod_ocp_if *os;
2454 struct list_head *p;
2455 int i = 0;
2456 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2457 return;
2458
2459 p = oh->slave_ports.next;
2460
2461 while (i < oh->slaves_cnt) {
2462 os = _fetch_next_ocp_if(&p, &i);
2463 if (!os->_clk)
2464 continue;
2465
2466 if (os->flags & OCPIF_SWSUP_IDLE) {
2467 /* XXX omap_iclk_deny_idle(c); */
2468 } else {
2469 /* XXX omap_iclk_allow_idle(c); */
2470 clk_enable(os->_clk);
2471 }
2472 }
2473
2474 return;
2475}
2476
2477/**
2478 * _setup_reset - reset an IP block during the setup process
2479 * @oh: struct omap_hwmod *
2480 *
2481 * Reset the IP block corresponding to the hwmod @oh during the setup
2482 * process. The IP block is first enabled so it can be successfully
2483 * reset. Returns 0 upon success or a negative error code upon
2484 * failure.
2485 */
2486static int __init _setup_reset(struct omap_hwmod *oh)
2487{
2488 int r;
2489
2490 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2491 return -EINVAL;
2492
2493 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2494 return -EPERM;
2495
2496 if (oh->rst_lines_cnt == 0) {
2497 r = _enable(oh);
2498 if (r) {
2499 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2500 oh->name, oh->_state);
2501 return -EINVAL;
2502 }
2503 }
2504
2505 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2506 r = _reset(oh);
2507
2508 return r;
2509}
2510
2511/**
2512 * _setup_postsetup - transition to the appropriate state after _setup
2513 * @oh: struct omap_hwmod *
2514 *
2515 * Place an IP block represented by @oh into a "post-setup" state --
2516 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2517 * this function is called at the end of _setup().) The postsetup
2518 * state for an IP block can be changed by calling
2519 * omap_hwmod_enter_postsetup_state() early in the boot process,
2520 * before one of the omap_hwmod_setup*() functions are called for the
2521 * IP block.
2522 *
2523 * The IP block stays in this state until a PM runtime-based driver is
2524 * loaded for that IP block. A post-setup state of IDLE is
2525 * appropriate for almost all IP blocks with runtime PM-enabled
2526 * drivers, since those drivers are able to enable the IP block. A
2527 * post-setup state of ENABLED is appropriate for kernels with PM
2528 * runtime disabled. The DISABLED state is appropriate for unusual IP
2529 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2530 * included, since the WDTIMER starts running on reset and will reset
2531 * the MPU if left active.
2532 *
2533 * This post-setup mechanism is deprecated. Once all of the OMAP
2534 * drivers have been converted to use PM runtime, and all of the IP
2535 * block data and interconnect data is available to the hwmod code, it
2536 * should be possible to replace this mechanism with a "lazy reset"
2537 * arrangement. In a "lazy reset" setup, each IP block is enabled
2538 * when the driver first probes, then all remaining IP blocks without
2539 * drivers are either shut down or enabled after the drivers have
2540 * loaded. However, this cannot take place until the above
2541 * preconditions have been met, since otherwise the late reset code
2542 * has no way of knowing which IP blocks are in use by drivers, and
2543 * which ones are unused.
2544 *
2545 * No return value.
2546 */
2547static void __init _setup_postsetup(struct omap_hwmod *oh)
2548{
2549 u8 postsetup_state;
2550
2551 if (oh->rst_lines_cnt > 0)
2552 return;
2553
2554 postsetup_state = oh->_postsetup_state;
2555 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2556 postsetup_state = _HWMOD_STATE_ENABLED;
2557
2558 /*
2559 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2560 * it should be set by the core code as a runtime flag during startup
2561 */
2562 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2563 (postsetup_state == _HWMOD_STATE_IDLE)) {
2564 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2565 postsetup_state = _HWMOD_STATE_ENABLED;
2566 }
2567
2568 if (postsetup_state == _HWMOD_STATE_IDLE)
2569 _idle(oh);
2570 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2571 _shutdown(oh);
2572 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2573 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2574 oh->name, postsetup_state);
2575
2576 return;
2577}
2578
2579/**
2580 * _setup - prepare IP block hardware for use
2581 * @oh: struct omap_hwmod *
2582 * @n: (unused, pass NULL)
2583 *
2584 * Configure the IP block represented by @oh. This may include
2585 * enabling the IP block, resetting it, and placing it into a
2586 * post-setup state, depending on the type of IP block and applicable
2587 * flags. IP blocks are reset to prevent any previous configuration
2588 * by the bootloader or previous operating system from interfering
2589 * with power management or other parts of the system. The reset can
2590 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2591 * two phases for hwmod initialization. Code called here generally
2592 * affects the IP block hardware, or system integration hardware
2593 * associated with the IP block. Returns 0.
2594 */
2595static int __init _setup(struct omap_hwmod *oh, void *data)
2596{
2597 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2598 return 0;
2599
2600 if (oh->parent_hwmod) {
2601 int r;
2602
2603 r = _enable(oh->parent_hwmod);
2604 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2605 oh->name, oh->parent_hwmod->name);
2606 }
2607
2608 _setup_iclk_autoidle(oh);
2609
2610 if (!_setup_reset(oh))
2611 _setup_postsetup(oh);
2612
2613 if (oh->parent_hwmod) {
2614 u8 postsetup_state;
2615
2616 postsetup_state = oh->parent_hwmod->_postsetup_state;
2617
2618 if (postsetup_state == _HWMOD_STATE_IDLE)
2619 _idle(oh->parent_hwmod);
2620 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2621 _shutdown(oh->parent_hwmod);
2622 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2623 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2624 oh->parent_hwmod->name, postsetup_state);
2625 }
2626
2627 return 0;
2628}
2629
2630/**
2631 * _register - register a struct omap_hwmod
2632 * @oh: struct omap_hwmod *
2633 *
2634 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2635 * already has been registered by the same name; -EINVAL if the
2636 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2637 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2638 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2639 * success.
2640 *
2641 * XXX The data should be copied into bootmem, so the original data
2642 * should be marked __initdata and freed after init. This would allow
2643 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2644 * that the copy process would be relatively complex due to the large number
2645 * of substructures.
2646 */
2647static int __init _register(struct omap_hwmod *oh)
2648{
2649 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2650 (oh->_state != _HWMOD_STATE_UNKNOWN))
2651 return -EINVAL;
2652
2653 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2654
2655 if (_lookup(oh->name))
2656 return -EEXIST;
2657
2658 list_add_tail(&oh->node, &omap_hwmod_list);
2659
2660 INIT_LIST_HEAD(&oh->master_ports);
2661 INIT_LIST_HEAD(&oh->slave_ports);
2662 spin_lock_init(&oh->_lock);
2663 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2664
2665 oh->_state = _HWMOD_STATE_REGISTERED;
2666
2667 /*
2668 * XXX Rather than doing a strcmp(), this should test a flag
2669 * set in the hwmod data, inserted by the autogenerator code.
2670 */
2671 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2672 mpu_oh = oh;
2673
2674 return 0;
2675}
2676
2677/**
2678 * _alloc_links - return allocated memory for hwmod links
2679 * @ml: pointer to a struct omap_hwmod_link * for the master link
2680 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2681 *
2682 * Return pointers to two struct omap_hwmod_link records, via the
2683 * addresses pointed to by @ml and @sl. Will first attempt to return
2684 * memory allocated as part of a large initial block, but if that has
2685 * been exhausted, will allocate memory itself. Since ideally this
2686 * second allocation path will never occur, the number of these
2687 * 'supplemental' allocations will be logged when debugging is
2688 * enabled. Returns 0.
2689 */
2690static int __init _alloc_links(struct omap_hwmod_link **ml,
2691 struct omap_hwmod_link **sl)
2692{
2693 unsigned int sz;
2694
2695 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2696 *ml = &linkspace[free_ls++];
2697 *sl = &linkspace[free_ls++];
2698 return 0;
2699 }
2700
2701 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2702
2703 *sl = NULL;
2704 *ml = memblock_virt_alloc(sz, 0);
2705
2706 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2707
2708 ls_supp++;
2709 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2710 ls_supp * LINKS_PER_OCP_IF);
2711
2712 return 0;
2713};
2714
2715/**
2716 * _add_link - add an interconnect between two IP blocks
2717 * @oi: pointer to a struct omap_hwmod_ocp_if record
2718 *
2719 * Add struct omap_hwmod_link records connecting the master IP block
2720 * specified in @oi->master to @oi, and connecting the slave IP block
2721 * specified in @oi->slave to @oi. This code is assumed to run before
2722 * preemption or SMP has been enabled, thus avoiding the need for
2723 * locking in this code. Changes to this assumption will require
2724 * additional locking. Returns 0.
2725 */
2726static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2727{
2728 struct omap_hwmod_link *ml, *sl;
2729
2730 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2731 oi->slave->name);
2732
2733 _alloc_links(&ml, &sl);
2734
2735 ml->ocp_if = oi;
2736 list_add(&ml->node, &oi->master->master_ports);
2737 oi->master->masters_cnt++;
2738
2739 sl->ocp_if = oi;
2740 list_add(&sl->node, &oi->slave->slave_ports);
2741 oi->slave->slaves_cnt++;
2742
2743 return 0;
2744}
2745
2746/**
2747 * _register_link - register a struct omap_hwmod_ocp_if
2748 * @oi: struct omap_hwmod_ocp_if *
2749 *
2750 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2751 * has already been registered; -EINVAL if @oi is NULL or if the
2752 * record pointed to by @oi is missing required fields; or 0 upon
2753 * success.
2754 *
2755 * XXX The data should be copied into bootmem, so the original data
2756 * should be marked __initdata and freed after init. This would allow
2757 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2758 */
2759static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2760{
2761 if (!oi || !oi->master || !oi->slave || !oi->user)
2762 return -EINVAL;
2763
2764 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2765 return -EEXIST;
2766
2767 pr_debug("omap_hwmod: registering link from %s to %s\n",
2768 oi->master->name, oi->slave->name);
2769
2770 /*
2771 * Register the connected hwmods, if they haven't been
2772 * registered already
2773 */
2774 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2775 _register(oi->master);
2776
2777 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2778 _register(oi->slave);
2779
2780 _add_link(oi);
2781
2782 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2783
2784 return 0;
2785}
2786
2787/**
2788 * _alloc_linkspace - allocate large block of hwmod links
2789 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2790 *
2791 * Allocate a large block of struct omap_hwmod_link records. This
2792 * improves boot time significantly by avoiding the need to allocate
2793 * individual records one by one. If the number of records to
2794 * allocate in the block hasn't been manually specified, this function
2795 * will count the number of struct omap_hwmod_ocp_if records in @ois
2796 * and use that to determine the allocation size. For SoC families
2797 * that require multiple list registrations, such as OMAP3xxx, this
2798 * estimation process isn't optimal, so manual estimation is advised
2799 * in those cases. Returns -EEXIST if the allocation has already occurred
2800 * or 0 upon success.
2801 */
2802static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2803{
2804 unsigned int i = 0;
2805 unsigned int sz;
2806
2807 if (linkspace) {
2808 WARN(1, "linkspace already allocated\n");
2809 return -EEXIST;
2810 }
2811
2812 if (max_ls == 0)
2813 while (ois[i++])
2814 max_ls += LINKS_PER_OCP_IF;
2815
2816 sz = sizeof(struct omap_hwmod_link) * max_ls;
2817
2818 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2819 __func__, sz, max_ls);
2820
2821 linkspace = memblock_virt_alloc(sz, 0);
2822
2823 return 0;
2824}
2825
2826/* Static functions intended only for use in soc_ops field function pointers */
2827
2828/**
2829 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2830 * @oh: struct omap_hwmod *
2831 *
2832 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2833 * does not have an IDLEST bit or if the module successfully leaves
2834 * slave idle; otherwise, pass along the return value of the
2835 * appropriate *_cm*_wait_module_ready() function.
2836 */
2837static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2838{
2839 if (!oh)
2840 return -EINVAL;
2841
2842 if (oh->flags & HWMOD_NO_IDLEST)
2843 return 0;
2844
2845 if (!_find_mpu_rt_port(oh))
2846 return 0;
2847
2848 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2849
2850 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2851 oh->prcm.omap2.idlest_reg_id,
2852 oh->prcm.omap2.idlest_idle_bit);
2853}
2854
2855/**
2856 * _omap4_wait_target_ready - wait for a module to leave slave idle
2857 * @oh: struct omap_hwmod *
2858 *
2859 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2860 * does not have an IDLEST bit or if the module successfully leaves
2861 * slave idle; otherwise, pass along the return value of the
2862 * appropriate *_cm*_wait_module_ready() function.
2863 */
2864static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2865{
2866 if (!oh)
2867 return -EINVAL;
2868
2869 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2870 return 0;
2871
2872 if (!_find_mpu_rt_port(oh))
2873 return 0;
2874
2875 if (!oh->prcm.omap4.clkctrl_offs &&
2876 !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
2877 return 0;
2878
2879 /* XXX check module SIDLEMODE, hardreset status */
2880
2881 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2882 oh->clkdm->cm_inst,
2883 oh->prcm.omap4.clkctrl_offs, 0);
2884}
2885
2886/**
2887 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2888 * @oh: struct omap_hwmod * to assert hardreset
2889 * @ohri: hardreset line data
2890 *
2891 * Call omap2_prm_assert_hardreset() with parameters extracted from
2892 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2893 * use as an soc_ops function pointer. Passes along the return value
2894 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2895 * for removal when the PRM code is moved into drivers/.
2896 */
2897static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2898 struct omap_hwmod_rst_info *ohri)
2899{
2900 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2901 oh->prcm.omap2.module_offs, 0);
2902}
2903
2904/**
2905 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2906 * @oh: struct omap_hwmod * to deassert hardreset
2907 * @ohri: hardreset line data
2908 *
2909 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2910 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2911 * use as an soc_ops function pointer. Passes along the return value
2912 * from omap2_prm_deassert_hardreset(). XXX This function is
2913 * scheduled for removal when the PRM code is moved into drivers/.
2914 */
2915static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2916 struct omap_hwmod_rst_info *ohri)
2917{
2918 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2919 oh->prcm.omap2.module_offs, 0, 0);
2920}
2921
2922/**
2923 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2924 * @oh: struct omap_hwmod * to test hardreset
2925 * @ohri: hardreset line data
2926 *
2927 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2928 * from the hwmod @oh and the hardreset line data @ohri. Only
2929 * intended for use as an soc_ops function pointer. Passes along the
2930 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2931 * function is scheduled for removal when the PRM code is moved into
2932 * drivers/.
2933 */
2934static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2935 struct omap_hwmod_rst_info *ohri)
2936{
2937 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2938 oh->prcm.omap2.module_offs, 0);
2939}
2940
2941/**
2942 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2943 * @oh: struct omap_hwmod * to assert hardreset
2944 * @ohri: hardreset line data
2945 *
2946 * Call omap4_prminst_assert_hardreset() with parameters extracted
2947 * from the hwmod @oh and the hardreset line data @ohri. Only
2948 * intended for use as an soc_ops function pointer. Passes along the
2949 * return value from omap4_prminst_assert_hardreset(). XXX This
2950 * function is scheduled for removal when the PRM code is moved into
2951 * drivers/.
2952 */
2953static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2954 struct omap_hwmod_rst_info *ohri)
2955{
2956 if (!oh->clkdm)
2957 return -EINVAL;
2958
2959 return omap_prm_assert_hardreset(ohri->rst_shift,
2960 oh->clkdm->pwrdm.ptr->prcm_partition,
2961 oh->clkdm->pwrdm.ptr->prcm_offs,
2962 oh->prcm.omap4.rstctrl_offs);
2963}
2964
2965/**
2966 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2967 * @oh: struct omap_hwmod * to deassert hardreset
2968 * @ohri: hardreset line data
2969 *
2970 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2971 * from the hwmod @oh and the hardreset line data @ohri. Only
2972 * intended for use as an soc_ops function pointer. Passes along the
2973 * return value from omap4_prminst_deassert_hardreset(). XXX This
2974 * function is scheduled for removal when the PRM code is moved into
2975 * drivers/.
2976 */
2977static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2978 struct omap_hwmod_rst_info *ohri)
2979{
2980 if (!oh->clkdm)
2981 return -EINVAL;
2982
2983 if (ohri->st_shift)
2984 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2985 oh->name, ohri->name);
2986 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2987 oh->clkdm->pwrdm.ptr->prcm_partition,
2988 oh->clkdm->pwrdm.ptr->prcm_offs,
2989 oh->prcm.omap4.rstctrl_offs,
2990 oh->prcm.omap4.rstctrl_offs +
2991 OMAP4_RST_CTRL_ST_OFFSET);
2992}
2993
2994/**
2995 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2996 * @oh: struct omap_hwmod * to test hardreset
2997 * @ohri: hardreset line data
2998 *
2999 * Call omap4_prminst_is_hardreset_asserted() with parameters
3000 * extracted from the hwmod @oh and the hardreset line data @ohri.
3001 * Only intended for use as an soc_ops function pointer. Passes along
3002 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3003 * This function is scheduled for removal when the PRM code is moved
3004 * into drivers/.
3005 */
3006static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3007 struct omap_hwmod_rst_info *ohri)
3008{
3009 if (!oh->clkdm)
3010 return -EINVAL;
3011
3012 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
3013 oh->clkdm->pwrdm.ptr->
3014 prcm_partition,
3015 oh->clkdm->pwrdm.ptr->prcm_offs,
3016 oh->prcm.omap4.rstctrl_offs);
3017}
3018
3019/**
3020 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
3021 * @oh: struct omap_hwmod * to disable control for
3022 *
3023 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
3024 * will be using its main_clk to enable/disable the module. Returns
3025 * 0 if successful.
3026 */
3027static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
3028{
3029 if (!oh)
3030 return -EINVAL;
3031
3032 oh->prcm.omap4.clkctrl_offs = 0;
3033 oh->prcm.omap4.modulemode = 0;
3034
3035 return 0;
3036}
3037
3038/**
3039 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3040 * @oh: struct omap_hwmod * to deassert hardreset
3041 * @ohri: hardreset line data
3042 *
3043 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3044 * from the hwmod @oh and the hardreset line data @ohri. Only
3045 * intended for use as an soc_ops function pointer. Passes along the
3046 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3047 * function is scheduled for removal when the PRM code is moved into
3048 * drivers/.
3049 */
3050static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3051 struct omap_hwmod_rst_info *ohri)
3052{
3053 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
3054 oh->clkdm->pwrdm.ptr->prcm_partition,
3055 oh->clkdm->pwrdm.ptr->prcm_offs,
3056 oh->prcm.omap4.rstctrl_offs,
3057 oh->prcm.omap4.rstst_offs);
3058}
3059
3060/* Public functions */
3061
3062u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3063{
3064 if (oh->flags & HWMOD_16BIT_REG)
3065 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
3066 else
3067 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
3068}
3069
3070void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3071{
3072 if (oh->flags & HWMOD_16BIT_REG)
3073 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
3074 else
3075 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
3076}
3077
3078/**
3079 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3080 * @oh: struct omap_hwmod *
3081 *
3082 * This is a public function exposed to drivers. Some drivers may need to do
3083 * some settings before and after resetting the device. Those drivers after
3084 * doing the necessary settings could use this function to start a reset by
3085 * setting the SYSCONFIG.SOFTRESET bit.
3086 */
3087int omap_hwmod_softreset(struct omap_hwmod *oh)
3088{
3089 u32 v;
3090 int ret;
3091
3092 if (!oh || !(oh->_sysc_cache))
3093 return -EINVAL;
3094
3095 v = oh->_sysc_cache;
3096 ret = _set_softreset(oh, &v);
3097 if (ret)
3098 goto error;
3099 _write_sysconfig(v, oh);
3100
3101 ret = _clear_softreset(oh, &v);
3102 if (ret)
3103 goto error;
3104 _write_sysconfig(v, oh);
3105
3106error:
3107 return ret;
3108}
3109
3110/**
3111 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3112 * @name: name of the omap_hwmod to look up
3113 *
3114 * Given a @name of an omap_hwmod, return a pointer to the registered
3115 * struct omap_hwmod *, or NULL upon error.
3116 */
3117struct omap_hwmod *omap_hwmod_lookup(const char *name)
3118{
3119 struct omap_hwmod *oh;
3120
3121 if (!name)
3122 return NULL;
3123
3124 oh = _lookup(name);
3125
3126 return oh;
3127}
3128
3129/**
3130 * omap_hwmod_for_each - call function for each registered omap_hwmod
3131 * @fn: pointer to a callback function
3132 * @data: void * data to pass to callback function
3133 *
3134 * Call @fn for each registered omap_hwmod, passing @data to each
3135 * function. @fn must return 0 for success or any other value for
3136 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3137 * will stop and the non-zero return value will be passed to the
3138 * caller of omap_hwmod_for_each(). @fn is called with
3139 * omap_hwmod_for_each() held.
3140 */
3141int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3142 void *data)
3143{
3144 struct omap_hwmod *temp_oh;
3145 int ret = 0;
3146
3147 if (!fn)
3148 return -EINVAL;
3149
3150 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3151 ret = (*fn)(temp_oh, data);
3152 if (ret)
3153 break;
3154 }
3155
3156 return ret;
3157}
3158
3159/**
3160 * omap_hwmod_register_links - register an array of hwmod links
3161 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3162 *
3163 * Intended to be called early in boot before the clock framework is
3164 * initialized. If @ois is not null, will register all omap_hwmods
3165 * listed in @ois that are valid for this chip. Returns -EINVAL if
3166 * omap_hwmod_init() hasn't been called before calling this function,
3167 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3168 * success.
3169 */
3170int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3171{
3172 int r, i;
3173
3174 if (!inited)
3175 return -EINVAL;
3176
3177 if (!ois)
3178 return 0;
3179
3180 if (ois[0] == NULL) /* Empty list */
3181 return 0;
3182
3183 if (!linkspace) {
3184 if (_alloc_linkspace(ois)) {
3185 pr_err("omap_hwmod: could not allocate link space\n");
3186 return -ENOMEM;
3187 }
3188 }
3189
3190 i = 0;
3191 do {
3192 r = _register_link(ois[i]);
3193 WARN(r && r != -EEXIST,
3194 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3195 ois[i]->master->name, ois[i]->slave->name, r);
3196 } while (ois[++i]);
3197
3198 return 0;
3199}
3200
3201/**
3202 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3203 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3204 *
3205 * If the hwmod data corresponding to the MPU subsystem IP block
3206 * hasn't been initialized and set up yet, do so now. This must be
3207 * done first since sleep dependencies may be added from other hwmods
3208 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3209 * return value.
3210 */
3211static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3212{
3213 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3214 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3215 __func__, MPU_INITIATOR_NAME);
3216 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3217 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3218}
3219
3220/**
3221 * omap_hwmod_setup_one - set up a single hwmod
3222 * @oh_name: const char * name of the already-registered hwmod to set up
3223 *
3224 * Initialize and set up a single hwmod. Intended to be used for a
3225 * small number of early devices, such as the timer IP blocks used for
3226 * the scheduler clock. Must be called after omap2_clk_init().
3227 * Resolves the struct clk names to struct clk pointers for each
3228 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3229 * -EINVAL upon error or 0 upon success.
3230 */
3231int __init omap_hwmod_setup_one(const char *oh_name)
3232{
3233 struct omap_hwmod *oh;
3234
3235 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3236
3237 oh = _lookup(oh_name);
3238 if (!oh) {
3239 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3240 return -EINVAL;
3241 }
3242
3243 _ensure_mpu_hwmod_is_setup(oh);
3244
3245 _init(oh, NULL);
3246 _setup(oh, NULL);
3247
3248 return 0;
3249}
3250
3251/**
3252 * omap_hwmod_setup_all - set up all registered IP blocks
3253 *
3254 * Initialize and set up all IP blocks registered with the hwmod code.
3255 * Must be called after omap2_clk_init(). Resolves the struct clk
3256 * names to struct clk pointers for each registered omap_hwmod. Also
3257 * calls _setup() on each hwmod. Returns 0 upon success.
3258 */
3259static int __init omap_hwmod_setup_all(void)
3260{
3261 _ensure_mpu_hwmod_is_setup(NULL);
3262
3263 omap_hwmod_for_each(_init, NULL);
3264 omap_hwmod_for_each(_setup, NULL);
3265
3266 return 0;
3267}
3268omap_postcore_initcall(omap_hwmod_setup_all);
3269
3270/**
3271 * omap_hwmod_enable - enable an omap_hwmod
3272 * @oh: struct omap_hwmod *
3273 *
3274 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3275 * Returns -EINVAL on error or passes along the return value from _enable().
3276 */
3277int omap_hwmod_enable(struct omap_hwmod *oh)
3278{
3279 int r;
3280 unsigned long flags;
3281
3282 if (!oh)
3283 return -EINVAL;
3284
3285 spin_lock_irqsave(&oh->_lock, flags);
3286 r = _enable(oh);
3287 spin_unlock_irqrestore(&oh->_lock, flags);
3288
3289 return r;
3290}
3291
3292/**
3293 * omap_hwmod_idle - idle an omap_hwmod
3294 * @oh: struct omap_hwmod *
3295 *
3296 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3297 * Returns -EINVAL on error or passes along the return value from _idle().
3298 */
3299int omap_hwmod_idle(struct omap_hwmod *oh)
3300{
3301 int r;
3302 unsigned long flags;
3303
3304 if (!oh)
3305 return -EINVAL;
3306
3307 spin_lock_irqsave(&oh->_lock, flags);
3308 r = _idle(oh);
3309 spin_unlock_irqrestore(&oh->_lock, flags);
3310
3311 return r;
3312}
3313
3314/**
3315 * omap_hwmod_shutdown - shutdown an omap_hwmod
3316 * @oh: struct omap_hwmod *
3317 *
3318 * Shutdown an omap_hwmod @oh. Intended to be called by
3319 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3320 * the return value from _shutdown().
3321 */
3322int omap_hwmod_shutdown(struct omap_hwmod *oh)
3323{
3324 int r;
3325 unsigned long flags;
3326
3327 if (!oh)
3328 return -EINVAL;
3329
3330 spin_lock_irqsave(&oh->_lock, flags);
3331 r = _shutdown(oh);
3332 spin_unlock_irqrestore(&oh->_lock, flags);
3333
3334 return r;
3335}
3336
3337/*
3338 * IP block data retrieval functions
3339 */
3340
3341/**
3342 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3343 * @oh: struct omap_hwmod *
3344 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3345 *
3346 * Count the number of struct resource array elements necessary to
3347 * contain omap_hwmod @oh resources. Intended to be called by code
3348 * that registers omap_devices. Intended to be used to determine the
3349 * size of a dynamically-allocated struct resource array, before
3350 * calling omap_hwmod_fill_resources(). Returns the number of struct
3351 * resource array elements needed.
3352 *
3353 * XXX This code is not optimized. It could attempt to merge adjacent
3354 * resource IDs.
3355 *
3356 */
3357int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3358{
3359 int ret = 0;
3360
3361 if (flags & IORESOURCE_IRQ)
3362 ret += _count_mpu_irqs(oh);
3363
3364 if (flags & IORESOURCE_DMA)
3365 ret += _count_sdma_reqs(oh);
3366
3367 if (flags & IORESOURCE_MEM) {
3368 int i = 0;
3369 struct omap_hwmod_ocp_if *os;
3370 struct list_head *p = oh->slave_ports.next;
3371
3372 while (i < oh->slaves_cnt) {
3373 os = _fetch_next_ocp_if(&p, &i);
3374 ret += _count_ocp_if_addr_spaces(os);
3375 }
3376 }
3377
3378 return ret;
3379}
3380
3381/**
3382 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3383 * @oh: struct omap_hwmod *
3384 * @res: pointer to the first element of an array of struct resource to fill
3385 *
3386 * Fill the struct resource array @res with resource data from the
3387 * omap_hwmod @oh. Intended to be called by code that registers
3388 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3389 * number of array elements filled.
3390 */
3391int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3392{
3393 struct omap_hwmod_ocp_if *os;
3394 struct list_head *p;
3395 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3396 int r = 0;
3397
3398 /* For each IRQ, DMA, memory area, fill in array.*/
3399
3400 mpu_irqs_cnt = _count_mpu_irqs(oh);
3401 for (i = 0; i < mpu_irqs_cnt; i++) {
3402 unsigned int irq;
3403
3404 if (oh->xlate_irq)
3405 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
3406 else
3407 irq = (oh->mpu_irqs + i)->irq;
3408 (res + r)->name = (oh->mpu_irqs + i)->name;
3409 (res + r)->start = irq;
3410 (res + r)->end = irq;
3411 (res + r)->flags = IORESOURCE_IRQ;
3412 r++;
3413 }
3414
3415 sdma_reqs_cnt = _count_sdma_reqs(oh);
3416 for (i = 0; i < sdma_reqs_cnt; i++) {
3417 (res + r)->name = (oh->sdma_reqs + i)->name;
3418 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3419 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3420 (res + r)->flags = IORESOURCE_DMA;
3421 r++;
3422 }
3423
3424 p = oh->slave_ports.next;
3425
3426 i = 0;
3427 while (i < oh->slaves_cnt) {
3428 os = _fetch_next_ocp_if(&p, &i);
3429 addr_cnt = _count_ocp_if_addr_spaces(os);
3430
3431 for (j = 0; j < addr_cnt; j++) {
3432 (res + r)->name = (os->addr + j)->name;
3433 (res + r)->start = (os->addr + j)->pa_start;
3434 (res + r)->end = (os->addr + j)->pa_end;
3435 (res + r)->flags = IORESOURCE_MEM;
3436 r++;
3437 }
3438 }
3439
3440 return r;
3441}
3442
3443/**
3444 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3445 * @oh: struct omap_hwmod *
3446 * @res: pointer to the array of struct resource to fill
3447 *
3448 * Fill the struct resource array @res with dma resource data from the
3449 * omap_hwmod @oh. Intended to be called by code that registers
3450 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3451 * number of array elements filled.
3452 */
3453int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3454{
3455 int i, sdma_reqs_cnt;
3456 int r = 0;
3457
3458 sdma_reqs_cnt = _count_sdma_reqs(oh);
3459 for (i = 0; i < sdma_reqs_cnt; i++) {
3460 (res + r)->name = (oh->sdma_reqs + i)->name;
3461 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3462 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3463 (res + r)->flags = IORESOURCE_DMA;
3464 r++;
3465 }
3466
3467 return r;
3468}
3469
3470/**
3471 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3472 * @oh: struct omap_hwmod * to operate on
3473 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3474 * @name: pointer to the name of the data to fetch (optional)
3475 * @rsrc: pointer to a struct resource, allocated by the caller
3476 *
3477 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3478 * data for the IP block pointed to by @oh. The data will be filled
3479 * into a struct resource record pointed to by @rsrc. The struct
3480 * resource must be allocated by the caller. When @name is non-null,
3481 * the data associated with the matching entry in the IRQ/SDMA/address
3482 * space hwmod data arrays will be returned. If @name is null, the
3483 * first array entry will be returned. Data order is not meaningful
3484 * in hwmod data, so callers are strongly encouraged to use a non-null
3485 * @name whenever possible to avoid unpredictable effects if hwmod
3486 * data is later added that causes data ordering to change. This
3487 * function is only intended for use by OMAP core code. Device
3488 * drivers should not call this function - the appropriate bus-related
3489 * data accessor functions should be used instead. Returns 0 upon
3490 * success or a negative error code upon error.
3491 */
3492int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3493 const char *name, struct resource *rsrc)
3494{
3495 int r;
3496 unsigned int irq, dma;
3497 u32 pa_start, pa_end;
3498
3499 if (!oh || !rsrc)
3500 return -EINVAL;
3501
3502 if (type == IORESOURCE_IRQ) {
3503 r = _get_mpu_irq_by_name(oh, name, &irq);
3504 if (r)
3505 return r;
3506
3507 rsrc->start = irq;
3508 rsrc->end = irq;
3509 } else if (type == IORESOURCE_DMA) {
3510 r = _get_sdma_req_by_name(oh, name, &dma);
3511 if (r)
3512 return r;
3513
3514 rsrc->start = dma;
3515 rsrc->end = dma;
3516 } else if (type == IORESOURCE_MEM) {
3517 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3518 if (r)
3519 return r;
3520
3521 rsrc->start = pa_start;
3522 rsrc->end = pa_end;
3523 } else {
3524 return -EINVAL;
3525 }
3526
3527 rsrc->flags = type;
3528 rsrc->name = name;
3529
3530 return 0;
3531}
3532
3533/**
3534 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3535 * @oh: struct omap_hwmod *
3536 *
3537 * Return the powerdomain pointer associated with the OMAP module
3538 * @oh's main clock. If @oh does not have a main clk, return the
3539 * powerdomain associated with the interface clock associated with the
3540 * module's MPU port. (XXX Perhaps this should use the SDMA port
3541 * instead?) Returns NULL on error, or a struct powerdomain * on
3542 * success.
3543 */
3544struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3545{
3546 struct clk *c;
3547 struct omap_hwmod_ocp_if *oi;
3548 struct clockdomain *clkdm;
3549 struct clk_hw_omap *clk;
3550
3551 if (!oh)
3552 return NULL;
3553
3554 if (oh->clkdm)
3555 return oh->clkdm->pwrdm.ptr;
3556
3557 if (oh->_clk) {
3558 c = oh->_clk;
3559 } else {
3560 oi = _find_mpu_rt_port(oh);
3561 if (!oi)
3562 return NULL;
3563 c = oi->_clk;
3564 }
3565
3566 clk = to_clk_hw_omap(__clk_get_hw(c));
3567 clkdm = clk->clkdm;
3568 if (!clkdm)
3569 return NULL;
3570
3571 return clkdm->pwrdm.ptr;
3572}
3573
3574/**
3575 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3576 * @oh: struct omap_hwmod *
3577 *
3578 * Returns the virtual address corresponding to the beginning of the
3579 * module's register target, in the address range that is intended to
3580 * be used by the MPU. Returns the virtual address upon success or NULL
3581 * upon error.
3582 */
3583void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3584{
3585 if (!oh)
3586 return NULL;
3587
3588 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3589 return NULL;
3590
3591 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3592 return NULL;
3593
3594 return oh->_mpu_rt_va;
3595}
3596
3597/*
3598 * XXX what about functions for drivers to save/restore ocp_sysconfig
3599 * for context save/restore operations?
3600 */
3601
3602/**
3603 * omap_hwmod_enable_wakeup - allow device to wake up the system
3604 * @oh: struct omap_hwmod *
3605 *
3606 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3607 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3608 * this IP block if it has dynamic mux entries. Eventually this
3609 * should set PRCM wakeup registers to cause the PRCM to receive
3610 * wakeup events from the module. Does not set any wakeup routing
3611 * registers beyond this point - if the module is to wake up any other
3612 * module or subsystem, that must be set separately. Called by
3613 * omap_device code. Returns -EINVAL on error or 0 upon success.
3614 */
3615int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3616{
3617 unsigned long flags;
3618 u32 v;
3619
3620 spin_lock_irqsave(&oh->_lock, flags);
3621
3622 if (oh->class->sysc &&
3623 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3624 v = oh->_sysc_cache;
3625 _enable_wakeup(oh, &v);
3626 _write_sysconfig(v, oh);
3627 }
3628
3629 spin_unlock_irqrestore(&oh->_lock, flags);
3630
3631 return 0;
3632}
3633
3634/**
3635 * omap_hwmod_disable_wakeup - prevent device from waking the system
3636 * @oh: struct omap_hwmod *
3637 *
3638 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3639 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3640 * events for this IP block if it has dynamic mux entries. Eventually
3641 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3642 * wakeup events from the module. Does not set any wakeup routing
3643 * registers beyond this point - if the module is to wake up any other
3644 * module or subsystem, that must be set separately. Called by
3645 * omap_device code. Returns -EINVAL on error or 0 upon success.
3646 */
3647int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3648{
3649 unsigned long flags;
3650 u32 v;
3651
3652 spin_lock_irqsave(&oh->_lock, flags);
3653
3654 if (oh->class->sysc &&
3655 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3656 v = oh->_sysc_cache;
3657 _disable_wakeup(oh, &v);
3658 _write_sysconfig(v, oh);
3659 }
3660
3661 spin_unlock_irqrestore(&oh->_lock, flags);
3662
3663 return 0;
3664}
3665
3666/**
3667 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3668 * contained in the hwmod module.
3669 * @oh: struct omap_hwmod *
3670 * @name: name of the reset line to lookup and assert
3671 *
3672 * Some IP like dsp, ipu or iva contain processor that require
3673 * an HW reset line to be assert / deassert in order to enable fully
3674 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3675 * yet supported on this OMAP; otherwise, passes along the return value
3676 * from _assert_hardreset().
3677 */
3678int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3679{
3680 int ret;
3681 unsigned long flags;
3682
3683 if (!oh)
3684 return -EINVAL;
3685
3686 spin_lock_irqsave(&oh->_lock, flags);
3687 ret = _assert_hardreset(oh, name);
3688 spin_unlock_irqrestore(&oh->_lock, flags);
3689
3690 return ret;
3691}
3692
3693/**
3694 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3695 * contained in the hwmod module.
3696 * @oh: struct omap_hwmod *
3697 * @name: name of the reset line to look up and deassert
3698 *
3699 * Some IP like dsp, ipu or iva contain processor that require
3700 * an HW reset line to be assert / deassert in order to enable fully
3701 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3702 * yet supported on this OMAP; otherwise, passes along the return value
3703 * from _deassert_hardreset().
3704 */
3705int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3706{
3707 int ret;
3708 unsigned long flags;
3709
3710 if (!oh)
3711 return -EINVAL;
3712
3713 spin_lock_irqsave(&oh->_lock, flags);
3714 ret = _deassert_hardreset(oh, name);
3715 spin_unlock_irqrestore(&oh->_lock, flags);
3716
3717 return ret;
3718}
3719
3720/**
3721 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3722 * @classname: struct omap_hwmod_class name to search for
3723 * @fn: callback function pointer to call for each hwmod in class @classname
3724 * @user: arbitrary context data to pass to the callback function
3725 *
3726 * For each omap_hwmod of class @classname, call @fn.
3727 * If the callback function returns something other than
3728 * zero, the iterator is terminated, and the callback function's return
3729 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3730 * if @classname or @fn are NULL, or passes back the error code from @fn.
3731 */
3732int omap_hwmod_for_each_by_class(const char *classname,
3733 int (*fn)(struct omap_hwmod *oh,
3734 void *user),
3735 void *user)
3736{
3737 struct omap_hwmod *temp_oh;
3738 int ret = 0;
3739
3740 if (!classname || !fn)
3741 return -EINVAL;
3742
3743 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3744 __func__, classname);
3745
3746 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3747 if (!strcmp(temp_oh->class->name, classname)) {
3748 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3749 __func__, temp_oh->name);
3750 ret = (*fn)(temp_oh, user);
3751 if (ret)
3752 break;
3753 }
3754 }
3755
3756 if (ret)
3757 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3758 __func__, ret);
3759
3760 return ret;
3761}
3762
3763/**
3764 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3765 * @oh: struct omap_hwmod *
3766 * @state: state that _setup() should leave the hwmod in
3767 *
3768 * Sets the hwmod state that @oh will enter at the end of _setup()
3769 * (called by omap_hwmod_setup_*()). See also the documentation
3770 * for _setup_postsetup(), above. Returns 0 upon success or
3771 * -EINVAL if there is a problem with the arguments or if the hwmod is
3772 * in the wrong state.
3773 */
3774int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3775{
3776 int ret;
3777 unsigned long flags;
3778
3779 if (!oh)
3780 return -EINVAL;
3781
3782 if (state != _HWMOD_STATE_DISABLED &&
3783 state != _HWMOD_STATE_ENABLED &&
3784 state != _HWMOD_STATE_IDLE)
3785 return -EINVAL;
3786
3787 spin_lock_irqsave(&oh->_lock, flags);
3788
3789 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3790 ret = -EINVAL;
3791 goto ohsps_unlock;
3792 }
3793
3794 oh->_postsetup_state = state;
3795 ret = 0;
3796
3797ohsps_unlock:
3798 spin_unlock_irqrestore(&oh->_lock, flags);
3799
3800 return ret;
3801}
3802
3803/**
3804 * omap_hwmod_get_context_loss_count - get lost context count
3805 * @oh: struct omap_hwmod *
3806 *
3807 * Returns the context loss count of associated @oh
3808 * upon success, or zero if no context loss data is available.
3809 *
3810 * On OMAP4, this queries the per-hwmod context loss register,
3811 * assuming one exists. If not, or on OMAP2/3, this queries the
3812 * enclosing powerdomain context loss count.
3813 */
3814int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3815{
3816 struct powerdomain *pwrdm;
3817 int ret = 0;
3818
3819 if (soc_ops.get_context_lost)
3820 return soc_ops.get_context_lost(oh);
3821
3822 pwrdm = omap_hwmod_get_pwrdm(oh);
3823 if (pwrdm)
3824 ret = pwrdm_get_context_loss_count(pwrdm);
3825
3826 return ret;
3827}
3828
3829/**
3830 * omap_hwmod_init - initialize the hwmod code
3831 *
3832 * Sets up some function pointers needed by the hwmod code to operate on the
3833 * currently-booted SoC. Intended to be called once during kernel init
3834 * before any hwmods are registered. No return value.
3835 */
3836void __init omap_hwmod_init(void)
3837{
3838 if (cpu_is_omap24xx()) {
3839 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3840 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3841 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3842 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3843 } else if (cpu_is_omap34xx()) {
3844 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3845 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3846 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3847 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3848 soc_ops.init_clkdm = _init_clkdm;
3849 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3850 soc_ops.enable_module = _omap4_enable_module;
3851 soc_ops.disable_module = _omap4_disable_module;
3852 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3853 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3854 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3855 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3856 soc_ops.init_clkdm = _init_clkdm;
3857 soc_ops.update_context_lost = _omap4_update_context_lost;
3858 soc_ops.get_context_lost = _omap4_get_context_lost;
3859 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3860 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3861 soc_is_am43xx()) {
3862 soc_ops.enable_module = _omap4_enable_module;
3863 soc_ops.disable_module = _omap4_disable_module;
3864 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3865 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3866 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3867 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3868 soc_ops.init_clkdm = _init_clkdm;
3869 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3870 } else {
3871 WARN(1, "omap_hwmod: unknown SoC type\n");
3872 }
3873
3874 inited = true;
3875}
3876
3877/**
3878 * omap_hwmod_get_main_clk - get pointer to main clock name
3879 * @oh: struct omap_hwmod *
3880 *
3881 * Returns the main clock name assocated with @oh upon success,
3882 * or NULL if @oh is NULL.
3883 */
3884const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3885{
3886 if (!oh)
3887 return NULL;
3888
3889 return oh->main_clk;
3890}