1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * MSDI IP block reset
 4 *
 5 * Copyright (C) 2012 Texas Instruments, Inc.
 6 * Paul Walmsley
 7 *
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 8 * XXX What about pad muxing?
 9 */
10
11#include <linux/kernel.h>
12#include <linux/err.h>
 
13
14#include "prm.h"
15#include "common.h"
16#include "control.h"
17#include "omap_hwmod.h"
18#include "omap_device.h"
19#include "mmc.h"
20
21/*
22 * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
23 *     from the IP block's base address
24 */
25#define MSDI_CON_OFFSET				0x0c
26
27/* Register bitfields in the CON register */
28#define MSDI_CON_POW_MASK			BIT(11)
29#define MSDI_CON_CLKD_MASK			(0x3f << 0)
30#define MSDI_CON_CLKD_SHIFT			0
31
32/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
33#define MSDI_TARGET_RESET_CLKD		0x3ff
34
35/**
36 * omap_msdi_reset - reset the MSDI IP block
37 * @oh: struct omap_hwmod *
38 *
39 * The MSDI IP block on OMAP2420 has to have both the POW and CLKD
40 * fields set inside its CON register for a reset to complete
41 * successfully.  This is not documented in the TRM.  For CLKD, we use
42 * the value that results in the lowest possible clock rate, to attempt
43 * to avoid disturbing any cards.
44 */
45int omap_msdi_reset(struct omap_hwmod *oh)
46{
47	u16 v = 0;
48	int c = 0;
49
50	/* Write to the SOFTRESET bit */
51	omap_hwmod_softreset(oh);
52
53	/* Enable the MSDI core and internal clock */
54	v |= MSDI_CON_POW_MASK;
55	v |= MSDI_TARGET_RESET_CLKD << MSDI_CON_CLKD_SHIFT;
56	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
57
58	/* Poll on RESETDONE bit */
59	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
60			   & SYSS_RESETDONE_MASK),
61			  MAX_MODULE_SOFTRESET_WAIT, c);
62
63	if (c == MAX_MODULE_SOFTRESET_WAIT)
64		pr_warn("%s: %s: softreset failed (waited %d usec)\n",
65			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
66	else
67		pr_debug("%s: %s: softreset in %d usec\n", __func__,
68			 oh->name, c);
69
70	/* Disable the MSDI internal clock */
71	v &= ~MSDI_CON_CLKD_MASK;
72	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
73
74	return 0;
75}

 
 1/*
 2 * MSDI IP block reset
 3 *
 4 * Copyright (C) 2012 Texas Instruments, Inc.
 5 * Paul Walmsley
 6 *
 7 * This program is free software; you can redistribute it and/or
 8 * modify it under the terms of the GNU General Public License
 9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 * XXX What about pad muxing?
22 */
23
24#include <linux/kernel.h>
25#include <linux/err.h>
26#include <linux/platform_data/gpio-omap.h>
27
28#include "prm.h"
29#include "common.h"
30#include "control.h"
31#include "omap_hwmod.h"
32#include "omap_device.h"
33#include "mmc.h"
34
35/*
36 * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
37 *     from the IP block's base address
38 */
39#define MSDI_CON_OFFSET				0x0c
40
41/* Register bitfields in the CON register */
42#define MSDI_CON_POW_MASK			BIT(11)
43#define MSDI_CON_CLKD_MASK			(0x3f << 0)
44#define MSDI_CON_CLKD_SHIFT			0
45
46/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
47#define MSDI_TARGET_RESET_CLKD		0x3ff
48
49/**
50 * omap_msdi_reset - reset the MSDI IP block
51 * @oh: struct omap_hwmod *
52 *
53 * The MSDI IP block on OMAP2420 has to have both the POW and CLKD
54 * fields set inside its CON register for a reset to complete
55 * successfully.  This is not documented in the TRM.  For CLKD, we use
56 * the value that results in the lowest possible clock rate, to attempt
57 * to avoid disturbing any cards.
58 */
59int omap_msdi_reset(struct omap_hwmod *oh)
60{
61	u16 v = 0;
62	int c = 0;
63
64	/* Write to the SOFTRESET bit */
65	omap_hwmod_softreset(oh);
66
67	/* Enable the MSDI core and internal clock */
68	v |= MSDI_CON_POW_MASK;
69	v |= MSDI_TARGET_RESET_CLKD << MSDI_CON_CLKD_SHIFT;
70	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
71
72	/* Poll on RESETDONE bit */
73	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
74			   & SYSS_RESETDONE_MASK),
75			  MAX_MODULE_SOFTRESET_WAIT, c);
76
77	if (c == MAX_MODULE_SOFTRESET_WAIT)
78		pr_warn("%s: %s: softreset failed (waited %d usec)\n",
79			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
80	else
81		pr_debug("%s: %s: softreset in %d usec\n", __func__,
82			 oh->name, c);
83
84	/* Disable the MSDI internal clock */
85	v &= ~MSDI_CON_CLKD_MASK;
86	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
87
88	return 0;
89}