1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 *  Copyright (c) 2012 Samsung Electronics.
 4 *
 5 * Exynos - SMC Call
 
 
 
 
 6 */
 7
 8#ifndef __ASM_ARCH_EXYNOS_SMC_H
 9#define __ASM_ARCH_EXYNOS_SMC_H
10
11#define SMC_CMD_INIT		(-1)
12#define SMC_CMD_INFO		(-2)
13/* For Power Management */
14#define SMC_CMD_SLEEP		(-3)
15#define SMC_CMD_CPU1BOOT	(-4)
16#define SMC_CMD_CPU0AFTR	(-5)
17#define SMC_CMD_SAVE		(-6)
18#define SMC_CMD_SHUTDOWN	(-7)
19/* For CP15 Access */
20#define SMC_CMD_C15RESUME	(-11)
21/* For L2 Cache Access */
22#define SMC_CMD_L2X0CTRL	(-21)
23#define SMC_CMD_L2X0SETUP1	(-22)
24#define SMC_CMD_L2X0SETUP2	(-23)
25#define SMC_CMD_L2X0INVALL	(-24)
26#define SMC_CMD_L2X0DEBUG	(-25)
27
28/* For Accessing CP15/SFR (General) */
29#define SMC_CMD_REG		(-101)
30
31/* defines for SMC_CMD_REG */
32#define SMC_REG_CLASS_SFR_W	(0x1 << 30)
33#define SMC_REG_ID_SFR_W(addr)	(SMC_REG_CLASS_SFR_W | ((addr) >> 2))
34
35#ifndef __ASSEMBLY__
36
37extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
38
39#endif /* __ASSEMBLY__ */
40
41/* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
42#define OP_TYPE_CORE		0x0
43#define OP_TYPE_CLUSTER		0x1
44
45/* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
46#define SMC_POWERSTATE_IDLE	0x1
47
48#endif

 
 1/*
 2 *  Copyright (c) 2012 Samsung Electronics.
 3 *
 4 * EXYNOS - SMC Call
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License version 2 as
 8 * published by the Free Software Foundation.
 9 */
10
11#ifndef __ASM_ARCH_EXYNOS_SMC_H
12#define __ASM_ARCH_EXYNOS_SMC_H
13
14#define SMC_CMD_INIT		(-1)
15#define SMC_CMD_INFO		(-2)
16/* For Power Management */
17#define SMC_CMD_SLEEP		(-3)
18#define SMC_CMD_CPU1BOOT	(-4)
19#define SMC_CMD_CPU0AFTR	(-5)
20#define SMC_CMD_SAVE		(-6)
21#define SMC_CMD_SHUTDOWN	(-7)
22/* For CP15 Access */
23#define SMC_CMD_C15RESUME	(-11)
24/* For L2 Cache Access */
25#define SMC_CMD_L2X0CTRL	(-21)
26#define SMC_CMD_L2X0SETUP1	(-22)
27#define SMC_CMD_L2X0SETUP2	(-23)
28#define SMC_CMD_L2X0INVALL	(-24)
29#define SMC_CMD_L2X0DEBUG	(-25)
 
 
 
 
 
 
 
30
31#ifndef __ASSEMBLY__
32
33extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
34
35#endif /* __ASSEMBLY__ */
36
37/* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
38#define OP_TYPE_CORE		0x0
39#define OP_TYPE_CLUSTER		0x1
40
41/* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
42#define SMC_POWERSTATE_IDLE	0x1
43
44#endif