Linux Audio

Check our new training course

Loading...
Note: File does not exist in v6.13.7.
  1/*
  2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
  3 *
  4 * The code contained herein is licensed under the GNU General Public
  5 * License. You may obtain a copy of the GNU General Public License
  6 * Version 2 or later at the following locations:
  7 *
  8 * http://www.opensource.org/licenses/gpl-license.html
  9 * http://www.gnu.org/copyleft/gpl.html
 10 */
 11
 12#include "imx25-pinfunc.h"
 13
 14/ {
 15	#address-cells = <1>;
 16	#size-cells = <1>;
 17	/*
 18	 * The decompressor and also some bootloaders rely on a
 19	 * pre-existing /chosen node to be available to insert the
 20	 * command line and merge other ATAGS info.
 21	 * Also for U-Boot there must be a pre-existing /memory node.
 22	 */
 23	chosen {};
 24	memory { device_type = "memory"; reg = <0 0>; };
 25
 26	aliases {
 27		ethernet0 = &fec;
 28		gpio0 = &gpio1;
 29		gpio1 = &gpio2;
 30		gpio2 = &gpio3;
 31		gpio3 = &gpio4;
 32		i2c0 = &i2c1;
 33		i2c1 = &i2c2;
 34		i2c2 = &i2c3;
 35		mmc0 = &esdhc1;
 36		mmc1 = &esdhc2;
 37		pwm0 = &pwm1;
 38		pwm1 = &pwm2;
 39		pwm2 = &pwm3;
 40		pwm3 = &pwm4;
 41		serial0 = &uart1;
 42		serial1 = &uart2;
 43		serial2 = &uart3;
 44		serial3 = &uart4;
 45		serial4 = &uart5;
 46		spi0 = &spi1;
 47		spi1 = &spi2;
 48		spi2 = &spi3;
 49		usb0 = &usbotg;
 50		usb1 = &usbhost1;
 51	};
 52
 53	cpus {
 54		#address-cells = <0>;
 55		#size-cells = <0>;
 56
 57		cpu {
 58			compatible = "arm,arm926ej-s";
 59			device_type = "cpu";
 60		};
 61	};
 62
 63	asic: asic-interrupt-controller@68000000 {
 64		compatible = "fsl,imx25-asic", "fsl,avic";
 65		interrupt-controller;
 66		#interrupt-cells = <1>;
 67		reg = <0x68000000 0x8000000>;
 68	};
 69
 70	clocks {
 71		#address-cells = <1>;
 72		#size-cells = <0>;
 73
 74		osc {
 75			compatible = "fsl,imx-osc", "fixed-clock";
 76			#clock-cells = <0>;
 77			clock-frequency = <24000000>;
 78		};
 79	};
 80
 81	soc {
 82		#address-cells = <1>;
 83		#size-cells = <1>;
 84		compatible = "simple-bus";
 85		interrupt-parent = <&asic>;
 86		ranges;
 87
 88		aips@43f00000 { /* AIPS1 */
 89			compatible = "fsl,aips-bus", "simple-bus";
 90			#address-cells = <1>;
 91			#size-cells = <1>;
 92			reg = <0x43f00000 0x100000>;
 93			ranges;
 94
 95			i2c1: i2c@43f80000 {
 96				#address-cells = <1>;
 97				#size-cells = <0>;
 98				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
 99				reg = <0x43f80000 0x4000>;
100				clocks = <&clks 48>;
101				clock-names = "";
102				interrupts = <3>;
103				status = "disabled";
104			};
105
106			i2c3: i2c@43f84000 {
107				#address-cells = <1>;
108				#size-cells = <0>;
109				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
110				reg = <0x43f84000 0x4000>;
111				clocks = <&clks 48>;
112				clock-names = "";
113				interrupts = <10>;
114				status = "disabled";
115			};
116
117			can1: can@43f88000 {
118				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
119				reg = <0x43f88000 0x4000>;
120				interrupts = <43>;
121				clocks = <&clks 75>, <&clks 75>;
122				clock-names = "ipg", "per";
123				status = "disabled";
124			};
125
126			can2: can@43f8c000 {
127				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
128				reg = <0x43f8c000 0x4000>;
129				interrupts = <44>;
130				clocks = <&clks 76>, <&clks 76>;
131				clock-names = "ipg", "per";
132				status = "disabled";
133			};
134
135			uart1: serial@43f90000 {
136				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
137				reg = <0x43f90000 0x4000>;
138				interrupts = <45>;
139				clocks = <&clks 120>, <&clks 57>;
140				clock-names = "ipg", "per";
141				status = "disabled";
142			};
143
144			uart2: serial@43f94000 {
145				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
146				reg = <0x43f94000 0x4000>;
147				interrupts = <32>;
148				clocks = <&clks 121>, <&clks 57>;
149				clock-names = "ipg", "per";
150				status = "disabled";
151			};
152
153			i2c2: i2c@43f98000 {
154				#address-cells = <1>;
155				#size-cells = <0>;
156				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
157				reg = <0x43f98000 0x4000>;
158				clocks = <&clks 48>;
159				clock-names = "";
160				interrupts = <4>;
161				status = "disabled";
162			};
163
164			owire@43f9c000 {
165				#address-cells = <1>;
166				#size-cells = <0>;
167				reg = <0x43f9c000 0x4000>;
168				clocks = <&clks 51>;
169				clock-names = "";
170				interrupts = <2>;
171				status = "disabled";
172			};
173
174			spi1: cspi@43fa4000 {
175				#address-cells = <1>;
176				#size-cells = <0>;
177				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
178				reg = <0x43fa4000 0x4000>;
179				clocks = <&clks 78>, <&clks 78>;
180				clock-names = "ipg", "per";
181				interrupts = <14>;
182				status = "disabled";
183			};
184
185			kpp: kpp@43fa8000 {
186				#address-cells = <1>;
187				#size-cells = <0>;
188				compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
189				reg = <0x43fa8000 0x4000>;
190				clocks = <&clks 102>;
191				clock-names = "";
192				interrupts = <24>;
193				status = "disabled";
194			};
195
196			iomuxc: iomuxc@43fac000 {
197				compatible = "fsl,imx25-iomuxc";
198				reg = <0x43fac000 0x4000>;
199			};
200
201			audmux: audmux@43fb0000 {
202				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
203				reg = <0x43fb0000 0x4000>;
204				status = "disabled";
205			};
206		};
207
208		spba@50000000 {
209			compatible = "fsl,spba-bus", "simple-bus";
210			#address-cells = <1>;
211			#size-cells = <1>;
212			reg = <0x50000000 0x40000>;
213			ranges;
214
215			spi3: cspi@50004000 {
216				#address-cells = <1>;
217				#size-cells = <0>;
218				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
219				reg = <0x50004000 0x4000>;
220				interrupts = <0>;
221				clocks = <&clks 80>, <&clks 80>;
222				clock-names = "ipg", "per";
223				status = "disabled";
224			};
225
226			uart4: serial@50008000 {
227				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
228				reg = <0x50008000 0x4000>;
229				interrupts = <5>;
230				clocks = <&clks 123>, <&clks 57>;
231				clock-names = "ipg", "per";
232				status = "disabled";
233			};
234
235			uart3: serial@5000c000 {
236				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
237				reg = <0x5000c000 0x4000>;
238				interrupts = <18>;
239				clocks = <&clks 122>, <&clks 57>;
240				clock-names = "ipg", "per";
241				status = "disabled";
242			};
243
244			spi2: cspi@50010000 {
245				#address-cells = <1>;
246				#size-cells = <0>;
247				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
248				reg = <0x50010000 0x4000>;
249				clocks = <&clks 79>, <&clks 79>;
250				clock-names = "ipg", "per";
251				interrupts = <13>;
252				status = "disabled";
253			};
254
255			ssi2: ssi@50014000 {
256				#sound-dai-cells = <0>;
257				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
258				reg = <0x50014000 0x4000>;
259				interrupts = <11>;
260				clocks = <&clks 118>;
261				clock-names = "ipg";
262				dmas = <&sdma 24 1 0>,
263				       <&sdma 25 1 0>;
264				dma-names = "rx", "tx";
265				status = "disabled";
266			};
267
268			esai@50018000 {
269				reg = <0x50018000 0x4000>;
270				interrupts = <7>;
271			};
272
273			uart5: serial@5002c000 {
274				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
275				reg = <0x5002c000 0x4000>;
276				interrupts = <40>;
277				clocks = <&clks 124>, <&clks 57>;
278				clock-names = "ipg", "per";
279				status = "disabled";
280			};
281
282			tscadc: tscadc@50030000 {
283				compatible = "fsl,imx25-tsadc";
284				reg = <0x50030000 0xc>;
285				interrupts = <46>;
286				clocks = <&clks 119>;
287				clock-names = "ipg";
288				interrupt-controller;
289				#interrupt-cells = <1>;
290				#address-cells = <1>;
291				#size-cells = <1>;
292				status = "disabled";
293
294				adc: adc@50030800 {
295					compatible = "fsl,imx25-gcq";
296					reg = <0x50030800 0x60>;
297					interrupt-parent = <&tscadc>;
298					interrupts = <1>;
299					#address-cells = <1>;
300					#size-cells = <0>;
301					status = "disabled";
302				};
303
304				tsc: tcq@50030400 {
305					compatible = "fsl,imx25-tcq";
306					reg = <0x50030400 0x60>;
307					interrupt-parent = <&tscadc>;
308					interrupts = <0>;
309					fsl,wires = <4>;
310					status = "disabled";
311				};
312			};
313
314			ssi1: ssi@50034000 {
315				#sound-dai-cells = <0>;
316				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
317				reg = <0x50034000 0x4000>;
318				interrupts = <12>;
319				clocks = <&clks 117>;
320				clock-names = "ipg";
321				dmas = <&sdma 28 1 0>,
322				       <&sdma 29 1 0>;
323				dma-names = "rx", "tx";
324				status = "disabled";
325			};
326
327			fec: ethernet@50038000 {
328				compatible = "fsl,imx25-fec";
329				reg = <0x50038000 0x4000>;
330				interrupts = <57>;
331				clocks = <&clks 88>, <&clks 65>;
332				clock-names = "ipg", "ahb";
333				status = "disabled";
334			};
335		};
336
337		aips@53f00000 { /* AIPS2 */
338			compatible = "fsl,aips-bus", "simple-bus";
339			#address-cells = <1>;
340			#size-cells = <1>;
341			reg = <0x53f00000 0x100000>;
342			ranges;
343
344			clks: ccm@53f80000 {
345				compatible = "fsl,imx25-ccm";
346				reg = <0x53f80000 0x4000>;
347				interrupts = <31>;
348				#clock-cells = <1>;
349			};
350
351			gpt4: timer@53f84000 {
352				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
353				reg = <0x53f84000 0x4000>;
354				clocks = <&clks 95>, <&clks 47>;
355				clock-names = "ipg", "per";
356				interrupts = <1>;
357			};
358
359			gpt3: timer@53f88000 {
360				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
361				reg = <0x53f88000 0x4000>;
362				clocks = <&clks 94>, <&clks 47>;
363				clock-names = "ipg", "per";
364				interrupts = <29>;
365			};
366
367			gpt2: timer@53f8c000 {
368				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
369				reg = <0x53f8c000 0x4000>;
370				clocks = <&clks 93>, <&clks 47>;
371				clock-names = "ipg", "per";
372				interrupts = <53>;
373			};
374
375			gpt1: timer@53f90000 {
376				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
377				reg = <0x53f90000 0x4000>;
378				clocks = <&clks 92>, <&clks 47>;
379				clock-names = "ipg", "per";
380				interrupts = <54>;
381			};
382
383			epit1: timer@53f94000 {
384				compatible = "fsl,imx25-epit";
385				reg = <0x53f94000 0x4000>;
386				interrupts = <28>;
387			};
388
389			epit2: timer@53f98000 {
390				compatible = "fsl,imx25-epit";
391				reg = <0x53f98000 0x4000>;
392				interrupts = <27>;
393			};
394
395			gpio4: gpio@53f9c000 {
396				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
397				reg = <0x53f9c000 0x4000>;
398				interrupts = <23>;
399				gpio-controller;
400				#gpio-cells = <2>;
401				interrupt-controller;
402				#interrupt-cells = <2>;
403			};
404
405			pwm2: pwm@53fa0000 {
406				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
407				#pwm-cells = <2>;
408				reg = <0x53fa0000 0x4000>;
409				clocks = <&clks 106>, <&clks 52>;
410				clock-names = "ipg", "per";
411				interrupts = <36>;
412			};
413
414			gpio3: gpio@53fa4000 {
415				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
416				reg = <0x53fa4000 0x4000>;
417				interrupts = <16>;
418				gpio-controller;
419				#gpio-cells = <2>;
420				interrupt-controller;
421				#interrupt-cells = <2>;
422			};
423
424			pwm3: pwm@53fa8000 {
425				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
426				#pwm-cells = <2>;
427				reg = <0x53fa8000 0x4000>;
428				clocks = <&clks 107>, <&clks 52>;
429				clock-names = "ipg", "per";
430				interrupts = <41>;
431			};
432
433			scc: crypto@53fac000 {
434				compatible = "fsl,imx25-scc";
435				reg = <0x53fac000 0x4000>;
436				clocks = <&clks 111>;
437				clock-names = "ipg";
438				interrupts = <49>, <50>;
439				interrupt-names = "scm", "smn";
440			};
441
442			esdhc1: esdhc@53fb4000 {
443				compatible = "fsl,imx25-esdhc";
444				reg = <0x53fb4000 0x4000>;
445				interrupts = <9>;
446				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
447				clock-names = "ipg", "ahb", "per";
448				status = "disabled";
449			};
450
451			esdhc2: esdhc@53fb8000 {
452				compatible = "fsl,imx25-esdhc";
453				reg = <0x53fb8000 0x4000>;
454				interrupts = <8>;
455				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
456				clock-names = "ipg", "ahb", "per";
457				status = "disabled";
458			};
459
460			lcdc: lcdc@53fbc000 {
461				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
462				reg = <0x53fbc000 0x4000>;
463				interrupts = <39>;
464				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
465				clock-names = "ipg", "ahb", "per";
466				status = "disabled";
467			};
468
469			slcdc@53fc0000 {
470				reg = <0x53fc0000 0x4000>;
471				interrupts = <38>;
472				status = "disabled";
473			};
474
475			pwm4: pwm@53fc8000 {
476				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
477				#pwm-cells = <2>;
478				reg = <0x53fc8000 0x4000>;
479				clocks = <&clks 108>, <&clks 52>;
480				clock-names = "ipg", "per";
481				interrupts = <42>;
482			};
483
484			gpio1: gpio@53fcc000 {
485				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
486				reg = <0x53fcc000 0x4000>;
487				interrupts = <52>;
488				gpio-controller;
489				#gpio-cells = <2>;
490				interrupt-controller;
491				#interrupt-cells = <2>;
492			};
493
494			gpio2: gpio@53fd0000 {
495				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
496				reg = <0x53fd0000 0x4000>;
497				interrupts = <51>;
498				gpio-controller;
499				#gpio-cells = <2>;
500				interrupt-controller;
501				#interrupt-cells = <2>;
502			};
503
504			sdma: sdma@53fd4000 {
505				compatible = "fsl,imx25-sdma";
506				reg = <0x53fd4000 0x4000>;
507				clocks = <&clks 112>, <&clks 68>;
508				clock-names = "ipg", "ahb";
509				#dma-cells = <3>;
510				interrupts = <34>;
511				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
512			};
513
514			wdog@53fdc000 {
515				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
516				reg = <0x53fdc000 0x4000>;
517				clocks = <&clks 126>;
518				clock-names = "";
519				interrupts = <55>;
520			};
521
522			pwm1: pwm@53fe0000 {
523				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
524				#pwm-cells = <2>;
525				reg = <0x53fe0000 0x4000>;
526				clocks = <&clks 105>, <&clks 52>;
527				clock-names = "ipg", "per";
528				interrupts = <26>;
529			};
530
531			iim: iim@53ff0000 {
532				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
533				reg = <0x53ff0000 0x4000>;
534				interrupts = <19>;
535				clocks = <&clks 99>;
536			};
537
538			usbotg: usb@53ff4000 {
539				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
540				reg = <0x53ff4000 0x0200>;
541				interrupts = <37>;
542				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
543				clock-names = "ipg", "ahb", "per";
544				fsl,usbmisc = <&usbmisc 0>;
545				fsl,usbphy = <&usbphy0>;
546				status = "disabled";
547			};
548
549			usbhost1: usb@53ff4400 {
550				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
551				reg = <0x53ff4400 0x0200>;
552				interrupts = <35>;
553				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
554				clock-names = "ipg", "ahb", "per";
555				fsl,usbmisc = <&usbmisc 1>;
556				fsl,usbphy = <&usbphy1>;
557				status = "disabled";
558			};
559
560			usbmisc: usbmisc@53ff4600 {
561				#index-cells = <1>;
562				compatible = "fsl,imx25-usbmisc";
563				reg = <0x53ff4600 0x00f>;
564			};
565
566			dryice@53ffc000 {
567				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
568				reg = <0x53ffc000 0x4000>;
569				clocks = <&clks 81>;
570				clock-names = "ipg";
571				interrupts = <25>;
572			};
573		};
574
575		iram: sram@78000000 {
576			compatible = "mmio-sram";
577			reg = <0x78000000 0x20000>;
578		};
579
580		emi@80000000 {
581			compatible = "fsl,emi-bus", "simple-bus";
582			#address-cells = <1>;
583			#size-cells = <1>;
584			reg = <0x80000000 0x3b002000>;
585			ranges;
586
587			nfc: nand@bb000000 {
588				#address-cells = <1>;
589				#size-cells = <1>;
590
591				compatible = "fsl,imx25-nand";
592				reg = <0xbb000000 0x2000>;
593				clocks = <&clks 50>;
594				clock-names = "";
595				interrupts = <33>;
596				status = "disabled";
597			};
598		};
599	};
600
601	usbphy {
602		compatible = "simple-bus";
603		#address-cells = <1>;
604		#size-cells = <0>;
605
606		usbphy0: usb-phy@0 {
607			reg = <0>;
608			compatible = "usb-nop-xceiv";
609		};
610
611		usbphy1: usb-phy@1 {
612			reg = <1>;
613			compatible = "usb-nop-xceiv";
614		};
615	};
616};