1/*
  2 * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
  3 *
  4 * Licensed under the ISC license.
  5 */
  6
  7#include <dt-bindings/gpio/gpio.h>
  8#include <dt-bindings/input/input.h>
  9#include <dt-bindings/interrupt-controller/irq.h>
 10#include <dt-bindings/interrupt-controller/arm-gic.h>
 11#include "skeleton.dtsi"
 12
 13/ {
 14	interrupt-parent = <&gic>;
 15
 16	chosen {
 17		stdout-path = &uart0;
 18	};
 19
 20	cpus {
 21		#address-cells = <1>;
 22		#size-cells = <0>;
 23
 24		cpu@0 {
 25			device_type = "cpu";
 26			compatible = "arm,cortex-a7";
 27			reg = <0x0>;
 28		};
 29	};
 30
 31	mpcore {
 32		compatible = "simple-bus";
 33		ranges = <0x00000000 0x18310000 0x00008000>;
 34		#address-cells = <1>;
 35		#size-cells = <1>;
 36
 37		gic: interrupt-controller@1000 {
 38			compatible = "arm,cortex-a7-gic";
 39			#interrupt-cells = <3>;
 40			#address-cells = <0>;
 41			interrupt-controller;
 42			reg = <0x1000 0x1000>,
 43			      <0x2000 0x0100>;
 44		};
 45	};
 46
 47	clocks {
 48		#address-cells = <1>;
 49		#size-cells = <1>;
 50		ranges;
 51
 52		alp: oscillator {
 53			#clock-cells = <0>;
 54			compatible = "fixed-clock";
 55			clock-frequency = <40000000>;
 56		};
 57	};
 58
 59	axi@18000000 {
 60		compatible = "brcm,bus-axi";
 61		reg = <0x18000000 0x1000>;
 62		ranges = <0x00000000 0x18000000 0x00100000>;
 63		#address-cells = <1>;
 64		#size-cells = <1>;
 65
 66		#interrupt-cells = <1>;
 67		interrupt-map-mask = <0x000fffff 0xffff>;
 68		interrupt-map =
 69			/* ChipCommon */
 70			<0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 71
 72			/* IEEE 802.11 0 */
 73			<0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 74
 75			/* PCIe Controller 0 */
 76			<0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 77			<0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 78			<0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 79			<0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 80			<0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 81			<0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 82
 83			/* USB 2.0 Controller */
 84			<0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 85
 86			/* Ethernet Controller 0 */
 87			<0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
 88
 89			/* IEEE 802.11 1 */
 90			<0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
 91
 92			/* Ethernet Controller 1 */
 93			<0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 94
 95		chipcommon: chipcommon@0 {
 96			compatible = "simple-bus";
 97			reg = <0x00000000 0x1000>;
 98			ranges;
 99
100			#address-cells = <1>;
101			#size-cells = <1>;
102
103			gpio-controller;
104			#gpio-cells = <2>;
105
106			uart0: serial@0300 {
107				compatible = "ns16550a";
108				reg = <0x0300 0x100>;
109				interrupt-parent = <&gic>;
110				interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
111				clocks = <&alp>;
112				status = "okay";
113			};
114		};
115
116		usb2: usb2@4000 {
117			reg = <0x4000 0x1000>;
118			ranges;
119			#address-cells = <1>;
120			#size-cells = <1>;
121
122			ehci: ehci@4000 {
123				compatible = "generic-ehci";
124				reg = <0x4000 0x1000>;
125				interrupt-parent = <&gic>;
126				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
127			};
128
129			ohci: ohci@d000 {
130				#usb-cells = <0>;
131
132				compatible = "generic-ohci";
133				reg = <0xd000 0x1000>;
134				interrupt-parent = <&gic>;
135				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
136			};
137		};
138
139		gmac0: ethernet@5000 {
140			reg = <0x5000 0x1000>;
141		};
142
143		gmac1: ethernet@b000 {
144			reg = <0xb000 0x1000>;
145		};
146
147		pmu@12000 {
148			compatible = "simple-mfd", "syscon";
149			reg = <0x00012000 0x00001000>;
150
151			ilp: ilp {
152				compatible = "brcm,bcm53573-ilp";
153				clocks = <&alp>;
154				#clock-cells = <0>;
155				clock-output-names = "ilp";
156			};
157		};
158	};
159};