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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * wm8804.c -- WM8804 S/PDIF transceiver driver
4 *
5 * Copyright 2010-11 Wolfson Microelectronics plc
6 *
7 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 */
9
10#include <linux/module.h>
11#include <linux/moduleparam.h>
12#include <linux/init.h>
13#include <linux/gpio/consumer.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/pm_runtime.h>
17#include <linux/regulator/consumer.h>
18#include <linux/slab.h>
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/soc.h>
23#include <sound/initval.h>
24#include <sound/tlv.h>
25#include <sound/soc-dapm.h>
26
27#include "wm8804.h"
28
29#define WM8804_NUM_SUPPLIES 2
30static const char *wm8804_supply_names[WM8804_NUM_SUPPLIES] = {
31 "PVDD",
32 "DVDD"
33};
34
35static const struct reg_default wm8804_reg_defaults[] = {
36 { 3, 0x21 }, /* R3 - PLL1 */
37 { 4, 0xFD }, /* R4 - PLL2 */
38 { 5, 0x36 }, /* R5 - PLL3 */
39 { 6, 0x07 }, /* R6 - PLL4 */
40 { 7, 0x16 }, /* R7 - PLL5 */
41 { 8, 0x18 }, /* R8 - PLL6 */
42 { 9, 0xFF }, /* R9 - SPDMODE */
43 { 10, 0x00 }, /* R10 - INTMASK */
44 { 18, 0x00 }, /* R18 - SPDTX1 */
45 { 19, 0x00 }, /* R19 - SPDTX2 */
46 { 20, 0x00 }, /* R20 - SPDTX3 */
47 { 21, 0x71 }, /* R21 - SPDTX4 */
48 { 22, 0x0B }, /* R22 - SPDTX5 */
49 { 23, 0x70 }, /* R23 - GPO0 */
50 { 24, 0x57 }, /* R24 - GPO1 */
51 { 26, 0x42 }, /* R26 - GPO2 */
52 { 27, 0x06 }, /* R27 - AIFTX */
53 { 28, 0x06 }, /* R28 - AIFRX */
54 { 29, 0x80 }, /* R29 - SPDRX1 */
55 { 30, 0x07 }, /* R30 - PWRDN */
56};
57
58struct wm8804_priv {
59 struct device *dev;
60 struct regmap *regmap;
61 struct regulator_bulk_data supplies[WM8804_NUM_SUPPLIES];
62 struct notifier_block disable_nb[WM8804_NUM_SUPPLIES];
63 int mclk_div;
64
65 struct gpio_desc *reset;
66
67 int aif_pwr;
68};
69
70static int txsrc_put(struct snd_kcontrol *kcontrol,
71 struct snd_ctl_elem_value *ucontrol);
72
73static int wm8804_aif_event(struct snd_soc_dapm_widget *w,
74 struct snd_kcontrol *kcontrol, int event);
75
76/*
77 * We can't use the same notifier block for more than one supply and
78 * there's no way I can see to get from a callback to the caller
79 * except container_of().
80 */
81#define WM8804_REGULATOR_EVENT(n) \
82static int wm8804_regulator_event_##n(struct notifier_block *nb, \
83 unsigned long event, void *data) \
84{ \
85 struct wm8804_priv *wm8804 = container_of(nb, struct wm8804_priv, \
86 disable_nb[n]); \
87 if (event & REGULATOR_EVENT_DISABLE) { \
88 regcache_mark_dirty(wm8804->regmap); \
89 } \
90 return 0; \
91}
92
93WM8804_REGULATOR_EVENT(0)
94WM8804_REGULATOR_EVENT(1)
95
96static const char *txsrc_text[] = { "S/PDIF RX", "AIF" };
97static SOC_ENUM_SINGLE_DECL(txsrc, WM8804_SPDTX4, 6, txsrc_text);
98
99static const struct snd_kcontrol_new wm8804_tx_source_mux[] = {
100 SOC_DAPM_ENUM_EXT("Input Source", txsrc,
101 snd_soc_dapm_get_enum_double, txsrc_put),
102};
103
104static const struct snd_soc_dapm_widget wm8804_dapm_widgets[] = {
105SND_SOC_DAPM_OUTPUT("SPDIF Out"),
106SND_SOC_DAPM_INPUT("SPDIF In"),
107
108SND_SOC_DAPM_PGA("SPDIFTX", WM8804_PWRDN, 2, 1, NULL, 0),
109SND_SOC_DAPM_PGA("SPDIFRX", WM8804_PWRDN, 1, 1, NULL, 0),
110
111SND_SOC_DAPM_MUX("Tx Source", SND_SOC_NOPM, 6, 0, wm8804_tx_source_mux),
112
113SND_SOC_DAPM_AIF_OUT_E("AIFTX", NULL, 0, SND_SOC_NOPM, 0, 0, wm8804_aif_event,
114 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
115SND_SOC_DAPM_AIF_IN_E("AIFRX", NULL, 0, SND_SOC_NOPM, 0, 0, wm8804_aif_event,
116 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
117};
118
119static const struct snd_soc_dapm_route wm8804_dapm_routes[] = {
120 { "AIFRX", NULL, "Playback" },
121 { "Tx Source", "AIF", "AIFRX" },
122
123 { "SPDIFRX", NULL, "SPDIF In" },
124 { "Tx Source", "S/PDIF RX", "SPDIFRX" },
125
126 { "SPDIFTX", NULL, "Tx Source" },
127 { "SPDIF Out", NULL, "SPDIFTX" },
128
129 { "AIFTX", NULL, "SPDIFRX" },
130 { "Capture", NULL, "AIFTX" },
131};
132
133static int wm8804_aif_event(struct snd_soc_dapm_widget *w,
134 struct snd_kcontrol *kcontrol, int event)
135{
136 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
137 struct wm8804_priv *wm8804 = snd_soc_component_get_drvdata(component);
138
139 switch (event) {
140 case SND_SOC_DAPM_POST_PMU:
141 /* power up the aif */
142 if (!wm8804->aif_pwr)
143 snd_soc_component_update_bits(component, WM8804_PWRDN, 0x10, 0x0);
144 wm8804->aif_pwr++;
145 break;
146 case SND_SOC_DAPM_POST_PMD:
147 /* power down only both paths are disabled */
148 wm8804->aif_pwr--;
149 if (!wm8804->aif_pwr)
150 snd_soc_component_update_bits(component, WM8804_PWRDN, 0x10, 0x10);
151 break;
152 }
153
154 return 0;
155}
156
157static int txsrc_put(struct snd_kcontrol *kcontrol,
158 struct snd_ctl_elem_value *ucontrol)
159{
160 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
161 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
162 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
163 unsigned int val = ucontrol->value.enumerated.item[0] << e->shift_l;
164 unsigned int mask = 1 << e->shift_l;
165 unsigned int txpwr;
166
167 if (val != 0 && val != mask)
168 return -EINVAL;
169
170 snd_soc_dapm_mutex_lock(dapm);
171
172 if (snd_soc_component_test_bits(component, e->reg, mask, val)) {
173 /* save the current power state of the transmitter */
174 txpwr = snd_soc_component_read(component, WM8804_PWRDN) & 0x4;
175
176 /* power down the transmitter */
177 snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x4);
178
179 /* set the tx source */
180 snd_soc_component_update_bits(component, e->reg, mask, val);
181
182 /* restore the transmitter's configuration */
183 snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, txpwr);
184 }
185
186 snd_soc_dapm_mutex_unlock(dapm);
187
188 return 0;
189}
190
191static bool wm8804_volatile(struct device *dev, unsigned int reg)
192{
193 switch (reg) {
194 case WM8804_RST_DEVID1:
195 case WM8804_DEVID2:
196 case WM8804_DEVREV:
197 case WM8804_INTSTAT:
198 case WM8804_SPDSTAT:
199 case WM8804_RXCHAN1:
200 case WM8804_RXCHAN2:
201 case WM8804_RXCHAN3:
202 case WM8804_RXCHAN4:
203 case WM8804_RXCHAN5:
204 return true;
205 default:
206 return false;
207 }
208}
209
210static int wm8804_soft_reset(struct wm8804_priv *wm8804)
211{
212 return regmap_write(wm8804->regmap, WM8804_RST_DEVID1, 0x0);
213}
214
215static int wm8804_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
216{
217 struct snd_soc_component *component;
218 u16 format, master, bcp, lrp;
219
220 component = dai->component;
221
222 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
223 case SND_SOC_DAIFMT_I2S:
224 format = 0x2;
225 break;
226 case SND_SOC_DAIFMT_RIGHT_J:
227 format = 0x0;
228 break;
229 case SND_SOC_DAIFMT_LEFT_J:
230 format = 0x1;
231 break;
232 case SND_SOC_DAIFMT_DSP_A:
233 case SND_SOC_DAIFMT_DSP_B:
234 format = 0x3;
235 break;
236 default:
237 dev_err(dai->dev, "Unknown dai format\n");
238 return -EINVAL;
239 }
240
241 /* set data format */
242 snd_soc_component_update_bits(component, WM8804_AIFTX, 0x3, format);
243 snd_soc_component_update_bits(component, WM8804_AIFRX, 0x3, format);
244
245 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
246 case SND_SOC_DAIFMT_CBM_CFM:
247 master = 1;
248 break;
249 case SND_SOC_DAIFMT_CBS_CFS:
250 master = 0;
251 break;
252 default:
253 dev_err(dai->dev, "Unknown master/slave configuration\n");
254 return -EINVAL;
255 }
256
257 /* set master/slave mode */
258 snd_soc_component_update_bits(component, WM8804_AIFRX, 0x40, master << 6);
259
260 bcp = lrp = 0;
261 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
262 case SND_SOC_DAIFMT_NB_NF:
263 break;
264 case SND_SOC_DAIFMT_IB_IF:
265 bcp = lrp = 1;
266 break;
267 case SND_SOC_DAIFMT_IB_NF:
268 bcp = 1;
269 break;
270 case SND_SOC_DAIFMT_NB_IF:
271 lrp = 1;
272 break;
273 default:
274 dev_err(dai->dev, "Unknown polarity configuration\n");
275 return -EINVAL;
276 }
277
278 /* set frame inversion */
279 snd_soc_component_update_bits(component, WM8804_AIFTX, 0x10 | 0x20,
280 (bcp << 4) | (lrp << 5));
281 snd_soc_component_update_bits(component, WM8804_AIFRX, 0x10 | 0x20,
282 (bcp << 4) | (lrp << 5));
283 return 0;
284}
285
286static int wm8804_hw_params(struct snd_pcm_substream *substream,
287 struct snd_pcm_hw_params *params,
288 struct snd_soc_dai *dai)
289{
290 struct snd_soc_component *component;
291 u16 blen;
292
293 component = dai->component;
294
295 switch (params_width(params)) {
296 case 16:
297 blen = 0x0;
298 break;
299 case 20:
300 blen = 0x1;
301 break;
302 case 24:
303 blen = 0x2;
304 break;
305 default:
306 dev_err(dai->dev, "Unsupported word length: %u\n",
307 params_width(params));
308 return -EINVAL;
309 }
310
311 /* set word length */
312 snd_soc_component_update_bits(component, WM8804_AIFTX, 0xc, blen << 2);
313 snd_soc_component_update_bits(component, WM8804_AIFRX, 0xc, blen << 2);
314
315 return 0;
316}
317
318struct pll_div {
319 u32 prescale:1;
320 u32 mclkdiv:1;
321 u32 freqmode:2;
322 u32 n:4;
323 u32 k:22;
324};
325
326/* PLL rate to output rate divisions */
327static struct {
328 unsigned int div;
329 unsigned int freqmode;
330 unsigned int mclkdiv;
331} post_table[] = {
332 { 2, 0, 0 },
333 { 4, 0, 1 },
334 { 4, 1, 0 },
335 { 8, 1, 1 },
336 { 8, 2, 0 },
337 { 16, 2, 1 },
338 { 12, 3, 0 },
339 { 24, 3, 1 }
340};
341
342#define FIXED_PLL_SIZE ((1ULL << 22) * 10)
343static int pll_factors(struct pll_div *pll_div, unsigned int target,
344 unsigned int source, unsigned int mclk_div)
345{
346 u64 Kpart;
347 unsigned long int K, Ndiv, Nmod, tmp;
348 int i;
349
350 /*
351 * Scale the output frequency up; the PLL should run in the
352 * region of 90-100MHz.
353 */
354 for (i = 0; i < ARRAY_SIZE(post_table); i++) {
355 tmp = target * post_table[i].div;
356 if ((tmp >= 90000000 && tmp <= 100000000) &&
357 (mclk_div == post_table[i].mclkdiv)) {
358 pll_div->freqmode = post_table[i].freqmode;
359 pll_div->mclkdiv = post_table[i].mclkdiv;
360 target *= post_table[i].div;
361 break;
362 }
363 }
364
365 if (i == ARRAY_SIZE(post_table)) {
366 pr_err("%s: Unable to scale output frequency: %uHz\n",
367 __func__, target);
368 return -EINVAL;
369 }
370
371 pll_div->prescale = 0;
372 Ndiv = target / source;
373 if (Ndiv < 5) {
374 source >>= 1;
375 pll_div->prescale = 1;
376 Ndiv = target / source;
377 }
378
379 if (Ndiv < 5 || Ndiv > 13) {
380 pr_err("%s: WM8804 N value is not within the recommended range: %lu\n",
381 __func__, Ndiv);
382 return -EINVAL;
383 }
384 pll_div->n = Ndiv;
385
386 Nmod = target % source;
387 Kpart = FIXED_PLL_SIZE * (u64)Nmod;
388
389 do_div(Kpart, source);
390
391 K = Kpart & 0xffffffff;
392 if ((K % 10) >= 5)
393 K += 5;
394 K /= 10;
395 pll_div->k = K;
396
397 return 0;
398}
399
400static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
401 int source, unsigned int freq_in,
402 unsigned int freq_out)
403{
404 struct snd_soc_component *component = dai->component;
405 struct wm8804_priv *wm8804 = snd_soc_component_get_drvdata(component);
406 bool change;
407
408 if (!freq_in || !freq_out) {
409 /* disable the PLL */
410 regmap_update_bits_check(wm8804->regmap, WM8804_PWRDN,
411 0x1, 0x1, &change);
412 if (change)
413 pm_runtime_put(wm8804->dev);
414 } else {
415 int ret;
416 struct pll_div pll_div;
417
418 ret = pll_factors(&pll_div, freq_out, freq_in,
419 wm8804->mclk_div);
420 if (ret)
421 return ret;
422
423 /* power down the PLL before reprogramming it */
424 regmap_update_bits_check(wm8804->regmap, WM8804_PWRDN,
425 0x1, 0x1, &change);
426 if (!change)
427 pm_runtime_get_sync(wm8804->dev);
428
429 /* set PLLN and PRESCALE */
430 snd_soc_component_update_bits(component, WM8804_PLL4, 0xf | 0x10,
431 pll_div.n | (pll_div.prescale << 4));
432 /* set mclkdiv and freqmode */
433 snd_soc_component_update_bits(component, WM8804_PLL5, 0x3 | 0x8,
434 pll_div.freqmode | (pll_div.mclkdiv << 3));
435 /* set PLLK */
436 snd_soc_component_write(component, WM8804_PLL1, pll_div.k & 0xff);
437 snd_soc_component_write(component, WM8804_PLL2, (pll_div.k >> 8) & 0xff);
438 snd_soc_component_write(component, WM8804_PLL3, pll_div.k >> 16);
439
440 /* power up the PLL */
441 snd_soc_component_update_bits(component, WM8804_PWRDN, 0x1, 0);
442 }
443
444 return 0;
445}
446
447static int wm8804_set_sysclk(struct snd_soc_dai *dai,
448 int clk_id, unsigned int freq, int dir)
449{
450 struct snd_soc_component *component;
451
452 component = dai->component;
453
454 switch (clk_id) {
455 case WM8804_TX_CLKSRC_MCLK:
456 if ((freq >= 10000000 && freq <= 14400000)
457 || (freq >= 16280000 && freq <= 27000000))
458 snd_soc_component_update_bits(component, WM8804_PLL6, 0x80, 0x80);
459 else {
460 dev_err(dai->dev, "OSCCLOCK is not within the "
461 "recommended range: %uHz\n", freq);
462 return -EINVAL;
463 }
464 break;
465 case WM8804_TX_CLKSRC_PLL:
466 snd_soc_component_update_bits(component, WM8804_PLL6, 0x80, 0);
467 break;
468 case WM8804_CLKOUT_SRC_CLK1:
469 snd_soc_component_update_bits(component, WM8804_PLL6, 0x8, 0);
470 break;
471 case WM8804_CLKOUT_SRC_OSCCLK:
472 snd_soc_component_update_bits(component, WM8804_PLL6, 0x8, 0x8);
473 break;
474 default:
475 dev_err(dai->dev, "Unknown clock source: %d\n", clk_id);
476 return -EINVAL;
477 }
478
479 return 0;
480}
481
482static int wm8804_set_clkdiv(struct snd_soc_dai *dai,
483 int div_id, int div)
484{
485 struct snd_soc_component *component;
486 struct wm8804_priv *wm8804;
487
488 component = dai->component;
489 switch (div_id) {
490 case WM8804_CLKOUT_DIV:
491 snd_soc_component_update_bits(component, WM8804_PLL5, 0x30,
492 (div & 0x3) << 4);
493 break;
494 case WM8804_MCLK_DIV:
495 wm8804 = snd_soc_component_get_drvdata(component);
496 wm8804->mclk_div = div;
497 break;
498 default:
499 dev_err(dai->dev, "Unknown clock divider: %d\n", div_id);
500 return -EINVAL;
501 }
502 return 0;
503}
504
505static const struct snd_soc_dai_ops wm8804_dai_ops = {
506 .hw_params = wm8804_hw_params,
507 .set_fmt = wm8804_set_fmt,
508 .set_sysclk = wm8804_set_sysclk,
509 .set_clkdiv = wm8804_set_clkdiv,
510 .set_pll = wm8804_set_pll
511};
512
513#define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
514 SNDRV_PCM_FMTBIT_S24_LE)
515
516#define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
517 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
518 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
519 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
520
521static struct snd_soc_dai_driver wm8804_dai = {
522 .name = "wm8804-spdif",
523 .playback = {
524 .stream_name = "Playback",
525 .channels_min = 2,
526 .channels_max = 2,
527 .rates = WM8804_RATES,
528 .formats = WM8804_FORMATS,
529 },
530 .capture = {
531 .stream_name = "Capture",
532 .channels_min = 2,
533 .channels_max = 2,
534 .rates = WM8804_RATES,
535 .formats = WM8804_FORMATS,
536 },
537 .ops = &wm8804_dai_ops,
538 .symmetric_rate = 1
539};
540
541static const struct snd_soc_component_driver soc_component_dev_wm8804 = {
542 .dapm_widgets = wm8804_dapm_widgets,
543 .num_dapm_widgets = ARRAY_SIZE(wm8804_dapm_widgets),
544 .dapm_routes = wm8804_dapm_routes,
545 .num_dapm_routes = ARRAY_SIZE(wm8804_dapm_routes),
546 .use_pmdown_time = 1,
547 .endianness = 1,
548};
549
550const struct regmap_config wm8804_regmap_config = {
551 .reg_bits = 8,
552 .val_bits = 8,
553
554 .max_register = WM8804_MAX_REGISTER,
555 .volatile_reg = wm8804_volatile,
556
557 .cache_type = REGCACHE_MAPLE,
558 .reg_defaults = wm8804_reg_defaults,
559 .num_reg_defaults = ARRAY_SIZE(wm8804_reg_defaults),
560};
561EXPORT_SYMBOL_GPL(wm8804_regmap_config);
562
563int wm8804_probe(struct device *dev, struct regmap *regmap)
564{
565 struct wm8804_priv *wm8804;
566 unsigned int id1, id2;
567 int i, ret;
568
569 wm8804 = devm_kzalloc(dev, sizeof(*wm8804), GFP_KERNEL);
570 if (!wm8804)
571 return -ENOMEM;
572
573 dev_set_drvdata(dev, wm8804);
574
575 wm8804->dev = dev;
576 wm8804->regmap = regmap;
577
578 wm8804->reset = devm_gpiod_get_optional(dev, "wlf,reset",
579 GPIOD_OUT_LOW);
580 if (IS_ERR(wm8804->reset)) {
581 ret = PTR_ERR(wm8804->reset);
582 dev_err(dev, "Failed to get reset line: %d\n", ret);
583 return ret;
584 }
585
586 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
587 wm8804->supplies[i].supply = wm8804_supply_names[i];
588
589 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8804->supplies),
590 wm8804->supplies);
591 if (ret) {
592 dev_err(dev, "Failed to request supplies: %d\n", ret);
593 return ret;
594 }
595
596 wm8804->disable_nb[0].notifier_call = wm8804_regulator_event_0;
597 wm8804->disable_nb[1].notifier_call = wm8804_regulator_event_1;
598
599 /* This should really be moved into the regulator core */
600 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) {
601 struct regulator *regulator = wm8804->supplies[i].consumer;
602
603 ret = devm_regulator_register_notifier(regulator,
604 &wm8804->disable_nb[i]);
605 if (ret != 0) {
606 dev_err(dev,
607 "Failed to register regulator notifier: %d\n",
608 ret);
609 return ret;
610 }
611 }
612
613 ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
614 wm8804->supplies);
615 if (ret) {
616 dev_err(dev, "Failed to enable supplies: %d\n", ret);
617 return ret;
618 }
619
620 gpiod_set_value_cansleep(wm8804->reset, 1);
621
622 ret = regmap_read(regmap, WM8804_RST_DEVID1, &id1);
623 if (ret < 0) {
624 dev_err(dev, "Failed to read device ID: %d\n", ret);
625 goto err_reg_enable;
626 }
627
628 ret = regmap_read(regmap, WM8804_DEVID2, &id2);
629 if (ret < 0) {
630 dev_err(dev, "Failed to read device ID: %d\n", ret);
631 goto err_reg_enable;
632 }
633
634 id2 = (id2 << 8) | id1;
635
636 if (id2 != 0x8805) {
637 dev_err(dev, "Invalid device ID: %#x\n", id2);
638 ret = -EINVAL;
639 goto err_reg_enable;
640 }
641
642 ret = regmap_read(regmap, WM8804_DEVREV, &id1);
643 if (ret < 0) {
644 dev_err(dev, "Failed to read device revision: %d\n",
645 ret);
646 goto err_reg_enable;
647 }
648 dev_info(dev, "revision %c\n", id1 + 'A');
649
650 if (!wm8804->reset) {
651 ret = wm8804_soft_reset(wm8804);
652 if (ret < 0) {
653 dev_err(dev, "Failed to issue reset: %d\n", ret);
654 goto err_reg_enable;
655 }
656 }
657
658 ret = devm_snd_soc_register_component(dev, &soc_component_dev_wm8804,
659 &wm8804_dai, 1);
660 if (ret < 0) {
661 dev_err(dev, "Failed to register CODEC: %d\n", ret);
662 goto err_reg_enable;
663 }
664
665 pm_runtime_set_active(dev);
666 pm_runtime_enable(dev);
667 pm_runtime_idle(dev);
668
669 return 0;
670
671err_reg_enable:
672 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
673 return ret;
674}
675EXPORT_SYMBOL_GPL(wm8804_probe);
676
677void wm8804_remove(struct device *dev)
678{
679 pm_runtime_disable(dev);
680}
681EXPORT_SYMBOL_GPL(wm8804_remove);
682
683#if IS_ENABLED(CONFIG_PM)
684static int wm8804_runtime_resume(struct device *dev)
685{
686 struct wm8804_priv *wm8804 = dev_get_drvdata(dev);
687 int ret;
688
689 ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
690 wm8804->supplies);
691 if (ret) {
692 dev_err(wm8804->dev, "Failed to enable supplies: %d\n", ret);
693 return ret;
694 }
695
696 regcache_sync(wm8804->regmap);
697
698 /* Power up OSCCLK */
699 regmap_update_bits(wm8804->regmap, WM8804_PWRDN, 0x8, 0x0);
700
701 return 0;
702}
703
704static int wm8804_runtime_suspend(struct device *dev)
705{
706 struct wm8804_priv *wm8804 = dev_get_drvdata(dev);
707
708 /* Power down OSCCLK */
709 regmap_update_bits(wm8804->regmap, WM8804_PWRDN, 0x8, 0x8);
710
711 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies),
712 wm8804->supplies);
713
714 return 0;
715}
716#endif
717
718const struct dev_pm_ops wm8804_pm = {
719 SET_RUNTIME_PM_OPS(wm8804_runtime_suspend, wm8804_runtime_resume, NULL)
720};
721EXPORT_SYMBOL_GPL(wm8804_pm);
722
723MODULE_DESCRIPTION("ASoC WM8804 driver");
724MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
725MODULE_LICENSE("GPL");
1/*
2 * wm8804.c -- WM8804 S/PDIF transceiver driver
3 *
4 * Copyright 2010 Wolfson Microelectronics plc
5 *
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
19#include <linux/of_device.h>
20#include <linux/spi/spi.h>
21#include <linux/regmap.h>
22#include <linux/regulator/consumer.h>
23#include <linux/slab.h>
24#include <sound/core.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
28#include <sound/initval.h>
29#include <sound/tlv.h>
30
31#include "wm8804.h"
32
33#define WM8804_NUM_SUPPLIES 2
34static const char *wm8804_supply_names[WM8804_NUM_SUPPLIES] = {
35 "PVDD",
36 "DVDD"
37};
38
39static const struct reg_default wm8804_reg_defaults[] = {
40 { 3, 0x21 }, /* R3 - PLL1 */
41 { 4, 0xFD }, /* R4 - PLL2 */
42 { 5, 0x36 }, /* R5 - PLL3 */
43 { 6, 0x07 }, /* R6 - PLL4 */
44 { 7, 0x16 }, /* R7 - PLL5 */
45 { 8, 0x18 }, /* R8 - PLL6 */
46 { 9, 0xFF }, /* R9 - SPDMODE */
47 { 10, 0x00 }, /* R10 - INTMASK */
48 { 18, 0x00 }, /* R18 - SPDTX1 */
49 { 19, 0x00 }, /* R19 - SPDTX2 */
50 { 20, 0x00 }, /* R20 - SPDTX3 */
51 { 21, 0x71 }, /* R21 - SPDTX4 */
52 { 22, 0x0B }, /* R22 - SPDTX5 */
53 { 23, 0x70 }, /* R23 - GPO0 */
54 { 24, 0x57 }, /* R24 - GPO1 */
55 { 26, 0x42 }, /* R26 - GPO2 */
56 { 27, 0x06 }, /* R27 - AIFTX */
57 { 28, 0x06 }, /* R28 - AIFRX */
58 { 29, 0x80 }, /* R29 - SPDRX1 */
59 { 30, 0x07 }, /* R30 - PWRDN */
60};
61
62struct wm8804_priv {
63 struct regmap *regmap;
64 struct regulator_bulk_data supplies[WM8804_NUM_SUPPLIES];
65 struct notifier_block disable_nb[WM8804_NUM_SUPPLIES];
66};
67
68static int txsrc_get(struct snd_kcontrol *kcontrol,
69 struct snd_ctl_elem_value *ucontrol);
70
71static int txsrc_put(struct snd_kcontrol *kcontrol,
72 struct snd_ctl_elem_value *ucontrol);
73
74/*
75 * We can't use the same notifier block for more than one supply and
76 * there's no way I can see to get from a callback to the caller
77 * except container_of().
78 */
79#define WM8804_REGULATOR_EVENT(n) \
80static int wm8804_regulator_event_##n(struct notifier_block *nb, \
81 unsigned long event, void *data) \
82{ \
83 struct wm8804_priv *wm8804 = container_of(nb, struct wm8804_priv, \
84 disable_nb[n]); \
85 if (event & REGULATOR_EVENT_DISABLE) { \
86 regcache_mark_dirty(wm8804->regmap); \
87 } \
88 return 0; \
89}
90
91WM8804_REGULATOR_EVENT(0)
92WM8804_REGULATOR_EVENT(1)
93
94static const char *txsrc_text[] = { "S/PDIF RX", "AIF" };
95static const SOC_ENUM_SINGLE_EXT_DECL(txsrc, txsrc_text);
96
97static const struct snd_kcontrol_new wm8804_snd_controls[] = {
98 SOC_ENUM_EXT("Input Source", txsrc, txsrc_get, txsrc_put),
99 SOC_SINGLE("TX Playback Switch", WM8804_PWRDN, 2, 1, 1),
100 SOC_SINGLE("AIF Playback Switch", WM8804_PWRDN, 4, 1, 1)
101};
102
103static int txsrc_get(struct snd_kcontrol *kcontrol,
104 struct snd_ctl_elem_value *ucontrol)
105{
106 struct snd_soc_codec *codec;
107 unsigned int src;
108
109 codec = snd_kcontrol_chip(kcontrol);
110 src = snd_soc_read(codec, WM8804_SPDTX4);
111 if (src & 0x40)
112 ucontrol->value.integer.value[0] = 1;
113 else
114 ucontrol->value.integer.value[0] = 0;
115
116 return 0;
117}
118
119static int txsrc_put(struct snd_kcontrol *kcontrol,
120 struct snd_ctl_elem_value *ucontrol)
121{
122 struct snd_soc_codec *codec;
123 unsigned int src, txpwr;
124
125 codec = snd_kcontrol_chip(kcontrol);
126
127 if (ucontrol->value.integer.value[0] != 0
128 && ucontrol->value.integer.value[0] != 1)
129 return -EINVAL;
130
131 src = snd_soc_read(codec, WM8804_SPDTX4);
132 switch ((src & 0x40) >> 6) {
133 case 0:
134 if (!ucontrol->value.integer.value[0])
135 return 0;
136 break;
137 case 1:
138 if (ucontrol->value.integer.value[1])
139 return 0;
140 break;
141 }
142
143 /* save the current power state of the transmitter */
144 txpwr = snd_soc_read(codec, WM8804_PWRDN) & 0x4;
145 /* power down the transmitter */
146 snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x4);
147 /* set the tx source */
148 snd_soc_update_bits(codec, WM8804_SPDTX4, 0x40,
149 ucontrol->value.integer.value[0] << 6);
150
151 if (ucontrol->value.integer.value[0]) {
152 /* power down the receiver */
153 snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0x2);
154 /* power up the AIF */
155 snd_soc_update_bits(codec, WM8804_PWRDN, 0x10, 0);
156 } else {
157 /* don't power down the AIF -- may be used as an output */
158 /* power up the receiver */
159 snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0);
160 }
161
162 /* restore the transmitter's configuration */
163 snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, txpwr);
164
165 return 0;
166}
167
168static bool wm8804_volatile(struct device *dev, unsigned int reg)
169{
170 switch (reg) {
171 case WM8804_RST_DEVID1:
172 case WM8804_DEVID2:
173 case WM8804_DEVREV:
174 case WM8804_INTSTAT:
175 case WM8804_SPDSTAT:
176 case WM8804_RXCHAN1:
177 case WM8804_RXCHAN2:
178 case WM8804_RXCHAN3:
179 case WM8804_RXCHAN4:
180 case WM8804_RXCHAN5:
181 return true;
182 default:
183 return false;
184 }
185}
186
187static int wm8804_reset(struct snd_soc_codec *codec)
188{
189 return snd_soc_write(codec, WM8804_RST_DEVID1, 0x0);
190}
191
192static int wm8804_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
193{
194 struct snd_soc_codec *codec;
195 u16 format, master, bcp, lrp;
196
197 codec = dai->codec;
198
199 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
200 case SND_SOC_DAIFMT_I2S:
201 format = 0x2;
202 break;
203 case SND_SOC_DAIFMT_RIGHT_J:
204 format = 0x0;
205 break;
206 case SND_SOC_DAIFMT_LEFT_J:
207 format = 0x1;
208 break;
209 case SND_SOC_DAIFMT_DSP_A:
210 case SND_SOC_DAIFMT_DSP_B:
211 format = 0x3;
212 break;
213 default:
214 dev_err(dai->dev, "Unknown dai format\n");
215 return -EINVAL;
216 }
217
218 /* set data format */
219 snd_soc_update_bits(codec, WM8804_AIFTX, 0x3, format);
220 snd_soc_update_bits(codec, WM8804_AIFRX, 0x3, format);
221
222 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
223 case SND_SOC_DAIFMT_CBM_CFM:
224 master = 1;
225 break;
226 case SND_SOC_DAIFMT_CBS_CFS:
227 master = 0;
228 break;
229 default:
230 dev_err(dai->dev, "Unknown master/slave configuration\n");
231 return -EINVAL;
232 }
233
234 /* set master/slave mode */
235 snd_soc_update_bits(codec, WM8804_AIFRX, 0x40, master << 6);
236
237 bcp = lrp = 0;
238 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
239 case SND_SOC_DAIFMT_NB_NF:
240 break;
241 case SND_SOC_DAIFMT_IB_IF:
242 bcp = lrp = 1;
243 break;
244 case SND_SOC_DAIFMT_IB_NF:
245 bcp = 1;
246 break;
247 case SND_SOC_DAIFMT_NB_IF:
248 lrp = 1;
249 break;
250 default:
251 dev_err(dai->dev, "Unknown polarity configuration\n");
252 return -EINVAL;
253 }
254
255 /* set frame inversion */
256 snd_soc_update_bits(codec, WM8804_AIFTX, 0x10 | 0x20,
257 (bcp << 4) | (lrp << 5));
258 snd_soc_update_bits(codec, WM8804_AIFRX, 0x10 | 0x20,
259 (bcp << 4) | (lrp << 5));
260 return 0;
261}
262
263static int wm8804_hw_params(struct snd_pcm_substream *substream,
264 struct snd_pcm_hw_params *params,
265 struct snd_soc_dai *dai)
266{
267 struct snd_soc_codec *codec;
268 u16 blen;
269
270 codec = dai->codec;
271
272 switch (params_format(params)) {
273 case SNDRV_PCM_FORMAT_S16_LE:
274 blen = 0x0;
275 break;
276 case SNDRV_PCM_FORMAT_S20_3LE:
277 blen = 0x1;
278 break;
279 case SNDRV_PCM_FORMAT_S24_LE:
280 blen = 0x2;
281 break;
282 default:
283 dev_err(dai->dev, "Unsupported word length: %u\n",
284 params_format(params));
285 return -EINVAL;
286 }
287
288 /* set word length */
289 snd_soc_update_bits(codec, WM8804_AIFTX, 0xc, blen << 2);
290 snd_soc_update_bits(codec, WM8804_AIFRX, 0xc, blen << 2);
291
292 return 0;
293}
294
295struct pll_div {
296 u32 prescale:1;
297 u32 mclkdiv:1;
298 u32 freqmode:2;
299 u32 n:4;
300 u32 k:22;
301};
302
303/* PLL rate to output rate divisions */
304static struct {
305 unsigned int div;
306 unsigned int freqmode;
307 unsigned int mclkdiv;
308} post_table[] = {
309 { 2, 0, 0 },
310 { 4, 0, 1 },
311 { 4, 1, 0 },
312 { 8, 1, 1 },
313 { 8, 2, 0 },
314 { 16, 2, 1 },
315 { 12, 3, 0 },
316 { 24, 3, 1 }
317};
318
319#define FIXED_PLL_SIZE ((1ULL << 22) * 10)
320static int pll_factors(struct pll_div *pll_div, unsigned int target,
321 unsigned int source)
322{
323 u64 Kpart;
324 unsigned long int K, Ndiv, Nmod, tmp;
325 int i;
326
327 /*
328 * Scale the output frequency up; the PLL should run in the
329 * region of 90-100MHz.
330 */
331 for (i = 0; i < ARRAY_SIZE(post_table); i++) {
332 tmp = target * post_table[i].div;
333 if (tmp >= 90000000 && tmp <= 100000000) {
334 pll_div->freqmode = post_table[i].freqmode;
335 pll_div->mclkdiv = post_table[i].mclkdiv;
336 target *= post_table[i].div;
337 break;
338 }
339 }
340
341 if (i == ARRAY_SIZE(post_table)) {
342 pr_err("%s: Unable to scale output frequency: %uHz\n",
343 __func__, target);
344 return -EINVAL;
345 }
346
347 pll_div->prescale = 0;
348 Ndiv = target / source;
349 if (Ndiv < 5) {
350 source >>= 1;
351 pll_div->prescale = 1;
352 Ndiv = target / source;
353 }
354
355 if (Ndiv < 5 || Ndiv > 13) {
356 pr_err("%s: WM8804 N value is not within the recommended range: %lu\n",
357 __func__, Ndiv);
358 return -EINVAL;
359 }
360 pll_div->n = Ndiv;
361
362 Nmod = target % source;
363 Kpart = FIXED_PLL_SIZE * (u64)Nmod;
364
365 do_div(Kpart, source);
366
367 K = Kpart & 0xffffffff;
368 if ((K % 10) >= 5)
369 K += 5;
370 K /= 10;
371 pll_div->k = K;
372
373 return 0;
374}
375
376static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
377 int source, unsigned int freq_in,
378 unsigned int freq_out)
379{
380 struct snd_soc_codec *codec;
381
382 codec = dai->codec;
383 if (!freq_in || !freq_out) {
384 /* disable the PLL */
385 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
386 return 0;
387 } else {
388 int ret;
389 struct pll_div pll_div;
390
391 ret = pll_factors(&pll_div, freq_out, freq_in);
392 if (ret)
393 return ret;
394
395 /* power down the PLL before reprogramming it */
396 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
397
398 if (!freq_in || !freq_out)
399 return 0;
400
401 /* set PLLN and PRESCALE */
402 snd_soc_update_bits(codec, WM8804_PLL4, 0xf | 0x10,
403 pll_div.n | (pll_div.prescale << 4));
404 /* set mclkdiv and freqmode */
405 snd_soc_update_bits(codec, WM8804_PLL5, 0x3 | 0x8,
406 pll_div.freqmode | (pll_div.mclkdiv << 3));
407 /* set PLLK */
408 snd_soc_write(codec, WM8804_PLL1, pll_div.k & 0xff);
409 snd_soc_write(codec, WM8804_PLL2, (pll_div.k >> 8) & 0xff);
410 snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16);
411
412 /* power up the PLL */
413 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
414 }
415
416 return 0;
417}
418
419static int wm8804_set_sysclk(struct snd_soc_dai *dai,
420 int clk_id, unsigned int freq, int dir)
421{
422 struct snd_soc_codec *codec;
423
424 codec = dai->codec;
425
426 switch (clk_id) {
427 case WM8804_TX_CLKSRC_MCLK:
428 if ((freq >= 10000000 && freq <= 14400000)
429 || (freq >= 16280000 && freq <= 27000000))
430 snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0x80);
431 else {
432 dev_err(dai->dev, "OSCCLOCK is not within the "
433 "recommended range: %uHz\n", freq);
434 return -EINVAL;
435 }
436 break;
437 case WM8804_TX_CLKSRC_PLL:
438 snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0);
439 break;
440 case WM8804_CLKOUT_SRC_CLK1:
441 snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0);
442 break;
443 case WM8804_CLKOUT_SRC_OSCCLK:
444 snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0x8);
445 break;
446 default:
447 dev_err(dai->dev, "Unknown clock source: %d\n", clk_id);
448 return -EINVAL;
449 }
450
451 return 0;
452}
453
454static int wm8804_set_clkdiv(struct snd_soc_dai *dai,
455 int div_id, int div)
456{
457 struct snd_soc_codec *codec;
458
459 codec = dai->codec;
460 switch (div_id) {
461 case WM8804_CLKOUT_DIV:
462 snd_soc_update_bits(codec, WM8804_PLL5, 0x30,
463 (div & 0x3) << 4);
464 break;
465 default:
466 dev_err(dai->dev, "Unknown clock divider: %d\n", div_id);
467 return -EINVAL;
468 }
469 return 0;
470}
471
472static int wm8804_set_bias_level(struct snd_soc_codec *codec,
473 enum snd_soc_bias_level level)
474{
475 int ret;
476 struct wm8804_priv *wm8804;
477
478 wm8804 = snd_soc_codec_get_drvdata(codec);
479 switch (level) {
480 case SND_SOC_BIAS_ON:
481 break;
482 case SND_SOC_BIAS_PREPARE:
483 /* power up the OSC and the PLL */
484 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
485 break;
486 case SND_SOC_BIAS_STANDBY:
487 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
488 ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
489 wm8804->supplies);
490 if (ret) {
491 dev_err(codec->dev,
492 "Failed to enable supplies: %d\n",
493 ret);
494 return ret;
495 }
496 regcache_sync(wm8804->regmap);
497 }
498 /* power down the OSC and the PLL */
499 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9);
500 break;
501 case SND_SOC_BIAS_OFF:
502 /* power down the OSC and the PLL */
503 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9);
504 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies),
505 wm8804->supplies);
506 break;
507 }
508
509 codec->dapm.bias_level = level;
510 return 0;
511}
512
513#ifdef CONFIG_PM
514static int wm8804_suspend(struct snd_soc_codec *codec)
515{
516 wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF);
517 return 0;
518}
519
520static int wm8804_resume(struct snd_soc_codec *codec)
521{
522 wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
523 return 0;
524}
525#else
526#define wm8804_suspend NULL
527#define wm8804_resume NULL
528#endif
529
530static int wm8804_remove(struct snd_soc_codec *codec)
531{
532 struct wm8804_priv *wm8804;
533 int i;
534
535 wm8804 = snd_soc_codec_get_drvdata(codec);
536 wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF);
537
538 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); ++i)
539 regulator_unregister_notifier(wm8804->supplies[i].consumer,
540 &wm8804->disable_nb[i]);
541 regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
542 return 0;
543}
544
545static int wm8804_probe(struct snd_soc_codec *codec)
546{
547 struct wm8804_priv *wm8804;
548 int i, id1, id2, ret;
549
550 wm8804 = snd_soc_codec_get_drvdata(codec);
551
552 codec->control_data = wm8804->regmap;
553
554 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
555 if (ret < 0) {
556 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
557 return ret;
558 }
559
560 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
561 wm8804->supplies[i].supply = wm8804_supply_names[i];
562
563 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8804->supplies),
564 wm8804->supplies);
565 if (ret) {
566 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
567 return ret;
568 }
569
570 wm8804->disable_nb[0].notifier_call = wm8804_regulator_event_0;
571 wm8804->disable_nb[1].notifier_call = wm8804_regulator_event_1;
572
573 /* This should really be moved into the regulator core */
574 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) {
575 ret = regulator_register_notifier(wm8804->supplies[i].consumer,
576 &wm8804->disable_nb[i]);
577 if (ret != 0) {
578 dev_err(codec->dev,
579 "Failed to register regulator notifier: %d\n",
580 ret);
581 }
582 }
583
584 ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
585 wm8804->supplies);
586 if (ret) {
587 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
588 goto err_reg_get;
589 }
590
591 id1 = snd_soc_read(codec, WM8804_RST_DEVID1);
592 if (id1 < 0) {
593 dev_err(codec->dev, "Failed to read device ID: %d\n", id1);
594 ret = id1;
595 goto err_reg_enable;
596 }
597
598 id2 = snd_soc_read(codec, WM8804_DEVID2);
599 if (id2 < 0) {
600 dev_err(codec->dev, "Failed to read device ID: %d\n", id2);
601 ret = id2;
602 goto err_reg_enable;
603 }
604
605 id2 = (id2 << 8) | id1;
606
607 if (id2 != 0x8805) {
608 dev_err(codec->dev, "Invalid device ID: %#x\n", id2);
609 ret = -EINVAL;
610 goto err_reg_enable;
611 }
612
613 ret = snd_soc_read(codec, WM8804_DEVREV);
614 if (ret < 0) {
615 dev_err(codec->dev, "Failed to read device revision: %d\n",
616 ret);
617 goto err_reg_enable;
618 }
619 dev_info(codec->dev, "revision %c\n", ret + 'A');
620
621 ret = wm8804_reset(codec);
622 if (ret < 0) {
623 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
624 goto err_reg_enable;
625 }
626
627 wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
628
629 return 0;
630
631err_reg_enable:
632 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
633err_reg_get:
634 regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
635 return ret;
636}
637
638static const struct snd_soc_dai_ops wm8804_dai_ops = {
639 .hw_params = wm8804_hw_params,
640 .set_fmt = wm8804_set_fmt,
641 .set_sysclk = wm8804_set_sysclk,
642 .set_clkdiv = wm8804_set_clkdiv,
643 .set_pll = wm8804_set_pll
644};
645
646#define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
647 SNDRV_PCM_FMTBIT_S24_LE)
648
649#define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
650 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
651 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
652 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
653
654static struct snd_soc_dai_driver wm8804_dai = {
655 .name = "wm8804-spdif",
656 .playback = {
657 .stream_name = "Playback",
658 .channels_min = 2,
659 .channels_max = 2,
660 .rates = WM8804_RATES,
661 .formats = WM8804_FORMATS,
662 },
663 .capture = {
664 .stream_name = "Capture",
665 .channels_min = 2,
666 .channels_max = 2,
667 .rates = WM8804_RATES,
668 .formats = WM8804_FORMATS,
669 },
670 .ops = &wm8804_dai_ops,
671 .symmetric_rates = 1
672};
673
674static struct snd_soc_codec_driver soc_codec_dev_wm8804 = {
675 .probe = wm8804_probe,
676 .remove = wm8804_remove,
677 .suspend = wm8804_suspend,
678 .resume = wm8804_resume,
679 .set_bias_level = wm8804_set_bias_level,
680 .idle_bias_off = true,
681
682 .controls = wm8804_snd_controls,
683 .num_controls = ARRAY_SIZE(wm8804_snd_controls),
684};
685
686static const struct of_device_id wm8804_of_match[] = {
687 { .compatible = "wlf,wm8804", },
688 { }
689};
690MODULE_DEVICE_TABLE(of, wm8804_of_match);
691
692static struct regmap_config wm8804_regmap_config = {
693 .reg_bits = 8,
694 .val_bits = 8,
695
696 .max_register = WM8804_MAX_REGISTER,
697 .volatile_reg = wm8804_volatile,
698
699 .cache_type = REGCACHE_RBTREE,
700 .reg_defaults = wm8804_reg_defaults,
701 .num_reg_defaults = ARRAY_SIZE(wm8804_reg_defaults),
702};
703
704#if defined(CONFIG_SPI_MASTER)
705static int __devinit wm8804_spi_probe(struct spi_device *spi)
706{
707 struct wm8804_priv *wm8804;
708 int ret;
709
710 wm8804 = devm_kzalloc(&spi->dev, sizeof *wm8804, GFP_KERNEL);
711 if (!wm8804)
712 return -ENOMEM;
713
714 wm8804->regmap = regmap_init_spi(spi, &wm8804_regmap_config);
715 if (IS_ERR(wm8804->regmap)) {
716 ret = PTR_ERR(wm8804->regmap);
717 return ret;
718 }
719
720 spi_set_drvdata(spi, wm8804);
721
722 ret = snd_soc_register_codec(&spi->dev,
723 &soc_codec_dev_wm8804, &wm8804_dai, 1);
724
725 return ret;
726}
727
728static int __devexit wm8804_spi_remove(struct spi_device *spi)
729{
730 struct wm8804_priv *wm8804 = spi_get_drvdata(spi);
731 snd_soc_unregister_codec(&spi->dev);
732 regmap_exit(wm8804->regmap);
733 return 0;
734}
735
736static struct spi_driver wm8804_spi_driver = {
737 .driver = {
738 .name = "wm8804",
739 .owner = THIS_MODULE,
740 .of_match_table = wm8804_of_match,
741 },
742 .probe = wm8804_spi_probe,
743 .remove = __devexit_p(wm8804_spi_remove)
744};
745#endif
746
747#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
748static __devinit int wm8804_i2c_probe(struct i2c_client *i2c,
749 const struct i2c_device_id *id)
750{
751 struct wm8804_priv *wm8804;
752 int ret;
753
754 wm8804 = devm_kzalloc(&i2c->dev, sizeof *wm8804, GFP_KERNEL);
755 if (!wm8804)
756 return -ENOMEM;
757
758 wm8804->regmap = regmap_init_i2c(i2c, &wm8804_regmap_config);
759 if (IS_ERR(wm8804->regmap)) {
760 ret = PTR_ERR(wm8804->regmap);
761 return ret;
762 }
763
764 i2c_set_clientdata(i2c, wm8804);
765
766 ret = snd_soc_register_codec(&i2c->dev,
767 &soc_codec_dev_wm8804, &wm8804_dai, 1);
768 if (ret != 0)
769 goto err;
770
771 return 0;
772
773err:
774 regmap_exit(wm8804->regmap);
775 return ret;
776}
777
778static __devexit int wm8804_i2c_remove(struct i2c_client *i2c)
779{
780 struct wm8804_priv *wm8804 = i2c_get_clientdata(i2c);
781
782 snd_soc_unregister_codec(&i2c->dev);
783 regmap_exit(wm8804->regmap);
784
785 return 0;
786}
787
788static const struct i2c_device_id wm8804_i2c_id[] = {
789 { "wm8804", 0 },
790 { }
791};
792MODULE_DEVICE_TABLE(i2c, wm8804_i2c_id);
793
794static struct i2c_driver wm8804_i2c_driver = {
795 .driver = {
796 .name = "wm8804",
797 .owner = THIS_MODULE,
798 .of_match_table = wm8804_of_match,
799 },
800 .probe = wm8804_i2c_probe,
801 .remove = __devexit_p(wm8804_i2c_remove),
802 .id_table = wm8804_i2c_id
803};
804#endif
805
806static int __init wm8804_modinit(void)
807{
808 int ret = 0;
809
810#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
811 ret = i2c_add_driver(&wm8804_i2c_driver);
812 if (ret) {
813 printk(KERN_ERR "Failed to register wm8804 I2C driver: %d\n",
814 ret);
815 }
816#endif
817#if defined(CONFIG_SPI_MASTER)
818 ret = spi_register_driver(&wm8804_spi_driver);
819 if (ret != 0) {
820 printk(KERN_ERR "Failed to register wm8804 SPI driver: %d\n",
821 ret);
822 }
823#endif
824 return ret;
825}
826module_init(wm8804_modinit);
827
828static void __exit wm8804_exit(void)
829{
830#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
831 i2c_del_driver(&wm8804_i2c_driver);
832#endif
833#if defined(CONFIG_SPI_MASTER)
834 spi_unregister_driver(&wm8804_spi_driver);
835#endif
836}
837module_exit(wm8804_exit);
838
839MODULE_DESCRIPTION("ASoC WM8804 driver");
840MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
841MODULE_LICENSE("GPL");