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1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/skbuff.h>
35#include <linux/netdevice.h>
36#include <net/mac80211.h>
37#include <linux/etherdevice.h>
38#include <asm/unaligned.h>
39
40#include "common.h"
41#include "4965.h"
42
43/**
44 * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
45 * using sample data 100 bytes apart. If these sample points are good,
46 * it's a pretty good bet that everything between them is good, too.
47 */
48static int
49il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
50{
51 u32 val;
52 int ret = 0;
53 u32 errcnt = 0;
54 u32 i;
55
56 D_INFO("ucode inst image size is %u\n", len);
57
58 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
59 /* read data comes through single port, auto-incr addr */
60 /* NOTE: Use the debugless read so we don't flood kernel log
61 * if IL_DL_IO is set */
62 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND);
63 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
64 if (val != le32_to_cpu(*image)) {
65 ret = -EIO;
66 errcnt++;
67 if (errcnt >= 3)
68 break;
69 }
70 }
71
72 return ret;
73}
74
75/**
76 * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
77 * looking at all data.
78 */
79static int
80il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
81{
82 u32 val;
83 u32 save_len = len;
84 int ret = 0;
85 u32 errcnt;
86
87 D_INFO("ucode inst image size is %u\n", len);
88
89 il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND);
90
91 errcnt = 0;
92 for (; len > 0; len -= sizeof(u32), image++) {
93 /* read data comes through single port, auto-incr addr */
94 /* NOTE: Use the debugless read so we don't flood kernel log
95 * if IL_DL_IO is set */
96 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
97 if (val != le32_to_cpu(*image)) {
98 IL_ERR("uCode INST section is invalid at "
99 "offset 0x%x, is 0x%x, s/b 0x%x\n",
100 save_len - len, val, le32_to_cpu(*image));
101 ret = -EIO;
102 errcnt++;
103 if (errcnt >= 20)
104 break;
105 }
106 }
107
108 if (!errcnt)
109 D_INFO("ucode image in INSTRUCTION memory is good\n");
110
111 return ret;
112}
113
114/**
115 * il4965_verify_ucode - determine which instruction image is in SRAM,
116 * and verify its contents
117 */
118int
119il4965_verify_ucode(struct il_priv *il)
120{
121 __le32 *image;
122 u32 len;
123 int ret;
124
125 /* Try bootstrap */
126 image = (__le32 *) il->ucode_boot.v_addr;
127 len = il->ucode_boot.len;
128 ret = il4965_verify_inst_sparse(il, image, len);
129 if (!ret) {
130 D_INFO("Bootstrap uCode is good in inst SRAM\n");
131 return 0;
132 }
133
134 /* Try initialize */
135 image = (__le32 *) il->ucode_init.v_addr;
136 len = il->ucode_init.len;
137 ret = il4965_verify_inst_sparse(il, image, len);
138 if (!ret) {
139 D_INFO("Initialize uCode is good in inst SRAM\n");
140 return 0;
141 }
142
143 /* Try runtime/protocol */
144 image = (__le32 *) il->ucode_code.v_addr;
145 len = il->ucode_code.len;
146 ret = il4965_verify_inst_sparse(il, image, len);
147 if (!ret) {
148 D_INFO("Runtime uCode is good in inst SRAM\n");
149 return 0;
150 }
151
152 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
153
154 /* Since nothing seems to match, show first several data entries in
155 * instruction SRAM, so maybe visual inspection will give a clue.
156 * Selection of bootstrap image (vs. other images) is arbitrary. */
157 image = (__le32 *) il->ucode_boot.v_addr;
158 len = il->ucode_boot.len;
159 ret = il4965_verify_inst_full(il, image, len);
160
161 return ret;
162}
163
164/******************************************************************************
165 *
166 * EEPROM related functions
167 *
168******************************************************************************/
169
170/*
171 * The device's EEPROM semaphore prevents conflicts between driver and uCode
172 * when accessing the EEPROM; each access is a series of pulses to/from the
173 * EEPROM chip, not a single event, so even reads could conflict if they
174 * weren't arbitrated by the semaphore.
175 */
176int
177il4965_eeprom_acquire_semaphore(struct il_priv *il)
178{
179 u16 count;
180 int ret;
181
182 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
183 /* Request semaphore */
184 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
185 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
186
187 /* See if we got it */
188 ret =
189 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
190 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
191 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
192 EEPROM_SEM_TIMEOUT);
193 if (ret >= 0)
194 return ret;
195 }
196
197 return ret;
198}
199
200void
201il4965_eeprom_release_semaphore(struct il_priv *il)
202{
203 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
204 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
205
206}
207
208int
209il4965_eeprom_check_version(struct il_priv *il)
210{
211 u16 eeprom_ver;
212 u16 calib_ver;
213
214 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
215 calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET);
216
217 if (eeprom_ver < il->cfg->eeprom_ver ||
218 calib_ver < il->cfg->eeprom_calib_ver)
219 goto err;
220
221 IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", eeprom_ver, calib_ver);
222
223 return 0;
224err:
225 IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
226 "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver,
227 calib_ver, il->cfg->eeprom_calib_ver);
228 return -EINVAL;
229
230}
231
232void
233il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac)
234{
235 const u8 *addr = il_eeprom_query_addr(il,
236 EEPROM_MAC_ADDRESS);
237 memcpy(mac, addr, ETH_ALEN);
238}
239
240/* Send led command */
241static int
242il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
243{
244 struct il_host_cmd cmd = {
245 .id = C_LEDS,
246 .len = sizeof(struct il_led_cmd),
247 .data = led_cmd,
248 .flags = CMD_ASYNC,
249 .callback = NULL,
250 };
251 u32 reg;
252
253 reg = _il_rd(il, CSR_LED_REG);
254 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
255 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
256
257 return il_send_cmd(il, &cmd);
258}
259
260/* Set led register off */
261void
262il4965_led_enable(struct il_priv *il)
263{
264 _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
265}
266
267static int il4965_send_tx_power(struct il_priv *il);
268static int il4965_hw_get_temperature(struct il_priv *il);
269
270/* Highest firmware API version supported */
271#define IL4965_UCODE_API_MAX 2
272
273/* Lowest firmware API version supported */
274#define IL4965_UCODE_API_MIN 2
275
276#define IL4965_FW_PRE "iwlwifi-4965-"
277#define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
278#define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
279
280/* check contents of special bootstrap uCode SRAM */
281static int
282il4965_verify_bsm(struct il_priv *il)
283{
284 __le32 *image = il->ucode_boot.v_addr;
285 u32 len = il->ucode_boot.len;
286 u32 reg;
287 u32 val;
288
289 D_INFO("Begin verify bsm\n");
290
291 /* verify BSM SRAM contents */
292 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
293 for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len;
294 reg += sizeof(u32), image++) {
295 val = il_rd_prph(il, reg);
296 if (val != le32_to_cpu(*image)) {
297 IL_ERR("BSM uCode verification failed at "
298 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
299 BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND,
300 len, val, le32_to_cpu(*image));
301 return -EIO;
302 }
303 }
304
305 D_INFO("BSM bootstrap uCode image OK\n");
306
307 return 0;
308}
309
310/**
311 * il4965_load_bsm - Load bootstrap instructions
312 *
313 * BSM operation:
314 *
315 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
316 * in special SRAM that does not power down during RFKILL. When powering back
317 * up after power-saving sleeps (or during initial uCode load), the BSM loads
318 * the bootstrap program into the on-board processor, and starts it.
319 *
320 * The bootstrap program loads (via DMA) instructions and data for a new
321 * program from host DRAM locations indicated by the host driver in the
322 * BSM_DRAM_* registers. Once the new program is loaded, it starts
323 * automatically.
324 *
325 * When initializing the NIC, the host driver points the BSM to the
326 * "initialize" uCode image. This uCode sets up some internal data, then
327 * notifies host via "initialize alive" that it is complete.
328 *
329 * The host then replaces the BSM_DRAM_* pointer values to point to the
330 * normal runtime uCode instructions and a backup uCode data cache buffer
331 * (filled initially with starting data values for the on-board processor),
332 * then triggers the "initialize" uCode to load and launch the runtime uCode,
333 * which begins normal operation.
334 *
335 * When doing a power-save shutdown, runtime uCode saves data SRAM into
336 * the backup data cache in DRAM before SRAM is powered down.
337 *
338 * When powering back up, the BSM loads the bootstrap program. This reloads
339 * the runtime uCode instructions and the backup data cache into SRAM,
340 * and re-launches the runtime uCode from where it left off.
341 */
342static int
343il4965_load_bsm(struct il_priv *il)
344{
345 __le32 *image = il->ucode_boot.v_addr;
346 u32 len = il->ucode_boot.len;
347 dma_addr_t pinst;
348 dma_addr_t pdata;
349 u32 inst_len;
350 u32 data_len;
351 int i;
352 u32 done;
353 u32 reg_offset;
354 int ret;
355
356 D_INFO("Begin load bsm\n");
357
358 il->ucode_type = UCODE_RT;
359
360 /* make sure bootstrap program is no larger than BSM's SRAM size */
361 if (len > IL49_MAX_BSM_SIZE)
362 return -EINVAL;
363
364 /* Tell bootstrap uCode where to find the "Initialize" uCode
365 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
366 * NOTE: il_init_alive_start() will replace these values,
367 * after the "initialize" uCode has run, to point to
368 * runtime/protocol instructions and backup data cache.
369 */
370 pinst = il->ucode_init.p_addr >> 4;
371 pdata = il->ucode_init_data.p_addr >> 4;
372 inst_len = il->ucode_init.len;
373 data_len = il->ucode_init_data.len;
374
375 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
376 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
377 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
378 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
379
380 /* Fill BSM memory with bootstrap instructions */
381 for (reg_offset = BSM_SRAM_LOWER_BOUND;
382 reg_offset < BSM_SRAM_LOWER_BOUND + len;
383 reg_offset += sizeof(u32), image++)
384 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
385
386 ret = il4965_verify_bsm(il);
387 if (ret)
388 return ret;
389
390 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
391 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
392 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
393 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
394
395 /* Load bootstrap code into instruction SRAM now,
396 * to prepare to load "initialize" uCode */
397 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
398
399 /* Wait for load of bootstrap uCode to finish */
400 for (i = 0; i < 100; i++) {
401 done = il_rd_prph(il, BSM_WR_CTRL_REG);
402 if (!(done & BSM_WR_CTRL_REG_BIT_START))
403 break;
404 udelay(10);
405 }
406 if (i < 100)
407 D_INFO("BSM write complete, poll %d iterations\n", i);
408 else {
409 IL_ERR("BSM write did not complete!\n");
410 return -EIO;
411 }
412
413 /* Enable future boot loads whenever power management unit triggers it
414 * (e.g. when powering back up after power-save shutdown) */
415 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
416
417 return 0;
418}
419
420/**
421 * il4965_set_ucode_ptrs - Set uCode address location
422 *
423 * Tell initialization uCode where to find runtime uCode.
424 *
425 * BSM registers initially contain pointers to initialization uCode.
426 * We need to replace them to load runtime uCode inst and data,
427 * and to save runtime data when powering down.
428 */
429static int
430il4965_set_ucode_ptrs(struct il_priv *il)
431{
432 dma_addr_t pinst;
433 dma_addr_t pdata;
434 int ret = 0;
435
436 /* bits 35:4 for 4965 */
437 pinst = il->ucode_code.p_addr >> 4;
438 pdata = il->ucode_data_backup.p_addr >> 4;
439
440 /* Tell bootstrap uCode where to find image to load */
441 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
442 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
443 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
444
445 /* Inst byte count must be last to set up, bit 31 signals uCode
446 * that all new ptr/size info is in place */
447 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
448 il->ucode_code.len | BSM_DRAM_INST_LOAD);
449 D_INFO("Runtime uCode pointers are set.\n");
450
451 return ret;
452}
453
454/**
455 * il4965_init_alive_start - Called after N_ALIVE notification received
456 *
457 * Called after N_ALIVE notification received from "initialize" uCode.
458 *
459 * The 4965 "initialize" ALIVE reply contains calibration data for:
460 * Voltage, temperature, and MIMO tx gain correction, now stored in il
461 * (3945 does not contain this data).
462 *
463 * Tell "initialize" uCode to go ahead and load the runtime uCode.
464*/
465static void
466il4965_init_alive_start(struct il_priv *il)
467{
468 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
469 * This is a paranoid check, because we would not have gotten the
470 * "initialize" alive if code weren't properly loaded. */
471 if (il4965_verify_ucode(il)) {
472 /* Runtime instruction load was bad;
473 * take it all the way back down so we can try again */
474 D_INFO("Bad \"initialize\" uCode load.\n");
475 goto restart;
476 }
477
478 /* Calculate temperature */
479 il->temperature = il4965_hw_get_temperature(il);
480
481 /* Send pointers to protocol/runtime uCode image ... init code will
482 * load and launch runtime uCode, which will send us another "Alive"
483 * notification. */
484 D_INFO("Initialization Alive received.\n");
485 if (il4965_set_ucode_ptrs(il)) {
486 /* Runtime instruction load won't happen;
487 * take it all the way back down so we can try again */
488 D_INFO("Couldn't set up uCode pointers.\n");
489 goto restart;
490 }
491 return;
492
493restart:
494 queue_work(il->workqueue, &il->restart);
495}
496
497static bool
498iw4965_is_ht40_channel(__le32 rxon_flags)
499{
500 int chan_mod =
501 le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) >>
502 RXON_FLG_CHANNEL_MODE_POS;
503 return (chan_mod == CHANNEL_MODE_PURE_40 ||
504 chan_mod == CHANNEL_MODE_MIXED);
505}
506
507void
508il4965_nic_config(struct il_priv *il)
509{
510 unsigned long flags;
511 u16 radio_cfg;
512
513 spin_lock_irqsave(&il->lock, flags);
514
515 radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
516
517 /* write radio config values to register */
518 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
519 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
520 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
521 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
522 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
523
524 /* set CSR_HW_CONFIG_REG for uCode use */
525 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
526 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
527 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
528
529 il->calib_info =
530 (struct il_eeprom_calib_info *)
531 il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET);
532
533 spin_unlock_irqrestore(&il->lock, flags);
534}
535
536/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
537 * Called after every association, but this runs only once!
538 * ... once chain noise is calibrated the first time, it's good forever. */
539static void
540il4965_chain_noise_reset(struct il_priv *il)
541{
542 struct il_chain_noise_data *data = &(il->chain_noise_data);
543
544 if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) {
545 struct il_calib_diff_gain_cmd cmd;
546
547 /* clear data for chain noise calibration algorithm */
548 data->chain_noise_a = 0;
549 data->chain_noise_b = 0;
550 data->chain_noise_c = 0;
551 data->chain_signal_a = 0;
552 data->chain_signal_b = 0;
553 data->chain_signal_c = 0;
554 data->beacon_count = 0;
555
556 memset(&cmd, 0, sizeof(cmd));
557 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
558 cmd.diff_gain_a = 0;
559 cmd.diff_gain_b = 0;
560 cmd.diff_gain_c = 0;
561 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd))
562 IL_ERR("Could not send C_PHY_CALIBRATION\n");
563 data->state = IL_CHAIN_NOISE_ACCUMULATE;
564 D_CALIB("Run chain_noise_calibrate\n");
565 }
566}
567
568static s32
569il4965_math_div_round(s32 num, s32 denom, s32 * res)
570{
571 s32 sign = 1;
572
573 if (num < 0) {
574 sign = -sign;
575 num = -num;
576 }
577 if (denom < 0) {
578 sign = -sign;
579 denom = -denom;
580 }
581 *res = 1;
582 *res = ((num * 2 + denom) / (denom * 2)) * sign;
583
584 return 1;
585}
586
587/**
588 * il4965_get_voltage_compensation - Power supply voltage comp for txpower
589 *
590 * Determines power supply voltage compensation for txpower calculations.
591 * Returns number of 1/2-dB steps to subtract from gain table idx,
592 * to compensate for difference between power supply voltage during
593 * factory measurements, vs. current power supply voltage.
594 *
595 * Voltage indication is higher for lower voltage.
596 * Lower voltage requires more gain (lower gain table idx).
597 */
598static s32
599il4965_get_voltage_compensation(s32 eeprom_voltage, s32 current_voltage)
600{
601 s32 comp = 0;
602
603 if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
604 TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
605 return 0;
606
607 il4965_math_div_round(current_voltage - eeprom_voltage,
608 TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
609
610 if (current_voltage > eeprom_voltage)
611 comp *= 2;
612 if ((comp < -2) || (comp > 2))
613 comp = 0;
614
615 return comp;
616}
617
618static s32
619il4965_get_tx_atten_grp(u16 channel)
620{
621 if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
622 channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
623 return CALIB_CH_GROUP_5;
624
625 if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
626 channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
627 return CALIB_CH_GROUP_1;
628
629 if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
630 channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
631 return CALIB_CH_GROUP_2;
632
633 if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
634 channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
635 return CALIB_CH_GROUP_3;
636
637 if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
638 channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
639 return CALIB_CH_GROUP_4;
640
641 return -EINVAL;
642}
643
644static u32
645il4965_get_sub_band(const struct il_priv *il, u32 channel)
646{
647 s32 b = -1;
648
649 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
650 if (il->calib_info->band_info[b].ch_from == 0)
651 continue;
652
653 if (channel >= il->calib_info->band_info[b].ch_from &&
654 channel <= il->calib_info->band_info[b].ch_to)
655 break;
656 }
657
658 return b;
659}
660
661static s32
662il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
663{
664 s32 val;
665
666 if (x2 == x1)
667 return y1;
668 else {
669 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
670 return val + y2;
671 }
672}
673
674/**
675 * il4965_interpolate_chan - Interpolate factory measurements for one channel
676 *
677 * Interpolates factory measurements from the two sample channels within a
678 * sub-band, to apply to channel of interest. Interpolation is proportional to
679 * differences in channel frequencies, which is proportional to differences
680 * in channel number.
681 */
682static int
683il4965_interpolate_chan(struct il_priv *il, u32 channel,
684 struct il_eeprom_calib_ch_info *chan_info)
685{
686 s32 s = -1;
687 u32 c;
688 u32 m;
689 const struct il_eeprom_calib_measure *m1;
690 const struct il_eeprom_calib_measure *m2;
691 struct il_eeprom_calib_measure *omeas;
692 u32 ch_i1;
693 u32 ch_i2;
694
695 s = il4965_get_sub_band(il, channel);
696 if (s >= EEPROM_TX_POWER_BANDS) {
697 IL_ERR("Tx Power can not find channel %d\n", channel);
698 return -1;
699 }
700
701 ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
702 ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
703 chan_info->ch_num = (u8) channel;
704
705 D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", channel, s,
706 ch_i1, ch_i2);
707
708 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
709 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
710 m1 = &(il->calib_info->band_info[s].ch1.
711 measurements[c][m]);
712 m2 = &(il->calib_info->band_info[s].ch2.
713 measurements[c][m]);
714 omeas = &(chan_info->measurements[c][m]);
715
716 omeas->actual_pow =
717 (u8) il4965_interpolate_value(channel, ch_i1,
718 m1->actual_pow, ch_i2,
719 m2->actual_pow);
720 omeas->gain_idx =
721 (u8) il4965_interpolate_value(channel, ch_i1,
722 m1->gain_idx, ch_i2,
723 m2->gain_idx);
724 omeas->temperature =
725 (u8) il4965_interpolate_value(channel, ch_i1,
726 m1->temperature,
727 ch_i2,
728 m2->temperature);
729 omeas->pa_det =
730 (s8) il4965_interpolate_value(channel, ch_i1,
731 m1->pa_det, ch_i2,
732 m2->pa_det);
733
734 D_TXPOWER("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c,
735 m, m1->actual_pow, m2->actual_pow,
736 omeas->actual_pow);
737 D_TXPOWER("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c,
738 m, m1->gain_idx, m2->gain_idx,
739 omeas->gain_idx);
740 D_TXPOWER("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c,
741 m, m1->pa_det, m2->pa_det, omeas->pa_det);
742 D_TXPOWER("chain %d meas %d T1=%d T2=%d T=%d\n", c,
743 m, m1->temperature, m2->temperature,
744 omeas->temperature);
745 }
746 }
747
748 return 0;
749}
750
751/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
752 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
753static s32 back_off_table[] = {
754 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
755 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
756 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
757 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
758 10 /* CCK */
759};
760
761/* Thermal compensation values for txpower for various frequency ranges ...
762 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
763static struct il4965_txpower_comp_entry {
764 s32 degrees_per_05db_a;
765 s32 degrees_per_05db_a_denom;
766} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
767 {
768 9, 2}, /* group 0 5.2, ch 34-43 */
769 {
770 4, 1}, /* group 1 5.2, ch 44-70 */
771 {
772 4, 1}, /* group 2 5.2, ch 71-124 */
773 {
774 4, 1}, /* group 3 5.2, ch 125-200 */
775 {
776 3, 1} /* group 4 2.4, ch all */
777};
778
779static s32
780get_min_power_idx(s32 rate_power_idx, u32 band)
781{
782 if (!band) {
783 if ((rate_power_idx & 7) <= 4)
784 return MIN_TX_GAIN_IDX_52GHZ_EXT;
785 }
786 return MIN_TX_GAIN_IDX;
787}
788
789struct gain_entry {
790 u8 dsp;
791 u8 radio;
792};
793
794static const struct gain_entry gain_table[2][108] = {
795 /* 5.2GHz power gain idx table */
796 {
797 {123, 0x3F}, /* highest txpower */
798 {117, 0x3F},
799 {110, 0x3F},
800 {104, 0x3F},
801 {98, 0x3F},
802 {110, 0x3E},
803 {104, 0x3E},
804 {98, 0x3E},
805 {110, 0x3D},
806 {104, 0x3D},
807 {98, 0x3D},
808 {110, 0x3C},
809 {104, 0x3C},
810 {98, 0x3C},
811 {110, 0x3B},
812 {104, 0x3B},
813 {98, 0x3B},
814 {110, 0x3A},
815 {104, 0x3A},
816 {98, 0x3A},
817 {110, 0x39},
818 {104, 0x39},
819 {98, 0x39},
820 {110, 0x38},
821 {104, 0x38},
822 {98, 0x38},
823 {110, 0x37},
824 {104, 0x37},
825 {98, 0x37},
826 {110, 0x36},
827 {104, 0x36},
828 {98, 0x36},
829 {110, 0x35},
830 {104, 0x35},
831 {98, 0x35},
832 {110, 0x34},
833 {104, 0x34},
834 {98, 0x34},
835 {110, 0x33},
836 {104, 0x33},
837 {98, 0x33},
838 {110, 0x32},
839 {104, 0x32},
840 {98, 0x32},
841 {110, 0x31},
842 {104, 0x31},
843 {98, 0x31},
844 {110, 0x30},
845 {104, 0x30},
846 {98, 0x30},
847 {110, 0x25},
848 {104, 0x25},
849 {98, 0x25},
850 {110, 0x24},
851 {104, 0x24},
852 {98, 0x24},
853 {110, 0x23},
854 {104, 0x23},
855 {98, 0x23},
856 {110, 0x22},
857 {104, 0x18},
858 {98, 0x18},
859 {110, 0x17},
860 {104, 0x17},
861 {98, 0x17},
862 {110, 0x16},
863 {104, 0x16},
864 {98, 0x16},
865 {110, 0x15},
866 {104, 0x15},
867 {98, 0x15},
868 {110, 0x14},
869 {104, 0x14},
870 {98, 0x14},
871 {110, 0x13},
872 {104, 0x13},
873 {98, 0x13},
874 {110, 0x12},
875 {104, 0x08},
876 {98, 0x08},
877 {110, 0x07},
878 {104, 0x07},
879 {98, 0x07},
880 {110, 0x06},
881 {104, 0x06},
882 {98, 0x06},
883 {110, 0x05},
884 {104, 0x05},
885 {98, 0x05},
886 {110, 0x04},
887 {104, 0x04},
888 {98, 0x04},
889 {110, 0x03},
890 {104, 0x03},
891 {98, 0x03},
892 {110, 0x02},
893 {104, 0x02},
894 {98, 0x02},
895 {110, 0x01},
896 {104, 0x01},
897 {98, 0x01},
898 {110, 0x00},
899 {104, 0x00},
900 {98, 0x00},
901 {93, 0x00},
902 {88, 0x00},
903 {83, 0x00},
904 {78, 0x00},
905 },
906 /* 2.4GHz power gain idx table */
907 {
908 {110, 0x3f}, /* highest txpower */
909 {104, 0x3f},
910 {98, 0x3f},
911 {110, 0x3e},
912 {104, 0x3e},
913 {98, 0x3e},
914 {110, 0x3d},
915 {104, 0x3d},
916 {98, 0x3d},
917 {110, 0x3c},
918 {104, 0x3c},
919 {98, 0x3c},
920 {110, 0x3b},
921 {104, 0x3b},
922 {98, 0x3b},
923 {110, 0x3a},
924 {104, 0x3a},
925 {98, 0x3a},
926 {110, 0x39},
927 {104, 0x39},
928 {98, 0x39},
929 {110, 0x38},
930 {104, 0x38},
931 {98, 0x38},
932 {110, 0x37},
933 {104, 0x37},
934 {98, 0x37},
935 {110, 0x36},
936 {104, 0x36},
937 {98, 0x36},
938 {110, 0x35},
939 {104, 0x35},
940 {98, 0x35},
941 {110, 0x34},
942 {104, 0x34},
943 {98, 0x34},
944 {110, 0x33},
945 {104, 0x33},
946 {98, 0x33},
947 {110, 0x32},
948 {104, 0x32},
949 {98, 0x32},
950 {110, 0x31},
951 {104, 0x31},
952 {98, 0x31},
953 {110, 0x30},
954 {104, 0x30},
955 {98, 0x30},
956 {110, 0x6},
957 {104, 0x6},
958 {98, 0x6},
959 {110, 0x5},
960 {104, 0x5},
961 {98, 0x5},
962 {110, 0x4},
963 {104, 0x4},
964 {98, 0x4},
965 {110, 0x3},
966 {104, 0x3},
967 {98, 0x3},
968 {110, 0x2},
969 {104, 0x2},
970 {98, 0x2},
971 {110, 0x1},
972 {104, 0x1},
973 {98, 0x1},
974 {110, 0x0},
975 {104, 0x0},
976 {98, 0x0},
977 {97, 0},
978 {96, 0},
979 {95, 0},
980 {94, 0},
981 {93, 0},
982 {92, 0},
983 {91, 0},
984 {90, 0},
985 {89, 0},
986 {88, 0},
987 {87, 0},
988 {86, 0},
989 {85, 0},
990 {84, 0},
991 {83, 0},
992 {82, 0},
993 {81, 0},
994 {80, 0},
995 {79, 0},
996 {78, 0},
997 {77, 0},
998 {76, 0},
999 {75, 0},
1000 {74, 0},
1001 {73, 0},
1002 {72, 0},
1003 {71, 0},
1004 {70, 0},
1005 {69, 0},
1006 {68, 0},
1007 {67, 0},
1008 {66, 0},
1009 {65, 0},
1010 {64, 0},
1011 {63, 0},
1012 {62, 0},
1013 {61, 0},
1014 {60, 0},
1015 {59, 0},
1016 }
1017};
1018
1019static int
1020il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40,
1021 u8 ctrl_chan_high,
1022 struct il4965_tx_power_db *tx_power_tbl)
1023{
1024 u8 saturation_power;
1025 s32 target_power;
1026 s32 user_target_power;
1027 s32 power_limit;
1028 s32 current_temp;
1029 s32 reg_limit;
1030 s32 current_regulatory;
1031 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1032 int i;
1033 int c;
1034 const struct il_channel_info *ch_info = NULL;
1035 struct il_eeprom_calib_ch_info ch_eeprom_info;
1036 const struct il_eeprom_calib_measure *measurement;
1037 s16 voltage;
1038 s32 init_voltage;
1039 s32 voltage_compensation;
1040 s32 degrees_per_05db_num;
1041 s32 degrees_per_05db_denom;
1042 s32 factory_temp;
1043 s32 temperature_comp[2];
1044 s32 factory_gain_idx[2];
1045 s32 factory_actual_pwr[2];
1046 s32 power_idx;
1047
1048 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1049 * are used for idxing into txpower table) */
1050 user_target_power = 2 * il->tx_power_user_lmt;
1051
1052 /* Get current (RXON) channel, band, width */
1053 D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, is_ht40);
1054
1055 ch_info = il_get_channel_info(il, il->band, channel);
1056
1057 if (!il_is_channel_valid(ch_info))
1058 return -EINVAL;
1059
1060 /* get txatten group, used to select 1) thermal txpower adjustment
1061 * and 2) mimo txpower balance between Tx chains. */
1062 txatten_grp = il4965_get_tx_atten_grp(channel);
1063 if (txatten_grp < 0) {
1064 IL_ERR("Can't find txatten group for channel %d.\n", channel);
1065 return txatten_grp;
1066 }
1067
1068 D_TXPOWER("channel %d belongs to txatten group %d\n", channel,
1069 txatten_grp);
1070
1071 if (is_ht40) {
1072 if (ctrl_chan_high)
1073 channel -= 2;
1074 else
1075 channel += 2;
1076 }
1077
1078 /* hardware txpower limits ...
1079 * saturation (clipping distortion) txpowers are in half-dBm */
1080 if (band)
1081 saturation_power = il->calib_info->saturation_power24;
1082 else
1083 saturation_power = il->calib_info->saturation_power52;
1084
1085 if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1086 saturation_power > IL_TX_POWER_SATURATION_MAX) {
1087 if (band)
1088 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1089 else
1090 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1091 }
1092
1093 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1094 * max_power_avg values are in dBm, convert * 2 */
1095 if (is_ht40)
1096 reg_limit = ch_info->ht40_max_power_avg * 2;
1097 else
1098 reg_limit = ch_info->max_power_avg * 2;
1099
1100 if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1101 (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1102 if (band)
1103 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1104 else
1105 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1106 }
1107
1108 /* Interpolate txpower calibration values for this channel,
1109 * based on factory calibration tests on spaced channels. */
1110 il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1111
1112 /* calculate tx gain adjustment based on power supply voltage */
1113 voltage = le16_to_cpu(il->calib_info->voltage);
1114 init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage);
1115 voltage_compensation =
1116 il4965_get_voltage_compensation(voltage, init_voltage);
1117
1118 D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", init_voltage,
1119 voltage, voltage_compensation);
1120
1121 /* get current temperature (Celsius) */
1122 current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1123 current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1124 current_temp = KELVIN_TO_CELSIUS(current_temp);
1125
1126 /* select thermal txpower adjustment params, based on channel group
1127 * (same frequency group used for mimo txatten adjustment) */
1128 degrees_per_05db_num =
1129 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1130 degrees_per_05db_denom =
1131 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1132
1133 /* get per-chain txpower values from factory measurements */
1134 for (c = 0; c < 2; c++) {
1135 measurement = &ch_eeprom_info.measurements[c][1];
1136
1137 /* txgain adjustment (in half-dB steps) based on difference
1138 * between factory and current temperature */
1139 factory_temp = measurement->temperature;
1140 il4965_math_div_round((current_temp -
1141 factory_temp) * degrees_per_05db_denom,
1142 degrees_per_05db_num,
1143 &temperature_comp[c]);
1144
1145 factory_gain_idx[c] = measurement->gain_idx;
1146 factory_actual_pwr[c] = measurement->actual_pow;
1147
1148 D_TXPOWER("chain = %d\n", c);
1149 D_TXPOWER("fctry tmp %d, " "curr tmp %d, comp %d steps\n",
1150 factory_temp, current_temp, temperature_comp[c]);
1151
1152 D_TXPOWER("fctry idx %d, fctry pwr %d\n", factory_gain_idx[c],
1153 factory_actual_pwr[c]);
1154 }
1155
1156 /* for each of 33 bit-rates (including 1 for CCK) */
1157 for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1158 u8 is_mimo_rate;
1159 union il4965_tx_power_dual_stream tx_power;
1160
1161 /* for mimo, reduce each chain's txpower by half
1162 * (3dB, 6 steps), so total output power is regulatory
1163 * compliant. */
1164 if (i & 0x8) {
1165 current_regulatory =
1166 reg_limit -
1167 IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1168 is_mimo_rate = 1;
1169 } else {
1170 current_regulatory = reg_limit;
1171 is_mimo_rate = 0;
1172 }
1173
1174 /* find txpower limit, either hardware or regulatory */
1175 power_limit = saturation_power - back_off_table[i];
1176 if (power_limit > current_regulatory)
1177 power_limit = current_regulatory;
1178
1179 /* reduce user's txpower request if necessary
1180 * for this rate on this channel */
1181 target_power = user_target_power;
1182 if (target_power > power_limit)
1183 target_power = power_limit;
1184
1185 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", i,
1186 saturation_power - back_off_table[i],
1187 current_regulatory, user_target_power, target_power);
1188
1189 /* for each of 2 Tx chains (radio transmitters) */
1190 for (c = 0; c < 2; c++) {
1191 s32 atten_value;
1192
1193 if (is_mimo_rate)
1194 atten_value =
1195 (s32) le32_to_cpu(il->card_alive_init.
1196 tx_atten[txatten_grp][c]);
1197 else
1198 atten_value = 0;
1199
1200 /* calculate idx; higher idx means lower txpower */
1201 power_idx =
1202 (u8) (factory_gain_idx[c] -
1203 (target_power - factory_actual_pwr[c]) -
1204 temperature_comp[c] - voltage_compensation +
1205 atten_value);
1206
1207/* D_TXPOWER("calculated txpower idx %d\n",
1208 power_idx); */
1209
1210 if (power_idx < get_min_power_idx(i, band))
1211 power_idx = get_min_power_idx(i, band);
1212
1213 /* adjust 5 GHz idx to support negative idxes */
1214 if (!band)
1215 power_idx += 9;
1216
1217 /* CCK, rate 32, reduce txpower for CCK */
1218 if (i == POWER_TBL_CCK_ENTRY)
1219 power_idx +=
1220 IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1221
1222 /* stay within the table! */
1223 if (power_idx > 107) {
1224 IL_WARN("txpower idx %d > 107\n", power_idx);
1225 power_idx = 107;
1226 }
1227 if (power_idx < 0) {
1228 IL_WARN("txpower idx %d < 0\n", power_idx);
1229 power_idx = 0;
1230 }
1231
1232 /* fill txpower command for this rate/chain */
1233 tx_power.s.radio_tx_gain[c] =
1234 gain_table[band][power_idx].radio;
1235 tx_power.s.dsp_predis_atten[c] =
1236 gain_table[band][power_idx].dsp;
1237
1238 D_TXPOWER("chain %d mimo %d idx %d "
1239 "gain 0x%02x dsp %d\n", c, atten_value,
1240 power_idx, tx_power.s.radio_tx_gain[c],
1241 tx_power.s.dsp_predis_atten[c]);
1242 } /* for each chain */
1243
1244 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1245
1246 } /* for each rate */
1247
1248 return 0;
1249}
1250
1251/**
1252 * il4965_send_tx_power - Configure the TXPOWER level user limit
1253 *
1254 * Uses the active RXON for channel, band, and characteristics (ht40, high)
1255 * The power limit is taken from il->tx_power_user_lmt.
1256 */
1257static int
1258il4965_send_tx_power(struct il_priv *il)
1259{
1260 struct il4965_txpowertable_cmd cmd = { 0 };
1261 int ret;
1262 u8 band = 0;
1263 bool is_ht40 = false;
1264 u8 ctrl_chan_high = 0;
1265
1266 if (WARN_ONCE
1267 (test_bit(S_SCAN_HW, &il->status),
1268 "TX Power requested while scanning!\n"))
1269 return -EAGAIN;
1270
1271 band = il->band == IEEE80211_BAND_2GHZ;
1272
1273 is_ht40 = iw4965_is_ht40_channel(il->active.flags);
1274
1275 if (is_ht40 && (il->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1276 ctrl_chan_high = 1;
1277
1278 cmd.band = band;
1279 cmd.channel = il->active.channel;
1280
1281 ret =
1282 il4965_fill_txpower_tbl(il, band, le16_to_cpu(il->active.channel),
1283 is_ht40, ctrl_chan_high, &cmd.tx_power);
1284 if (ret)
1285 goto out;
1286
1287 ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd);
1288
1289out:
1290 return ret;
1291}
1292
1293static int
1294il4965_send_rxon_assoc(struct il_priv *il)
1295{
1296 int ret = 0;
1297 struct il4965_rxon_assoc_cmd rxon_assoc;
1298 const struct il_rxon_cmd *rxon1 = &il->staging;
1299 const struct il_rxon_cmd *rxon2 = &il->active;
1300
1301 if (rxon1->flags == rxon2->flags &&
1302 rxon1->filter_flags == rxon2->filter_flags &&
1303 rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1304 rxon1->ofdm_ht_single_stream_basic_rates ==
1305 rxon2->ofdm_ht_single_stream_basic_rates &&
1306 rxon1->ofdm_ht_dual_stream_basic_rates ==
1307 rxon2->ofdm_ht_dual_stream_basic_rates &&
1308 rxon1->rx_chain == rxon2->rx_chain &&
1309 rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1310 D_INFO("Using current RXON_ASSOC. Not resending.\n");
1311 return 0;
1312 }
1313
1314 rxon_assoc.flags = il->staging.flags;
1315 rxon_assoc.filter_flags = il->staging.filter_flags;
1316 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates;
1317 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates;
1318 rxon_assoc.reserved = 0;
1319 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1320 il->staging.ofdm_ht_single_stream_basic_rates;
1321 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1322 il->staging.ofdm_ht_dual_stream_basic_rates;
1323 rxon_assoc.rx_chain_select_flags = il->staging.rx_chain;
1324
1325 ret =
1326 il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc),
1327 &rxon_assoc, NULL);
1328
1329 return ret;
1330}
1331
1332static int
1333il4965_commit_rxon(struct il_priv *il)
1334{
1335 /* cast away the const for active_rxon in this function */
1336 struct il_rxon_cmd *active_rxon = (void *)&il->active;
1337 int ret;
1338 bool new_assoc = !!(il->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1339
1340 if (!il_is_alive(il))
1341 return -EBUSY;
1342
1343 /* always get timestamp with Rx frame */
1344 il->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1345
1346 ret = il_check_rxon_cmd(il);
1347 if (ret) {
1348 IL_ERR("Invalid RXON configuration. Not committing.\n");
1349 return -EINVAL;
1350 }
1351
1352 /*
1353 * receive commit_rxon request
1354 * abort any previous channel switch if still in process
1355 */
1356 if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1357 il->switch_channel != il->staging.channel) {
1358 D_11H("abort channel switch on %d\n",
1359 le16_to_cpu(il->switch_channel));
1360 il_chswitch_done(il, false);
1361 }
1362
1363 /* If we don't need to send a full RXON, we can use
1364 * il_rxon_assoc_cmd which is used to reconfigure filter
1365 * and other flags for the current radio configuration. */
1366 if (!il_full_rxon_required(il)) {
1367 ret = il_send_rxon_assoc(il);
1368 if (ret) {
1369 IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1370 return ret;
1371 }
1372
1373 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1374 il_print_rx_config_cmd(il);
1375 /*
1376 * We do not commit tx power settings while channel changing,
1377 * do it now if tx power changed.
1378 */
1379 il_set_tx_power(il, il->tx_power_next, false);
1380 return 0;
1381 }
1382
1383 /* If we are currently associated and the new config requires
1384 * an RXON_ASSOC and the new config wants the associated mask enabled,
1385 * we must clear the associated from the active configuration
1386 * before we apply the new config */
1387 if (il_is_associated(il) && new_assoc) {
1388 D_INFO("Toggling associated bit on current RXON\n");
1389 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1390
1391 ret =
1392 il_send_cmd_pdu(il, C_RXON,
1393 sizeof(struct il_rxon_cmd), active_rxon);
1394
1395 /* If the mask clearing failed then we set
1396 * active_rxon back to what it was previously */
1397 if (ret) {
1398 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1399 IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1400 return ret;
1401 }
1402 il_clear_ucode_stations(il);
1403 il_restore_stations(il);
1404 ret = il4965_restore_default_wep_keys(il);
1405 if (ret) {
1406 IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1407 return ret;
1408 }
1409 }
1410
1411 D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n"
1412 "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"),
1413 le16_to_cpu(il->staging.channel), il->staging.bssid_addr);
1414
1415 il_set_rxon_hwcrypto(il, !il->cfg->mod_params->sw_crypto);
1416
1417 /* Apply the new configuration
1418 * RXON unassoc clears the station table in uCode so restoration of
1419 * stations is needed after it (the RXON command) completes
1420 */
1421 if (!new_assoc) {
1422 ret =
1423 il_send_cmd_pdu(il, C_RXON,
1424 sizeof(struct il_rxon_cmd), &il->staging);
1425 if (ret) {
1426 IL_ERR("Error setting new RXON (%d)\n", ret);
1427 return ret;
1428 }
1429 D_INFO("Return from !new_assoc RXON.\n");
1430 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1431 il_clear_ucode_stations(il);
1432 il_restore_stations(il);
1433 ret = il4965_restore_default_wep_keys(il);
1434 if (ret) {
1435 IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1436 return ret;
1437 }
1438 }
1439 if (new_assoc) {
1440 il->start_calib = 0;
1441 /* Apply the new configuration
1442 * RXON assoc doesn't clear the station table in uCode,
1443 */
1444 ret =
1445 il_send_cmd_pdu(il, C_RXON,
1446 sizeof(struct il_rxon_cmd), &il->staging);
1447 if (ret) {
1448 IL_ERR("Error setting new RXON (%d)\n", ret);
1449 return ret;
1450 }
1451 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1452 }
1453 il_print_rx_config_cmd(il);
1454
1455 il4965_init_sensitivity(il);
1456
1457 /* If we issue a new RXON command which required a tune then we must
1458 * send a new TXPOWER command or we won't be able to Tx any frames */
1459 ret = il_set_tx_power(il, il->tx_power_next, true);
1460 if (ret) {
1461 IL_ERR("Error sending TX power (%d)\n", ret);
1462 return ret;
1463 }
1464
1465 return 0;
1466}
1467
1468static int
1469il4965_hw_channel_switch(struct il_priv *il,
1470 struct ieee80211_channel_switch *ch_switch)
1471{
1472 int rc;
1473 u8 band = 0;
1474 bool is_ht40 = false;
1475 u8 ctrl_chan_high = 0;
1476 struct il4965_channel_switch_cmd cmd;
1477 const struct il_channel_info *ch_info;
1478 u32 switch_time_in_usec, ucode_switch_time;
1479 u16 ch;
1480 u32 tsf_low;
1481 u8 switch_count;
1482 u16 beacon_interval = le16_to_cpu(il->timing.beacon_interval);
1483 struct ieee80211_vif *vif = il->vif;
1484 band = (il->band == IEEE80211_BAND_2GHZ);
1485
1486 if (WARN_ON_ONCE(vif == NULL))
1487 return -EIO;
1488
1489 is_ht40 = iw4965_is_ht40_channel(il->staging.flags);
1490
1491 if (is_ht40 && (il->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1492 ctrl_chan_high = 1;
1493
1494 cmd.band = band;
1495 cmd.expect_beacon = 0;
1496 ch = ch_switch->channel->hw_value;
1497 cmd.channel = cpu_to_le16(ch);
1498 cmd.rxon_flags = il->staging.flags;
1499 cmd.rxon_filter_flags = il->staging.filter_flags;
1500 switch_count = ch_switch->count;
1501 tsf_low = ch_switch->timestamp & 0x0ffffffff;
1502 /*
1503 * calculate the ucode channel switch time
1504 * adding TSF as one of the factor for when to switch
1505 */
1506 if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1507 if (switch_count >
1508 ((il->ucode_beacon_time - tsf_low) / beacon_interval)) {
1509 switch_count -=
1510 (il->ucode_beacon_time - tsf_low) / beacon_interval;
1511 } else
1512 switch_count = 0;
1513 }
1514 if (switch_count <= 1)
1515 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1516 else {
1517 switch_time_in_usec =
1518 vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1519 ucode_switch_time =
1520 il_usecs_to_beacons(il, switch_time_in_usec,
1521 beacon_interval);
1522 cmd.switch_time =
1523 il_add_beacon_time(il, il->ucode_beacon_time,
1524 ucode_switch_time, beacon_interval);
1525 }
1526 D_11H("uCode time for the switch is 0x%x\n", cmd.switch_time);
1527 ch_info = il_get_channel_info(il, il->band, ch);
1528 if (ch_info)
1529 cmd.expect_beacon = il_is_channel_radar(ch_info);
1530 else {
1531 IL_ERR("invalid channel switch from %u to %u\n",
1532 il->active.channel, ch);
1533 return -EFAULT;
1534 }
1535
1536 rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high,
1537 &cmd.tx_power);
1538 if (rc) {
1539 D_11H("error:%d fill txpower_tbl\n", rc);
1540 return rc;
1541 }
1542
1543 return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1544}
1545
1546/**
1547 * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1548 */
1549static void
1550il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq,
1551 u16 byte_cnt)
1552{
1553 struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1554 int txq_id = txq->q.id;
1555 int write_ptr = txq->q.write_ptr;
1556 int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1557 __le16 bc_ent;
1558
1559 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1560
1561 bc_ent = cpu_to_le16(len & 0xFFF);
1562 /* Set up byte count within first 256 entries */
1563 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1564
1565 /* If within first 64 entries, duplicate at end */
1566 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1567 scd_bc_tbl[txq_id].tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] =
1568 bc_ent;
1569}
1570
1571/**
1572 * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1573 * @stats: Provides the temperature reading from the uCode
1574 *
1575 * A return of <0 indicates bogus data in the stats
1576 */
1577static int
1578il4965_hw_get_temperature(struct il_priv *il)
1579{
1580 s32 temperature;
1581 s32 vt;
1582 s32 R1, R2, R3;
1583 u32 R4;
1584
1585 if (test_bit(S_TEMPERATURE, &il->status) &&
1586 (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) {
1587 D_TEMP("Running HT40 temperature calibration\n");
1588 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]);
1589 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]);
1590 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]);
1591 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1592 } else {
1593 D_TEMP("Running temperature calibration\n");
1594 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]);
1595 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]);
1596 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]);
1597 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1598 }
1599
1600 /*
1601 * Temperature is only 23 bits, so sign extend out to 32.
1602 *
1603 * NOTE If we haven't received a stats notification yet
1604 * with an updated temperature, use R4 provided to us in the
1605 * "initialize" ALIVE response.
1606 */
1607 if (!test_bit(S_TEMPERATURE, &il->status))
1608 vt = sign_extend32(R4, 23);
1609 else
1610 vt = sign_extend32(le32_to_cpu
1611 (il->_4965.stats.general.common.temperature),
1612 23);
1613
1614 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1615
1616 if (R3 == R1) {
1617 IL_ERR("Calibration conflict R1 == R3\n");
1618 return -1;
1619 }
1620
1621 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1622 * Add offset to center the adjustment around 0 degrees Centigrade. */
1623 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1624 temperature /= (R3 - R1);
1625 temperature =
1626 (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1627
1628 D_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
1629 KELVIN_TO_CELSIUS(temperature));
1630
1631 return temperature;
1632}
1633
1634/* Adjust Txpower only if temperature variance is greater than threshold. */
1635#define IL_TEMPERATURE_THRESHOLD 3
1636
1637/**
1638 * il4965_is_temp_calib_needed - determines if new calibration is needed
1639 *
1640 * If the temperature changed has changed sufficiently, then a recalibration
1641 * is needed.
1642 *
1643 * Assumes caller will replace il->last_temperature once calibration
1644 * executed.
1645 */
1646static int
1647il4965_is_temp_calib_needed(struct il_priv *il)
1648{
1649 int temp_diff;
1650
1651 if (!test_bit(S_STATS, &il->status)) {
1652 D_TEMP("Temperature not updated -- no stats.\n");
1653 return 0;
1654 }
1655
1656 temp_diff = il->temperature - il->last_temperature;
1657
1658 /* get absolute value */
1659 if (temp_diff < 0) {
1660 D_POWER("Getting cooler, delta %d\n", temp_diff);
1661 temp_diff = -temp_diff;
1662 } else if (temp_diff == 0)
1663 D_POWER("Temperature unchanged\n");
1664 else
1665 D_POWER("Getting warmer, delta %d\n", temp_diff);
1666
1667 if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1668 D_POWER(" => thermal txpower calib not needed\n");
1669 return 0;
1670 }
1671
1672 D_POWER(" => thermal txpower calib needed\n");
1673
1674 return 1;
1675}
1676
1677void
1678il4965_temperature_calib(struct il_priv *il)
1679{
1680 s32 temp;
1681
1682 temp = il4965_hw_get_temperature(il);
1683 if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1684 return;
1685
1686 if (il->temperature != temp) {
1687 if (il->temperature)
1688 D_TEMP("Temperature changed " "from %dC to %dC\n",
1689 KELVIN_TO_CELSIUS(il->temperature),
1690 KELVIN_TO_CELSIUS(temp));
1691 else
1692 D_TEMP("Temperature " "initialized to %dC\n",
1693 KELVIN_TO_CELSIUS(temp));
1694 }
1695
1696 il->temperature = temp;
1697 set_bit(S_TEMPERATURE, &il->status);
1698
1699 if (!il->disable_tx_power_cal &&
1700 unlikely(!test_bit(S_SCANNING, &il->status)) &&
1701 il4965_is_temp_calib_needed(il))
1702 queue_work(il->workqueue, &il->txpower_work);
1703}
1704
1705static u16
1706il4965_get_hcmd_size(u8 cmd_id, u16 len)
1707{
1708 switch (cmd_id) {
1709 case C_RXON:
1710 return (u16) sizeof(struct il4965_rxon_cmd);
1711 default:
1712 return len;
1713 }
1714}
1715
1716static u16
1717il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data)
1718{
1719 struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1720 addsta->mode = cmd->mode;
1721 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1722 memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1723 addsta->station_flags = cmd->station_flags;
1724 addsta->station_flags_msk = cmd->station_flags_msk;
1725 addsta->tid_disable_tx = cmd->tid_disable_tx;
1726 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1727 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1728 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1729 addsta->sleep_tx_count = cmd->sleep_tx_count;
1730 addsta->reserved1 = cpu_to_le16(0);
1731 addsta->reserved2 = cpu_to_le16(0);
1732
1733 return (u16) sizeof(struct il4965_addsta_cmd);
1734}
1735
1736static void
1737il4965_post_scan(struct il_priv *il)
1738{
1739 /*
1740 * Since setting the RXON may have been deferred while
1741 * performing the scan, fire one off if needed
1742 */
1743 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
1744 il_commit_rxon(il);
1745}
1746
1747static void
1748il4965_post_associate(struct il_priv *il)
1749{
1750 struct ieee80211_vif *vif = il->vif;
1751 struct ieee80211_conf *conf = NULL;
1752 int ret = 0;
1753
1754 if (!vif || !il->is_open)
1755 return;
1756
1757 if (test_bit(S_EXIT_PENDING, &il->status))
1758 return;
1759
1760 il_scan_cancel_timeout(il, 200);
1761
1762 conf = &il->hw->conf;
1763
1764 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1765 il_commit_rxon(il);
1766
1767 ret = il_send_rxon_timing(il);
1768 if (ret)
1769 IL_WARN("RXON timing - " "Attempting to continue.\n");
1770
1771 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1772
1773 il_set_rxon_ht(il, &il->current_ht_config);
1774
1775 if (il->ops->set_rxon_chain)
1776 il->ops->set_rxon_chain(il);
1777
1778 il->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
1779
1780 D_ASSOC("assoc id %d beacon interval %d\n", vif->bss_conf.aid,
1781 vif->bss_conf.beacon_int);
1782
1783 if (vif->bss_conf.use_short_preamble)
1784 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1785 else
1786 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1787
1788 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
1789 if (vif->bss_conf.use_short_slot)
1790 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1791 else
1792 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1793 }
1794
1795 il_commit_rxon(il);
1796
1797 D_ASSOC("Associated as %d to: %pM\n", vif->bss_conf.aid,
1798 il->active.bssid_addr);
1799
1800 switch (vif->type) {
1801 case NL80211_IFTYPE_STATION:
1802 break;
1803 case NL80211_IFTYPE_ADHOC:
1804 il4965_send_beacon_cmd(il);
1805 break;
1806 default:
1807 IL_ERR("%s Should not be called in %d mode\n", __func__,
1808 vif->type);
1809 break;
1810 }
1811
1812 /* the chain noise calibration will enabled PM upon completion
1813 * If chain noise has already been run, then we need to enable
1814 * power management here */
1815 if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
1816 il_power_update_mode(il, false);
1817
1818 /* Enable Rx differential gain and sensitivity calibrations */
1819 il4965_chain_noise_reset(il);
1820 il->start_calib = 1;
1821}
1822
1823static void
1824il4965_config_ap(struct il_priv *il)
1825{
1826 struct ieee80211_vif *vif = il->vif;
1827 int ret = 0;
1828
1829 lockdep_assert_held(&il->mutex);
1830
1831 if (test_bit(S_EXIT_PENDING, &il->status))
1832 return;
1833
1834 /* The following should be done only at AP bring up */
1835 if (!il_is_associated(il)) {
1836
1837 /* RXON - unassoc (to set timing command) */
1838 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1839 il_commit_rxon(il);
1840
1841 /* RXON Timing */
1842 ret = il_send_rxon_timing(il);
1843 if (ret)
1844 IL_WARN("RXON timing failed - "
1845 "Attempting to continue.\n");
1846
1847 /* AP has all antennas */
1848 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant;
1849 il_set_rxon_ht(il, &il->current_ht_config);
1850 if (il->ops->set_rxon_chain)
1851 il->ops->set_rxon_chain(il);
1852
1853 il->staging.assoc_id = 0;
1854
1855 if (vif->bss_conf.use_short_preamble)
1856 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1857 else
1858 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1859
1860 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
1861 if (vif->bss_conf.use_short_slot)
1862 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1863 else
1864 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1865 }
1866 /* need to send beacon cmd before committing assoc RXON! */
1867 il4965_send_beacon_cmd(il);
1868 /* restore RXON assoc */
1869 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1870 il_commit_rxon(il);
1871 }
1872 il4965_send_beacon_cmd(il);
1873}
1874
1875const struct il_ops il4965_ops = {
1876 .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
1877 .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
1878 .txq_free_tfd = il4965_hw_txq_free_tfd,
1879 .txq_init = il4965_hw_tx_queue_init,
1880 .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
1881 .init_alive_start = il4965_init_alive_start,
1882 .load_ucode = il4965_load_bsm,
1883 .dump_nic_error_log = il4965_dump_nic_error_log,
1884 .dump_fh = il4965_dump_fh,
1885 .set_channel_switch = il4965_hw_channel_switch,
1886 .apm_init = il_apm_init,
1887 .send_tx_power = il4965_send_tx_power,
1888 .update_chain_flags = il4965_update_chain_flags,
1889 .eeprom_acquire_semaphore = il4965_eeprom_acquire_semaphore,
1890 .eeprom_release_semaphore = il4965_eeprom_release_semaphore,
1891
1892 .rxon_assoc = il4965_send_rxon_assoc,
1893 .commit_rxon = il4965_commit_rxon,
1894 .set_rxon_chain = il4965_set_rxon_chain,
1895
1896 .get_hcmd_size = il4965_get_hcmd_size,
1897 .build_addsta_hcmd = il4965_build_addsta_hcmd,
1898 .request_scan = il4965_request_scan,
1899 .post_scan = il4965_post_scan,
1900
1901 .post_associate = il4965_post_associate,
1902 .config_ap = il4965_config_ap,
1903 .manage_ibss_station = il4965_manage_ibss_station,
1904 .update_bcast_stations = il4965_update_bcast_stations,
1905
1906 .send_led_cmd = il4965_send_led_cmd,
1907};
1908
1909struct il_cfg il4965_cfg = {
1910 .name = "Intel(R) Wireless WiFi Link 4965AGN",
1911 .fw_name_pre = IL4965_FW_PRE,
1912 .ucode_api_max = IL4965_UCODE_API_MAX,
1913 .ucode_api_min = IL4965_UCODE_API_MIN,
1914 .sku = IL_SKU_A | IL_SKU_G | IL_SKU_N,
1915 .valid_tx_ant = ANT_AB,
1916 .valid_rx_ant = ANT_ABC,
1917 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
1918 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
1919 .mod_params = &il4965_mod_params,
1920 .led_mode = IL_LED_BLINK,
1921 /*
1922 * Force use of chains B and C for scan RX on 5 GHz band
1923 * because the device has off-channel reception on chain A.
1924 */
1925 .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
1926
1927 .eeprom_size = IL4965_EEPROM_IMG_SIZE,
1928 .num_of_queues = IL49_NUM_QUEUES,
1929 .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
1930 .pll_cfg_val = 0,
1931 .set_l0s = true,
1932 .use_bsm = true,
1933 .led_compensation = 61,
1934 .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
1935 .wd_timeout = IL_DEF_WD_TIMEOUT,
1936 .temperature_kelvin = true,
1937 .ucode_tracing = true,
1938 .sensitivity_calib_by_driver = true,
1939 .chain_noise_calib_by_driver = true,
1940
1941 .regulatory_bands = {
1942 EEPROM_REGULATORY_BAND_1_CHANNELS,
1943 EEPROM_REGULATORY_BAND_2_CHANNELS,
1944 EEPROM_REGULATORY_BAND_3_CHANNELS,
1945 EEPROM_REGULATORY_BAND_4_CHANNELS,
1946 EEPROM_REGULATORY_BAND_5_CHANNELS,
1947 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
1948 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
1949 },
1950
1951};
1952
1953/* Module firmware */
1954MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));