1// SPDX-License-Identifier: BSD-3-Clause-Clear
   2/*
   3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
   4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
   5 */
   6#include <linux/skbuff.h>
   7#include <linux/ctype.h>
   8#include <net/mac80211.h>
   9#include <net/cfg80211.h>
  10#include <linux/completion.h>
  11#include <linux/if_ether.h>
  12#include <linux/types.h>
  13#include <linux/pci.h>
  14#include <linux/uuid.h>
  15#include <linux/time.h>
  16#include <linux/of.h>
  17#include "core.h"
  18#include "debug.h"
  19#include "mac.h"
  20#include "hw.h"
  21#include "peer.h"
  22#include "p2p.h"
  23
  24struct ath12k_wmi_svc_ready_parse {
  25	bool wmi_svc_bitmap_done;
  26};
  27
  28struct ath12k_wmi_dma_ring_caps_parse {
  29	struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
  30	u32 n_dma_ring_caps;
  31};
  32
  33struct ath12k_wmi_service_ext_arg {
  34	u32 default_conc_scan_config_bits;
  35	u32 default_fw_config_bits;
  36	struct ath12k_wmi_ppe_threshold_arg ppet;
  37	u32 he_cap_info;
  38	u32 mpdu_density;
  39	u32 max_bssid_rx_filters;
  40	u32 num_hw_modes;
  41	u32 num_phy;
  42};
  43
  44struct ath12k_wmi_svc_rdy_ext_parse {
  45	struct ath12k_wmi_service_ext_arg arg;
  46	const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
  47	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
  48	u32 n_hw_mode_caps;
  49	u32 tot_phy_id;
  50	struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
  51	struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
  52	u32 n_mac_phy_caps;
  53	const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
  54	const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
  55	u32 n_ext_hal_reg_caps;
  56	struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
  57	bool hw_mode_done;
  58	bool mac_phy_done;
  59	bool ext_hal_reg_done;
  60	bool mac_phy_chainmask_combo_done;
  61	bool mac_phy_chainmask_cap_done;
  62	bool oem_dma_ring_cap_done;
  63	bool dma_ring_cap_done;
  64};
  65
  66struct ath12k_wmi_svc_rdy_ext2_arg {
  67	u32 reg_db_version;
  68	u32 hw_min_max_tx_power_2ghz;
  69	u32 hw_min_max_tx_power_5ghz;
  70	u32 chwidth_num_peer_caps;
  71	u32 preamble_puncture_bw;
  72	u32 max_user_per_ppdu_ofdma;
  73	u32 max_user_per_ppdu_mumimo;
  74	u32 target_cap_flags;
  75	u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
  76	u32 max_num_linkview_peers;
  77	u32 max_num_msduq_supported_per_tid;
  78	u32 default_num_msduq_supported_per_tid;
  79};
  80
  81struct ath12k_wmi_svc_rdy_ext2_parse {
  82	struct ath12k_wmi_svc_rdy_ext2_arg arg;
  83	struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
  84	bool dma_ring_cap_done;
  85	bool spectral_bin_scaling_done;
  86	bool mac_phy_caps_ext_done;
  87};
  88
  89struct ath12k_wmi_rdy_parse {
  90	u32 num_extra_mac_addr;
  91};
  92
  93struct ath12k_wmi_dma_buf_release_arg {
  94	struct ath12k_wmi_dma_buf_release_fixed_params fixed;
  95	const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
  96	const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
  97	u32 num_buf_entry;
  98	u32 num_meta;
  99	bool buf_entry_done;
 100	bool meta_data_done;
 101};
 102
 103struct ath12k_wmi_tlv_policy {
 104	size_t min_len;
 105};
 106
 107struct wmi_tlv_mgmt_rx_parse {
 108	const struct ath12k_wmi_mgmt_rx_params *fixed;
 109	const u8 *frame_buf;
 110	bool frame_buf_done;
 111};
 112
 113static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
 114	[WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
 115	[WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
 116	[WMI_TAG_SERVICE_READY_EVENT] = {
 117		.min_len = sizeof(struct wmi_service_ready_event) },
 118	[WMI_TAG_SERVICE_READY_EXT_EVENT] = {
 119		.min_len = sizeof(struct wmi_service_ready_ext_event) },
 120	[WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
 121		.min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
 122	[WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
 123		.min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
 124	[WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
 125		.min_len = sizeof(struct wmi_vdev_start_resp_event) },
 126	[WMI_TAG_PEER_DELETE_RESP_EVENT] = {
 127		.min_len = sizeof(struct wmi_peer_delete_resp_event) },
 128	[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
 129		.min_len = sizeof(struct wmi_bcn_tx_status_event) },
 130	[WMI_TAG_VDEV_STOPPED_EVENT] = {
 131		.min_len = sizeof(struct wmi_vdev_stopped_event) },
 132	[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
 133		.min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
 134	[WMI_TAG_MGMT_RX_HDR] = {
 135		.min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
 136	[WMI_TAG_MGMT_TX_COMPL_EVENT] = {
 137		.min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
 138	[WMI_TAG_SCAN_EVENT] = {
 139		.min_len = sizeof(struct wmi_scan_event) },
 140	[WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
 141		.min_len = sizeof(struct wmi_peer_sta_kickout_event) },
 142	[WMI_TAG_ROAM_EVENT] = {
 143		.min_len = sizeof(struct wmi_roam_event) },
 144	[WMI_TAG_CHAN_INFO_EVENT] = {
 145		.min_len = sizeof(struct wmi_chan_info_event) },
 146	[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
 147		.min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
 148	[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
 149		.min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
 150	[WMI_TAG_READY_EVENT] = {
 151		.min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
 152	[WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
 153		.min_len = sizeof(struct wmi_service_available_event) },
 154	[WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
 155		.min_len = sizeof(struct wmi_peer_assoc_conf_event) },
 156	[WMI_TAG_RFKILL_EVENT] = {
 157		.min_len = sizeof(struct wmi_rfkill_state_change_event) },
 158	[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
 159		.min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
 160	[WMI_TAG_HOST_SWFDA_EVENT] = {
 161		.min_len = sizeof(struct wmi_fils_discovery_event) },
 162	[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
 163		.min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
 164	[WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
 165		.min_len = sizeof(struct wmi_vdev_delete_resp_event) },
 166	[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
 167		.min_len = sizeof(struct wmi_twt_enable_event) },
 168	[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
 169		.min_len = sizeof(struct wmi_twt_disable_event) },
 170	[WMI_TAG_P2P_NOA_INFO] = {
 171		.min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
 172	[WMI_TAG_P2P_NOA_EVENT] = {
 173		.min_len = sizeof(struct wmi_p2p_noa_event) },
 174};
 175
 176static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
 177{
 178	return le32_encode_bits(cmd, WMI_TLV_TAG) |
 179		le32_encode_bits(len, WMI_TLV_LEN);
 180}
 181
 182static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
 183{
 184	return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
 185}
 186
 187void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
 188			     struct ath12k_wmi_resource_config_arg *config)
 189{
 190	config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS;
 191	config->num_peers = ab->num_radios *
 192		ath12k_core_get_max_peers_per_radio(ab);
 193	config->num_tids = ath12k_core_get_max_num_tids(ab);
 194	config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
 195	config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
 196	config->num_peer_keys = TARGET_NUM_PEER_KEYS;
 197	config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
 198	config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
 199	config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
 200	config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
 201	config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
 202	config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
 203	config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
 204
 205	if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
 206		config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
 207	else
 208		config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
 209
 210	config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
 211	config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
 212	config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
 213	config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
 214	config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
 215	config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
 216	config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
 217	config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
 218	config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
 219	config->dma_burst_size = TARGET_DMA_BURST_SIZE;
 220	config->rx_skip_defrag_timeout_dup_detection_check =
 221		TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
 222	config->vow_config = TARGET_VOW_CONFIG;
 223	config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
 224	config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
 225	config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
 226	config->rx_batchmode = TARGET_RX_BATCHMODE;
 227	/* Indicates host supports peer map v3 and unmap v2 support */
 228	config->peer_map_unmap_version = 0x32;
 229	config->twt_ap_pdev_count = ab->num_radios;
 230	config->twt_ap_sta_count = 1000;
 231	config->ema_max_vap_cnt = ab->num_radios;
 232	config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
 233	config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
 234
 235	if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map))
 236		config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B;
 237}
 238
 239void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
 240			     struct ath12k_wmi_resource_config_arg *config)
 241{
 242	config->num_vdevs = 4;
 243	config->num_peers = 16;
 244	config->num_tids = 32;
 245
 246	config->num_offload_peers = 3;
 247	config->num_offload_reorder_buffs = 3;
 248	config->num_peer_keys = TARGET_NUM_PEER_KEYS;
 249	config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
 250	config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
 251	config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
 252	config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
 253	config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
 254	config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
 255	config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
 256	config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
 257	config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
 258	config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
 259	config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
 260	config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
 261	config->num_mcast_groups = 0;
 262	config->num_mcast_table_elems = 0;
 263	config->mcast2ucast_mode = 0;
 264	config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
 265	config->num_wds_entries = 0;
 266	config->dma_burst_size = 0;
 267	config->rx_skip_defrag_timeout_dup_detection_check = 0;
 268	config->vow_config = TARGET_VOW_CONFIG;
 269	config->gtk_offload_max_vdev = 2;
 270	config->num_msdu_desc = 0x400;
 271	config->beacon_tx_offload_max_vdev = 2;
 272	config->rx_batchmode = TARGET_RX_BATCHMODE;
 273
 274	config->peer_map_unmap_version = 0x1;
 275	config->use_pdev_id = 1;
 276	config->max_frag_entries = 0xa;
 277	config->num_tdls_vdevs = 0x1;
 278	config->num_tdls_conn_table_entries = 8;
 279	config->beacon_tx_offload_max_vdev = 0x2;
 280	config->num_multicast_filter_entries = 0x20;
 281	config->num_wow_filters = 0x16;
 282	config->num_keep_alive_pattern = 0;
 283}
 284
 285#define PRIMAP(_hw_mode_) \
 286	[_hw_mode_] = _hw_mode_##_PRI
 287
 288static const int ath12k_hw_mode_pri_map[] = {
 289	PRIMAP(WMI_HOST_HW_MODE_SINGLE),
 290	PRIMAP(WMI_HOST_HW_MODE_DBS),
 291	PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
 292	PRIMAP(WMI_HOST_HW_MODE_SBS),
 293	PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
 294	PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
 295	/* keep last */
 296	PRIMAP(WMI_HOST_HW_MODE_MAX),
 297};
 298
 299static int
 300ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
 301		    int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
 302				const void *ptr, void *data),
 303		    void *data)
 304{
 305	const void *begin = ptr;
 306	const struct wmi_tlv *tlv;
 307	u16 tlv_tag, tlv_len;
 308	int ret;
 309
 310	while (len > 0) {
 311		if (len < sizeof(*tlv)) {
 312			ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
 313				   ptr - begin, len, sizeof(*tlv));
 314			return -EINVAL;
 315		}
 316
 317		tlv = ptr;
 318		tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
 319		tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
 320		ptr += sizeof(*tlv);
 321		len -= sizeof(*tlv);
 322
 323		if (tlv_len > len) {
 324			ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
 325				   tlv_tag, ptr - begin, len, tlv_len);
 326			return -EINVAL;
 327		}
 328
 329		if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
 330		    ath12k_wmi_tlv_policies[tlv_tag].min_len &&
 331		    ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
 332			ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
 333				   tlv_tag, ptr - begin, tlv_len,
 334				   ath12k_wmi_tlv_policies[tlv_tag].min_len);
 335			return -EINVAL;
 336		}
 337
 338		ret = iter(ab, tlv_tag, tlv_len, ptr, data);
 339		if (ret)
 340			return ret;
 341
 342		ptr += tlv_len;
 343		len -= tlv_len;
 344	}
 345
 346	return 0;
 347}
 348
 349static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
 350				     const void *ptr, void *data)
 351{
 352	const void **tb = data;
 353
 354	if (tag < WMI_TAG_MAX)
 355		tb[tag] = ptr;
 356
 357	return 0;
 358}
 359
 360static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
 361				const void *ptr, size_t len)
 362{
 363	return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
 364				   (void *)tb);
 365}
 366
 367static const void **
 368ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab,
 369			   struct sk_buff *skb, gfp_t gfp)
 370{
 371	const void **tb;
 372	int ret;
 373
 374	tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
 375	if (!tb)
 376		return ERR_PTR(-ENOMEM);
 377
 378	ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len);
 379	if (ret) {
 380		kfree(tb);
 381		return ERR_PTR(ret);
 382	}
 383
 384	return tb;
 385}
 386
 387static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
 388				      u32 cmd_id)
 389{
 390	struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
 391	struct ath12k_base *ab = wmi->wmi_ab->ab;
 392	struct wmi_cmd_hdr *cmd_hdr;
 393	int ret;
 394
 395	if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
 396		return -ENOMEM;
 397
 398	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
 399	cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
 400
 401	memset(skb_cb, 0, sizeof(*skb_cb));
 402	ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
 403
 404	if (ret)
 405		goto err_pull;
 406
 407	return 0;
 408
 409err_pull:
 410	skb_pull(skb, sizeof(struct wmi_cmd_hdr));
 411	return ret;
 412}
 413
 414int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
 415			u32 cmd_id)
 416{
 417	struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
 418	int ret = -EOPNOTSUPP;
 419
 420	might_sleep();
 421
 422	wait_event_timeout(wmi_ab->tx_credits_wq, ({
 423		ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
 424
 425		if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
 426			ret = -ESHUTDOWN;
 427
 428		(ret != -EAGAIN);
 429	}), WMI_SEND_TIMEOUT_HZ);
 430
 431	if (ret == -EAGAIN)
 432		ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
 433
 434	return ret;
 435}
 436
 437static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
 438				     const void *ptr,
 439				     struct ath12k_wmi_service_ext_arg *arg)
 440{
 441	const struct wmi_service_ready_ext_event *ev = ptr;
 442	int i;
 443
 444	if (!ev)
 445		return -EINVAL;
 446
 447	/* Move this to host based bitmap */
 448	arg->default_conc_scan_config_bits =
 449		le32_to_cpu(ev->default_conc_scan_config_bits);
 450	arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
 451	arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
 452	arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
 453	arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
 454	arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
 455	arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
 456
 457	for (i = 0; i < WMI_MAX_NUM_SS; i++)
 458		arg->ppet.ppet16_ppet8_ru3_ru0[i] =
 459			le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
 460
 461	return 0;
 462}
 463
 464static int
 465ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
 466				      struct ath12k_wmi_svc_rdy_ext_parse *svc,
 467				      u8 hw_mode_id, u8 phy_id,
 468				      struct ath12k_pdev *pdev)
 469{
 470	const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
 471	const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
 472	const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
 473	const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
 474	struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
 475	struct ath12k_band_cap *cap_band;
 476	struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
 477	struct ath12k_fw_pdev *fw_pdev;
 478	u32 phy_map;
 479	u32 hw_idx, phy_idx = 0;
 480	int i;
 481
 482	if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
 483		return -EINVAL;
 484
 485	for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
 486		if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
 487			break;
 488
 489		phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
 490		phy_idx = fls(phy_map);
 491	}
 492
 493	if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
 494		return -EINVAL;
 495
 496	phy_idx += phy_id;
 497	if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
 498		return -EINVAL;
 499
 500	mac_caps = wmi_mac_phy_caps + phy_idx;
 501
 502	pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
 503	pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
 504	pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
 505	pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
 506
 507	fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
 508	fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
 509	fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
 510	fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
 511	ab->fw_pdev_count++;
 512
 513	/* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
 514	 * band to band for a single radio, need to see how this should be
 515	 * handled.
 516	 */
 517	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
 518		pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
 519		pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
 520	} else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
 521		pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
 522		pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
 523		pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
 524		pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
 525		pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
 526	} else {
 527		return -EINVAL;
 528	}
 529
 530	/* tx/rx chainmask reported from fw depends on the actual hw chains used,
 531	 * For example, for 4x4 capable macphys, first 4 chains can be used for first
 532	 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
 533	 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
 534	 * will be advertised for second mac or vice-versa. Compute the shift value
 535	 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
 536	 * mac80211.
 537	 */
 538	pdev_cap->tx_chain_mask_shift =
 539			find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
 540	pdev_cap->rx_chain_mask_shift =
 541			find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
 542
 543	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
 544		cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
 545		cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
 546		cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
 547		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
 548		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
 549		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
 550		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
 551		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
 552			cap_band->he_cap_phy_info[i] =
 553				le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
 554
 555		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
 556		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
 557
 558		for (i = 0; i < WMI_MAX_NUM_SS; i++)
 559			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
 560				le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
 561	}
 562
 563	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
 564		cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
 565		cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
 566		cap_band->max_bw_supported =
 567			le32_to_cpu(mac_caps->max_bw_supported_5g);
 568		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
 569		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
 570		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
 571		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
 572		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
 573			cap_band->he_cap_phy_info[i] =
 574				le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
 575
 576		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
 577		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
 578
 579		for (i = 0; i < WMI_MAX_NUM_SS; i++)
 580			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
 581				le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
 582
 583		cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
 584		cap_band->max_bw_supported =
 585			le32_to_cpu(mac_caps->max_bw_supported_5g);
 586		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
 587		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
 588		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
 589		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
 590		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
 591			cap_band->he_cap_phy_info[i] =
 592				le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
 593
 594		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
 595		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
 596
 597		for (i = 0; i < WMI_MAX_NUM_SS; i++)
 598			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
 599				le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
 600	}
 601
 602	return 0;
 603}
 604
 605static int
 606ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
 607				const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
 608				const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
 609				u8 phy_idx,
 610				struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
 611{
 612	const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
 613
 614	if (!reg_caps || !ext_caps)
 615		return -EINVAL;
 616
 617	if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
 618		return -EINVAL;
 619
 620	ext_reg_cap = &ext_caps[phy_idx];
 621
 622	param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
 623	param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
 624	param->eeprom_reg_domain_ext =
 625		le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
 626	param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
 627	param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
 628	/* check if param->wireless_mode is needed */
 629	param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
 630	param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
 631	param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
 632	param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
 633
 634	return 0;
 635}
 636
 637static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
 638					 const void *evt_buf,
 639					 struct ath12k_wmi_target_cap_arg *cap)
 640{
 641	const struct wmi_service_ready_event *ev = evt_buf;
 642
 643	if (!ev) {
 644		ath12k_err(ab, "%s: failed by NULL param\n",
 645			   __func__);
 646		return -EINVAL;
 647	}
 648
 649	cap->phy_capability = le32_to_cpu(ev->phy_capability);
 650	cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
 651	cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
 652	cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
 653	cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
 654	cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
 655	cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
 656	cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
 657	cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
 658	cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
 659	cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
 660	cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
 661	cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
 662	cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
 663	cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
 664	cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
 665	cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
 666
 667	return 0;
 668}
 669
 670/* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
 671 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
 672 * 4-byte word.
 673 */
 674static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
 675					   const u32 *wmi_svc_bm)
 676{
 677	int i, j;
 678
 679	for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
 680		do {
 681			if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
 682				set_bit(j, wmi->wmi_ab->svc_map);
 683		} while (++j % WMI_SERVICE_BITS_IN_SIZE32);
 684	}
 685}
 686
 687static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
 688				    const void *ptr, void *data)
 689{
 690	struct ath12k_wmi_svc_ready_parse *svc_ready = data;
 691	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
 692	u16 expect_len;
 693
 694	switch (tag) {
 695	case WMI_TAG_SERVICE_READY_EVENT:
 696		if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
 697			return -EINVAL;
 698		break;
 699
 700	case WMI_TAG_ARRAY_UINT32:
 701		if (!svc_ready->wmi_svc_bitmap_done) {
 702			expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
 703			if (len < expect_len) {
 704				ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
 705					    len, tag);
 706				return -EINVAL;
 707			}
 708
 709			ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
 710
 711			svc_ready->wmi_svc_bitmap_done = true;
 712		}
 713		break;
 714	default:
 715		break;
 716	}
 717
 718	return 0;
 719}
 720
 721static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
 722{
 723	struct ath12k_wmi_svc_ready_parse svc_ready = { };
 724	int ret;
 725
 726	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
 727				  ath12k_wmi_svc_rdy_parse,
 728				  &svc_ready);
 729	if (ret) {
 730		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
 731		return ret;
 732	}
 733
 734	return 0;
 735}
 736
 737static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
 738				    struct ieee80211_tx_info *info)
 739{
 740	struct ath12k_base *ab = ar->ab;
 741	u32 freq = 0;
 742
 743	if (ab->hw_params->single_pdev_only &&
 744	    ar->scan.is_roc &&
 745	    (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
 746		freq = ar->scan.roc_freq;
 747
 748	return freq;
 749}
 750
 751struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
 752{
 753	struct sk_buff *skb;
 754	struct ath12k_base *ab = wmi_ab->ab;
 755	u32 round_len = roundup(len, 4);
 756
 757	skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
 758	if (!skb)
 759		return NULL;
 760
 761	skb_reserve(skb, WMI_SKB_HEADROOM);
 762	if (!IS_ALIGNED((unsigned long)skb->data, 4))
 763		ath12k_warn(ab, "unaligned WMI skb data\n");
 764
 765	skb_put(skb, round_len);
 766	memset(skb->data, 0, round_len);
 767
 768	return skb;
 769}
 770
 771int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
 772			 struct sk_buff *frame)
 773{
 774	struct ath12k_wmi_pdev *wmi = ar->wmi;
 775	struct wmi_mgmt_send_cmd *cmd;
 776	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
 777	struct wmi_tlv *frame_tlv;
 778	struct sk_buff *skb;
 779	u32 buf_len;
 780	int ret, len;
 781
 782	buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
 783
 784	len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4);
 785
 786	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
 787	if (!skb)
 788		return -ENOMEM;
 789
 790	cmd = (struct wmi_mgmt_send_cmd *)skb->data;
 791	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
 792						 sizeof(*cmd));
 793	cmd->vdev_id = cpu_to_le32(vdev_id);
 794	cmd->desc_id = cpu_to_le32(buf_id);
 795	cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
 796	cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
 797	cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
 798	cmd->frame_len = cpu_to_le32(frame->len);
 799	cmd->buf_len = cpu_to_le32(buf_len);
 800	cmd->tx_params_valid = 0;
 801
 802	frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
 803	frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
 804
 805	memcpy(frame_tlv->value, frame->data, buf_len);
 806
 807	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
 808	if (ret) {
 809		ath12k_warn(ar->ab,
 810			    "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
 811		dev_kfree_skb(skb);
 812	}
 813
 814	return ret;
 815}
 816
 817int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
 818			   struct ath12k_wmi_vdev_create_arg *args)
 819{
 820	struct ath12k_wmi_pdev *wmi = ar->wmi;
 821	struct wmi_vdev_create_cmd *cmd;
 822	struct sk_buff *skb;
 823	struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
 824	struct wmi_tlv *tlv;
 825	int ret, len;
 826	void *ptr;
 827
 828	/* It can be optimized my sending tx/rx chain configuration
 829	 * only for supported bands instead of always sending it for
 830	 * both the bands.
 831	 */
 832	len = sizeof(*cmd) + TLV_HDR_SIZE +
 833		(WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams));
 834
 835	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
 836	if (!skb)
 837		return -ENOMEM;
 838
 839	cmd = (struct wmi_vdev_create_cmd *)skb->data;
 840	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
 841						 sizeof(*cmd));
 842
 843	cmd->vdev_id = cpu_to_le32(args->if_id);
 844	cmd->vdev_type = cpu_to_le32(args->type);
 845	cmd->vdev_subtype = cpu_to_le32(args->subtype);
 846	cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
 847	cmd->pdev_id = cpu_to_le32(args->pdev_id);
 848	cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
 849	cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
 850	cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
 851	ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
 852
 853	if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
 854		cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
 855
 856	ptr = skb->data + sizeof(*cmd);
 857	len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
 858
 859	tlv = ptr;
 860	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
 861
 862	ptr += TLV_HDR_SIZE;
 863	txrx_streams = ptr;
 864	len = sizeof(*txrx_streams);
 865	txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
 866							  len);
 867	txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
 868	txrx_streams->supported_tx_streams =
 869				cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
 870	txrx_streams->supported_rx_streams =
 871				cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
 872
 873	txrx_streams++;
 874	txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
 875							  len);
 876	txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
 877	txrx_streams->supported_tx_streams =
 878				cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
 879	txrx_streams->supported_rx_streams =
 880				cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
 881
 882	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
 883		   "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
 884		   args->if_id, args->type, args->subtype,
 885		   macaddr, args->pdev_id);
 886
 887	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
 888	if (ret) {
 889		ath12k_warn(ar->ab,
 890			    "failed to submit WMI_VDEV_CREATE_CMDID\n");
 891		dev_kfree_skb(skb);
 892	}
 893
 894	return ret;
 895}
 896
 897int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
 898{
 899	struct ath12k_wmi_pdev *wmi = ar->wmi;
 900	struct wmi_vdev_delete_cmd *cmd;
 901	struct sk_buff *skb;
 902	int ret;
 903
 904	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
 905	if (!skb)
 906		return -ENOMEM;
 907
 908	cmd = (struct wmi_vdev_delete_cmd *)skb->data;
 909	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
 910						 sizeof(*cmd));
 911	cmd->vdev_id = cpu_to_le32(vdev_id);
 912
 913	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
 914
 915	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
 916	if (ret) {
 917		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
 918		dev_kfree_skb(skb);
 919	}
 920
 921	return ret;
 922}
 923
 924int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
 925{
 926	struct ath12k_wmi_pdev *wmi = ar->wmi;
 927	struct wmi_vdev_stop_cmd *cmd;
 928	struct sk_buff *skb;
 929	int ret;
 930
 931	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
 932	if (!skb)
 933		return -ENOMEM;
 934
 935	cmd = (struct wmi_vdev_stop_cmd *)skb->data;
 936
 937	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
 938						 sizeof(*cmd));
 939	cmd->vdev_id = cpu_to_le32(vdev_id);
 940
 941	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
 942
 943	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
 944	if (ret) {
 945		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
 946		dev_kfree_skb(skb);
 947	}
 948
 949	return ret;
 950}
 951
 952int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
 953{
 954	struct ath12k_wmi_pdev *wmi = ar->wmi;
 955	struct wmi_vdev_down_cmd *cmd;
 956	struct sk_buff *skb;
 957	int ret;
 958
 959	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
 960	if (!skb)
 961		return -ENOMEM;
 962
 963	cmd = (struct wmi_vdev_down_cmd *)skb->data;
 964
 965	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
 966						 sizeof(*cmd));
 967	cmd->vdev_id = cpu_to_le32(vdev_id);
 968
 969	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
 970
 971	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
 972	if (ret) {
 973		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
 974		dev_kfree_skb(skb);
 975	}
 976
 977	return ret;
 978}
 979
 980static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
 981				       struct wmi_vdev_start_req_arg *arg)
 982{
 983	memset(chan, 0, sizeof(*chan));
 984
 985	chan->mhz = cpu_to_le32(arg->freq);
 986	chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1);
 987	if (arg->mode == MODE_11AC_VHT80_80)
 988		chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2);
 989	else
 990		chan->band_center_freq2 = 0;
 991
 992	chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
 993	if (arg->passive)
 994		chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
 995	if (arg->allow_ibss)
 996		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
 997	if (arg->allow_ht)
 998		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
 999	if (arg->allow_vht)
1000		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1001	if (arg->allow_he)
1002		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1003	if (arg->ht40plus)
1004		chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1005	if (arg->chan_radar)
1006		chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1007	if (arg->freq2_radar)
1008		chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1009
1010	chan->reg_info_1 = le32_encode_bits(arg->max_power,
1011					    WMI_CHAN_REG_INFO1_MAX_PWR) |
1012		le32_encode_bits(arg->max_reg_power,
1013				 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1014
1015	chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1016					    WMI_CHAN_REG_INFO2_ANT_MAX) |
1017		le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1018}
1019
1020int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1021			  bool restart)
1022{
1023	struct ath12k_wmi_pdev *wmi = ar->wmi;
1024	struct wmi_vdev_start_request_cmd *cmd;
1025	struct sk_buff *skb;
1026	struct ath12k_wmi_channel_params *chan;
1027	struct wmi_tlv *tlv;
1028	void *ptr;
1029	int ret, len;
1030
1031	if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1032		return -EINVAL;
1033
1034	len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1035
1036	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1037	if (!skb)
1038		return -ENOMEM;
1039
1040	cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1041	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1042						 sizeof(*cmd));
1043	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1044	cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1045	cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1046	cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1047	cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1048	cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1049	cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1050	cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1051	cmd->regdomain = cpu_to_le32(arg->regdomain);
1052	cmd->he_ops = cpu_to_le32(arg->he_ops);
1053	cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1054	cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1055	cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1056
1057	if (!restart) {
1058		if (arg->ssid) {
1059			cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1060			memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1061		}
1062		if (arg->hidden_ssid)
1063			cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1064		if (arg->pmf_enabled)
1065			cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1066	}
1067
1068	cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1069
1070	ptr = skb->data + sizeof(*cmd);
1071	chan = ptr;
1072
1073	ath12k_wmi_put_wmi_channel(chan, arg);
1074
1075	chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1076						  sizeof(*chan));
1077	ptr += sizeof(*chan);
1078
1079	tlv = ptr;
1080	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1081
1082	/* Note: This is a nested TLV containing:
1083	 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1084	 */
1085
1086	ptr += sizeof(*tlv);
1087
1088	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1089		   restart ? "restart" : "start", arg->vdev_id,
1090		   arg->freq, arg->mode);
1091
1092	if (restart)
1093		ret = ath12k_wmi_cmd_send(wmi, skb,
1094					  WMI_VDEV_RESTART_REQUEST_CMDID);
1095	else
1096		ret = ath12k_wmi_cmd_send(wmi, skb,
1097					  WMI_VDEV_START_REQUEST_CMDID);
1098	if (ret) {
1099		ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1100			    restart ? "restart" : "start");
1101		dev_kfree_skb(skb);
1102	}
1103
1104	return ret;
1105}
1106
1107int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1108{
1109	struct ath12k_wmi_pdev *wmi = ar->wmi;
1110	struct wmi_vdev_up_cmd *cmd;
1111	struct sk_buff *skb;
1112	int ret;
1113
1114	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1115	if (!skb)
1116		return -ENOMEM;
1117
1118	cmd = (struct wmi_vdev_up_cmd *)skb->data;
1119
1120	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1121						 sizeof(*cmd));
1122	cmd->vdev_id = cpu_to_le32(params->vdev_id);
1123	cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1124
1125	ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1126
1127	if (params->tx_bssid) {
1128		ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1129		cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1130		cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1131	}
1132
1133	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1134		   "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1135		   params->vdev_id, params->aid, params->bssid);
1136
1137	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1138	if (ret) {
1139		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1140		dev_kfree_skb(skb);
1141	}
1142
1143	return ret;
1144}
1145
1146int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1147				    struct ath12k_wmi_peer_create_arg *arg)
1148{
1149	struct ath12k_wmi_pdev *wmi = ar->wmi;
1150	struct wmi_peer_create_cmd *cmd;
1151	struct sk_buff *skb;
1152	int ret;
1153
1154	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1155	if (!skb)
1156		return -ENOMEM;
1157
1158	cmd = (struct wmi_peer_create_cmd *)skb->data;
1159	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1160						 sizeof(*cmd));
1161
1162	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1163	cmd->peer_type = cpu_to_le32(arg->peer_type);
1164	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1165
1166	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1167		   "WMI peer create vdev_id %d peer_addr %pM\n",
1168		   arg->vdev_id, arg->peer_addr);
1169
1170	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1171	if (ret) {
1172		ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1173		dev_kfree_skb(skb);
1174	}
1175
1176	return ret;
1177}
1178
1179int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1180				    const u8 *peer_addr, u8 vdev_id)
1181{
1182	struct ath12k_wmi_pdev *wmi = ar->wmi;
1183	struct wmi_peer_delete_cmd *cmd;
1184	struct sk_buff *skb;
1185	int ret;
1186
1187	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1188	if (!skb)
1189		return -ENOMEM;
1190
1191	cmd = (struct wmi_peer_delete_cmd *)skb->data;
1192	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1193						 sizeof(*cmd));
1194
1195	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1196	cmd->vdev_id = cpu_to_le32(vdev_id);
1197
1198	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1199		   "WMI peer delete vdev_id %d peer_addr %pM\n",
1200		   vdev_id,  peer_addr);
1201
1202	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1203	if (ret) {
1204		ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1205		dev_kfree_skb(skb);
1206	}
1207
1208	return ret;
1209}
1210
1211int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1212				       struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1213{
1214	struct ath12k_wmi_pdev *wmi = ar->wmi;
1215	struct wmi_pdev_set_regdomain_cmd *cmd;
1216	struct sk_buff *skb;
1217	int ret;
1218
1219	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1220	if (!skb)
1221		return -ENOMEM;
1222
1223	cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1224	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1225						 sizeof(*cmd));
1226
1227	cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1228	cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1229	cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1230	cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1231	cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1232	cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1233	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1234
1235	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1236		   "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1237		   arg->current_rd_in_use, arg->current_rd_2g,
1238		   arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1239
1240	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1241	if (ret) {
1242		ath12k_warn(ar->ab,
1243			    "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1244		dev_kfree_skb(skb);
1245	}
1246
1247	return ret;
1248}
1249
1250int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1251			      u32 vdev_id, u32 param_id, u32 param_val)
1252{
1253	struct ath12k_wmi_pdev *wmi = ar->wmi;
1254	struct wmi_peer_set_param_cmd *cmd;
1255	struct sk_buff *skb;
1256	int ret;
1257
1258	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1259	if (!skb)
1260		return -ENOMEM;
1261
1262	cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1263	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1264						 sizeof(*cmd));
1265	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1266	cmd->vdev_id = cpu_to_le32(vdev_id);
1267	cmd->param_id = cpu_to_le32(param_id);
1268	cmd->param_value = cpu_to_le32(param_val);
1269
1270	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1271		   "WMI vdev %d peer 0x%pM set param %d value %d\n",
1272		   vdev_id, peer_addr, param_id, param_val);
1273
1274	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1275	if (ret) {
1276		ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1277		dev_kfree_skb(skb);
1278	}
1279
1280	return ret;
1281}
1282
1283int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1284					u8 peer_addr[ETH_ALEN],
1285					u32 peer_tid_bitmap,
1286					u8 vdev_id)
1287{
1288	struct ath12k_wmi_pdev *wmi = ar->wmi;
1289	struct wmi_peer_flush_tids_cmd *cmd;
1290	struct sk_buff *skb;
1291	int ret;
1292
1293	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1294	if (!skb)
1295		return -ENOMEM;
1296
1297	cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1298	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1299						 sizeof(*cmd));
1300
1301	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1302	cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1303	cmd->vdev_id = cpu_to_le32(vdev_id);
1304
1305	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1306		   "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1307		   vdev_id, peer_addr, peer_tid_bitmap);
1308
1309	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1310	if (ret) {
1311		ath12k_warn(ar->ab,
1312			    "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1313		dev_kfree_skb(skb);
1314	}
1315
1316	return ret;
1317}
1318
1319int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1320					   int vdev_id, const u8 *addr,
1321					   dma_addr_t paddr, u8 tid,
1322					   u8 ba_window_size_valid,
1323					   u32 ba_window_size)
1324{
1325	struct wmi_peer_reorder_queue_setup_cmd *cmd;
1326	struct sk_buff *skb;
1327	int ret;
1328
1329	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1330	if (!skb)
1331		return -ENOMEM;
1332
1333	cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1334	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1335						 sizeof(*cmd));
1336
1337	ether_addr_copy(cmd->peer_macaddr.addr, addr);
1338	cmd->vdev_id = cpu_to_le32(vdev_id);
1339	cmd->tid = cpu_to_le32(tid);
1340	cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1341	cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1342	cmd->queue_no = cpu_to_le32(tid);
1343	cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1344	cmd->ba_window_size = cpu_to_le32(ba_window_size);
1345
1346	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1347		   "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1348		   addr, vdev_id, tid);
1349
1350	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1351				  WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1352	if (ret) {
1353		ath12k_warn(ar->ab,
1354			    "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1355		dev_kfree_skb(skb);
1356	}
1357
1358	return ret;
1359}
1360
1361int
1362ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1363				 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1364{
1365	struct ath12k_wmi_pdev *wmi = ar->wmi;
1366	struct wmi_peer_reorder_queue_remove_cmd *cmd;
1367	struct sk_buff *skb;
1368	int ret;
1369
1370	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1371	if (!skb)
1372		return -ENOMEM;
1373
1374	cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1375	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1376						 sizeof(*cmd));
1377
1378	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1379	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1380	cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1381
1382	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1383		   "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1384		   arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1385
1386	ret = ath12k_wmi_cmd_send(wmi, skb,
1387				  WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1388	if (ret) {
1389		ath12k_warn(ar->ab,
1390			    "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1391		dev_kfree_skb(skb);
1392	}
1393
1394	return ret;
1395}
1396
1397int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1398			      u32 param_value, u8 pdev_id)
1399{
1400	struct ath12k_wmi_pdev *wmi = ar->wmi;
1401	struct wmi_pdev_set_param_cmd *cmd;
1402	struct sk_buff *skb;
1403	int ret;
1404
1405	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1406	if (!skb)
1407		return -ENOMEM;
1408
1409	cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1410	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1411						 sizeof(*cmd));
1412	cmd->pdev_id = cpu_to_le32(pdev_id);
1413	cmd->param_id = cpu_to_le32(param_id);
1414	cmd->param_value = cpu_to_le32(param_value);
1415
1416	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1417		   "WMI pdev set param %d pdev id %d value %d\n",
1418		   param_id, pdev_id, param_value);
1419
1420	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1421	if (ret) {
1422		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1423		dev_kfree_skb(skb);
1424	}
1425
1426	return ret;
1427}
1428
1429int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1430{
1431	struct ath12k_wmi_pdev *wmi = ar->wmi;
1432	struct wmi_pdev_set_ps_mode_cmd *cmd;
1433	struct sk_buff *skb;
1434	int ret;
1435
1436	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1437	if (!skb)
1438		return -ENOMEM;
1439
1440	cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1441	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1442						 sizeof(*cmd));
1443	cmd->vdev_id = cpu_to_le32(vdev_id);
1444	cmd->sta_ps_mode = cpu_to_le32(enable);
1445
1446	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1447		   "WMI vdev set psmode %d vdev id %d\n",
1448		   enable, vdev_id);
1449
1450	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1451	if (ret) {
1452		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1453		dev_kfree_skb(skb);
1454	}
1455
1456	return ret;
1457}
1458
1459int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1460			    u32 pdev_id)
1461{
1462	struct ath12k_wmi_pdev *wmi = ar->wmi;
1463	struct wmi_pdev_suspend_cmd *cmd;
1464	struct sk_buff *skb;
1465	int ret;
1466
1467	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1468	if (!skb)
1469		return -ENOMEM;
1470
1471	cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1472
1473	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1474						 sizeof(*cmd));
1475
1476	cmd->suspend_opt = cpu_to_le32(suspend_opt);
1477	cmd->pdev_id = cpu_to_le32(pdev_id);
1478
1479	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1480		   "WMI pdev suspend pdev_id %d\n", pdev_id);
1481
1482	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1483	if (ret) {
1484		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1485		dev_kfree_skb(skb);
1486	}
1487
1488	return ret;
1489}
1490
1491int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1492{
1493	struct ath12k_wmi_pdev *wmi = ar->wmi;
1494	struct wmi_pdev_resume_cmd *cmd;
1495	struct sk_buff *skb;
1496	int ret;
1497
1498	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1499	if (!skb)
1500		return -ENOMEM;
1501
1502	cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1503
1504	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1505						 sizeof(*cmd));
1506	cmd->pdev_id = cpu_to_le32(pdev_id);
1507
1508	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1509		   "WMI pdev resume pdev id %d\n", pdev_id);
1510
1511	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1512	if (ret) {
1513		ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1514		dev_kfree_skb(skb);
1515	}
1516
1517	return ret;
1518}
1519
1520/* TODO FW Support for the cmd is not available yet.
1521 * Can be tested once the command and corresponding
1522 * event is implemented in FW
1523 */
1524int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1525					  enum wmi_bss_chan_info_req_type type)
1526{
1527	struct ath12k_wmi_pdev *wmi = ar->wmi;
1528	struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1529	struct sk_buff *skb;
1530	int ret;
1531
1532	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1533	if (!skb)
1534		return -ENOMEM;
1535
1536	cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1537
1538	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1539						 sizeof(*cmd));
1540	cmd->req_type = cpu_to_le32(type);
1541	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1542
1543	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1544		   "WMI bss chan info req type %d\n", type);
1545
1546	ret = ath12k_wmi_cmd_send(wmi, skb,
1547				  WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1548	if (ret) {
1549		ath12k_warn(ar->ab,
1550			    "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1551		dev_kfree_skb(skb);
1552	}
1553
1554	return ret;
1555}
1556
1557int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1558					struct ath12k_wmi_ap_ps_arg *arg)
1559{
1560	struct ath12k_wmi_pdev *wmi = ar->wmi;
1561	struct wmi_ap_ps_peer_cmd *cmd;
1562	struct sk_buff *skb;
1563	int ret;
1564
1565	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1566	if (!skb)
1567		return -ENOMEM;
1568
1569	cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1570	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1571						 sizeof(*cmd));
1572
1573	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1574	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1575	cmd->param = cpu_to_le32(arg->param);
1576	cmd->value = cpu_to_le32(arg->value);
1577
1578	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1579		   "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1580		   arg->vdev_id, peer_addr, arg->param, arg->value);
1581
1582	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1583	if (ret) {
1584		ath12k_warn(ar->ab,
1585			    "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1586		dev_kfree_skb(skb);
1587	}
1588
1589	return ret;
1590}
1591
1592int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1593				u32 param, u32 param_value)
1594{
1595	struct ath12k_wmi_pdev *wmi = ar->wmi;
1596	struct wmi_sta_powersave_param_cmd *cmd;
1597	struct sk_buff *skb;
1598	int ret;
1599
1600	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1601	if (!skb)
1602		return -ENOMEM;
1603
1604	cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1605	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1606						 sizeof(*cmd));
1607
1608	cmd->vdev_id = cpu_to_le32(vdev_id);
1609	cmd->param = cpu_to_le32(param);
1610	cmd->value = cpu_to_le32(param_value);
1611
1612	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1613		   "WMI set sta ps vdev_id %d param %d value %d\n",
1614		   vdev_id, param, param_value);
1615
1616	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1617	if (ret) {
1618		ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1619		dev_kfree_skb(skb);
1620	}
1621
1622	return ret;
1623}
1624
1625int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1626{
1627	struct ath12k_wmi_pdev *wmi = ar->wmi;
1628	struct wmi_force_fw_hang_cmd *cmd;
1629	struct sk_buff *skb;
1630	int ret, len;
1631
1632	len = sizeof(*cmd);
1633
1634	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1635	if (!skb)
1636		return -ENOMEM;
1637
1638	cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1639	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1640						 len);
1641
1642	cmd->type = cpu_to_le32(type);
1643	cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1644
1645	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1646
1647	if (ret) {
1648		ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1649		dev_kfree_skb(skb);
1650	}
1651	return ret;
1652}
1653
1654int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1655				  u32 param_id, u32 param_value)
1656{
1657	struct ath12k_wmi_pdev *wmi = ar->wmi;
1658	struct wmi_vdev_set_param_cmd *cmd;
1659	struct sk_buff *skb;
1660	int ret;
1661
1662	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1663	if (!skb)
1664		return -ENOMEM;
1665
1666	cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1667	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1668						 sizeof(*cmd));
1669
1670	cmd->vdev_id = cpu_to_le32(vdev_id);
1671	cmd->param_id = cpu_to_le32(param_id);
1672	cmd->param_value = cpu_to_le32(param_value);
1673
1674	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1675		   "WMI vdev id 0x%x set param %d value %d\n",
1676		   vdev_id, param_id, param_value);
1677
1678	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1679	if (ret) {
1680		ath12k_warn(ar->ab,
1681			    "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1682		dev_kfree_skb(skb);
1683	}
1684
1685	return ret;
1686}
1687
1688int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1689{
1690	struct ath12k_wmi_pdev *wmi = ar->wmi;
1691	struct wmi_get_pdev_temperature_cmd *cmd;
1692	struct sk_buff *skb;
1693	int ret;
1694
1695	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1696	if (!skb)
1697		return -ENOMEM;
1698
1699	cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1700	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1701						 sizeof(*cmd));
1702	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1703
1704	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1705		   "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1706
1707	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1708	if (ret) {
1709		ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1710		dev_kfree_skb(skb);
1711	}
1712
1713	return ret;
1714}
1715
1716int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1717					    u32 vdev_id, u32 bcn_ctrl_op)
1718{
1719	struct ath12k_wmi_pdev *wmi = ar->wmi;
1720	struct wmi_bcn_offload_ctrl_cmd *cmd;
1721	struct sk_buff *skb;
1722	int ret;
1723
1724	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1725	if (!skb)
1726		return -ENOMEM;
1727
1728	cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1729	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1730						 sizeof(*cmd));
1731
1732	cmd->vdev_id = cpu_to_le32(vdev_id);
1733	cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1734
1735	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1736		   "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1737		   vdev_id, bcn_ctrl_op);
1738
1739	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1740	if (ret) {
1741		ath12k_warn(ar->ab,
1742			    "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1743		dev_kfree_skb(skb);
1744	}
1745
1746	return ret;
1747}
1748
1749int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1750			     const u8 *p2p_ie)
1751{
1752	struct ath12k_wmi_pdev *wmi = ar->wmi;
1753	struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1754	size_t p2p_ie_len, aligned_len;
1755	struct wmi_tlv *tlv;
1756	struct sk_buff *skb;
1757	void *ptr;
1758	int ret, len;
1759
1760	p2p_ie_len = p2p_ie[1] + 2;
1761	aligned_len = roundup(p2p_ie_len, sizeof(u32));
1762
1763	len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1764
1765	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1766	if (!skb)
1767		return -ENOMEM;
1768
1769	ptr = skb->data;
1770	cmd = ptr;
1771	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1772						 sizeof(*cmd));
1773	cmd->vdev_id = cpu_to_le32(vdev_id);
1774	cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1775
1776	ptr += sizeof(*cmd);
1777	tlv = ptr;
1778	tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
1779					     aligned_len);
1780	memcpy(tlv->value, p2p_ie, p2p_ie_len);
1781
1782	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
1783	if (ret) {
1784		ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
1785		dev_kfree_skb(skb);
1786	}
1787
1788	return ret;
1789}
1790
1791int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id,
1792			struct ieee80211_mutable_offsets *offs,
1793			struct sk_buff *bcn,
1794			struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
1795{
1796	struct ath12k_wmi_pdev *wmi = ar->wmi;
1797	struct wmi_bcn_tmpl_cmd *cmd;
1798	struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
1799	struct wmi_tlv *tlv;
1800	struct sk_buff *skb;
1801	u32 ema_params = 0;
1802	void *ptr;
1803	int ret, len;
1804	size_t aligned_len = roundup(bcn->len, 4);
1805
1806	len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
1807
1808	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1809	if (!skb)
1810		return -ENOMEM;
1811
1812	cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
1813	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
1814						 sizeof(*cmd));
1815	cmd->vdev_id = cpu_to_le32(vdev_id);
1816	cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
1817	cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]);
1818	cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]);
1819	cmd->buf_len = cpu_to_le32(bcn->len);
1820	cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
1821	if (ema_args) {
1822		u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
1823		u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
1824		if (ema_args->bcn_index == 0)
1825			u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
1826		if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
1827			u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
1828		cmd->ema_params = cpu_to_le32(ema_params);
1829	}
1830
1831	ptr = skb->data + sizeof(*cmd);
1832
1833	bcn_prb_info = ptr;
1834	len = sizeof(*bcn_prb_info);
1835	bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
1836							  len);
1837	bcn_prb_info->caps = 0;
1838	bcn_prb_info->erp = 0;
1839
1840	ptr += sizeof(*bcn_prb_info);
1841
1842	tlv = ptr;
1843	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
1844	memcpy(tlv->value, bcn->data, bcn->len);
1845
1846	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
1847	if (ret) {
1848		ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n");
1849		dev_kfree_skb(skb);
1850	}
1851
1852	return ret;
1853}
1854
1855int ath12k_wmi_vdev_install_key(struct ath12k *ar,
1856				struct wmi_vdev_install_key_arg *arg)
1857{
1858	struct ath12k_wmi_pdev *wmi = ar->wmi;
1859	struct wmi_vdev_install_key_cmd *cmd;
1860	struct wmi_tlv *tlv;
1861	struct sk_buff *skb;
1862	int ret, len, key_len_aligned;
1863
1864	/* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
1865	 * length is specified in cmd->key_len.
1866	 */
1867	key_len_aligned = roundup(arg->key_len, 4);
1868
1869	len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
1870
1871	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1872	if (!skb)
1873		return -ENOMEM;
1874
1875	cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
1876	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
1877						 sizeof(*cmd));
1878	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1879	ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
1880	cmd->key_idx = cpu_to_le32(arg->key_idx);
1881	cmd->key_flags = cpu_to_le32(arg->key_flags);
1882	cmd->key_cipher = cpu_to_le32(arg->key_cipher);
1883	cmd->key_len = cpu_to_le32(arg->key_len);
1884	cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
1885	cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
1886
1887	if (arg->key_rsc_counter)
1888		cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
1889
1890	tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
1891	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
1892	memcpy(tlv->value, arg->key_data, arg->key_len);
1893
1894	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1895		   "WMI vdev install key idx %d cipher %d len %d\n",
1896		   arg->key_idx, arg->key_cipher, arg->key_len);
1897
1898	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
1899	if (ret) {
1900		ath12k_warn(ar->ab,
1901			    "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
1902		dev_kfree_skb(skb);
1903	}
1904
1905	return ret;
1906}
1907
1908static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
1909				       struct ath12k_wmi_peer_assoc_arg *arg,
1910				       bool hw_crypto_disabled)
1911{
1912	cmd->peer_flags = 0;
1913	cmd->peer_flags_ext = 0;
1914
1915	if (arg->is_wme_set) {
1916		if (arg->qos_flag)
1917			cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
1918		if (arg->apsd_flag)
1919			cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
1920		if (arg->ht_flag)
1921			cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
1922		if (arg->bw_40)
1923			cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
1924		if (arg->bw_80)
1925			cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
1926		if (arg->bw_160)
1927			cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
1928		if (arg->bw_320)
1929			cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
1930
1931		/* Typically if STBC is enabled for VHT it should be enabled
1932		 * for HT as well
1933		 **/
1934		if (arg->stbc_flag)
1935			cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
1936
1937		/* Typically if LDPC is enabled for VHT it should be enabled
1938		 * for HT as well
1939		 **/
1940		if (arg->ldpc_flag)
1941			cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
1942
1943		if (arg->static_mimops_flag)
1944			cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
1945		if (arg->dynamic_mimops_flag)
1946			cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
1947		if (arg->spatial_mux_flag)
1948			cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
1949		if (arg->vht_flag)
1950			cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
1951		if (arg->he_flag)
1952			cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
1953		if (arg->twt_requester)
1954			cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
1955		if (arg->twt_responder)
1956			cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
1957		if (arg->eht_flag)
1958			cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
1959	}
1960
1961	/* Suppress authorization for all AUTH modes that need 4-way handshake
1962	 * (during re-association).
1963	 * Authorization will be done for these modes on key installation.
1964	 */
1965	if (arg->auth_flag)
1966		cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
1967	if (arg->need_ptk_4_way) {
1968		cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
1969		if (!hw_crypto_disabled)
1970			cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
1971	}
1972	if (arg->need_gtk_2_way)
1973		cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
1974	/* safe mode bypass the 4-way handshake */
1975	if (arg->safe_mode_enabled)
1976		cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
1977						 WMI_PEER_NEED_GTK_2_WAY));
1978
1979	if (arg->is_pmf_enabled)
1980		cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
1981
1982	/* Disable AMSDU for station transmit, if user configures it */
1983	/* Disable AMSDU for AP transmit to 11n Stations, if user configures
1984	 * it
1985	 * if (arg->amsdu_disable) Add after FW support
1986	 **/
1987
1988	/* Target asserts if node is marked HT and all MCS is set to 0.
1989	 * Mark the node as non-HT if all the mcs rates are disabled through
1990	 * iwpriv
1991	 **/
1992	if (arg->peer_ht_rates.num_rates == 0)
1993		cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
1994}
1995
1996int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
1997				   struct ath12k_wmi_peer_assoc_arg *arg)
1998{
1999	struct ath12k_wmi_pdev *wmi = ar->wmi;
2000	struct wmi_peer_assoc_complete_cmd *cmd;
2001	struct ath12k_wmi_vht_rate_set_params *mcs;
2002	struct ath12k_wmi_he_rate_set_params *he_mcs;
2003	struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2004	struct sk_buff *skb;
2005	struct wmi_tlv *tlv;
2006	void *ptr;
2007	u32 peer_legacy_rates_align;
2008	u32 peer_ht_rates_align;
2009	int i, ret, len;
2010
2011	peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2012					  sizeof(u32));
2013	peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2014				      sizeof(u32));
2015
2016	len = sizeof(*cmd) +
2017	      TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2018	      TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2019	      sizeof(*mcs) + TLV_HDR_SIZE +
2020	      (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2021	      TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) +
2022	      TLV_HDR_SIZE + TLV_HDR_SIZE;
2023
2024	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2025	if (!skb)
2026		return -ENOMEM;
2027
2028	ptr = skb->data;
2029
2030	cmd = ptr;
2031	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2032						 sizeof(*cmd));
2033
2034	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2035
2036	cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2037	cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2038	cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2039
2040	ath12k_wmi_copy_peer_flags(cmd, arg,
2041				   test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2042					    &ar->ab->dev_flags));
2043
2044	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2045
2046	cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2047	cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2048	cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2049	cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2050	cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2051	cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2052	cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2053	cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2054
2055	/* Update 11ax capabilities */
2056	cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2057	cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2058	cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2059	cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2060	cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2061	for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2062		cmd->peer_he_cap_phy[i] =
2063			cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2064	cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2065	cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2066	for (i = 0; i < WMI_MAX_NUM_SS; i++)
2067		cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2068			cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2069
2070	/* Update 11be capabilities */
2071	memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2072		       arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2073		       0);
2074	memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2075		       arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2076		       0);
2077	memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2078		       &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2079
2080	/* Update peer legacy rate information */
2081	ptr += sizeof(*cmd);
2082
2083	tlv = ptr;
2084	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2085
2086	ptr += TLV_HDR_SIZE;
2087
2088	cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2089	memcpy(ptr, arg->peer_legacy_rates.rates,
2090	       arg->peer_legacy_rates.num_rates);
2091
2092	/* Update peer HT rate information */
2093	ptr += peer_legacy_rates_align;
2094
2095	tlv = ptr;
2096	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2097	ptr += TLV_HDR_SIZE;
2098	cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2099	memcpy(ptr, arg->peer_ht_rates.rates,
2100	       arg->peer_ht_rates.num_rates);
2101
2102	/* VHT Rates */
2103	ptr += peer_ht_rates_align;
2104
2105	mcs = ptr;
2106
2107	mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2108						 sizeof(*mcs));
2109
2110	cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2111
2112	/* Update bandwidth-NSS mapping */
2113	cmd->peer_bw_rxnss_override = 0;
2114	cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2115
2116	if (arg->vht_capable) {
2117		mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate);
2118		mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2119		mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate);
2120		mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2121	}
2122
2123	/* HE Rates */
2124	cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2125	cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2126
2127	ptr += sizeof(*mcs);
2128
2129	len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2130
2131	tlv = ptr;
2132	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2133	ptr += TLV_HDR_SIZE;
2134
2135	/* Loop through the HE rate set */
2136	for (i = 0; i < arg->peer_he_mcs_count; i++) {
2137		he_mcs = ptr;
2138		he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2139							    sizeof(*he_mcs));
2140
2141		he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2142		he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2143		ptr += sizeof(*he_mcs);
2144	}
2145
2146	/* MLO header tag with 0 length */
2147	len = 0;
2148	tlv = ptr;
2149	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2150	ptr += TLV_HDR_SIZE;
2151
2152	/* Loop through the EHT rate set */
2153	len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2154	tlv = ptr;
2155	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2156	ptr += TLV_HDR_SIZE;
2157
2158	for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2159		eht_mcs = ptr;
2160		eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2161							     sizeof(*eht_mcs));
2162
2163		eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2164		eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2165		ptr += sizeof(*eht_mcs);
2166	}
2167
2168	/* ML partner links tag with 0 length */
2169	len = 0;
2170	tlv = ptr;
2171	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2172	ptr += TLV_HDR_SIZE;
2173
2174	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2175		   "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n",
2176		   cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2177		   cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2178		   cmd->peer_listen_intval, cmd->peer_ht_caps,
2179		   cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2180		   cmd->peer_mpdu_density,
2181		   cmd->peer_vht_caps, cmd->peer_he_cap_info,
2182		   cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2183		   cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2184		   cmd->peer_he_cap_phy[2],
2185		   cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2186		   cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2187		   cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2188		   cmd->peer_eht_cap_phy[2]);
2189
2190	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2191	if (ret) {
2192		ath12k_warn(ar->ab,
2193			    "failed to send WMI_PEER_ASSOC_CMDID\n");
2194		dev_kfree_skb(skb);
2195	}
2196
2197	return ret;
2198}
2199
2200void ath12k_wmi_start_scan_init(struct ath12k *ar,
2201				struct ath12k_wmi_scan_req_arg *arg)
2202{
2203	/* setup commonly used values */
2204	arg->scan_req_id = 1;
2205	arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2206	arg->dwell_time_active = 50;
2207	arg->dwell_time_active_2g = 0;
2208	arg->dwell_time_passive = 150;
2209	arg->dwell_time_active_6g = 40;
2210	arg->dwell_time_passive_6g = 30;
2211	arg->min_rest_time = 50;
2212	arg->max_rest_time = 500;
2213	arg->repeat_probe_time = 0;
2214	arg->probe_spacing_time = 0;
2215	arg->idle_time = 0;
2216	arg->max_scan_time = 20000;
2217	arg->probe_delay = 5;
2218	arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2219				  WMI_SCAN_EVENT_COMPLETED |
2220				  WMI_SCAN_EVENT_BSS_CHANNEL |
2221				  WMI_SCAN_EVENT_FOREIGN_CHAN |
2222				  WMI_SCAN_EVENT_DEQUEUED;
2223	arg->scan_f_chan_stat_evnt = 1;
2224	arg->num_bssid = 1;
2225
2226	/* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2227	 * ZEROs in probe request
2228	 */
2229	eth_broadcast_addr(arg->bssid_list[0].addr);
2230}
2231
2232static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2233						   struct ath12k_wmi_scan_req_arg *arg)
2234{
2235	/* Scan events subscription */
2236	if (arg->scan_ev_started)
2237		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2238	if (arg->scan_ev_completed)
2239		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2240	if (arg->scan_ev_bss_chan)
2241		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2242	if (arg->scan_ev_foreign_chan)
2243		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2244	if (arg->scan_ev_dequeued)
2245		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2246	if (arg->scan_ev_preempted)
2247		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2248	if (arg->scan_ev_start_failed)
2249		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2250	if (arg->scan_ev_restarted)
2251		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2252	if (arg->scan_ev_foreign_chn_exit)
2253		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2254	if (arg->scan_ev_suspended)
2255		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2256	if (arg->scan_ev_resumed)
2257		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2258
2259	/** Set scan control flags */
2260	cmd->scan_ctrl_flags = 0;
2261	if (arg->scan_f_passive)
2262		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2263	if (arg->scan_f_strict_passive_pch)
2264		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2265	if (arg->scan_f_promisc_mode)
2266		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2267	if (arg->scan_f_capture_phy_err)
2268		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2269	if (arg->scan_f_half_rate)
2270		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2271	if (arg->scan_f_quarter_rate)
2272		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2273	if (arg->scan_f_cck_rates)
2274		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2275	if (arg->scan_f_ofdm_rates)
2276		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2277	if (arg->scan_f_chan_stat_evnt)
2278		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2279	if (arg->scan_f_filter_prb_req)
2280		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2281	if (arg->scan_f_bcast_probe)
2282		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2283	if (arg->scan_f_offchan_mgmt_tx)
2284		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2285	if (arg->scan_f_offchan_data_tx)
2286		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2287	if (arg->scan_f_force_active_dfs_chn)
2288		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2289	if (arg->scan_f_add_tpc_ie_in_probe)
2290		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2291	if (arg->scan_f_add_ds_ie_in_probe)
2292		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2293	if (arg->scan_f_add_spoofed_mac_in_probe)
2294		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2295	if (arg->scan_f_add_rand_seq_in_probe)
2296		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2297	if (arg->scan_f_en_ie_whitelist_in_probe)
2298		cmd->scan_ctrl_flags |=
2299			cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2300
2301	cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2302						 WMI_SCAN_DWELL_MODE_MASK);
2303}
2304
2305int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2306				   struct ath12k_wmi_scan_req_arg *arg)
2307{
2308	struct ath12k_wmi_pdev *wmi = ar->wmi;
2309	struct wmi_start_scan_cmd *cmd;
2310	struct ath12k_wmi_ssid_params *ssid = NULL;
2311	struct ath12k_wmi_mac_addr_params *bssid;
2312	struct sk_buff *skb;
2313	struct wmi_tlv *tlv;
2314	void *ptr;
2315	int i, ret, len;
2316	u32 *tmp_ptr, extraie_len_with_pad = 0;
2317	struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2318	struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2319
2320	len = sizeof(*cmd);
2321
2322	len += TLV_HDR_SIZE;
2323	if (arg->num_chan)
2324		len += arg->num_chan * sizeof(u32);
2325
2326	len += TLV_HDR_SIZE;
2327	if (arg->num_ssids)
2328		len += arg->num_ssids * sizeof(*ssid);
2329
2330	len += TLV_HDR_SIZE;
2331	if (arg->num_bssid)
2332		len += sizeof(*bssid) * arg->num_bssid;
2333
2334	if (arg->num_hint_bssid)
2335		len += TLV_HDR_SIZE +
2336		       arg->num_hint_bssid * sizeof(*hint_bssid);
2337
2338	if (arg->num_hint_s_ssid)
2339		len += TLV_HDR_SIZE +
2340		       arg->num_hint_s_ssid * sizeof(*s_ssid);
2341
2342	len += TLV_HDR_SIZE;
2343	if (arg->extraie.len)
2344		extraie_len_with_pad =
2345			roundup(arg->extraie.len, sizeof(u32));
2346	if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2347		len += extraie_len_with_pad;
2348	} else {
2349		ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2350			    arg->extraie.len);
2351		extraie_len_with_pad = 0;
2352	}
2353
2354	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2355	if (!skb)
2356		return -ENOMEM;
2357
2358	ptr = skb->data;
2359
2360	cmd = ptr;
2361	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2362						 sizeof(*cmd));
2363
2364	cmd->scan_id = cpu_to_le32(arg->scan_id);
2365	cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2366	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2367	cmd->scan_priority = cpu_to_le32(arg->scan_priority);
2368	cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2369
2370	ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2371
2372	cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2373	cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2374	cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2375	cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2376	cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2377	cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2378	cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2379	cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2380	cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2381	cmd->idle_time = cpu_to_le32(arg->idle_time);
2382	cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2383	cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2384	cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2385	cmd->num_chan = cpu_to_le32(arg->num_chan);
2386	cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2387	cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2388	cmd->ie_len = cpu_to_le32(arg->extraie.len);
2389	cmd->n_probes = cpu_to_le32(arg->n_probes);
2390
2391	ptr += sizeof(*cmd);
2392
2393	len = arg->num_chan * sizeof(u32);
2394
2395	tlv = ptr;
2396	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2397	ptr += TLV_HDR_SIZE;
2398	tmp_ptr = (u32 *)ptr;
2399
2400	memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2401
2402	ptr += len;
2403
2404	len = arg->num_ssids * sizeof(*ssid);
2405	tlv = ptr;
2406	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2407
2408	ptr += TLV_HDR_SIZE;
2409
2410	if (arg->num_ssids) {
2411		ssid = ptr;
2412		for (i = 0; i < arg->num_ssids; ++i) {
2413			ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2414			memcpy(ssid->ssid, arg->ssid[i].ssid,
2415			       arg->ssid[i].ssid_len);
2416			ssid++;
2417		}
2418	}
2419
2420	ptr += (arg->num_ssids * sizeof(*ssid));
2421	len = arg->num_bssid * sizeof(*bssid);
2422	tlv = ptr;
2423	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2424
2425	ptr += TLV_HDR_SIZE;
2426	bssid = ptr;
2427
2428	if (arg->num_bssid) {
2429		for (i = 0; i < arg->num_bssid; ++i) {
2430			ether_addr_copy(bssid->addr,
2431					arg->bssid_list[i].addr);
2432			bssid++;
2433		}
2434	}
2435
2436	ptr += arg->num_bssid * sizeof(*bssid);
2437
2438	len = extraie_len_with_pad;
2439	tlv = ptr;
2440	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2441	ptr += TLV_HDR_SIZE;
2442
2443	if (extraie_len_with_pad)
2444		memcpy(ptr, arg->extraie.ptr,
2445		       arg->extraie.len);
2446
2447	ptr += extraie_len_with_pad;
2448
2449	if (arg->num_hint_s_ssid) {
2450		len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2451		tlv = ptr;
2452		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2453		ptr += TLV_HDR_SIZE;
2454		s_ssid = ptr;
2455		for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2456			s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2457			s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2458			s_ssid++;
2459		}
2460		ptr += len;
2461	}
2462
2463	if (arg->num_hint_bssid) {
2464		len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2465		tlv = ptr;
2466		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2467		ptr += TLV_HDR_SIZE;
2468		hint_bssid = ptr;
2469		for (i = 0; i < arg->num_hint_bssid; ++i) {
2470			hint_bssid->freq_flags =
2471				arg->hint_bssid[i].freq_flags;
2472			ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2473					&hint_bssid->bssid.addr[0]);
2474			hint_bssid++;
2475		}
2476	}
2477
2478	ret = ath12k_wmi_cmd_send(wmi, skb,
2479				  WMI_START_SCAN_CMDID);
2480	if (ret) {
2481		ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2482		dev_kfree_skb(skb);
2483	}
2484
2485	return ret;
2486}
2487
2488int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2489				  struct ath12k_wmi_scan_cancel_arg *arg)
2490{
2491	struct ath12k_wmi_pdev *wmi = ar->wmi;
2492	struct wmi_stop_scan_cmd *cmd;
2493	struct sk_buff *skb;
2494	int ret;
2495
2496	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2497	if (!skb)
2498		return -ENOMEM;
2499
2500	cmd = (struct wmi_stop_scan_cmd *)skb->data;
2501
2502	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2503						 sizeof(*cmd));
2504
2505	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2506	cmd->requestor = cpu_to_le32(arg->requester);
2507	cmd->scan_id = cpu_to_le32(arg->scan_id);
2508	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2509	/* stop the scan with the corresponding scan_id */
2510	if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2511		/* Cancelling all scans */
2512		cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2513	} else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2514		/* Cancelling VAP scans */
2515		cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2516	} else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2517		/* Cancelling specific scan */
2518		cmd->req_type = WMI_SCAN_STOP_ONE;
2519	} else {
2520		ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2521			    arg->req_type);
2522		dev_kfree_skb(skb);
2523		return -EINVAL;
2524	}
2525
2526	ret = ath12k_wmi_cmd_send(wmi, skb,
2527				  WMI_STOP_SCAN_CMDID);
2528	if (ret) {
2529		ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2530		dev_kfree_skb(skb);
2531	}
2532
2533	return ret;
2534}
2535
2536int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2537				       struct ath12k_wmi_scan_chan_list_arg *arg)
2538{
2539	struct ath12k_wmi_pdev *wmi = ar->wmi;
2540	struct wmi_scan_chan_list_cmd *cmd;
2541	struct sk_buff *skb;
2542	struct ath12k_wmi_channel_params *chan_info;
2543	struct ath12k_wmi_channel_arg *channel_arg;
2544	struct wmi_tlv *tlv;
2545	void *ptr;
2546	int i, ret, len;
2547	u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2548	__le32 *reg1, *reg2;
2549
2550	channel_arg = &arg->channel[0];
2551	while (arg->nallchans) {
2552		len = sizeof(*cmd) + TLV_HDR_SIZE;
2553		max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2554			sizeof(*chan_info);
2555
2556		num_send_chans = min(arg->nallchans, max_chan_limit);
2557
2558		arg->nallchans -= num_send_chans;
2559		len += sizeof(*chan_info) * num_send_chans;
2560
2561		skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2562		if (!skb)
2563			return -ENOMEM;
2564
2565		cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2566		cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2567							 sizeof(*cmd));
2568		cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2569		cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2570		if (num_sends)
2571			cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2572
2573		ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2574			   "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2575			   num_send_chans, len, cmd->pdev_id, num_sends);
2576
2577		ptr = skb->data + sizeof(*cmd);
2578
2579		len = sizeof(*chan_info) * num_send_chans;
2580		tlv = ptr;
2581		tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2582						     len);
2583		ptr += TLV_HDR_SIZE;
2584
2585		for (i = 0; i < num_send_chans; ++i) {
2586			chan_info = ptr;
2587			memset(chan_info, 0, sizeof(*chan_info));
2588			len = sizeof(*chan_info);
2589			chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2590								       len);
2591
2592			reg1 = &chan_info->reg_info_1;
2593			reg2 = &chan_info->reg_info_2;
2594			chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2595			chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2596			chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2597
2598			if (channel_arg->is_chan_passive)
2599				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2600			if (channel_arg->allow_he)
2601				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2602			else if (channel_arg->allow_vht)
2603				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2604			else if (channel_arg->allow_ht)
2605				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2606			if (channel_arg->half_rate)
2607				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2608			if (channel_arg->quarter_rate)
2609				chan_info->info |=
2610					cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2611
2612			if (channel_arg->psc_channel)
2613				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2614
2615			if (channel_arg->dfs_set)
2616				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2617
2618			chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2619							    WMI_CHAN_INFO_MODE);
2620			*reg1 |= le32_encode_bits(channel_arg->minpower,
2621						  WMI_CHAN_REG_INFO1_MIN_PWR);
2622			*reg1 |= le32_encode_bits(channel_arg->maxpower,
2623						  WMI_CHAN_REG_INFO1_MAX_PWR);
2624			*reg1 |= le32_encode_bits(channel_arg->maxregpower,
2625						  WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2626			*reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2627						  WMI_CHAN_REG_INFO1_REG_CLS);
2628			*reg2 |= le32_encode_bits(channel_arg->antennamax,
2629						  WMI_CHAN_REG_INFO2_ANT_MAX);
2630
2631			ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2632				   "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2633				   i, chan_info->mhz, chan_info->info);
2634
2635			ptr += sizeof(*chan_info);
2636
2637			channel_arg++;
2638		}
2639
2640		ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2641		if (ret) {
2642			ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2643			dev_kfree_skb(skb);
2644			return ret;
2645		}
2646
2647		num_sends++;
2648	}
2649
2650	return 0;
2651}
2652
2653int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2654				   struct wmi_wmm_params_all_arg *param)
2655{
2656	struct ath12k_wmi_pdev *wmi = ar->wmi;
2657	struct wmi_vdev_set_wmm_params_cmd *cmd;
2658	struct wmi_wmm_params *wmm_param;
2659	struct wmi_wmm_params_arg *wmi_wmm_arg;
2660	struct sk_buff *skb;
2661	int ret, ac;
2662
2663	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2664	if (!skb)
2665		return -ENOMEM;
2666
2667	cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
2668	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2669						 sizeof(*cmd));
2670
2671	cmd->vdev_id = cpu_to_le32(vdev_id);
2672	cmd->wmm_param_type = 0;
2673
2674	for (ac = 0; ac < WME_NUM_AC; ac++) {
2675		switch (ac) {
2676		case WME_AC_BE:
2677			wmi_wmm_arg = &param->ac_be;
2678			break;
2679		case WME_AC_BK:
2680			wmi_wmm_arg = &param->ac_bk;
2681			break;
2682		case WME_AC_VI:
2683			wmi_wmm_arg = &param->ac_vi;
2684			break;
2685		case WME_AC_VO:
2686			wmi_wmm_arg = &param->ac_vo;
2687			break;
2688		}
2689
2690		wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
2691		wmm_param->tlv_header =
2692			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2693					       sizeof(*wmm_param));
2694
2695		wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
2696		wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
2697		wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
2698		wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
2699		wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
2700		wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
2701
2702		ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2703			   "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
2704			   ac, wmm_param->aifs, wmm_param->cwmin,
2705			   wmm_param->cwmax, wmm_param->txoplimit,
2706			   wmm_param->acm, wmm_param->no_ack);
2707	}
2708	ret = ath12k_wmi_cmd_send(wmi, skb,
2709				  WMI_VDEV_SET_WMM_PARAMS_CMDID);
2710	if (ret) {
2711		ath12k_warn(ar->ab,
2712			    "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
2713		dev_kfree_skb(skb);
2714	}
2715
2716	return ret;
2717}
2718
2719int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
2720						  u32 pdev_id)
2721{
2722	struct ath12k_wmi_pdev *wmi = ar->wmi;
2723	struct wmi_dfs_phyerr_offload_cmd *cmd;
2724	struct sk_buff *skb;
2725	int ret;
2726
2727	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2728	if (!skb)
2729		return -ENOMEM;
2730
2731	cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
2732	cmd->tlv_header =
2733		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
2734				       sizeof(*cmd));
2735
2736	cmd->pdev_id = cpu_to_le32(pdev_id);
2737
2738	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2739		   "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
2740
2741	ret = ath12k_wmi_cmd_send(wmi, skb,
2742				  WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
2743	if (ret) {
2744		ath12k_warn(ar->ab,
2745			    "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
2746		dev_kfree_skb(skb);
2747	}
2748
2749	return ret;
2750}
2751
2752int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
2753			    const u8 *buf, size_t buf_len)
2754{
2755	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
2756	struct wmi_pdev_set_bios_interface_cmd *cmd;
2757	struct wmi_tlv *tlv;
2758	struct sk_buff *skb;
2759	u8 *ptr;
2760	u32 len, len_aligned;
2761	int ret;
2762
2763	len_aligned = roundup(buf_len, sizeof(u32));
2764	len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
2765
2766	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
2767	if (!skb)
2768		return -ENOMEM;
2769
2770	cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
2771	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
2772						 sizeof(*cmd));
2773	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
2774	cmd->param_type_id = cpu_to_le32(param_id);
2775	cmd->length = cpu_to_le32(buf_len);
2776
2777	ptr = skb->data + sizeof(*cmd);
2778	tlv = (struct wmi_tlv *)ptr;
2779	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
2780	ptr += TLV_HDR_SIZE;
2781	memcpy(ptr, buf, buf_len);
2782
2783	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
2784				  skb,
2785				  WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
2786	if (ret) {
2787		ath12k_warn(ab,
2788			    "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
2789			    param_id, ret);
2790		dev_kfree_skb(skb);
2791	}
2792
2793	return 0;
2794}
2795
2796int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
2797{
2798	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
2799	struct wmi_pdev_set_bios_sar_table_cmd *cmd;
2800	struct wmi_tlv *tlv;
2801	struct sk_buff *skb;
2802	int ret;
2803	u8 *buf_ptr;
2804	u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
2805	const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
2806	const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
2807
2808	sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
2809	sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
2810					      sizeof(u32));
2811	len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
2812		TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
2813
2814	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
2815	if (!skb)
2816		return -ENOMEM;
2817
2818	cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
2819	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
2820						 sizeof(*cmd));
2821	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
2822	cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
2823	cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
2824
2825	buf_ptr = skb->data + sizeof(*cmd);
2826	tlv = (struct wmi_tlv *)buf_ptr;
2827	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
2828					 sar_table_len_aligned);
2829	buf_ptr += TLV_HDR_SIZE;
2830	memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
2831
2832	buf_ptr += sar_table_len_aligned;
2833	tlv = (struct wmi_tlv *)buf_ptr;
2834	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
2835					 sar_dbs_backoff_len_aligned);
2836	buf_ptr += TLV_HDR_SIZE;
2837	memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
2838
2839	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
2840				  skb,
2841				  WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
2842	if (ret) {
2843		ath12k_warn(ab,
2844			    "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
2845			    ret);
2846		dev_kfree_skb(skb);
2847	}
2848
2849	return ret;
2850}
2851
2852int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
2853{
2854	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
2855	struct wmi_pdev_set_bios_geo_table_cmd *cmd;
2856	struct wmi_tlv *tlv;
2857	struct sk_buff *skb;
2858	int ret;
2859	u8 *buf_ptr;
2860	u32 len, sar_geo_len_aligned;
2861	const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
2862
2863	sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
2864	len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
2865
2866	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
2867	if (!skb)
2868		return -ENOMEM;
2869
2870	cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
2871	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
2872						 sizeof(*cmd));
2873	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
2874	cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
2875
2876	buf_ptr = skb->data + sizeof(*cmd);
2877	tlv = (struct wmi_tlv *)buf_ptr;
2878	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
2879	buf_ptr += TLV_HDR_SIZE;
2880	memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
2881
2882	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
2883				  skb,
2884				  WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
2885	if (ret) {
2886		ath12k_warn(ab,
2887			    "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
2888			    ret);
2889		dev_kfree_skb(skb);
2890	}
2891
2892	return ret;
2893}
2894
2895int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2896			  u32 tid, u32 initiator, u32 reason)
2897{
2898	struct ath12k_wmi_pdev *wmi = ar->wmi;
2899	struct wmi_delba_send_cmd *cmd;
2900	struct sk_buff *skb;
2901	int ret;
2902
2903	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2904	if (!skb)
2905		return -ENOMEM;
2906
2907	cmd = (struct wmi_delba_send_cmd *)skb->data;
2908	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
2909						 sizeof(*cmd));
2910	cmd->vdev_id = cpu_to_le32(vdev_id);
2911	ether_addr_copy(cmd->peer_macaddr.addr, mac);
2912	cmd->tid = cpu_to_le32(tid);
2913	cmd->initiator = cpu_to_le32(initiator);
2914	cmd->reasoncode = cpu_to_le32(reason);
2915
2916	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2917		   "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
2918		   vdev_id, mac, tid, initiator, reason);
2919
2920	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
2921
2922	if (ret) {
2923		ath12k_warn(ar->ab,
2924			    "failed to send WMI_DELBA_SEND_CMDID cmd\n");
2925		dev_kfree_skb(skb);
2926	}
2927
2928	return ret;
2929}
2930
2931int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2932			      u32 tid, u32 status)
2933{
2934	struct ath12k_wmi_pdev *wmi = ar->wmi;
2935	struct wmi_addba_setresponse_cmd *cmd;
2936	struct sk_buff *skb;
2937	int ret;
2938
2939	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2940	if (!skb)
2941		return -ENOMEM;
2942
2943	cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
2944	cmd->tlv_header =
2945		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
2946				       sizeof(*cmd));
2947	cmd->vdev_id = cpu_to_le32(vdev_id);
2948	ether_addr_copy(cmd->peer_macaddr.addr, mac);
2949	cmd->tid = cpu_to_le32(tid);
2950	cmd->statuscode = cpu_to_le32(status);
2951
2952	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2953		   "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
2954		   vdev_id, mac, tid, status);
2955
2956	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
2957
2958	if (ret) {
2959		ath12k_warn(ar->ab,
2960			    "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
2961		dev_kfree_skb(skb);
2962	}
2963
2964	return ret;
2965}
2966
2967int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2968			  u32 tid, u32 buf_size)
2969{
2970	struct ath12k_wmi_pdev *wmi = ar->wmi;
2971	struct wmi_addba_send_cmd *cmd;
2972	struct sk_buff *skb;
2973	int ret;
2974
2975	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2976	if (!skb)
2977		return -ENOMEM;
2978
2979	cmd = (struct wmi_addba_send_cmd *)skb->data;
2980	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
2981						 sizeof(*cmd));
2982	cmd->vdev_id = cpu_to_le32(vdev_id);
2983	ether_addr_copy(cmd->peer_macaddr.addr, mac);
2984	cmd->tid = cpu_to_le32(tid);
2985	cmd->buffersize = cpu_to_le32(buf_size);
2986
2987	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2988		   "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
2989		   vdev_id, mac, tid, buf_size);
2990
2991	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
2992
2993	if (ret) {
2994		ath12k_warn(ar->ab,
2995			    "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
2996		dev_kfree_skb(skb);
2997	}
2998
2999	return ret;
3000}
3001
3002int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3003{
3004	struct ath12k_wmi_pdev *wmi = ar->wmi;
3005	struct wmi_addba_clear_resp_cmd *cmd;
3006	struct sk_buff *skb;
3007	int ret;
3008
3009	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3010	if (!skb)
3011		return -ENOMEM;
3012
3013	cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3014	cmd->tlv_header =
3015		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3016				       sizeof(*cmd));
3017	cmd->vdev_id = cpu_to_le32(vdev_id);
3018	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3019
3020	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3021		   "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3022		   vdev_id, mac);
3023
3024	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3025
3026	if (ret) {
3027		ath12k_warn(ar->ab,
3028			    "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3029		dev_kfree_skb(skb);
3030	}
3031
3032	return ret;
3033}
3034
3035int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3036				     struct ath12k_wmi_init_country_arg *arg)
3037{
3038	struct ath12k_wmi_pdev *wmi = ar->wmi;
3039	struct wmi_init_country_cmd *cmd;
3040	struct sk_buff *skb;
3041	int ret;
3042
3043	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3044	if (!skb)
3045		return -ENOMEM;
3046
3047	cmd = (struct wmi_init_country_cmd *)skb->data;
3048	cmd->tlv_header =
3049		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3050				       sizeof(*cmd));
3051
3052	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3053
3054	switch (arg->flags) {
3055	case ALPHA_IS_SET:
3056		cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3057		memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3058		break;
3059	case CC_IS_SET:
3060		cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3061		cmd->cc_info.country_code =
3062			cpu_to_le32(arg->cc_info.country_code);
3063		break;
3064	case REGDMN_IS_SET:
3065		cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3066		cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3067		break;
3068	default:
3069		ret = -EINVAL;
3070		goto out;
3071	}
3072
3073	ret = ath12k_wmi_cmd_send(wmi, skb,
3074				  WMI_SET_INIT_COUNTRY_CMDID);
3075
3076out:
3077	if (ret) {
3078		ath12k_warn(ar->ab,
3079			    "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3080			    ret);
3081		dev_kfree_skb(skb);
3082	}
3083
3084	return ret;
3085}
3086
3087int
3088ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3089{
3090	struct ath12k_wmi_pdev *wmi = ar->wmi;
3091	struct ath12k_base *ab = wmi->wmi_ab->ab;
3092	struct wmi_twt_enable_params_cmd *cmd;
3093	struct sk_buff *skb;
3094	int ret, len;
3095
3096	len = sizeof(*cmd);
3097
3098	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3099	if (!skb)
3100		return -ENOMEM;
3101
3102	cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3103	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3104						 len);
3105	cmd->pdev_id = cpu_to_le32(pdev_id);
3106	cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3107	cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3108	cmd->congestion_thresh_setup =
3109		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3110	cmd->congestion_thresh_teardown =
3111		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3112	cmd->congestion_thresh_critical =
3113		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3114	cmd->interference_thresh_teardown =
3115		cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3116	cmd->interference_thresh_setup =
3117		cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3118	cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3119	cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3120	cmd->no_of_bcast_mcast_slots =
3121		cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3122	cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3123	cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3124	cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3125	cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3126	cmd->remove_sta_slot_interval =
3127		cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3128	/* TODO add MBSSID support */
3129	cmd->mbss_support = 0;
3130
3131	ret = ath12k_wmi_cmd_send(wmi, skb,
3132				  WMI_TWT_ENABLE_CMDID);
3133	if (ret) {
3134		ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3135		dev_kfree_skb(skb);
3136	}
3137	return ret;
3138}
3139
3140int
3141ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3142{
3143	struct ath12k_wmi_pdev *wmi = ar->wmi;
3144	struct ath12k_base *ab = wmi->wmi_ab->ab;
3145	struct wmi_twt_disable_params_cmd *cmd;
3146	struct sk_buff *skb;
3147	int ret, len;
3148
3149	len = sizeof(*cmd);
3150
3151	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3152	if (!skb)
3153		return -ENOMEM;
3154
3155	cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3156	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3157						 len);
3158	cmd->pdev_id = cpu_to_le32(pdev_id);
3159
3160	ret = ath12k_wmi_cmd_send(wmi, skb,
3161				  WMI_TWT_DISABLE_CMDID);
3162	if (ret) {
3163		ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3164		dev_kfree_skb(skb);
3165	}
3166	return ret;
3167}
3168
3169int
3170ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3171			     struct ieee80211_he_obss_pd *he_obss_pd)
3172{
3173	struct ath12k_wmi_pdev *wmi = ar->wmi;
3174	struct ath12k_base *ab = wmi->wmi_ab->ab;
3175	struct wmi_obss_spatial_reuse_params_cmd *cmd;
3176	struct sk_buff *skb;
3177	int ret, len;
3178
3179	len = sizeof(*cmd);
3180
3181	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3182	if (!skb)
3183		return -ENOMEM;
3184
3185	cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3186	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3187						 len);
3188	cmd->vdev_id = cpu_to_le32(vdev_id);
3189	cmd->enable = cpu_to_le32(he_obss_pd->enable);
3190	cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3191	cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3192
3193	ret = ath12k_wmi_cmd_send(wmi, skb,
3194				  WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3195	if (ret) {
3196		ath12k_warn(ab,
3197			    "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3198		dev_kfree_skb(skb);
3199	}
3200	return ret;
3201}
3202
3203int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3204				  u8 bss_color, u32 period,
3205				  bool enable)
3206{
3207	struct ath12k_wmi_pdev *wmi = ar->wmi;
3208	struct ath12k_base *ab = wmi->wmi_ab->ab;
3209	struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3210	struct sk_buff *skb;
3211	int ret, len;
3212
3213	len = sizeof(*cmd);
3214
3215	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3216	if (!skb)
3217		return -ENOMEM;
3218
3219	cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3220	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3221						 len);
3222	cmd->vdev_id = cpu_to_le32(vdev_id);
3223	cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3224		cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3225	cmd->current_bss_color = cpu_to_le32(bss_color);
3226	cmd->detection_period_ms = cpu_to_le32(period);
3227	cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3228	cmd->free_slot_expiry_time_ms = 0;
3229	cmd->flags = 0;
3230
3231	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3232		   "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3233		   cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3234		   cmd->detection_period_ms, cmd->scan_period_ms);
3235
3236	ret = ath12k_wmi_cmd_send(wmi, skb,
3237				  WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3238	if (ret) {
3239		ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3240		dev_kfree_skb(skb);
3241	}
3242	return ret;
3243}
3244
3245int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3246						bool enable)
3247{
3248	struct ath12k_wmi_pdev *wmi = ar->wmi;
3249	struct ath12k_base *ab = wmi->wmi_ab->ab;
3250	struct wmi_bss_color_change_enable_params_cmd *cmd;
3251	struct sk_buff *skb;
3252	int ret, len;
3253
3254	len = sizeof(*cmd);
3255
3256	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3257	if (!skb)
3258		return -ENOMEM;
3259
3260	cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3261	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3262						 len);
3263	cmd->vdev_id = cpu_to_le32(vdev_id);
3264	cmd->enable = enable ? cpu_to_le32(1) : 0;
3265
3266	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3267		   "wmi_send_bss_color_change_enable id %d enable %d\n",
3268		   cmd->vdev_id, cmd->enable);
3269
3270	ret = ath12k_wmi_cmd_send(wmi, skb,
3271				  WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3272	if (ret) {
3273		ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3274		dev_kfree_skb(skb);
3275	}
3276	return ret;
3277}
3278
3279int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3280				   struct sk_buff *tmpl)
3281{
3282	struct wmi_tlv *tlv;
3283	struct sk_buff *skb;
3284	void *ptr;
3285	int ret, len;
3286	size_t aligned_len;
3287	struct wmi_fils_discovery_tmpl_cmd *cmd;
3288
3289	aligned_len = roundup(tmpl->len, 4);
3290	len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3291
3292	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3293		   "WMI vdev %i set FILS discovery template\n", vdev_id);
3294
3295	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3296	if (!skb)
3297		return -ENOMEM;
3298
3299	cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3300	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3301						 sizeof(*cmd));
3302	cmd->vdev_id = cpu_to_le32(vdev_id);
3303	cmd->buf_len = cpu_to_le32(tmpl->len);
3304	ptr = skb->data + sizeof(*cmd);
3305
3306	tlv = ptr;
3307	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3308	memcpy(tlv->value, tmpl->data, tmpl->len);
3309
3310	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3311	if (ret) {
3312		ath12k_warn(ar->ab,
3313			    "WMI vdev %i failed to send FILS discovery template command\n",
3314			    vdev_id);
3315		dev_kfree_skb(skb);
3316	}
3317	return ret;
3318}
3319
3320int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3321			       struct sk_buff *tmpl)
3322{
3323	struct wmi_probe_tmpl_cmd *cmd;
3324	struct ath12k_wmi_bcn_prb_info_params *probe_info;
3325	struct wmi_tlv *tlv;
3326	struct sk_buff *skb;
3327	void *ptr;
3328	int ret, len;
3329	size_t aligned_len = roundup(tmpl->len, 4);
3330
3331	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3332		   "WMI vdev %i set probe response template\n", vdev_id);
3333
3334	len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3335
3336	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3337	if (!skb)
3338		return -ENOMEM;
3339
3340	cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3341	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3342						 sizeof(*cmd));
3343	cmd->vdev_id = cpu_to_le32(vdev_id);
3344	cmd->buf_len = cpu_to_le32(tmpl->len);
3345
3346	ptr = skb->data + sizeof(*cmd);
3347
3348	probe_info = ptr;
3349	len = sizeof(*probe_info);
3350	probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3351							len);
3352	probe_info->caps = 0;
3353	probe_info->erp = 0;
3354
3355	ptr += sizeof(*probe_info);
3356
3357	tlv = ptr;
3358	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3359	memcpy(tlv->value, tmpl->data, tmpl->len);
3360
3361	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3362	if (ret) {
3363		ath12k_warn(ar->ab,
3364			    "WMI vdev %i failed to send probe response template command\n",
3365			    vdev_id);
3366		dev_kfree_skb(skb);
3367	}
3368	return ret;
3369}
3370
3371int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3372			      bool unsol_bcast_probe_resp_enabled)
3373{
3374	struct sk_buff *skb;
3375	int ret, len;
3376	struct wmi_fils_discovery_cmd *cmd;
3377
3378	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3379		   "WMI vdev %i set %s interval to %u TU\n",
3380		   vdev_id, unsol_bcast_probe_resp_enabled ?
3381		   "unsolicited broadcast probe response" : "FILS discovery",
3382		   interval);
3383
3384	len = sizeof(*cmd);
3385	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3386	if (!skb)
3387		return -ENOMEM;
3388
3389	cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3390	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3391						 len);
3392	cmd->vdev_id = cpu_to_le32(vdev_id);
3393	cmd->interval = cpu_to_le32(interval);
3394	cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3395
3396	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3397	if (ret) {
3398		ath12k_warn(ar->ab,
3399			    "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3400			    vdev_id);
3401		dev_kfree_skb(skb);
3402	}
3403	return ret;
3404}
3405
3406static void
3407ath12k_fill_band_to_mac_param(struct ath12k_base  *soc,
3408			      struct ath12k_wmi_pdev_band_arg *arg)
3409{
3410	u8 i;
3411	struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3412	struct ath12k_pdev *pdev;
3413
3414	for (i = 0; i < soc->num_radios; i++) {
3415		pdev = &soc->pdevs[i];
3416		hal_reg_cap = &soc->hal_reg_cap[i];
3417		arg[i].pdev_id = pdev->pdev_id;
3418
3419		switch (pdev->cap.supported_bands) {
3420		case WMI_HOST_WLAN_2G_5G_CAP:
3421			arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3422			arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3423			break;
3424		case WMI_HOST_WLAN_2G_CAP:
3425			arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3426			arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3427			break;
3428		case WMI_HOST_WLAN_5G_CAP:
3429			arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3430			arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3431			break;
3432		default:
3433			break;
3434		}
3435	}
3436}
3437
3438static void
3439ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg,
3440				struct ath12k_wmi_resource_config_arg *tg_cfg)
3441{
3442	wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3443	wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3444	wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3445	wmi_cfg->num_offload_reorder_buffs =
3446		cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3447	wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3448	wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3449	wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3450	wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3451	wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3452	wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3453	wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3454	wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3455	wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3456	wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3457	wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3458	wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3459	wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3460	wmi_cfg->roam_offload_max_ap_profiles =
3461		cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3462	wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3463	wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3464	wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3465	wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3466	wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3467	wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3468	wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3469	wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3470		cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3471	wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3472	wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3473	wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3474	wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3475	wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3476	wmi_cfg->num_tdls_conn_table_entries =
3477		cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3478	wmi_cfg->beacon_tx_offload_max_vdev =
3479		cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3480	wmi_cfg->num_multicast_filter_entries =
3481		cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3482	wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3483	wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3484	wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3485	wmi_cfg->max_tdls_concurrent_sleep_sta =
3486		cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3487	wmi_cfg->max_tdls_concurrent_buffer_sta =
3488		cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3489	wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3490	wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3491	wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3492	wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3493	wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3494	wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3495	wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3496	wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
3497				     WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64);
3498	wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
3499	wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
3500	wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
3501	wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
3502	wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
3503					   WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
3504	wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
3505				WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
3506	wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
3507	wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
3508	wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET);
3509}
3510
3511static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
3512				struct ath12k_wmi_init_cmd_arg *arg)
3513{
3514	struct ath12k_base *ab = wmi->wmi_ab->ab;
3515	struct sk_buff *skb;
3516	struct wmi_init_cmd *cmd;
3517	struct ath12k_wmi_resource_config_params *cfg;
3518	struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
3519	struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
3520	struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
3521	struct wmi_tlv *tlv;
3522	size_t ret, len;
3523	void *ptr;
3524	u32 hw_mode_len = 0;
3525	u16 idx;
3526
3527	if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
3528		hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
3529			      (arg->num_band_to_mac * sizeof(*band_to_mac));
3530
3531	len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
3532	      (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
3533
3534	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3535	if (!skb)
3536		return -ENOMEM;
3537
3538	cmd = (struct wmi_init_cmd *)skb->data;
3539
3540	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
3541						 sizeof(*cmd));
3542
3543	ptr = skb->data + sizeof(*cmd);
3544	cfg = ptr;
3545
3546	ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg);
3547
3548	cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
3549						 sizeof(*cfg));
3550
3551	ptr += sizeof(*cfg);
3552	host_mem_chunks = ptr + TLV_HDR_SIZE;
3553	len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
3554
3555	for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
3556		host_mem_chunks[idx].tlv_header =
3557			ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
3558					   len);
3559
3560		host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
3561		host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
3562		host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
3563
3564		ath12k_dbg(ab, ATH12K_DBG_WMI,
3565			   "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
3566			   arg->mem_chunks[idx].req_id,
3567			   (u64)arg->mem_chunks[idx].paddr,
3568			   arg->mem_chunks[idx].len);
3569	}
3570	cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
3571	len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
3572
3573	/* num_mem_chunks is zero */
3574	tlv = ptr;
3575	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3576	ptr += TLV_HDR_SIZE + len;
3577
3578	if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
3579		hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
3580		hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3581							     sizeof(*hw_mode));
3582
3583		hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
3584		hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
3585
3586		ptr += sizeof(*hw_mode);
3587
3588		len = arg->num_band_to_mac * sizeof(*band_to_mac);
3589		tlv = ptr;
3590		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3591
3592		ptr += TLV_HDR_SIZE;
3593		len = sizeof(*band_to_mac);
3594
3595		for (idx = 0; idx < arg->num_band_to_mac; idx++) {
3596			band_to_mac = (void *)ptr;
3597
3598			band_to_mac->tlv_header =
3599				ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
3600						       len);
3601			band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
3602			band_to_mac->start_freq =
3603				cpu_to_le32(arg->band_to_mac[idx].start_freq);
3604			band_to_mac->end_freq =
3605				cpu_to_le32(arg->band_to_mac[idx].end_freq);
3606			ptr += sizeof(*band_to_mac);
3607		}
3608	}
3609
3610	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
3611	if (ret) {
3612		ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
3613		dev_kfree_skb(skb);
3614	}
3615
3616	return ret;
3617}
3618
3619int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
3620			    int pdev_id)
3621{
3622	struct ath12k_wmi_pdev_lro_config_cmd *cmd;
3623	struct sk_buff *skb;
3624	int ret;
3625
3626	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3627	if (!skb)
3628		return -ENOMEM;
3629
3630	cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
3631	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
3632						 sizeof(*cmd));
3633
3634	get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
3635	get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
3636
3637	cmd->pdev_id = cpu_to_le32(pdev_id);
3638
3639	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3640		   "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
3641
3642	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
3643	if (ret) {
3644		ath12k_warn(ar->ab,
3645			    "failed to send lro cfg req wmi cmd\n");
3646		goto err;
3647	}
3648
3649	return 0;
3650err:
3651	dev_kfree_skb(skb);
3652	return ret;
3653}
3654
3655int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
3656{
3657	unsigned long time_left;
3658
3659	time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
3660						WMI_SERVICE_READY_TIMEOUT_HZ);
3661	if (!time_left)
3662		return -ETIMEDOUT;
3663
3664	return 0;
3665}
3666
3667int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
3668{
3669	unsigned long time_left;
3670
3671	time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
3672						WMI_SERVICE_READY_TIMEOUT_HZ);
3673	if (!time_left)
3674		return -ETIMEDOUT;
3675
3676	return 0;
3677}
3678
3679int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
3680			   enum wmi_host_hw_mode_config_type mode)
3681{
3682	struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
3683	struct sk_buff *skb;
3684	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3685	int len;
3686	int ret;
3687
3688	len = sizeof(*cmd);
3689
3690	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3691	if (!skb)
3692		return -ENOMEM;
3693
3694	cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
3695
3696	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3697						 sizeof(*cmd));
3698
3699	cmd->pdev_id = WMI_PDEV_ID_SOC;
3700	cmd->hw_mode_index = cpu_to_le32(mode);
3701
3702	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
3703	if (ret) {
3704		ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
3705		dev_kfree_skb(skb);
3706	}
3707
3708	return ret;
3709}
3710
3711int ath12k_wmi_cmd_init(struct ath12k_base *ab)
3712{
3713	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3714	struct ath12k_wmi_init_cmd_arg arg = {};
3715
3716	if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
3717		     ab->wmi_ab.svc_map))
3718		arg.res_cfg.is_reg_cc_ext_event_supported = true;
3719
3720	ab->hw_params->wmi_init(ab, &arg.res_cfg);
3721	ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
3722
3723	arg.num_mem_chunks = wmi_ab->num_mem_chunks;
3724	arg.hw_mode_id = wmi_ab->preferred_hw_mode;
3725	arg.mem_chunks = wmi_ab->mem_chunks;
3726
3727	if (ab->hw_params->single_pdev_only)
3728		arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
3729
3730	arg.num_band_to_mac = ab->num_radios;
3731	ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
3732
3733	ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
3734
3735	return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
3736}
3737
3738int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
3739				  struct ath12k_wmi_vdev_spectral_conf_arg *arg)
3740{
3741	struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
3742	struct sk_buff *skb;
3743	int ret;
3744
3745	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3746	if (!skb)
3747		return -ENOMEM;
3748
3749	cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
3750	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
3751						 sizeof(*cmd));
3752	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3753	cmd->scan_count = cpu_to_le32(arg->scan_count);
3754	cmd->scan_period = cpu_to_le32(arg->scan_period);
3755	cmd->scan_priority = cpu_to_le32(arg->scan_priority);
3756	cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
3757	cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
3758	cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
3759	cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
3760	cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
3761	cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
3762	cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
3763	cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
3764	cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
3765	cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
3766	cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
3767	cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
3768	cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
3769	cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
3770	cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
3771
3772	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3773		   "WMI spectral scan config cmd vdev_id 0x%x\n",
3774		   arg->vdev_id);
3775
3776	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3777				  WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
3778	if (ret) {
3779		ath12k_warn(ar->ab,
3780			    "failed to send spectral scan config wmi cmd\n");
3781		goto err;
3782	}
3783
3784	return 0;
3785err:
3786	dev_kfree_skb(skb);
3787	return ret;
3788}
3789
3790int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
3791				    u32 trigger, u32 enable)
3792{
3793	struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
3794	struct sk_buff *skb;
3795	int ret;
3796
3797	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3798	if (!skb)
3799		return -ENOMEM;
3800
3801	cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
3802	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
3803						 sizeof(*cmd));
3804
3805	cmd->vdev_id = cpu_to_le32(vdev_id);
3806	cmd->trigger_cmd = cpu_to_le32(trigger);
3807	cmd->enable_cmd = cpu_to_le32(enable);
3808
3809	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3810		   "WMI spectral enable cmd vdev id 0x%x\n",
3811		   vdev_id);
3812
3813	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3814				  WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
3815	if (ret) {
3816		ath12k_warn(ar->ab,
3817			    "failed to send spectral enable wmi cmd\n");
3818		goto err;
3819	}
3820
3821	return 0;
3822err:
3823	dev_kfree_skb(skb);
3824	return ret;
3825}
3826
3827int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
3828				 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
3829{
3830	struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
3831	struct sk_buff *skb;
3832	int ret;
3833
3834	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3835	if (!skb)
3836		return -ENOMEM;
3837
3838	cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
3839	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
3840						 sizeof(*cmd));
3841
3842	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
3843	cmd->module_id = cpu_to_le32(arg->module_id);
3844	cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
3845	cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
3846	cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
3847	cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
3848	cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
3849	cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
3850	cmd->num_elems = cpu_to_le32(arg->num_elems);
3851	cmd->buf_size = cpu_to_le32(arg->buf_size);
3852	cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
3853	cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
3854
3855	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3856		   "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
3857		   arg->pdev_id);
3858
3859	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3860				  WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
3861	if (ret) {
3862		ath12k_warn(ar->ab,
3863			    "failed to send dma ring cfg req wmi cmd\n");
3864		goto err;
3865	}
3866
3867	return 0;
3868err:
3869	dev_kfree_skb(skb);
3870	return ret;
3871}
3872
3873static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
3874					  u16 tag, u16 len,
3875					  const void *ptr, void *data)
3876{
3877	struct ath12k_wmi_dma_buf_release_arg *arg = data;
3878
3879	if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
3880		return -EPROTO;
3881
3882	if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
3883		return -ENOBUFS;
3884
3885	arg->num_buf_entry++;
3886	return 0;
3887}
3888
3889static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
3890					 u16 tag, u16 len,
3891					 const void *ptr, void *data)
3892{
3893	struct ath12k_wmi_dma_buf_release_arg *arg = data;
3894
3895	if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
3896		return -EPROTO;
3897
3898	if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
3899		return -ENOBUFS;
3900
3901	arg->num_meta++;
3902
3903	return 0;
3904}
3905
3906static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
3907				    u16 tag, u16 len,
3908				    const void *ptr, void *data)
3909{
3910	struct ath12k_wmi_dma_buf_release_arg *arg = data;
3911	const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
3912	u32 pdev_id;
3913	int ret;
3914
3915	switch (tag) {
3916	case WMI_TAG_DMA_BUF_RELEASE:
3917		fixed = ptr;
3918		arg->fixed = *fixed;
3919		pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
3920		arg->fixed.pdev_id = cpu_to_le32(pdev_id);
3921		break;
3922	case WMI_TAG_ARRAY_STRUCT:
3923		if (!arg->buf_entry_done) {
3924			arg->num_buf_entry = 0;
3925			arg->buf_entry = ptr;
3926
3927			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3928						  ath12k_wmi_dma_buf_entry_parse,
3929						  arg);
3930			if (ret) {
3931				ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
3932					    ret);
3933				return ret;
3934			}
3935
3936			arg->buf_entry_done = true;
3937		} else if (!arg->meta_data_done) {
3938			arg->num_meta = 0;
3939			arg->meta_data = ptr;
3940
3941			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3942						  ath12k_wmi_dma_buf_meta_parse,
3943						  arg);
3944			if (ret) {
3945				ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
3946					    ret);
3947				return ret;
3948			}
3949
3950			arg->meta_data_done = true;
3951		}
3952		break;
3953	default:
3954		break;
3955	}
3956	return 0;
3957}
3958
3959static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
3960						       struct sk_buff *skb)
3961{
3962	struct ath12k_wmi_dma_buf_release_arg arg = {};
3963	struct ath12k_dbring_buf_release_event param;
3964	int ret;
3965
3966	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
3967				  ath12k_wmi_dma_buf_parse,
3968				  &arg);
3969	if (ret) {
3970		ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
3971		return;
3972	}
3973
3974	param.fixed = arg.fixed;
3975	param.buf_entry = arg.buf_entry;
3976	param.num_buf_entry = arg.num_buf_entry;
3977	param.meta_data = arg.meta_data;
3978	param.num_meta = arg.num_meta;
3979
3980	ret = ath12k_dbring_buffer_release_event(ab, &param);
3981	if (ret) {
3982		ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
3983		return;
3984	}
3985}
3986
3987static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
3988					 u16 tag, u16 len,
3989					 const void *ptr, void *data)
3990{
3991	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3992	struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
3993	u32 phy_map = 0;
3994
3995	if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
3996		return -EPROTO;
3997
3998	if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
3999		return -ENOBUFS;
4000
4001	hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4002				   hw_mode_id);
4003	svc_rdy_ext->n_hw_mode_caps++;
4004
4005	phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4006	svc_rdy_ext->tot_phy_id += fls(phy_map);
4007
4008	return 0;
4009}
4010
4011static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4012				   u16 len, const void *ptr, void *data)
4013{
4014	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4015	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4016	enum wmi_host_hw_mode_config_type mode, pref;
4017	u32 i;
4018	int ret;
4019
4020	svc_rdy_ext->n_hw_mode_caps = 0;
4021	svc_rdy_ext->hw_mode_caps = ptr;
4022
4023	ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4024				  ath12k_wmi_hw_mode_caps_parse,
4025				  svc_rdy_ext);
4026	if (ret) {
4027		ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4028		return ret;
4029	}
4030
4031	for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4032		hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4033		mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4034
4035		if (mode >= WMI_HOST_HW_MODE_MAX)
4036			continue;
4037
4038		pref = soc->wmi_ab.preferred_hw_mode;
4039
4040		if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
4041			svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4042			soc->wmi_ab.preferred_hw_mode = mode;
4043		}
4044	}
4045
4046	ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n",
4047		   soc->wmi_ab.preferred_hw_mode);
4048	if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4049		return -EINVAL;
4050
4051	return 0;
4052}
4053
4054static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4055					 u16 tag, u16 len,
4056					 const void *ptr, void *data)
4057{
4058	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4059
4060	if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4061		return -EPROTO;
4062
4063	if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4064		return -ENOBUFS;
4065
4066	len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4067	if (!svc_rdy_ext->n_mac_phy_caps) {
4068		svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
4069						    GFP_ATOMIC);
4070		if (!svc_rdy_ext->mac_phy_caps)
4071			return -ENOMEM;
4072	}
4073
4074	memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4075	svc_rdy_ext->n_mac_phy_caps++;
4076	return 0;
4077}
4078
4079static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4080					     u16 tag, u16 len,
4081					     const void *ptr, void *data)
4082{
4083	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4084
4085	if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4086		return -EPROTO;
4087
4088	if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4089		return -ENOBUFS;
4090
4091	svc_rdy_ext->n_ext_hal_reg_caps++;
4092	return 0;
4093}
4094
4095static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4096				       u16 len, const void *ptr, void *data)
4097{
4098	struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4099	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4100	struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4101	int ret;
4102	u32 i;
4103
4104	svc_rdy_ext->n_ext_hal_reg_caps = 0;
4105	svc_rdy_ext->ext_hal_reg_caps = ptr;
4106	ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4107				  ath12k_wmi_ext_hal_reg_caps_parse,
4108				  svc_rdy_ext);
4109	if (ret) {
4110		ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4111		return ret;
4112	}
4113
4114	for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4115		ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4116						      svc_rdy_ext->soc_hal_reg_caps,
4117						      svc_rdy_ext->ext_hal_reg_caps, i,
4118						      &reg_cap);
4119		if (ret) {
4120			ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4121			return ret;
4122		}
4123
4124		if (reg_cap.phy_id >= MAX_RADIOS) {
4125			ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4126			return -EINVAL;
4127		}
4128
4129		soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4130	}
4131	return 0;
4132}
4133
4134static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4135						 u16 len, const void *ptr,
4136						 void *data)
4137{
4138	struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4139	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4140	u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4141	u32 phy_id_map;
4142	int pdev_index = 0;
4143	int ret;
4144
4145	svc_rdy_ext->soc_hal_reg_caps = ptr;
4146	svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4147
4148	soc->num_radios = 0;
4149	phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4150	soc->fw_pdev_count = 0;
4151
4152	while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4153		ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4154							    svc_rdy_ext,
4155							    hw_mode_id, soc->num_radios,
4156							    &soc->pdevs[pdev_index]);
4157		if (ret) {
4158			ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4159				    soc->num_radios);
4160			return ret;
4161		}
4162
4163		soc->num_radios++;
4164
4165		/* For single_pdev_only targets,
4166		 * save mac_phy capability in the same pdev
4167		 */
4168		if (soc->hw_params->single_pdev_only)
4169			pdev_index = 0;
4170		else
4171			pdev_index = soc->num_radios;
4172
4173		/* TODO: mac_phy_cap prints */
4174		phy_id_map >>= 1;
4175	}
4176
4177	if (soc->hw_params->single_pdev_only) {
4178		soc->num_radios = 1;
4179		soc->pdevs[0].pdev_id = 0;
4180	}
4181
4182	return 0;
4183}
4184
4185static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4186					  u16 tag, u16 len,
4187					  const void *ptr, void *data)
4188{
4189	struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4190
4191	if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4192		return -EPROTO;
4193
4194	parse->n_dma_ring_caps++;
4195	return 0;
4196}
4197
4198static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4199					u32 num_cap)
4200{
4201	size_t sz;
4202	void *ptr;
4203
4204	sz = num_cap * sizeof(struct ath12k_dbring_cap);
4205	ptr = kzalloc(sz, GFP_ATOMIC);
4206	if (!ptr)
4207		return -ENOMEM;
4208
4209	ab->db_caps = ptr;
4210	ab->num_db_cap = num_cap;
4211
4212	return 0;
4213}
4214
4215static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4216{
4217	kfree(ab->db_caps);
4218	ab->db_caps = NULL;
4219	ab->num_db_cap = 0;
4220}
4221
4222static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4223				    u16 len, const void *ptr, void *data)
4224{
4225	struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4226	struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4227	struct ath12k_dbring_cap *dir_buff_caps;
4228	int ret;
4229	u32 i;
4230
4231	dma_caps_parse->n_dma_ring_caps = 0;
4232	dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4233	ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4234				  ath12k_wmi_dma_ring_caps_parse,
4235				  dma_caps_parse);
4236	if (ret) {
4237		ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
4238		return ret;
4239	}
4240
4241	if (!dma_caps_parse->n_dma_ring_caps)
4242		return 0;
4243
4244	if (ab->num_db_cap) {
4245		ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4246		return 0;
4247	}
4248
4249	ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4250	if (ret)
4251		return ret;
4252
4253	dir_buff_caps = ab->db_caps;
4254	for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4255		if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4256			ath12k_warn(ab, "Invalid module id %d\n",
4257				    le32_to_cpu(dma_caps[i].module_id));
4258			ret = -EINVAL;
4259			goto free_dir_buff;
4260		}
4261
4262		dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4263		dir_buff_caps[i].pdev_id =
4264			DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4265		dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4266		dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4267		dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4268	}
4269
4270	return 0;
4271
4272free_dir_buff:
4273	ath12k_wmi_free_dbring_caps(ab);
4274	return ret;
4275}
4276
4277static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4278					u16 tag, u16 len,
4279					const void *ptr, void *data)
4280{
4281	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4282	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4283	int ret;
4284
4285	switch (tag) {
4286	case WMI_TAG_SERVICE_READY_EXT_EVENT:
4287		ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4288						&svc_rdy_ext->arg);
4289		if (ret) {
4290			ath12k_warn(ab, "unable to extract ext params\n");
4291			return ret;
4292		}
4293		break;
4294
4295	case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4296		svc_rdy_ext->hw_caps = ptr;
4297		svc_rdy_ext->arg.num_hw_modes =
4298			le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4299		break;
4300
4301	case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4302		ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4303							    svc_rdy_ext);
4304		if (ret)
4305			return ret;
4306		break;
4307
4308	case WMI_TAG_ARRAY_STRUCT:
4309		if (!svc_rdy_ext->hw_mode_done) {
4310			ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4311			if (ret)
4312				return ret;
4313
4314			svc_rdy_ext->hw_mode_done = true;
4315		} else if (!svc_rdy_ext->mac_phy_done) {
4316			svc_rdy_ext->n_mac_phy_caps = 0;
4317			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4318						  ath12k_wmi_mac_phy_caps_parse,
4319						  svc_rdy_ext);
4320			if (ret) {
4321				ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4322				return ret;
4323			}
4324
4325			svc_rdy_ext->mac_phy_done = true;
4326		} else if (!svc_rdy_ext->ext_hal_reg_done) {
4327			ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4328			if (ret)
4329				return ret;
4330
4331			svc_rdy_ext->ext_hal_reg_done = true;
4332		} else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4333			svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4334		} else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4335			svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4336		} else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4337			svc_rdy_ext->oem_dma_ring_cap_done = true;
4338		} else if (!svc_rdy_ext->dma_ring_cap_done) {
4339			ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4340						       &svc_rdy_ext->dma_caps_parse);
4341			if (ret)
4342				return ret;
4343
4344			svc_rdy_ext->dma_ring_cap_done = true;
4345		}
4346		break;
4347
4348	default:
4349		break;
4350	}
4351	return 0;
4352}
4353
4354static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4355					  struct sk_buff *skb)
4356{
4357	struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4358	int ret;
4359
4360	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4361				  ath12k_wmi_svc_rdy_ext_parse,
4362				  &svc_rdy_ext);
4363	if (ret) {
4364		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4365		goto err;
4366	}
4367
4368	if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4369		complete(&ab->wmi_ab.service_ready);
4370
4371	kfree(svc_rdy_ext.mac_phy_caps);
4372	return 0;
4373
4374err:
4375	ath12k_wmi_free_dbring_caps(ab);
4376	return ret;
4377}
4378
4379static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4380				      const void *ptr,
4381				      struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4382{
4383	const struct wmi_service_ready_ext2_event *ev = ptr;
4384
4385	if (!ev)
4386		return -EINVAL;
4387
4388	arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4389	arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4390	arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4391	arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4392	arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4393	arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4394	arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4395	arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4396	return 0;
4397}
4398
4399static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4400				      const __le32 cap_mac_info[],
4401				      const __le32 cap_phy_info[],
4402				      const __le32 supp_mcs[],
4403				      const struct ath12k_wmi_ppe_threshold_params *ppet,
4404				       __le32 cap_info_internal)
4405{
4406	struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4407	u32 support_320mhz;
4408	u8 i;
4409
4410	if (band == NL80211_BAND_6GHZ)
4411		support_320mhz = cap_band->eht_cap_phy_info[0] &
4412					IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4413
4414	for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4415		cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4416
4417	for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4418		cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4419
4420	if (band == NL80211_BAND_6GHZ)
4421		cap_band->eht_cap_phy_info[0] |= support_320mhz;
4422
4423	cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4424	cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4425	if (band != NL80211_BAND_2GHZ) {
4426		cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
4427		cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
4428	}
4429
4430	cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
4431	cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
4432	for (i = 0; i < WMI_MAX_NUM_SS; i++)
4433		cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
4434			le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
4435
4436	cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
4437}
4438
4439static int
4440ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
4441				      const struct ath12k_wmi_caps_ext_params *caps,
4442				      struct ath12k_pdev *pdev)
4443{
4444	struct ath12k_band_cap *cap_band;
4445	u32 bands, support_320mhz;
4446	int i;
4447
4448	if (ab->hw_params->single_pdev_only) {
4449		if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
4450			support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
4451				IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4452			cap_band = &pdev->cap.band[NL80211_BAND_6GHZ];
4453			cap_band->eht_cap_phy_info[0] |= support_320mhz;
4454			return 0;
4455		}
4456
4457		for (i = 0; i < ab->fw_pdev_count; i++) {
4458			struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
4459
4460			if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
4461			    fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
4462				bands = fw_pdev->supported_bands;
4463				break;
4464			}
4465		}
4466
4467		if (i == ab->fw_pdev_count)
4468			return -EINVAL;
4469	} else {
4470		bands = pdev->cap.supported_bands;
4471	}
4472
4473	if (bands & WMI_HOST_WLAN_2G_CAP) {
4474		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
4475					  caps->eht_cap_mac_info_2ghz,
4476					  caps->eht_cap_phy_info_2ghz,
4477					  caps->eht_supp_mcs_ext_2ghz,
4478					  &caps->eht_ppet_2ghz,
4479					  caps->eht_cap_info_internal);
4480	}
4481
4482	if (bands & WMI_HOST_WLAN_5G_CAP) {
4483		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
4484					  caps->eht_cap_mac_info_5ghz,
4485					  caps->eht_cap_phy_info_5ghz,
4486					  caps->eht_supp_mcs_ext_5ghz,
4487					  &caps->eht_ppet_5ghz,
4488					  caps->eht_cap_info_internal);
4489
4490		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
4491					  caps->eht_cap_mac_info_5ghz,
4492					  caps->eht_cap_phy_info_5ghz,
4493					  caps->eht_supp_mcs_ext_5ghz,
4494					  &caps->eht_ppet_5ghz,
4495					  caps->eht_cap_info_internal);
4496	}
4497
4498	return 0;
4499}
4500
4501static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
4502					   u16 len, const void *ptr,
4503					   void *data)
4504{
4505	const struct ath12k_wmi_caps_ext_params *caps = ptr;
4506	int i = 0, ret;
4507
4508	if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
4509		return -EPROTO;
4510
4511	if (ab->hw_params->single_pdev_only) {
4512		if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) &&
4513		    caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE)
4514			return 0;
4515	} else {
4516		for (i = 0; i < ab->num_radios; i++) {
4517			if (ab->pdevs[i].pdev_id ==
4518			    ath12k_wmi_caps_ext_get_pdev_id(caps))
4519				break;
4520		}
4521
4522		if (i == ab->num_radios)
4523			return -EINVAL;
4524	}
4525
4526	ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
4527	if (ret) {
4528		ath12k_warn(ab,
4529			    "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
4530			    ret, ab->pdevs[i].pdev_id);
4531		return ret;
4532	}
4533
4534	return 0;
4535}
4536
4537static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
4538					 u16 tag, u16 len,
4539					 const void *ptr, void *data)
4540{
4541	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4542	struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
4543	int ret;
4544
4545	switch (tag) {
4546	case WMI_TAG_SERVICE_READY_EXT2_EVENT:
4547		ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
4548						 &parse->arg);
4549		if (ret) {
4550			ath12k_warn(ab,
4551				    "failed to extract wmi service ready ext2 parameters: %d\n",
4552				    ret);
4553			return ret;
4554		}
4555		break;
4556
4557	case WMI_TAG_ARRAY_STRUCT:
4558		if (!parse->dma_ring_cap_done) {
4559			ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4560						       &parse->dma_caps_parse);
4561			if (ret)
4562				return ret;
4563
4564			parse->dma_ring_cap_done = true;
4565		} else if (!parse->spectral_bin_scaling_done) {
4566			/* TODO: This is a place-holder as WMI tag for
4567			 * spectral scaling is before
4568			 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
4569			 */
4570			parse->spectral_bin_scaling_done = true;
4571		} else if (!parse->mac_phy_caps_ext_done) {
4572			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4573						  ath12k_wmi_tlv_mac_phy_caps_ext,
4574						  parse);
4575			if (ret) {
4576				ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
4577					    ret);
4578				return ret;
4579			}
4580
4581			parse->mac_phy_caps_ext_done = true;
4582		}
4583		break;
4584	default:
4585		break;
4586	}
4587
4588	return 0;
4589}
4590
4591static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
4592					   struct sk_buff *skb)
4593{
4594	struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
4595	int ret;
4596
4597	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4598				  ath12k_wmi_svc_rdy_ext2_parse,
4599				  &svc_rdy_ext2);
4600	if (ret) {
4601		ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
4602		goto err;
4603	}
4604
4605	complete(&ab->wmi_ab.service_ready);
4606
4607	return 0;
4608
4609err:
4610	ath12k_wmi_free_dbring_caps(ab);
4611	return ret;
4612}
4613
4614static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
4615					   struct wmi_vdev_start_resp_event *vdev_rsp)
4616{
4617	const void **tb;
4618	const struct wmi_vdev_start_resp_event *ev;
4619	int ret;
4620
4621	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
4622	if (IS_ERR(tb)) {
4623		ret = PTR_ERR(tb);
4624		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4625		return ret;
4626	}
4627
4628	ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
4629	if (!ev) {
4630		ath12k_warn(ab, "failed to fetch vdev start resp ev");
4631		kfree(tb);
4632		return -EPROTO;
4633	}
4634
4635	*vdev_rsp = *ev;
4636
4637	kfree(tb);
4638	return 0;
4639}
4640
4641static struct ath12k_reg_rule
4642*create_ext_reg_rules_from_wmi(u32 num_reg_rules,
4643			       struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
4644{
4645	struct ath12k_reg_rule *reg_rule_ptr;
4646	u32 count;
4647
4648	reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
4649			       GFP_ATOMIC);
4650
4651	if (!reg_rule_ptr)
4652		return NULL;
4653
4654	for (count = 0; count < num_reg_rules; count++) {
4655		reg_rule_ptr[count].start_freq =
4656			le32_get_bits(wmi_reg_rule[count].freq_info,
4657				      REG_RULE_START_FREQ);
4658		reg_rule_ptr[count].end_freq =
4659			le32_get_bits(wmi_reg_rule[count].freq_info,
4660				      REG_RULE_END_FREQ);
4661		reg_rule_ptr[count].max_bw =
4662			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4663				      REG_RULE_MAX_BW);
4664		reg_rule_ptr[count].reg_power =
4665			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4666				      REG_RULE_REG_PWR);
4667		reg_rule_ptr[count].ant_gain =
4668			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4669				      REG_RULE_ANT_GAIN);
4670		reg_rule_ptr[count].flags =
4671			le32_get_bits(wmi_reg_rule[count].flag_info,
4672				      REG_RULE_FLAGS);
4673		reg_rule_ptr[count].psd_flag =
4674			le32_get_bits(wmi_reg_rule[count].psd_power_info,
4675				      REG_RULE_PSD_INFO);
4676		reg_rule_ptr[count].psd_eirp =
4677			le32_get_bits(wmi_reg_rule[count].psd_power_info,
4678				      REG_RULE_PSD_EIRP);
4679	}
4680
4681	return reg_rule_ptr;
4682}
4683
4684static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
4685					    u32 num_reg_rules)
4686{
4687	u8 num_invalid_5ghz_rules = 0;
4688	u32 count, start_freq;
4689
4690	for (count = 0; count < num_reg_rules; count++) {
4691		start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
4692
4693		if (start_freq >= ATH12K_MIN_6G_FREQ)
4694			num_invalid_5ghz_rules++;
4695	}
4696
4697	return num_invalid_5ghz_rules;
4698}
4699
4700static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
4701						   struct sk_buff *skb,
4702						   struct ath12k_reg_info *reg_info)
4703{
4704	const void **tb;
4705	const struct wmi_reg_chan_list_cc_ext_event *ev;
4706	struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
4707	u32 num_2g_reg_rules, num_5g_reg_rules;
4708	u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4709	u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4710	u8 num_invalid_5ghz_ext_rules;
4711	u32 total_reg_rules = 0;
4712	int ret, i, j;
4713
4714	ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
4715
4716	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
4717	if (IS_ERR(tb)) {
4718		ret = PTR_ERR(tb);
4719		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4720		return ret;
4721	}
4722
4723	ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
4724	if (!ev) {
4725		ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
4726		kfree(tb);
4727		return -EPROTO;
4728	}
4729
4730	reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
4731	reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
4732	reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
4733		le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
4734	reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
4735		le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
4736	reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
4737		le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
4738
4739	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4740		reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4741			le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
4742		reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4743			le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
4744		reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4745			le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
4746	}
4747
4748	num_2g_reg_rules = reg_info->num_2g_reg_rules;
4749	total_reg_rules += num_2g_reg_rules;
4750	num_5g_reg_rules = reg_info->num_5g_reg_rules;
4751	total_reg_rules += num_5g_reg_rules;
4752
4753	if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
4754		ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
4755			    num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
4756		kfree(tb);
4757		return -EINVAL;
4758	}
4759
4760	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4761		num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
4762
4763		if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) {
4764			ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
4765				    i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES);
4766			kfree(tb);
4767			return -EINVAL;
4768		}
4769
4770		total_reg_rules += num_6g_reg_rules_ap[i];
4771	}
4772
4773	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4774		num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4775				reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4776		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4777
4778		num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4779				reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4780		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4781
4782		num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4783				reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4784		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4785
4786		if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES ||
4787		    num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES ||
4788		    num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] >  MAX_6G_REG_RULES) {
4789			ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
4790				    i);
4791			kfree(tb);
4792			return -EINVAL;
4793		}
4794	}
4795
4796	if (!total_reg_rules) {
4797		ath12k_warn(ab, "No reg rules available\n");
4798		kfree(tb);
4799		return -EINVAL;
4800	}
4801
4802	memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
4803
4804	reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
4805	reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
4806	reg_info->num_phy = le32_to_cpu(ev->num_phy);
4807	reg_info->phy_id = le32_to_cpu(ev->phy_id);
4808	reg_info->ctry_code = le32_to_cpu(ev->country_id);
4809	reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
4810
4811	switch (le32_to_cpu(ev->status_code)) {
4812	case WMI_REG_SET_CC_STATUS_PASS:
4813		reg_info->status_code = REG_SET_CC_STATUS_PASS;
4814		break;
4815	case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4816		reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
4817		break;
4818	case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4819		reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
4820		break;
4821	case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4822		reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
4823		break;
4824	case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4825		reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
4826		break;
4827	case WMI_REG_SET_CC_STATUS_FAIL:
4828		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
4829		break;
4830	}
4831
4832	reg_info->is_ext_reg_event = true;
4833
4834	reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
4835	reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
4836	reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
4837	reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
4838	reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
4839	reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
4840	reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
4841	reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
4842	reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
4843	reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
4844
4845	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4846		reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
4847			le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
4848		reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
4849			le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
4850		reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
4851			le32_to_cpu(ev->min_bw_6g_client_sp[i]);
4852		reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
4853			le32_to_cpu(ev->max_bw_6g_client_sp[i]);
4854		reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
4855			le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
4856		reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
4857			le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
4858	}
4859
4860	ath12k_dbg(ab, ATH12K_DBG_WMI,
4861		   "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
4862		   __func__, reg_info->alpha2, reg_info->dfs_region,
4863		   reg_info->min_bw_2g, reg_info->max_bw_2g,
4864		   reg_info->min_bw_5g, reg_info->max_bw_5g,
4865		   reg_info->phybitmap);
4866
4867	ath12k_dbg(ab, ATH12K_DBG_WMI,
4868		   "num_2g_reg_rules %d num_5g_reg_rules %d",
4869		   num_2g_reg_rules, num_5g_reg_rules);
4870
4871	ath12k_dbg(ab, ATH12K_DBG_WMI,
4872		   "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
4873		   num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
4874		   num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
4875		   num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
4876
4877	ath12k_dbg(ab, ATH12K_DBG_WMI,
4878		   "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
4879		   num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
4880		   num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
4881		   num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
4882
4883	ath12k_dbg(ab, ATH12K_DBG_WMI,
4884		   "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
4885		   num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
4886		   num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
4887		   num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
4888
4889	ext_wmi_reg_rule =
4890		(struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
4891			+ sizeof(*ev)
4892			+ sizeof(struct wmi_tlv));
4893
4894	if (num_2g_reg_rules) {
4895		reg_info->reg_rules_2g_ptr =
4896			create_ext_reg_rules_from_wmi(num_2g_reg_rules,
4897						      ext_wmi_reg_rule);
4898
4899		if (!reg_info->reg_rules_2g_ptr) {
4900			kfree(tb);
4901			ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
4902			return -ENOMEM;
4903		}
4904	}
4905
4906	ext_wmi_reg_rule += num_2g_reg_rules;
4907
4908	/* Firmware might include 6 GHz reg rule in 5 GHz rule list
4909	 * for few countries along with separate 6 GHz rule.
4910	 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
4911	 * causes intersect check to be true, and same rules will be
4912	 * shown multiple times in iw cmd.
4913	 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
4914	 */
4915	num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
4916								       num_5g_reg_rules);
4917
4918	if (num_invalid_5ghz_ext_rules) {
4919		ath12k_dbg(ab, ATH12K_DBG_WMI,
4920			   "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
4921			   reg_info->alpha2, reg_info->num_5g_reg_rules,
4922			   num_invalid_5ghz_ext_rules);
4923
4924		num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
4925		reg_info->num_5g_reg_rules = num_5g_reg_rules;
4926	}
4927
4928	if (num_5g_reg_rules) {
4929		reg_info->reg_rules_5g_ptr =
4930			create_ext_reg_rules_from_wmi(num_5g_reg_rules,
4931						      ext_wmi_reg_rule);
4932
4933		if (!reg_info->reg_rules_5g_ptr) {
4934			kfree(tb);
4935			ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
4936			return -ENOMEM;
4937		}
4938	}
4939
4940	/* We have adjusted the number of 5 GHz reg rules above. But still those
4941	 * many rules needs to be adjusted in ext_wmi_reg_rule.
4942	 *
4943	 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
4944	 */
4945	ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
4946
4947	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4948		reg_info->reg_rules_6g_ap_ptr[i] =
4949			create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
4950						      ext_wmi_reg_rule);
4951
4952		if (!reg_info->reg_rules_6g_ap_ptr[i]) {
4953			kfree(tb);
4954			ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
4955			return -ENOMEM;
4956		}
4957
4958		ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
4959	}
4960
4961	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
4962		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4963			reg_info->reg_rules_6g_client_ptr[j][i] =
4964				create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
4965							      ext_wmi_reg_rule);
4966
4967			if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
4968				kfree(tb);
4969				ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
4970				return -ENOMEM;
4971			}
4972
4973			ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
4974		}
4975	}
4976
4977	reg_info->client_type = le32_to_cpu(ev->client_type);
4978	reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
4979	reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
4980	reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
4981		le32_to_cpu(ev->domain_code_6g_ap_lpi);
4982	reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
4983		le32_to_cpu(ev->domain_code_6g_ap_sp);
4984	reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
4985		le32_to_cpu(ev->domain_code_6g_ap_vlp);
4986
4987	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4988		reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
4989			le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
4990		reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
4991			le32_to_cpu(ev->domain_code_6g_client_sp[i]);
4992		reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
4993			le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
4994	}
4995
4996	reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
4997
4998	ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
4999		   reg_info->client_type, reg_info->domain_code_6g_super_id);
5000
5001	ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
5002
5003	kfree(tb);
5004	return 0;
5005}
5006
5007static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
5008					struct wmi_peer_delete_resp_event *peer_del_resp)
5009{
5010	const void **tb;
5011	const struct wmi_peer_delete_resp_event *ev;
5012	int ret;
5013
5014	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5015	if (IS_ERR(tb)) {
5016		ret = PTR_ERR(tb);
5017		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5018		return ret;
5019	}
5020
5021	ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
5022	if (!ev) {
5023		ath12k_warn(ab, "failed to fetch peer delete resp ev");
5024		kfree(tb);
5025		return -EPROTO;
5026	}
5027
5028	memset(peer_del_resp, 0, sizeof(*peer_del_resp));
5029
5030	peer_del_resp->vdev_id = ev->vdev_id;
5031	ether_addr_copy(peer_del_resp->peer_macaddr.addr,
5032			ev->peer_macaddr.addr);
5033
5034	kfree(tb);
5035	return 0;
5036}
5037
5038static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
5039					struct sk_buff *skb,
5040					u32 *vdev_id)
5041{
5042	const void **tb;
5043	const struct wmi_vdev_delete_resp_event *ev;
5044	int ret;
5045
5046	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5047	if (IS_ERR(tb)) {
5048		ret = PTR_ERR(tb);
5049		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5050		return ret;
5051	}
5052
5053	ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
5054	if (!ev) {
5055		ath12k_warn(ab, "failed to fetch vdev delete resp ev");
5056		kfree(tb);
5057		return -EPROTO;
5058	}
5059
5060	*vdev_id = le32_to_cpu(ev->vdev_id);
5061
5062	kfree(tb);
5063	return 0;
5064}
5065
5066static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
5067					struct sk_buff *skb,
5068					u32 *vdev_id, u32 *tx_status)
5069{
5070	const void **tb;
5071	const struct wmi_bcn_tx_status_event *ev;
5072	int ret;
5073
5074	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5075	if (IS_ERR(tb)) {
5076		ret = PTR_ERR(tb);
5077		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5078		return ret;
5079	}
5080
5081	ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
5082	if (!ev) {
5083		ath12k_warn(ab, "failed to fetch bcn tx status ev");
5084		kfree(tb);
5085		return -EPROTO;
5086	}
5087
5088	*vdev_id = le32_to_cpu(ev->vdev_id);
5089	*tx_status = le32_to_cpu(ev->tx_status);
5090
5091	kfree(tb);
5092	return 0;
5093}
5094
5095static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5096					      u32 *vdev_id)
5097{
5098	const void **tb;
5099	const struct wmi_vdev_stopped_event *ev;
5100	int ret;
5101
5102	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5103	if (IS_ERR(tb)) {
5104		ret = PTR_ERR(tb);
5105		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5106		return ret;
5107	}
5108
5109	ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
5110	if (!ev) {
5111		ath12k_warn(ab, "failed to fetch vdev stop ev");
5112		kfree(tb);
5113		return -EPROTO;
5114	}
5115
5116	*vdev_id = le32_to_cpu(ev->vdev_id);
5117
5118	kfree(tb);
5119	return 0;
5120}
5121
5122static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
5123					u16 tag, u16 len,
5124					const void *ptr, void *data)
5125{
5126	struct wmi_tlv_mgmt_rx_parse *parse = data;
5127
5128	switch (tag) {
5129	case WMI_TAG_MGMT_RX_HDR:
5130		parse->fixed = ptr;
5131		break;
5132	case WMI_TAG_ARRAY_BYTE:
5133		if (!parse->frame_buf_done) {
5134			parse->frame_buf = ptr;
5135			parse->frame_buf_done = true;
5136		}
5137		break;
5138	}
5139	return 0;
5140}
5141
5142static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
5143					  struct sk_buff *skb,
5144					  struct ath12k_wmi_mgmt_rx_arg *hdr)
5145{
5146	struct wmi_tlv_mgmt_rx_parse parse = { };
5147	const struct ath12k_wmi_mgmt_rx_params *ev;
5148	const u8 *frame;
5149	int i, ret;
5150
5151	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5152				  ath12k_wmi_tlv_mgmt_rx_parse,
5153				  &parse);
5154	if (ret) {
5155		ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
5156		return ret;
5157	}
5158
5159	ev = parse.fixed;
5160	frame = parse.frame_buf;
5161
5162	if (!ev || !frame) {
5163		ath12k_warn(ab, "failed to fetch mgmt rx hdr");
5164		return -EPROTO;
5165	}
5166
5167	hdr->pdev_id = le32_to_cpu(ev->pdev_id);
5168	hdr->chan_freq = le32_to_cpu(ev->chan_freq);
5169	hdr->channel = le32_to_cpu(ev->channel);
5170	hdr->snr = le32_to_cpu(ev->snr);
5171	hdr->rate = le32_to_cpu(ev->rate);
5172	hdr->phy_mode = le32_to_cpu(ev->phy_mode);
5173	hdr->buf_len = le32_to_cpu(ev->buf_len);
5174	hdr->status = le32_to_cpu(ev->status);
5175	hdr->flags = le32_to_cpu(ev->flags);
5176	hdr->rssi = a_sle32_to_cpu(ev->rssi);
5177	hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
5178
5179	for (i = 0; i < ATH_MAX_ANTENNA; i++)
5180		hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
5181
5182	if (skb->len < (frame - skb->data) + hdr->buf_len) {
5183		ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
5184		return -EPROTO;
5185	}
5186
5187	/* shift the sk_buff to point to `frame` */
5188	skb_trim(skb, 0);
5189	skb_put(skb, frame - skb->data);
5190	skb_pull(skb, frame - skb->data);
5191	skb_put(skb, hdr->buf_len);
5192
5193	return 0;
5194}
5195
5196static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
5197				    u32 status)
5198{
5199	struct sk_buff *msdu;
5200	struct ieee80211_tx_info *info;
5201	struct ath12k_skb_cb *skb_cb;
5202	int num_mgmt;
5203
5204	spin_lock_bh(&ar->txmgmt_idr_lock);
5205	msdu = idr_find(&ar->txmgmt_idr, desc_id);
5206
5207	if (!msdu) {
5208		ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
5209			    desc_id);
5210		spin_unlock_bh(&ar->txmgmt_idr_lock);
5211		return -ENOENT;
5212	}
5213
5214	idr_remove(&ar->txmgmt_idr, desc_id);
5215	spin_unlock_bh(&ar->txmgmt_idr_lock);
5216
5217	skb_cb = ATH12K_SKB_CB(msdu);
5218	dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
5219
5220	info = IEEE80211_SKB_CB(msdu);
5221	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
5222		info->flags |= IEEE80211_TX_STAT_ACK;
5223
5224	ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
5225
5226	num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
5227
5228	/* WARN when we received this event without doing any mgmt tx */
5229	if (num_mgmt < 0)
5230		WARN_ON_ONCE(1);
5231
5232	if (!num_mgmt)
5233		wake_up(&ar->txmgmt_empty_waitq);
5234
5235	return 0;
5236}
5237
5238static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
5239					       struct sk_buff *skb,
5240					       struct wmi_mgmt_tx_compl_event *param)
5241{
5242	const void **tb;
5243	const struct wmi_mgmt_tx_compl_event *ev;
5244	int ret;
5245
5246	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5247	if (IS_ERR(tb)) {
5248		ret = PTR_ERR(tb);
5249		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5250		return ret;
5251	}
5252
5253	ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
5254	if (!ev) {
5255		ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
5256		kfree(tb);
5257		return -EPROTO;
5258	}
5259
5260	param->pdev_id = ev->pdev_id;
5261	param->desc_id = ev->desc_id;
5262	param->status = ev->status;
5263
5264	kfree(tb);
5265	return 0;
5266}
5267
5268static void ath12k_wmi_event_scan_started(struct ath12k *ar)
5269{
5270	lockdep_assert_held(&ar->data_lock);
5271
5272	switch (ar->scan.state) {
5273	case ATH12K_SCAN_IDLE:
5274	case ATH12K_SCAN_RUNNING:
5275	case ATH12K_SCAN_ABORTING:
5276		ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
5277			    ath12k_scan_state_str(ar->scan.state),
5278			    ar->scan.state);
5279		break;
5280	case ATH12K_SCAN_STARTING:
5281		ar->scan.state = ATH12K_SCAN_RUNNING;
5282
5283		if (ar->scan.is_roc)
5284			ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
5285
5286		complete(&ar->scan.started);
5287		break;
5288	}
5289}
5290
5291static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
5292{
5293	lockdep_assert_held(&ar->data_lock);
5294
5295	switch (ar->scan.state) {
5296	case ATH12K_SCAN_IDLE:
5297	case ATH12K_SCAN_RUNNING:
5298	case ATH12K_SCAN_ABORTING:
5299		ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
5300			    ath12k_scan_state_str(ar->scan.state),
5301			    ar->scan.state);
5302		break;
5303	case ATH12K_SCAN_STARTING:
5304		complete(&ar->scan.started);
5305		__ath12k_mac_scan_finish(ar);
5306		break;
5307	}
5308}
5309
5310static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
5311{
5312	lockdep_assert_held(&ar->data_lock);
5313
5314	switch (ar->scan.state) {
5315	case ATH12K_SCAN_IDLE:
5316	case ATH12K_SCAN_STARTING:
5317		/* One suspected reason scan can be completed while starting is
5318		 * if firmware fails to deliver all scan events to the host,
5319		 * e.g. when transport pipe is full. This has been observed
5320		 * with spectral scan phyerr events starving wmi transport
5321		 * pipe. In such case the "scan completed" event should be (and
5322		 * is) ignored by the host as it may be just firmware's scan
5323		 * state machine recovering.
5324		 */
5325		ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
5326			    ath12k_scan_state_str(ar->scan.state),
5327			    ar->scan.state);
5328		break;
5329	case ATH12K_SCAN_RUNNING:
5330	case ATH12K_SCAN_ABORTING:
5331		__ath12k_mac_scan_finish(ar);
5332		break;
5333	}
5334}
5335
5336static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
5337{
5338	lockdep_assert_held(&ar->data_lock);
5339
5340	switch (ar->scan.state) {
5341	case ATH12K_SCAN_IDLE:
5342	case ATH12K_SCAN_STARTING:
5343		ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5344			    ath12k_scan_state_str(ar->scan.state),
5345			    ar->scan.state);
5346		break;
5347	case ATH12K_SCAN_RUNNING:
5348	case ATH12K_SCAN_ABORTING:
5349		ar->scan_channel = NULL;
5350		break;
5351	}
5352}
5353
5354static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
5355{
5356	struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
5357
5358	lockdep_assert_held(&ar->data_lock);
5359
5360	switch (ar->scan.state) {
5361	case ATH12K_SCAN_IDLE:
5362	case ATH12K_SCAN_STARTING:
5363		ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5364			    ath12k_scan_state_str(ar->scan.state),
5365			    ar->scan.state);
5366		break;
5367	case ATH12K_SCAN_RUNNING:
5368	case ATH12K_SCAN_ABORTING:
5369		ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
5370
5371		if (ar->scan.is_roc && ar->scan.roc_freq == freq)
5372			complete(&ar->scan.on_channel);
5373
5374		break;
5375	}
5376}
5377
5378static const char *
5379ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
5380			       enum wmi_scan_completion_reason reason)
5381{
5382	switch (type) {
5383	case WMI_SCAN_EVENT_STARTED:
5384		return "started";
5385	case WMI_SCAN_EVENT_COMPLETED:
5386		switch (reason) {
5387		case WMI_SCAN_REASON_COMPLETED:
5388			return "completed";
5389		case WMI_SCAN_REASON_CANCELLED:
5390			return "completed [cancelled]";
5391		case WMI_SCAN_REASON_PREEMPTED:
5392			return "completed [preempted]";
5393		case WMI_SCAN_REASON_TIMEDOUT:
5394			return "completed [timedout]";
5395		case WMI_SCAN_REASON_INTERNAL_FAILURE:
5396			return "completed [internal err]";
5397		case WMI_SCAN_REASON_MAX:
5398			break;
5399		}
5400		return "completed [unknown]";
5401	case WMI_SCAN_EVENT_BSS_CHANNEL:
5402		return "bss channel";
5403	case WMI_SCAN_EVENT_FOREIGN_CHAN:
5404		return "foreign channel";
5405	case WMI_SCAN_EVENT_DEQUEUED:
5406		return "dequeued";
5407	case WMI_SCAN_EVENT_PREEMPTED:
5408		return "preempted";
5409	case WMI_SCAN_EVENT_START_FAILED:
5410		return "start failed";
5411	case WMI_SCAN_EVENT_RESTARTED:
5412		return "restarted";
5413	case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
5414		return "foreign channel exit";
5415	default:
5416		return "unknown";
5417	}
5418}
5419
5420static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
5421			       struct wmi_scan_event *scan_evt_param)
5422{
5423	const void **tb;
5424	const struct wmi_scan_event *ev;
5425	int ret;
5426
5427	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5428	if (IS_ERR(tb)) {
5429		ret = PTR_ERR(tb);
5430		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5431		return ret;
5432	}
5433
5434	ev = tb[WMI_TAG_SCAN_EVENT];
5435	if (!ev) {
5436		ath12k_warn(ab, "failed to fetch scan ev");
5437		kfree(tb);
5438		return -EPROTO;
5439	}
5440
5441	scan_evt_param->event_type = ev->event_type;
5442	scan_evt_param->reason = ev->reason;
5443	scan_evt_param->channel_freq = ev->channel_freq;
5444	scan_evt_param->scan_req_id = ev->scan_req_id;
5445	scan_evt_param->scan_id = ev->scan_id;
5446	scan_evt_param->vdev_id = ev->vdev_id;
5447	scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
5448
5449	kfree(tb);
5450	return 0;
5451}
5452
5453static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
5454					   struct wmi_peer_sta_kickout_arg *arg)
5455{
5456	const void **tb;
5457	const struct wmi_peer_sta_kickout_event *ev;
5458	int ret;
5459
5460	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5461	if (IS_ERR(tb)) {
5462		ret = PTR_ERR(tb);
5463		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5464		return ret;
5465	}
5466
5467	ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
5468	if (!ev) {
5469		ath12k_warn(ab, "failed to fetch peer sta kickout ev");
5470		kfree(tb);
5471		return -EPROTO;
5472	}
5473
5474	arg->mac_addr = ev->peer_macaddr.addr;
5475
5476	kfree(tb);
5477	return 0;
5478}
5479
5480static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
5481			       struct wmi_roam_event *roam_ev)
5482{
5483	const void **tb;
5484	const struct wmi_roam_event *ev;
5485	int ret;
5486
5487	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5488	if (IS_ERR(tb)) {
5489		ret = PTR_ERR(tb);
5490		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5491		return ret;
5492	}
5493
5494	ev = tb[WMI_TAG_ROAM_EVENT];
5495	if (!ev) {
5496		ath12k_warn(ab, "failed to fetch roam ev");
5497		kfree(tb);
5498		return -EPROTO;
5499	}
5500
5501	roam_ev->vdev_id = ev->vdev_id;
5502	roam_ev->reason = ev->reason;
5503	roam_ev->rssi = ev->rssi;
5504
5505	kfree(tb);
5506	return 0;
5507}
5508
5509static int freq_to_idx(struct ath12k *ar, int freq)
5510{
5511	struct ieee80211_supported_band *sband;
5512	struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
5513	int band, ch, idx = 0;
5514
5515	for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
5516		if (!ar->mac.sbands[band].channels)
5517			continue;
5518
5519		sband = hw->wiphy->bands[band];
5520		if (!sband)
5521			continue;
5522
5523		for (ch = 0; ch < sband->n_channels; ch++, idx++)
5524			if (sband->channels[ch].center_freq == freq)
5525				goto exit;
5526	}
5527
5528exit:
5529	return idx;
5530}
5531
5532static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
5533				    struct wmi_chan_info_event *ch_info_ev)
5534{
5535	const void **tb;
5536	const struct wmi_chan_info_event *ev;
5537	int ret;
5538
5539	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5540	if (IS_ERR(tb)) {
5541		ret = PTR_ERR(tb);
5542		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5543		return ret;
5544	}
5545
5546	ev = tb[WMI_TAG_CHAN_INFO_EVENT];
5547	if (!ev) {
5548		ath12k_warn(ab, "failed to fetch chan info ev");
5549		kfree(tb);
5550		return -EPROTO;
5551	}
5552
5553	ch_info_ev->err_code = ev->err_code;
5554	ch_info_ev->freq = ev->freq;
5555	ch_info_ev->cmd_flags = ev->cmd_flags;
5556	ch_info_ev->noise_floor = ev->noise_floor;
5557	ch_info_ev->rx_clear_count = ev->rx_clear_count;
5558	ch_info_ev->cycle_count = ev->cycle_count;
5559	ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
5560	ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
5561	ch_info_ev->rx_frame_count = ev->rx_frame_count;
5562	ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
5563	ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
5564	ch_info_ev->vdev_id = ev->vdev_id;
5565
5566	kfree(tb);
5567	return 0;
5568}
5569
5570static int
5571ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
5572				  struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
5573{
5574	const void **tb;
5575	const struct wmi_pdev_bss_chan_info_event *ev;
5576	int ret;
5577
5578	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5579	if (IS_ERR(tb)) {
5580		ret = PTR_ERR(tb);
5581		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5582		return ret;
5583	}
5584
5585	ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
5586	if (!ev) {
5587		ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
5588		kfree(tb);
5589		return -EPROTO;
5590	}
5591
5592	bss_ch_info_ev->pdev_id = ev->pdev_id;
5593	bss_ch_info_ev->freq = ev->freq;
5594	bss_ch_info_ev->noise_floor = ev->noise_floor;
5595	bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
5596	bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
5597	bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
5598	bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
5599	bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
5600	bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
5601	bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
5602	bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
5603	bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
5604	bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
5605
5606	kfree(tb);
5607	return 0;
5608}
5609
5610static int
5611ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
5612				      struct wmi_vdev_install_key_complete_arg *arg)
5613{
5614	const void **tb;
5615	const struct wmi_vdev_install_key_compl_event *ev;
5616	int ret;
5617
5618	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5619	if (IS_ERR(tb)) {
5620		ret = PTR_ERR(tb);
5621		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5622		return ret;
5623	}
5624
5625	ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
5626	if (!ev) {
5627		ath12k_warn(ab, "failed to fetch vdev install key compl ev");
5628		kfree(tb);
5629		return -EPROTO;
5630	}
5631
5632	arg->vdev_id = le32_to_cpu(ev->vdev_id);
5633	arg->macaddr = ev->peer_macaddr.addr;
5634	arg->key_idx = le32_to_cpu(ev->key_idx);
5635	arg->key_flags = le32_to_cpu(ev->key_flags);
5636	arg->status = le32_to_cpu(ev->status);
5637
5638	kfree(tb);
5639	return 0;
5640}
5641
5642static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
5643					  struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
5644{
5645	const void **tb;
5646	const struct wmi_peer_assoc_conf_event *ev;
5647	int ret;
5648
5649	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5650	if (IS_ERR(tb)) {
5651		ret = PTR_ERR(tb);
5652		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5653		return ret;
5654	}
5655
5656	ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
5657	if (!ev) {
5658		ath12k_warn(ab, "failed to fetch peer assoc conf ev");
5659		kfree(tb);
5660		return -EPROTO;
5661	}
5662
5663	peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
5664	peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
5665
5666	kfree(tb);
5667	return 0;
5668}
5669
5670static int
5671ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb,
5672			 const struct wmi_pdev_temperature_event *ev)
5673{
5674	const void **tb;
5675	int ret;
5676
5677	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5678	if (IS_ERR(tb)) {
5679		ret = PTR_ERR(tb);
5680		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5681		return ret;
5682	}
5683
5684	ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
5685	if (!ev) {
5686		ath12k_warn(ab, "failed to fetch pdev temp ev");
5687		kfree(tb);
5688		return -EPROTO;
5689	}
5690
5691	kfree(tb);
5692	return 0;
5693}
5694
5695static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
5696{
5697	/* try to send pending beacons first. they take priority */
5698	wake_up(&ab->wmi_ab.tx_credits_wq);
5699}
5700
5701static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
5702				       struct sk_buff *skb)
5703{
5704	dev_kfree_skb(skb);
5705}
5706
5707static bool ath12k_reg_is_world_alpha(char *alpha)
5708{
5709	if (alpha[0] == '0' && alpha[1] == '0')
5710		return true;
5711
5712	if (alpha[0] == 'n' && alpha[1] == 'a')
5713		return true;
5714
5715	return false;
5716}
5717
5718static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
5719{
5720	struct ath12k_reg_info *reg_info = NULL;
5721	struct ieee80211_regdomain *regd = NULL;
5722	bool intersect = false;
5723	int ret = 0, pdev_idx, i, j;
5724	struct ath12k *ar;
5725
5726	reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
5727	if (!reg_info) {
5728		ret = -ENOMEM;
5729		goto fallback;
5730	}
5731
5732	ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
5733
5734	if (ret) {
5735		ath12k_warn(ab, "failed to extract regulatory info from received event\n");
5736		goto fallback;
5737	}
5738
5739	if (reg_info->status_code != REG_SET_CC_STATUS_PASS) {
5740		/* In case of failure to set the requested ctry,
5741		 * fw retains the current regd. We print a failure info
5742		 * and return from here.
5743		 */
5744		ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n");
5745		goto mem_free;
5746	}
5747
5748	pdev_idx = reg_info->phy_id;
5749
5750	if (pdev_idx >= ab->num_radios) {
5751		/* Process the event for phy0 only if single_pdev_only
5752		 * is true. If pdev_idx is valid but not 0, discard the
5753		 * event. Otherwise, it goes to fallback.
5754		 */
5755		if (ab->hw_params->single_pdev_only &&
5756		    pdev_idx < ab->hw_params->num_rxdma_per_pdev)
5757			goto mem_free;
5758		else
5759			goto fallback;
5760	}
5761
5762	/* Avoid multiple overwrites to default regd, during core
5763	 * stop-start after mac registration.
5764	 */
5765	if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] &&
5766	    !memcmp(ab->default_regd[pdev_idx]->alpha2,
5767		    reg_info->alpha2, 2))
5768		goto mem_free;
5769
5770	/* Intersect new rules with default regd if a new country setting was
5771	 * requested, i.e a default regd was already set during initialization
5772	 * and the regd coming from this event has a valid country info.
5773	 */
5774	if (ab->default_regd[pdev_idx] &&
5775	    !ath12k_reg_is_world_alpha((char *)
5776		ab->default_regd[pdev_idx]->alpha2) &&
5777	    !ath12k_reg_is_world_alpha((char *)reg_info->alpha2))
5778		intersect = true;
5779
5780	regd = ath12k_reg_build_regd(ab, reg_info, intersect);
5781	if (!regd) {
5782		ath12k_warn(ab, "failed to build regd from reg_info\n");
5783		goto fallback;
5784	}
5785
5786	spin_lock(&ab->base_lock);
5787	if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) {
5788		/* Once mac is registered, ar is valid and all CC events from
5789		 * fw is considered to be received due to user requests
5790		 * currently.
5791		 * Free previously built regd before assigning the newly
5792		 * generated regd to ar. NULL pointer handling will be
5793		 * taken care by kfree itself.
5794		 */
5795		ar = ab->pdevs[pdev_idx].ar;
5796		kfree(ab->new_regd[pdev_idx]);
5797		ab->new_regd[pdev_idx] = regd;
5798		queue_work(ab->workqueue, &ar->regd_update_work);
5799	} else {
5800		/* Multiple events for the same *ar is not expected. But we
5801		 * can still clear any previously stored default_regd if we
5802		 * are receiving this event for the same radio by mistake.
5803		 * NULL pointer handling will be taken care by kfree itself.
5804		 */
5805		kfree(ab->default_regd[pdev_idx]);
5806		/* This regd would be applied during mac registration */
5807		ab->default_regd[pdev_idx] = regd;
5808	}
5809	ab->dfs_region = reg_info->dfs_region;
5810	spin_unlock(&ab->base_lock);
5811
5812	goto mem_free;
5813
5814fallback:
5815	/* Fallback to older reg (by sending previous country setting
5816	 * again if fw has succeeded and we failed to process here.
5817	 * The Regdomain should be uniform across driver and fw. Since the
5818	 * FW has processed the command and sent a success status, we expect
5819	 * this function to succeed as well. If it doesn't, CTRY needs to be
5820	 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
5821	 */
5822	/* TODO: This is rare, but still should also be handled */
5823	WARN_ON(1);
5824mem_free:
5825	if (reg_info) {
5826		kfree(reg_info->reg_rules_2g_ptr);
5827		kfree(reg_info->reg_rules_5g_ptr);
5828		if (reg_info->is_ext_reg_event) {
5829			for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++)
5830				kfree(reg_info->reg_rules_6g_ap_ptr[i]);
5831
5832			for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++)
5833				for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++)
5834					kfree(reg_info->reg_rules_6g_client_ptr[j][i]);
5835		}
5836		kfree(reg_info);
5837	}
5838	return ret;
5839}
5840
5841static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
5842				const void *ptr, void *data)
5843{
5844	struct ath12k_wmi_rdy_parse *rdy_parse = data;
5845	struct wmi_ready_event fixed_param;
5846	struct ath12k_wmi_mac_addr_params *addr_list;
5847	struct ath12k_pdev *pdev;
5848	u32 num_mac_addr;
5849	int i;
5850
5851	switch (tag) {
5852	case WMI_TAG_READY_EVENT:
5853		memset(&fixed_param, 0, sizeof(fixed_param));
5854		memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
5855		       min_t(u16, sizeof(fixed_param), len));
5856		ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
5857		rdy_parse->num_extra_mac_addr =
5858			le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
5859
5860		ether_addr_copy(ab->mac_addr,
5861				fixed_param.ready_event_min.mac_addr.addr);
5862		ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
5863		ab->wmi_ready = true;
5864		break;
5865	case WMI_TAG_ARRAY_FIXED_STRUCT:
5866		addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
5867		num_mac_addr = rdy_parse->num_extra_mac_addr;
5868
5869		if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
5870			break;
5871
5872		for (i = 0; i < ab->num_radios; i++) {
5873			pdev = &ab->pdevs[i];
5874			ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
5875		}
5876		ab->pdevs_macaddr_valid = true;
5877		break;
5878	default:
5879		break;
5880	}
5881
5882	return 0;
5883}
5884
5885static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
5886{
5887	struct ath12k_wmi_rdy_parse rdy_parse = { };
5888	int ret;
5889
5890	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5891				  ath12k_wmi_rdy_parse, &rdy_parse);
5892	if (ret) {
5893		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5894		return ret;
5895	}
5896
5897	complete(&ab->wmi_ab.unified_ready);
5898	return 0;
5899}
5900
5901static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
5902{
5903	struct wmi_peer_delete_resp_event peer_del_resp;
5904	struct ath12k *ar;
5905
5906	if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
5907		ath12k_warn(ab, "failed to extract peer delete resp");
5908		return;
5909	}
5910
5911	rcu_read_lock();
5912	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
5913	if (!ar) {
5914		ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
5915			    peer_del_resp.vdev_id);
5916		rcu_read_unlock();
5917		return;
5918	}
5919
5920	complete(&ar->peer_delete_done);
5921	rcu_read_unlock();
5922	ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
5923		   peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
5924}
5925
5926static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
5927					  struct sk_buff *skb)
5928{
5929	struct ath12k *ar;
5930	u32 vdev_id = 0;
5931
5932	if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
5933		ath12k_warn(ab, "failed to extract vdev delete resp");
5934		return;
5935	}
5936
5937	rcu_read_lock();
5938	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
5939	if (!ar) {
5940		ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
5941			    vdev_id);
5942		rcu_read_unlock();
5943		return;
5944	}
5945
5946	complete(&ar->vdev_delete_done);
5947
5948	rcu_read_unlock();
5949
5950	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
5951		   vdev_id);
5952}
5953
5954static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
5955{
5956	switch (vdev_resp_status) {
5957	case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
5958		return "invalid vdev id";
5959	case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
5960		return "not supported";
5961	case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
5962		return "dfs violation";
5963	case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
5964		return "invalid regdomain";
5965	default:
5966		return "unknown";
5967	}
5968}
5969
5970static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
5971{
5972	struct wmi_vdev_start_resp_event vdev_start_resp;
5973	struct ath12k *ar;
5974	u32 status;
5975
5976	if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
5977		ath12k_warn(ab, "failed to extract vdev start resp");
5978		return;
5979	}
5980
5981	rcu_read_lock();
5982	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
5983	if (!ar) {
5984		ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
5985			    vdev_start_resp.vdev_id);
5986		rcu_read_unlock();
5987		return;
5988	}
5989
5990	ar->last_wmi_vdev_start_status = 0;
5991
5992	status = le32_to_cpu(vdev_start_resp.status);
5993
5994	if (WARN_ON_ONCE(status)) {
5995		ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
5996			    status, ath12k_wmi_vdev_resp_print(status));
5997		ar->last_wmi_vdev_start_status = status;
5998	}
5999
6000	complete(&ar->vdev_setup_done);
6001
6002	rcu_read_unlock();
6003
6004	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
6005		   vdev_start_resp.vdev_id);
6006}
6007
6008static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
6009{
6010	u32 vdev_id, tx_status;
6011
6012	if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
6013		ath12k_warn(ab, "failed to extract bcn tx status");
6014		return;
6015	}
6016}
6017
6018static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
6019{
6020	struct ath12k *ar;
6021	u32 vdev_id = 0;
6022
6023	if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
6024		ath12k_warn(ab, "failed to extract vdev stopped event");
6025		return;
6026	}
6027
6028	rcu_read_lock();
6029	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6030	if (!ar) {
6031		ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
6032			    vdev_id);
6033		rcu_read_unlock();
6034		return;
6035	}
6036
6037	complete(&ar->vdev_setup_done);
6038
6039	rcu_read_unlock();
6040
6041	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
6042}
6043
6044static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
6045{
6046	struct ath12k_wmi_mgmt_rx_arg rx_ev = {0};
6047	struct ath12k *ar;
6048	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
6049	struct ieee80211_hdr *hdr;
6050	u16 fc;
6051	struct ieee80211_supported_band *sband;
6052
6053	if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
6054		ath12k_warn(ab, "failed to extract mgmt rx event");
6055		dev_kfree_skb(skb);
6056		return;
6057	}
6058
6059	memset(status, 0, sizeof(*status));
6060
6061	ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
6062		   rx_ev.status);
6063
6064	rcu_read_lock();
6065	ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
6066
6067	if (!ar) {
6068		ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
6069			    rx_ev.pdev_id);
6070		dev_kfree_skb(skb);
6071		goto exit;
6072	}
6073
6074	if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) ||
6075	    (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
6076			     WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
6077			     WMI_RX_STATUS_ERR_CRC))) {
6078		dev_kfree_skb(skb);
6079		goto exit;
6080	}
6081
6082	if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
6083		status->flag |= RX_FLAG_MMIC_ERROR;
6084
6085	if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ &&
6086	    rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) {
6087		status->band = NL80211_BAND_6GHZ;
6088		status->freq = rx_ev.chan_freq;
6089	} else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
6090		status->band = NL80211_BAND_2GHZ;
6091	} else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) {
6092		status->band = NL80211_BAND_5GHZ;
6093	} else {
6094		/* Shouldn't happen unless list of advertised channels to
6095		 * mac80211 has been changed.
6096		 */
6097		WARN_ON_ONCE(1);
6098		dev_kfree_skb(skb);
6099		goto exit;
6100	}
6101
6102	if (rx_ev.phy_mode == MODE_11B &&
6103	    (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
6104		ath12k_dbg(ab, ATH12K_DBG_WMI,
6105			   "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
6106
6107	sband = &ar->mac.sbands[status->band];
6108
6109	if (status->band != NL80211_BAND_6GHZ)
6110		status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
6111							      status->band);
6112
6113	status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR;
6114	status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
6115
6116	hdr = (struct ieee80211_hdr *)skb->data;
6117	fc = le16_to_cpu(hdr->frame_control);
6118
6119	/* Firmware is guaranteed to report all essential management frames via
6120	 * WMI while it can deliver some extra via HTT. Since there can be
6121	 * duplicates split the reporting wrt monitor/sniffing.
6122	 */
6123	status->flag |= RX_FLAG_SKIP_MONITOR;
6124
6125	/* In case of PMF, FW delivers decrypted frames with Protected Bit set
6126	 * including group privacy action frames.
6127	 */
6128	if (ieee80211_has_protected(hdr->frame_control)) {
6129		status->flag |= RX_FLAG_DECRYPTED;
6130
6131		if (!ieee80211_is_robust_mgmt_frame(skb)) {
6132			status->flag |= RX_FLAG_IV_STRIPPED |
6133					RX_FLAG_MMIC_STRIPPED;
6134			hdr->frame_control = __cpu_to_le16(fc &
6135					     ~IEEE80211_FCTL_PROTECTED);
6136		}
6137	}
6138
6139	if (ieee80211_is_beacon(hdr->frame_control))
6140		ath12k_mac_handle_beacon(ar, skb);
6141
6142	ath12k_dbg(ab, ATH12K_DBG_MGMT,
6143		   "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
6144		   skb, skb->len,
6145		   fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
6146
6147	ath12k_dbg(ab, ATH12K_DBG_MGMT,
6148		   "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
6149		   status->freq, status->band, status->signal,
6150		   status->rate_idx);
6151
6152	ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
6153
6154exit:
6155	rcu_read_unlock();
6156}
6157
6158static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
6159{
6160	struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
6161	struct ath12k *ar;
6162
6163	if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
6164		ath12k_warn(ab, "failed to extract mgmt tx compl event");
6165		return;
6166	}
6167
6168	rcu_read_lock();
6169	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
6170	if (!ar) {
6171		ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
6172			    tx_compl_param.pdev_id);
6173		goto exit;
6174	}
6175
6176	wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
6177				 le32_to_cpu(tx_compl_param.status));
6178
6179	ath12k_dbg(ab, ATH12K_DBG_MGMT,
6180		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
6181		   tx_compl_param.pdev_id, tx_compl_param.desc_id,
6182		   tx_compl_param.status);
6183
6184exit:
6185	rcu_read_unlock();
6186}
6187
6188static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
6189						  u32 vdev_id,
6190						  enum ath12k_scan_state state)
6191{
6192	int i;
6193	struct ath12k_pdev *pdev;
6194	struct ath12k *ar;
6195
6196	for (i = 0; i < ab->num_radios; i++) {
6197		pdev = rcu_dereference(ab->pdevs_active[i]);
6198		if (pdev && pdev->ar) {
6199			ar = pdev->ar;
6200
6201			spin_lock_bh(&ar->data_lock);
6202			if (ar->scan.state == state &&
6203			    ar->scan.vdev_id == vdev_id) {
6204				spin_unlock_bh(&ar->data_lock);
6205				return ar;
6206			}
6207			spin_unlock_bh(&ar->data_lock);
6208		}
6209	}
6210	return NULL;
6211}
6212
6213static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
6214{
6215	struct ath12k *ar;
6216	struct wmi_scan_event scan_ev = {0};
6217
6218	if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
6219		ath12k_warn(ab, "failed to extract scan event");
6220		return;
6221	}
6222
6223	rcu_read_lock();
6224
6225	/* In case the scan was cancelled, ex. during interface teardown,
6226	 * the interface will not be found in active interfaces.
6227	 * Rather, in such scenarios, iterate over the active pdev's to
6228	 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
6229	 * aborting scan's vdev id matches this event info.
6230	 */
6231	if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
6232	    le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
6233		ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
6234						 ATH12K_SCAN_ABORTING);
6235		if (!ar)
6236			ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
6237							 ATH12K_SCAN_RUNNING);
6238	} else {
6239		ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
6240	}
6241
6242	if (!ar) {
6243		ath12k_warn(ab, "Received scan event for unknown vdev");
6244		rcu_read_unlock();
6245		return;
6246	}
6247
6248	spin_lock_bh(&ar->data_lock);
6249
6250	ath12k_dbg(ab, ATH12K_DBG_WMI,
6251		   "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
6252		   ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
6253						  le32_to_cpu(scan_ev.reason)),
6254		   le32_to_cpu(scan_ev.event_type),
6255		   le32_to_cpu(scan_ev.reason),
6256		   le32_to_cpu(scan_ev.channel_freq),
6257		   le32_to_cpu(scan_ev.scan_req_id),
6258		   le32_to_cpu(scan_ev.scan_id),
6259		   le32_to_cpu(scan_ev.vdev_id),
6260		   ath12k_scan_state_str(ar->scan.state), ar->scan.state);
6261
6262	switch (le32_to_cpu(scan_ev.event_type)) {
6263	case WMI_SCAN_EVENT_STARTED:
6264		ath12k_wmi_event_scan_started(ar);
6265		break;
6266	case WMI_SCAN_EVENT_COMPLETED:
6267		ath12k_wmi_event_scan_completed(ar);
6268		break;
6269	case WMI_SCAN_EVENT_BSS_CHANNEL:
6270		ath12k_wmi_event_scan_bss_chan(ar);
6271		break;
6272	case WMI_SCAN_EVENT_FOREIGN_CHAN:
6273		ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
6274		break;
6275	case WMI_SCAN_EVENT_START_FAILED:
6276		ath12k_warn(ab, "received scan start failure event\n");
6277		ath12k_wmi_event_scan_start_failed(ar);
6278		break;
6279	case WMI_SCAN_EVENT_DEQUEUED:
6280		__ath12k_mac_scan_finish(ar);
6281		break;
6282	case WMI_SCAN_EVENT_PREEMPTED:
6283	case WMI_SCAN_EVENT_RESTARTED:
6284	case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6285	default:
6286		break;
6287	}
6288
6289	spin_unlock_bh(&ar->data_lock);
6290
6291	rcu_read_unlock();
6292}
6293
6294static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
6295{
6296	struct wmi_peer_sta_kickout_arg arg = {};
6297	struct ieee80211_sta *sta;
6298	struct ath12k_peer *peer;
6299	struct ath12k *ar;
6300
6301	if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
6302		ath12k_warn(ab, "failed to extract peer sta kickout event");
6303		return;
6304	}
6305
6306	rcu_read_lock();
6307
6308	spin_lock_bh(&ab->base_lock);
6309
6310	peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
6311
6312	if (!peer) {
6313		ath12k_warn(ab, "peer not found %pM\n",
6314			    arg.mac_addr);
6315		goto exit;
6316	}
6317
6318	ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
6319	if (!ar) {
6320		ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
6321			    peer->vdev_id);
6322		goto exit;
6323	}
6324
6325	sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
6326					   arg.mac_addr, NULL);
6327	if (!sta) {
6328		ath12k_warn(ab, "Spurious quick kickout for STA %pM\n",
6329			    arg.mac_addr);
6330		goto exit;
6331	}
6332
6333	ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM",
6334		   arg.mac_addr);
6335
6336	ieee80211_report_low_ack(sta, 10);
6337
6338exit:
6339	spin_unlock_bh(&ab->base_lock);
6340	rcu_read_unlock();
6341}
6342
6343static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
6344{
6345	struct wmi_roam_event roam_ev = {};
6346	struct ath12k *ar;
6347	u32 vdev_id;
6348	u8 roam_reason;
6349
6350	if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
6351		ath12k_warn(ab, "failed to extract roam event");
6352		return;
6353	}
6354
6355	vdev_id = le32_to_cpu(roam_ev.vdev_id);
6356	roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
6357				   WMI_ROAM_REASON_MASK);
6358
6359	ath12k_dbg(ab, ATH12K_DBG_WMI,
6360		   "wmi roam event vdev %u reason %d rssi %d\n",
6361		   vdev_id, roam_reason, roam_ev.rssi);
6362
6363	rcu_read_lock();
6364	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6365	if (!ar) {
6366		ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
6367		rcu_read_unlock();
6368		return;
6369	}
6370
6371	if (roam_reason >= WMI_ROAM_REASON_MAX)
6372		ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
6373			    roam_reason, vdev_id);
6374
6375	switch (roam_reason) {
6376	case WMI_ROAM_REASON_BEACON_MISS:
6377		ath12k_mac_handle_beacon_miss(ar, vdev_id);
6378		break;
6379	case WMI_ROAM_REASON_BETTER_AP:
6380	case WMI_ROAM_REASON_LOW_RSSI:
6381	case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
6382	case WMI_ROAM_REASON_HO_FAILED:
6383		ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
6384			    roam_reason, vdev_id);
6385		break;
6386	}
6387
6388	rcu_read_unlock();
6389}
6390
6391static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6392{
6393	struct wmi_chan_info_event ch_info_ev = {0};
6394	struct ath12k *ar;
6395	struct survey_info *survey;
6396	int idx;
6397	/* HW channel counters frequency value in hertz */
6398	u32 cc_freq_hz = ab->cc_freq_hz;
6399
6400	if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
6401		ath12k_warn(ab, "failed to extract chan info event");
6402		return;
6403	}
6404
6405	ath12k_dbg(ab, ATH12K_DBG_WMI,
6406		   "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
6407		   ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
6408		   ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
6409		   ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
6410		   ch_info_ev.mac_clk_mhz);
6411
6412	if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
6413		ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
6414		return;
6415	}
6416
6417	rcu_read_lock();
6418	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
6419	if (!ar) {
6420		ath12k_warn(ab, "invalid vdev id in chan info ev %d",
6421			    ch_info_ev.vdev_id);
6422		rcu_read_unlock();
6423		return;
6424	}
6425	spin_lock_bh(&ar->data_lock);
6426
6427	switch (ar->scan.state) {
6428	case ATH12K_SCAN_IDLE:
6429	case ATH12K_SCAN_STARTING:
6430		ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
6431		goto exit;
6432	case ATH12K_SCAN_RUNNING:
6433	case ATH12K_SCAN_ABORTING:
6434		break;
6435	}
6436
6437	idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
6438	if (idx >= ARRAY_SIZE(ar->survey)) {
6439		ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
6440			    ch_info_ev.freq, idx);
6441		goto exit;
6442	}
6443
6444	/* If FW provides MAC clock frequency in Mhz, overriding the initialized
6445	 * HW channel counters frequency value
6446	 */
6447	if (ch_info_ev.mac_clk_mhz)
6448		cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
6449
6450	if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
6451		survey = &ar->survey[idx];
6452		memset(survey, 0, sizeof(*survey));
6453		survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
6454		survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
6455				 SURVEY_INFO_TIME_BUSY;
6456		survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
6457		survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
6458					    cc_freq_hz);
6459	}
6460exit:
6461	spin_unlock_bh(&ar->data_lock);
6462	rcu_read_unlock();
6463}
6464
6465static void
6466ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6467{
6468	struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
6469	struct survey_info *survey;
6470	struct ath12k *ar;
6471	u32 cc_freq_hz = ab->cc_freq_hz;
6472	u64 busy, total, tx, rx, rx_bss;
6473	int idx;
6474
6475	if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
6476		ath12k_warn(ab, "failed to extract pdev bss chan info event");
6477		return;
6478	}
6479
6480	busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
6481		le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
6482
6483	total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
6484		le32_to_cpu(bss_ch_info_ev.cycle_count_low);
6485
6486	tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
6487		le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
6488
6489	rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
6490		le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
6491
6492	rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
6493		le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
6494
6495	ath12k_dbg(ab, ATH12K_DBG_WMI,
6496		   "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
6497		   bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
6498		   bss_ch_info_ev.noise_floor, busy, total,
6499		   tx, rx, rx_bss);
6500
6501	rcu_read_lock();
6502	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
6503
6504	if (!ar) {
6505		ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
6506			    bss_ch_info_ev.pdev_id);
6507		rcu_read_unlock();
6508		return;
6509	}
6510
6511	spin_lock_bh(&ar->data_lock);
6512	idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
6513	if (idx >= ARRAY_SIZE(ar->survey)) {
6514		ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
6515			    bss_ch_info_ev.freq, idx);
6516		goto exit;
6517	}
6518
6519	survey = &ar->survey[idx];
6520
6521	survey->noise     = le32_to_cpu(bss_ch_info_ev.noise_floor);
6522	survey->time      = div_u64(total, cc_freq_hz);
6523	survey->time_busy = div_u64(busy, cc_freq_hz);
6524	survey->time_rx   = div_u64(rx_bss, cc_freq_hz);
6525	survey->time_tx   = div_u64(tx, cc_freq_hz);
6526	survey->filled   |= (SURVEY_INFO_NOISE_DBM |
6527			     SURVEY_INFO_TIME |
6528			     SURVEY_INFO_TIME_BUSY |
6529			     SURVEY_INFO_TIME_RX |
6530			     SURVEY_INFO_TIME_TX);
6531exit:
6532	spin_unlock_bh(&ar->data_lock);
6533	complete(&ar->bss_survey_done);
6534
6535	rcu_read_unlock();
6536}
6537
6538static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
6539						struct sk_buff *skb)
6540{
6541	struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
6542	struct ath12k *ar;
6543
6544	if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
6545		ath12k_warn(ab, "failed to extract install key compl event");
6546		return;
6547	}
6548
6549	ath12k_dbg(ab, ATH12K_DBG_WMI,
6550		   "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
6551		   install_key_compl.key_idx, install_key_compl.key_flags,
6552		   install_key_compl.macaddr, install_key_compl.status);
6553
6554	rcu_read_lock();
6555	ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
6556	if (!ar) {
6557		ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
6558			    install_key_compl.vdev_id);
6559		rcu_read_unlock();
6560		return;
6561	}
6562
6563	ar->install_key_status = 0;
6564
6565	if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
6566		ath12k_warn(ab, "install key failed for %pM status %d\n",
6567			    install_key_compl.macaddr, install_key_compl.status);
6568		ar->install_key_status = install_key_compl.status;
6569	}
6570
6571	complete(&ar->install_key_done);
6572	rcu_read_unlock();
6573}
6574
6575static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
6576					  u16 tag, u16 len,
6577					  const void *ptr,
6578					  void *data)
6579{
6580	const struct wmi_service_available_event *ev;
6581	u32 *wmi_ext2_service_bitmap;
6582	int i, j;
6583	u16 expected_len;
6584
6585	expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
6586	if (len < expected_len) {
6587		ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
6588			    len, tag);
6589		return -EINVAL;
6590	}
6591
6592	switch (tag) {
6593	case WMI_TAG_SERVICE_AVAILABLE_EVENT:
6594		ev = (struct wmi_service_available_event *)ptr;
6595		for (i = 0, j = WMI_MAX_SERVICE;
6596		     i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
6597		     i++) {
6598			do {
6599				if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
6600				    BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6601					set_bit(j, ab->wmi_ab.svc_map);
6602			} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6603		}
6604
6605		ath12k_dbg(ab, ATH12K_DBG_WMI,
6606			   "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
6607			   ev->wmi_service_segment_bitmap[0],
6608			   ev->wmi_service_segment_bitmap[1],
6609			   ev->wmi_service_segment_bitmap[2],
6610			   ev->wmi_service_segment_bitmap[3]);
6611		break;
6612	case WMI_TAG_ARRAY_UINT32:
6613		wmi_ext2_service_bitmap = (u32 *)ptr;
6614		for (i = 0, j = WMI_MAX_EXT_SERVICE;
6615		     i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE;
6616		     i++) {
6617			do {
6618				if (wmi_ext2_service_bitmap[i] &
6619				    BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6620					set_bit(j, ab->wmi_ab.svc_map);
6621			} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6622		}
6623
6624		ath12k_dbg(ab, ATH12K_DBG_WMI,
6625			   "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x",
6626			   wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1],
6627			   wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]);
6628		break;
6629	}
6630	return 0;
6631}
6632
6633static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
6634{
6635	int ret;
6636
6637	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6638				  ath12k_wmi_tlv_services_parser,
6639				  NULL);
6640	return ret;
6641}
6642
6643static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
6644{
6645	struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
6646	struct ath12k *ar;
6647
6648	if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
6649		ath12k_warn(ab, "failed to extract peer assoc conf event");
6650		return;
6651	}
6652
6653	ath12k_dbg(ab, ATH12K_DBG_WMI,
6654		   "peer assoc conf ev vdev id %d macaddr %pM\n",
6655		   peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
6656
6657	rcu_read_lock();
6658	ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
6659
6660	if (!ar) {
6661		ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
6662			    peer_assoc_conf.vdev_id);
6663		rcu_read_unlock();
6664		return;
6665	}
6666
6667	complete(&ar->peer_assoc_done);
6668	rcu_read_unlock();
6669}
6670
6671static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
6672{
6673}
6674
6675/* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
6676 * is not part of BDF CTL(Conformance test limits) table entries.
6677 */
6678static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
6679						 struct sk_buff *skb)
6680{
6681	const void **tb;
6682	const struct wmi_pdev_ctl_failsafe_chk_event *ev;
6683	int ret;
6684
6685	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6686	if (IS_ERR(tb)) {
6687		ret = PTR_ERR(tb);
6688		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6689		return;
6690	}
6691
6692	ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
6693	if (!ev) {
6694		ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
6695		kfree(tb);
6696		return;
6697	}
6698
6699	ath12k_dbg(ab, ATH12K_DBG_WMI,
6700		   "pdev ctl failsafe check ev status %d\n",
6701		   ev->ctl_failsafe_status);
6702
6703	/* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
6704	 * to 10 dBm else the CTL power entry in the BDF would be picked up.
6705	 */
6706	if (ev->ctl_failsafe_status != 0)
6707		ath12k_warn(ab, "pdev ctl failsafe failure status %d",
6708			    ev->ctl_failsafe_status);
6709
6710	kfree(tb);
6711}
6712
6713static void
6714ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
6715					  const struct ath12k_wmi_pdev_csa_event *ev,
6716					  const u32 *vdev_ids)
6717{
6718	int i;
6719	struct ath12k_link_vif *arvif;
6720	struct ath12k_vif *ahvif;
6721
6722	/* Finish CSA once the switch count becomes NULL */
6723	if (ev->current_switch_count)
6724		return;
6725
6726	rcu_read_lock();
6727	for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) {
6728		arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
6729
6730		if (!arvif) {
6731			ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
6732				    vdev_ids[i]);
6733			continue;
6734		}
6735		ahvif = arvif->ahvif;
6736
6737		if (arvif->is_up && ahvif->vif->bss_conf.csa_active)
6738			ieee80211_csa_finish(ahvif->vif, 0);
6739	}
6740	rcu_read_unlock();
6741}
6742
6743static void
6744ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
6745					      struct sk_buff *skb)
6746{
6747	const void **tb;
6748	const struct ath12k_wmi_pdev_csa_event *ev;
6749	const u32 *vdev_ids;
6750	int ret;
6751
6752	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6753	if (IS_ERR(tb)) {
6754		ret = PTR_ERR(tb);
6755		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6756		return;
6757	}
6758
6759	ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
6760	vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
6761
6762	if (!ev || !vdev_ids) {
6763		ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
6764		kfree(tb);
6765		return;
6766	}
6767
6768	ath12k_dbg(ab, ATH12K_DBG_WMI,
6769		   "pdev csa switch count %d for pdev %d, num_vdevs %d",
6770		   ev->current_switch_count, ev->pdev_id,
6771		   ev->num_vdevs);
6772
6773	ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
6774
6775	kfree(tb);
6776}
6777
6778static void
6779ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
6780{
6781	const void **tb;
6782	const struct ath12k_wmi_pdev_radar_event *ev;
6783	struct ath12k *ar;
6784	int ret;
6785
6786	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6787	if (IS_ERR(tb)) {
6788		ret = PTR_ERR(tb);
6789		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6790		return;
6791	}
6792
6793	ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
6794
6795	if (!ev) {
6796		ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
6797		kfree(tb);
6798		return;
6799	}
6800
6801	ath12k_dbg(ab, ATH12K_DBG_WMI,
6802		   "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
6803		   ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
6804		   ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
6805		   ev->freq_offset, ev->sidx);
6806
6807	rcu_read_lock();
6808
6809	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
6810
6811	if (!ar) {
6812		ath12k_warn(ab, "radar detected in invalid pdev %d\n",
6813			    ev->pdev_id);
6814		goto exit;
6815	}
6816
6817	ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
6818		   ev->pdev_id);
6819
6820	if (ar->dfs_block_radar_events)
6821		ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
6822	else
6823		ieee80211_radar_detected(ath12k_ar_to_hw(ar), NULL);
6824
6825exit:
6826	rcu_read_unlock();
6827
6828	kfree(tb);
6829}
6830
6831static void
6832ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
6833				  struct sk_buff *skb)
6834{
6835	struct ath12k *ar;
6836	struct wmi_pdev_temperature_event ev = {0};
6837
6838	if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
6839		ath12k_warn(ab, "failed to extract pdev temperature event");
6840		return;
6841	}
6842
6843	ath12k_dbg(ab, ATH12K_DBG_WMI,
6844		   "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
6845
6846	rcu_read_lock();
6847
6848	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
6849	if (!ar) {
6850		ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
6851		goto exit;
6852	}
6853
6854exit:
6855	rcu_read_unlock();
6856}
6857
6858static void ath12k_fils_discovery_event(struct ath12k_base *ab,
6859					struct sk_buff *skb)
6860{
6861	const void **tb;
6862	const struct wmi_fils_discovery_event *ev;
6863	int ret;
6864
6865	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6866	if (IS_ERR(tb)) {
6867		ret = PTR_ERR(tb);
6868		ath12k_warn(ab,
6869			    "failed to parse FILS discovery event tlv %d\n",
6870			    ret);
6871		return;
6872	}
6873
6874	ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
6875	if (!ev) {
6876		ath12k_warn(ab, "failed to fetch FILS discovery event\n");
6877		kfree(tb);
6878		return;
6879	}
6880
6881	ath12k_warn(ab,
6882		    "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
6883		    ev->vdev_id, ev->fils_tt, ev->tbtt);
6884
6885	kfree(tb);
6886}
6887
6888static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
6889					      struct sk_buff *skb)
6890{
6891	const void **tb;
6892	const struct wmi_probe_resp_tx_status_event *ev;
6893	int ret;
6894
6895	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6896	if (IS_ERR(tb)) {
6897		ret = PTR_ERR(tb);
6898		ath12k_warn(ab,
6899			    "failed to parse probe response transmission status event tlv: %d\n",
6900			    ret);
6901		return;
6902	}
6903
6904	ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
6905	if (!ev) {
6906		ath12k_warn(ab,
6907			    "failed to fetch probe response transmission status event");
6908		kfree(tb);
6909		return;
6910	}
6911
6912	if (ev->tx_status)
6913		ath12k_warn(ab,
6914			    "Probe response transmission failed for vdev_id %u, status %u\n",
6915			    ev->vdev_id, ev->tx_status);
6916
6917	kfree(tb);
6918}
6919
6920static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
6921				    struct sk_buff *skb)
6922{
6923	const void **tb;
6924	const struct wmi_p2p_noa_event *ev;
6925	const struct ath12k_wmi_p2p_noa_info *noa;
6926	struct ath12k *ar;
6927	int ret, vdev_id;
6928
6929	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6930	if (IS_ERR(tb)) {
6931		ret = PTR_ERR(tb);
6932		ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
6933		return ret;
6934	}
6935
6936	ev = tb[WMI_TAG_P2P_NOA_EVENT];
6937	noa = tb[WMI_TAG_P2P_NOA_INFO];
6938
6939	if (!ev || !noa) {
6940		ret = -EPROTO;
6941		goto out;
6942	}
6943
6944	vdev_id = __le32_to_cpu(ev->vdev_id);
6945
6946	ath12k_dbg(ab, ATH12K_DBG_WMI,
6947		   "wmi tlv p2p noa vdev_id %i descriptors %u\n",
6948		   vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
6949
6950	rcu_read_lock();
6951	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6952	if (!ar) {
6953		ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
6954			    vdev_id);
6955		ret = -EINVAL;
6956		goto unlock;
6957	}
6958
6959	ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
6960
6961	ret = 0;
6962
6963unlock:
6964	rcu_read_unlock();
6965out:
6966	kfree(tb);
6967	return ret;
6968}
6969
6970static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
6971					     struct sk_buff *skb)
6972{
6973	const struct wmi_rfkill_state_change_event *ev;
6974	const void **tb;
6975	int ret;
6976
6977	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6978	if (IS_ERR(tb)) {
6979		ret = PTR_ERR(tb);
6980		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6981		return;
6982	}
6983
6984	ev = tb[WMI_TAG_RFKILL_EVENT];
6985	if (!ev) {
6986		kfree(tb);
6987		return;
6988	}
6989
6990	ath12k_dbg(ab, ATH12K_DBG_MAC,
6991		   "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
6992		   le32_to_cpu(ev->gpio_pin_num),
6993		   le32_to_cpu(ev->int_type),
6994		   le32_to_cpu(ev->radio_state));
6995
6996	spin_lock_bh(&ab->base_lock);
6997	ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
6998	spin_unlock_bh(&ab->base_lock);
6999
7000	queue_work(ab->workqueue, &ab->rfkill_work);
7001	kfree(tb);
7002}
7003
7004static void
7005ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
7006{
7007	trace_ath12k_wmi_diag(ab, skb->data, skb->len);
7008}
7009
7010static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
7011					struct sk_buff *skb)
7012{
7013	const void **tb;
7014	const struct wmi_twt_enable_event *ev;
7015	int ret;
7016
7017	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7018	if (IS_ERR(tb)) {
7019		ret = PTR_ERR(tb);
7020		ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
7021			    ret);
7022		return;
7023	}
7024
7025	ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
7026	if (!ev) {
7027		ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
7028		goto exit;
7029	}
7030
7031	ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
7032		   le32_to_cpu(ev->pdev_id),
7033		   le32_to_cpu(ev->status));
7034
7035exit:
7036	kfree(tb);
7037}
7038
7039static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
7040					 struct sk_buff *skb)
7041{
7042	const void **tb;
7043	const struct wmi_twt_disable_event *ev;
7044	int ret;
7045
7046	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7047	if (IS_ERR(tb)) {
7048		ret = PTR_ERR(tb);
7049		ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
7050			    ret);
7051		return;
7052	}
7053
7054	ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
7055	if (!ev) {
7056		ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
7057		goto exit;
7058	}
7059
7060	ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
7061		   le32_to_cpu(ev->pdev_id),
7062		   le32_to_cpu(ev->status));
7063
7064exit:
7065	kfree(tb);
7066}
7067
7068static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
7069					    u16 tag, u16 len,
7070					    const void *ptr, void *data)
7071{
7072	const struct wmi_wow_ev_pg_fault_param *pf_param;
7073	const struct wmi_wow_ev_param *param;
7074	struct wmi_wow_ev_arg *arg = data;
7075	int pf_len;
7076
7077	switch (tag) {
7078	case WMI_TAG_WOW_EVENT_INFO:
7079		param = ptr;
7080		arg->wake_reason = le32_to_cpu(param->wake_reason);
7081		ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
7082			   arg->wake_reason, wow_reason(arg->wake_reason));
7083		break;
7084
7085	case WMI_TAG_ARRAY_BYTE:
7086		if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
7087			pf_param = ptr;
7088			pf_len = le32_to_cpu(pf_param->len);
7089			if (pf_len > len - sizeof(pf_len) ||
7090			    pf_len < 0) {
7091				ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
7092					    pf_len);
7093				return -EINVAL;
7094			}
7095			ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
7096				   pf_len);
7097			ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
7098					"wow_reason_page_fault packet present",
7099					"wow_pg_fault ",
7100					pf_param->data,
7101					pf_len);
7102		}
7103		break;
7104	default:
7105		break;
7106	}
7107
7108	return 0;
7109}
7110
7111static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
7112{
7113	struct wmi_wow_ev_arg arg = { };
7114	int ret;
7115
7116	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7117				  ath12k_wmi_wow_wakeup_host_parse,
7118				  &arg);
7119	if (ret) {
7120		ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
7121			    ret);
7122		return;
7123	}
7124
7125	complete(&ab->wow.wakeup_completed);
7126}
7127
7128static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
7129						struct sk_buff *skb)
7130{
7131	const struct wmi_gtk_offload_status_event *ev;
7132	struct ath12k_link_vif *arvif;
7133	__be64 replay_ctr_be;
7134	u64 replay_ctr;
7135	const void **tb;
7136	int ret;
7137
7138	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7139	if (IS_ERR(tb)) {
7140		ret = PTR_ERR(tb);
7141		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
7142		return;
7143	}
7144
7145	ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
7146	if (!ev) {
7147		ath12k_warn(ab, "failed to fetch gtk offload status ev");
7148		kfree(tb);
7149		return;
7150	}
7151
7152	rcu_read_lock();
7153	arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
7154	if (!arvif) {
7155		rcu_read_unlock();
7156		ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
7157			    le32_to_cpu(ev->vdev_id));
7158		kfree(tb);
7159		return;
7160	}
7161
7162	replay_ctr = le64_to_cpu(ev->replay_ctr);
7163	arvif->rekey_data.replay_ctr = replay_ctr;
7164	ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
7165		   le32_to_cpu(ev->refresh_cnt), replay_ctr);
7166
7167	/* supplicant expects big-endian replay counter */
7168	replay_ctr_be = cpu_to_be64(replay_ctr);
7169
7170	ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
7171				   (void *)&replay_ctr_be, GFP_ATOMIC);
7172
7173	rcu_read_unlock();
7174
7175	kfree(tb);
7176}
7177
7178static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
7179{
7180	struct wmi_cmd_hdr *cmd_hdr;
7181	enum wmi_tlv_event_id id;
7182
7183	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
7184	id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
7185
7186	if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
7187		goto out;
7188
7189	switch (id) {
7190		/* Process all the WMI events here */
7191	case WMI_SERVICE_READY_EVENTID:
7192		ath12k_service_ready_event(ab, skb);
7193		break;
7194	case WMI_SERVICE_READY_EXT_EVENTID:
7195		ath12k_service_ready_ext_event(ab, skb);
7196		break;
7197	case WMI_SERVICE_READY_EXT2_EVENTID:
7198		ath12k_service_ready_ext2_event(ab, skb);
7199		break;
7200	case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
7201		ath12k_reg_chan_list_event(ab, skb);
7202		break;
7203	case WMI_READY_EVENTID:
7204		ath12k_ready_event(ab, skb);
7205		break;
7206	case WMI_PEER_DELETE_RESP_EVENTID:
7207		ath12k_peer_delete_resp_event(ab, skb);
7208		break;
7209	case WMI_VDEV_START_RESP_EVENTID:
7210		ath12k_vdev_start_resp_event(ab, skb);
7211		break;
7212	case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
7213		ath12k_bcn_tx_status_event(ab, skb);
7214		break;
7215	case WMI_VDEV_STOPPED_EVENTID:
7216		ath12k_vdev_stopped_event(ab, skb);
7217		break;
7218	case WMI_MGMT_RX_EVENTID:
7219		ath12k_mgmt_rx_event(ab, skb);
7220		/* mgmt_rx_event() owns the skb now! */
7221		return;
7222	case WMI_MGMT_TX_COMPLETION_EVENTID:
7223		ath12k_mgmt_tx_compl_event(ab, skb);
7224		break;
7225	case WMI_SCAN_EVENTID:
7226		ath12k_scan_event(ab, skb);
7227		break;
7228	case WMI_PEER_STA_KICKOUT_EVENTID:
7229		ath12k_peer_sta_kickout_event(ab, skb);
7230		break;
7231	case WMI_ROAM_EVENTID:
7232		ath12k_roam_event(ab, skb);
7233		break;
7234	case WMI_CHAN_INFO_EVENTID:
7235		ath12k_chan_info_event(ab, skb);
7236		break;
7237	case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
7238		ath12k_pdev_bss_chan_info_event(ab, skb);
7239		break;
7240	case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
7241		ath12k_vdev_install_key_compl_event(ab, skb);
7242		break;
7243	case WMI_SERVICE_AVAILABLE_EVENTID:
7244		ath12k_service_available_event(ab, skb);
7245		break;
7246	case WMI_PEER_ASSOC_CONF_EVENTID:
7247		ath12k_peer_assoc_conf_event(ab, skb);
7248		break;
7249	case WMI_UPDATE_STATS_EVENTID:
7250		ath12k_update_stats_event(ab, skb);
7251		break;
7252	case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
7253		ath12k_pdev_ctl_failsafe_check_event(ab, skb);
7254		break;
7255	case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
7256		ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
7257		break;
7258	case WMI_PDEV_TEMPERATURE_EVENTID:
7259		ath12k_wmi_pdev_temperature_event(ab, skb);
7260		break;
7261	case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
7262		ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
7263		break;
7264	case WMI_HOST_FILS_DISCOVERY_EVENTID:
7265		ath12k_fils_discovery_event(ab, skb);
7266		break;
7267	case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
7268		ath12k_probe_resp_tx_status_event(ab, skb);
7269		break;
7270	case WMI_RFKILL_STATE_CHANGE_EVENTID:
7271		ath12k_rfkill_state_change_event(ab, skb);
7272		break;
7273	case WMI_TWT_ENABLE_EVENTID:
7274		ath12k_wmi_twt_enable_event(ab, skb);
7275		break;
7276	case WMI_TWT_DISABLE_EVENTID:
7277		ath12k_wmi_twt_disable_event(ab, skb);
7278		break;
7279	case WMI_P2P_NOA_EVENTID:
7280		ath12k_wmi_p2p_noa_event(ab, skb);
7281		break;
7282	/* add Unsupported events here */
7283	case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
7284	case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
7285	case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
7286		ath12k_dbg(ab, ATH12K_DBG_WMI,
7287			   "ignoring unsupported event 0x%x\n", id);
7288		break;
7289	case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
7290		ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
7291		break;
7292	case WMI_VDEV_DELETE_RESP_EVENTID:
7293		ath12k_vdev_delete_resp_event(ab, skb);
7294		break;
7295	case WMI_DIAG_EVENTID:
7296		ath12k_wmi_diag_event(ab, skb);
7297		break;
7298	case WMI_WOW_WAKEUP_HOST_EVENTID:
7299		ath12k_wmi_event_wow_wakeup_host(ab, skb);
7300		break;
7301	case WMI_GTK_OFFLOAD_STATUS_EVENTID:
7302		ath12k_wmi_gtk_offload_status_event(ab, skb);
7303		break;
7304	/* TODO: Add remaining events */
7305	default:
7306		ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
7307		break;
7308	}
7309
7310out:
7311	dev_kfree_skb(skb);
7312}
7313
7314static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
7315					   u32 pdev_idx)
7316{
7317	int status;
7318	static const u32 svc_id[] = {
7319		ATH12K_HTC_SVC_ID_WMI_CONTROL,
7320		ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
7321		ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
7322	};
7323	struct ath12k_htc_svc_conn_req conn_req = {};
7324	struct ath12k_htc_svc_conn_resp conn_resp = {};
7325
7326	/* these fields are the same for all service endpoints */
7327	conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
7328	conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
7329	conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
7330
7331	/* connect to control service */
7332	conn_req.service_id = svc_id[pdev_idx];
7333
7334	status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
7335	if (status) {
7336		ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
7337			    status);
7338		return status;
7339	}
7340
7341	ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
7342	ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
7343	ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
7344
7345	return 0;
7346}
7347
7348static int
7349ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
7350			      struct wmi_unit_test_cmd ut_cmd,
7351			      u32 *test_args)
7352{
7353	struct ath12k_wmi_pdev *wmi = ar->wmi;
7354	struct wmi_unit_test_cmd *cmd;
7355	struct sk_buff *skb;
7356	struct wmi_tlv *tlv;
7357	void *ptr;
7358	u32 *ut_cmd_args;
7359	int buf_len, arg_len;
7360	int ret;
7361	int i;
7362
7363	arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
7364	buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
7365
7366	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
7367	if (!skb)
7368		return -ENOMEM;
7369
7370	cmd = (struct wmi_unit_test_cmd *)skb->data;
7371	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
7372						 sizeof(ut_cmd));
7373
7374	cmd->vdev_id = ut_cmd.vdev_id;
7375	cmd->module_id = ut_cmd.module_id;
7376	cmd->num_args = ut_cmd.num_args;
7377	cmd->diag_token = ut_cmd.diag_token;
7378
7379	ptr = skb->data + sizeof(ut_cmd);
7380
7381	tlv = ptr;
7382	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
7383
7384	ptr += TLV_HDR_SIZE;
7385
7386	ut_cmd_args = ptr;
7387	for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
7388		ut_cmd_args[i] = test_args[i];
7389
7390	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
7391		   "WMI unit test : module %d vdev %d n_args %d token %d\n",
7392		   cmd->module_id, cmd->vdev_id, cmd->num_args,
7393		   cmd->diag_token);
7394
7395	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
7396
7397	if (ret) {
7398		ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
7399			    ret);
7400		dev_kfree_skb(skb);
7401	}
7402
7403	return ret;
7404}
7405
7406int ath12k_wmi_simulate_radar(struct ath12k *ar)
7407{
7408	struct ath12k_link_vif *arvif;
7409	u32 dfs_args[DFS_MAX_TEST_ARGS];
7410	struct wmi_unit_test_cmd wmi_ut;
7411	bool arvif_found = false;
7412
7413	list_for_each_entry(arvif, &ar->arvifs, list) {
7414		if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
7415			arvif_found = true;
7416			break;
7417		}
7418	}
7419
7420	if (!arvif_found)
7421		return -EINVAL;
7422
7423	dfs_args[DFS_TEST_CMDID] = 0;
7424	dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
7425	/* Currently we could pass segment_id(b0 - b1), chirp(b2)
7426	 * freq offset (b3 - b10) to unit test. For simulation
7427	 * purpose this can be set to 0 which is valid.
7428	 */
7429	dfs_args[DFS_TEST_RADAR_PARAM] = 0;
7430
7431	wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
7432	wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
7433	wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
7434	wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
7435
7436	ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
7437
7438	return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
7439}
7440
7441int ath12k_wmi_connect(struct ath12k_base *ab)
7442{
7443	u32 i;
7444	u8 wmi_ep_count;
7445
7446	wmi_ep_count = ab->htc.wmi_ep_count;
7447	if (wmi_ep_count > ab->hw_params->max_radios)
7448		return -1;
7449
7450	for (i = 0; i < wmi_ep_count; i++)
7451		ath12k_connect_pdev_htc_service(ab, i);
7452
7453	return 0;
7454}
7455
7456static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
7457{
7458	if (WARN_ON(pdev_id >= MAX_RADIOS))
7459		return;
7460
7461	/* TODO: Deinit any pdev specific wmi resource */
7462}
7463
7464int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
7465			   u8 pdev_id)
7466{
7467	struct ath12k_wmi_pdev *wmi_handle;
7468
7469	if (pdev_id >= ab->hw_params->max_radios)
7470		return -EINVAL;
7471
7472	wmi_handle = &ab->wmi_ab.wmi[pdev_id];
7473
7474	wmi_handle->wmi_ab = &ab->wmi_ab;
7475
7476	ab->wmi_ab.ab = ab;
7477	/* TODO: Init remaining resource specific to pdev */
7478
7479	return 0;
7480}
7481
7482int ath12k_wmi_attach(struct ath12k_base *ab)
7483{
7484	int ret;
7485
7486	ret = ath12k_wmi_pdev_attach(ab, 0);
7487	if (ret)
7488		return ret;
7489
7490	ab->wmi_ab.ab = ab;
7491	ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
7492
7493	/* It's overwritten when service_ext_ready is handled */
7494	if (ab->hw_params->single_pdev_only)
7495		ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
7496
7497	/* TODO: Init remaining wmi soc resources required */
7498	init_completion(&ab->wmi_ab.service_ready);
7499	init_completion(&ab->wmi_ab.unified_ready);
7500
7501	return 0;
7502}
7503
7504void ath12k_wmi_detach(struct ath12k_base *ab)
7505{
7506	int i;
7507
7508	/* TODO: Deinit wmi resource specific to SOC as required */
7509
7510	for (i = 0; i < ab->htc.wmi_ep_count; i++)
7511		ath12k_wmi_pdev_detach(ab, i);
7512
7513	ath12k_wmi_free_dbring_caps(ab);
7514}
7515
7516int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
7517{
7518	struct wmi_hw_data_filter_cmd *cmd;
7519	struct sk_buff *skb;
7520	int len;
7521
7522	len = sizeof(*cmd);
7523	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7524
7525	if (!skb)
7526		return -ENOMEM;
7527
7528	cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
7529	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
7530						 sizeof(*cmd));
7531	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
7532	cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
7533
7534	/* Set all modes in case of disable */
7535	if (arg->enable)
7536		cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
7537	else
7538		cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
7539
7540	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
7541		   "wmi hw data filter enable %d filter_bitmap 0x%x\n",
7542		   arg->enable, arg->hw_filter_bitmap);
7543
7544	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
7545}
7546
7547int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
7548{
7549	struct wmi_wow_host_wakeup_cmd *cmd;
7550	struct sk_buff *skb;
7551	size_t len;
7552
7553	len = sizeof(*cmd);
7554	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7555	if (!skb)
7556		return -ENOMEM;
7557
7558	cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
7559	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
7560						 sizeof(*cmd));
7561
7562	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
7563
7564	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
7565}
7566
7567int ath12k_wmi_wow_enable(struct ath12k *ar)
7568{
7569	struct wmi_wow_enable_cmd *cmd;
7570	struct sk_buff *skb;
7571	int len;
7572
7573	len = sizeof(*cmd);
7574	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7575	if (!skb)
7576		return -ENOMEM;
7577
7578	cmd = (struct wmi_wow_enable_cmd *)skb->data;
7579	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
7580						 sizeof(*cmd));
7581
7582	cmd->enable = cpu_to_le32(1);
7583	cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
7584	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
7585
7586	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
7587}
7588
7589int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
7590				    enum wmi_wow_wakeup_event event,
7591				    u32 enable)
7592{
7593	struct wmi_wow_add_del_event_cmd *cmd;
7594	struct sk_buff *skb;
7595	size_t len;
7596
7597	len = sizeof(*cmd);
7598	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7599	if (!skb)
7600		return -ENOMEM;
7601
7602	cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
7603	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
7604						 sizeof(*cmd));
7605	cmd->vdev_id = cpu_to_le32(vdev_id);
7606	cmd->is_add = cpu_to_le32(enable);
7607	cmd->event_bitmap = cpu_to_le32((1 << event));
7608
7609	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
7610		   wow_wakeup_event(event), enable, vdev_id);
7611
7612	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
7613}
7614
7615int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
7616			       const u8 *pattern, const u8 *mask,
7617			       int pattern_len, int pattern_offset)
7618{
7619	struct wmi_wow_add_pattern_cmd *cmd;
7620	struct wmi_wow_bitmap_pattern_params *bitmap;
7621	struct wmi_tlv *tlv;
7622	struct sk_buff *skb;
7623	void *ptr;
7624	size_t len;
7625
7626	len = sizeof(*cmd) +
7627	      sizeof(*tlv) +			/* array struct */
7628	      sizeof(*bitmap) +			/* bitmap */
7629	      sizeof(*tlv) +			/* empty ipv4 sync */
7630	      sizeof(*tlv) +			/* empty ipv6 sync */
7631	      sizeof(*tlv) +			/* empty magic */
7632	      sizeof(*tlv) +			/* empty info timeout */
7633	      sizeof(*tlv) + sizeof(u32);	/* ratelimit interval */
7634
7635	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7636	if (!skb)
7637		return -ENOMEM;
7638
7639	/* cmd */
7640	ptr = skb->data;
7641	cmd = ptr;
7642	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
7643						 sizeof(*cmd));
7644	cmd->vdev_id = cpu_to_le32(vdev_id);
7645	cmd->pattern_id = cpu_to_le32(pattern_id);
7646	cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
7647
7648	ptr += sizeof(*cmd);
7649
7650	/* bitmap */
7651	tlv = ptr;
7652	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
7653
7654	ptr += sizeof(*tlv);
7655
7656	bitmap = ptr;
7657	bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
7658						    sizeof(*bitmap));
7659	memcpy(bitmap->patternbuf, pattern, pattern_len);
7660	memcpy(bitmap->bitmaskbuf, mask, pattern_len);
7661	bitmap->pattern_offset = cpu_to_le32(pattern_offset);
7662	bitmap->pattern_len = cpu_to_le32(pattern_len);
7663	bitmap->bitmask_len = cpu_to_le32(pattern_len);
7664	bitmap->pattern_id = cpu_to_le32(pattern_id);
7665
7666	ptr += sizeof(*bitmap);
7667
7668	/* ipv4 sync */
7669	tlv = ptr;
7670	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
7671
7672	ptr += sizeof(*tlv);
7673
7674	/* ipv6 sync */
7675	tlv = ptr;
7676	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
7677
7678	ptr += sizeof(*tlv);
7679
7680	/* magic */
7681	tlv = ptr;
7682	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
7683
7684	ptr += sizeof(*tlv);
7685
7686	/* pattern info timeout */
7687	tlv = ptr;
7688	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
7689
7690	ptr += sizeof(*tlv);
7691
7692	/* ratelimit interval */
7693	tlv = ptr;
7694	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
7695
7696	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
7697		   vdev_id, pattern_id, pattern_offset, pattern_len);
7698
7699	ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
7700			bitmap->patternbuf, pattern_len);
7701	ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
7702			bitmap->bitmaskbuf, pattern_len);
7703
7704	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
7705}
7706
7707int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
7708{
7709	struct wmi_wow_del_pattern_cmd *cmd;
7710	struct sk_buff *skb;
7711	size_t len;
7712
7713	len = sizeof(*cmd);
7714	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7715	if (!skb)
7716		return -ENOMEM;
7717
7718	cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
7719	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
7720						 sizeof(*cmd));
7721	cmd->vdev_id = cpu_to_le32(vdev_id);
7722	cmd->pattern_id = cpu_to_le32(pattern_id);
7723	cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
7724
7725	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
7726		   vdev_id, pattern_id);
7727
7728	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
7729}
7730
7731static struct sk_buff *
7732ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
7733				   struct wmi_pno_scan_req_arg *pno)
7734{
7735	struct nlo_configured_params *nlo_list;
7736	size_t len, nlo_list_len, channel_list_len;
7737	struct wmi_wow_nlo_config_cmd *cmd;
7738	__le32 *channel_list;
7739	struct wmi_tlv *tlv;
7740	struct sk_buff *skb;
7741	void *ptr;
7742	u32 i;
7743
7744	len = sizeof(*cmd) +
7745	      sizeof(*tlv) +
7746	      /* TLV place holder for array of structures
7747	       * nlo_configured_params(nlo_list)
7748	       */
7749	      sizeof(*tlv);
7750	      /* TLV place holder for array of uint32 channel_list */
7751
7752	channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
7753	len += channel_list_len;
7754
7755	nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
7756	len += nlo_list_len;
7757
7758	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7759	if (!skb)
7760		return ERR_PTR(-ENOMEM);
7761
7762	ptr = skb->data;
7763	cmd = ptr;
7764	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
7765
7766	cmd->vdev_id = cpu_to_le32(pno->vdev_id);
7767	cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
7768
7769	/* current FW does not support min-max range for dwell time */
7770	cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
7771	cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
7772
7773	if (pno->do_passive_scan)
7774		cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
7775
7776	cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
7777	cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
7778	cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
7779	cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
7780
7781	if (pno->enable_pno_scan_randomization) {
7782		cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
7783					  WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
7784		ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
7785		ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
7786	}
7787
7788	ptr += sizeof(*cmd);
7789
7790	/* nlo_configured_params(nlo_list) */
7791	cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
7792	tlv = ptr;
7793	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
7794
7795	ptr += sizeof(*tlv);
7796	nlo_list = ptr;
7797	for (i = 0; i < pno->uc_networks_count; i++) {
7798		tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
7799		tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
7800						     sizeof(*nlo_list));
7801
7802		nlo_list[i].ssid.valid = cpu_to_le32(1);
7803		nlo_list[i].ssid.ssid.ssid_len =
7804			cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
7805		memcpy(nlo_list[i].ssid.ssid.ssid,
7806		       pno->a_networks[i].ssid.ssid,
7807		       le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
7808
7809		if (pno->a_networks[i].rssi_threshold &&
7810		    pno->a_networks[i].rssi_threshold > -300) {
7811			nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
7812			nlo_list[i].rssi_cond.rssi =
7813					cpu_to_le32(pno->a_networks[i].rssi_threshold);
7814		}
7815
7816		nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
7817		nlo_list[i].bcast_nw_type.bcast_nw_type =
7818					cpu_to_le32(pno->a_networks[i].bcast_nw_type);
7819	}
7820
7821	ptr += nlo_list_len;
7822	cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
7823	tlv = ptr;
7824	tlv->header =  ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
7825	ptr += sizeof(*tlv);
7826	channel_list = ptr;
7827
7828	for (i = 0; i < pno->a_networks[0].channel_count; i++)
7829		channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
7830
7831	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
7832		   vdev_id);
7833
7834	return skb;
7835}
7836
7837static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
7838							 u32 vdev_id)
7839{
7840	struct wmi_wow_nlo_config_cmd *cmd;
7841	struct sk_buff *skb;
7842	size_t len;
7843
7844	len = sizeof(*cmd);
7845	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
7846	if (!skb)
7847		return ERR_PTR(-ENOMEM);
7848
7849	cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
7850	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
7851
7852	cmd->vdev_id = cpu_to_le32(vdev_id);
7853	cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
7854
7855	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
7856		   "wmi tlv stop pno config vdev_id %d\n", vdev_id);
7857	return skb;
7858}
7859
7860int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
7861			      struct wmi_pno_scan_req_arg  *pno_scan)
7862{
7863	struct sk_buff *skb;
7864
7865	if (pno_scan->enable)
7866		skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
7867	else
7868		skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
7869
7870	if (IS_ERR_OR_NULL(skb))
7871		return -ENOMEM;
7872
7873	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
7874}
7875
7876static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
7877				       struct wmi_arp_ns_offload_arg *offload,
7878				       void **ptr,
7879				       bool enable,
7880				       bool ext)
7881{
7882	struct wmi_ns_offload_params *ns;
7883	struct wmi_tlv *tlv;
7884	void *buf_ptr = *ptr;
7885	u32 ns_cnt, ns_ext_tuples;
7886	int i, max_offloads;
7887
7888	ns_cnt = offload->ipv6_count;
7889
7890	tlv  = buf_ptr;
7891
7892	if (ext) {
7893		ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
7894		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
7895						 ns_ext_tuples * sizeof(*ns));
7896		i = WMI_MAX_NS_OFFLOADS;
7897		max_offloads = offload->ipv6_count;
7898	} else {
7899		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
7900						 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
7901		i = 0;
7902		max_offloads = WMI_MAX_NS_OFFLOADS;
7903	}
7904
7905	buf_ptr += sizeof(*tlv);
7906
7907	for (; i < max_offloads; i++) {
7908		ns = buf_ptr;
7909		ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
7910							sizeof(*ns));
7911
7912		if (enable) {
7913			if (i < ns_cnt)
7914				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
7915
7916			memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
7917			memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
7918
7919			if (offload->ipv6_type[i])
7920				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
7921
7922			memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
7923
7924			if (!is_zero_ether_addr(ns->target_mac.addr))
7925				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
7926
7927			ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
7928				   "wmi index %d ns_solicited %pI6 target %pI6",
7929				   i, ns->solicitation_ipaddr,
7930				   ns->target_ipaddr[0]);
7931		}
7932
7933		buf_ptr += sizeof(*ns);
7934	}
7935
7936	*ptr = buf_ptr;
7937}
7938
7939static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
7940					struct wmi_arp_ns_offload_arg *offload,
7941					void **ptr,
7942					bool enable)
7943{
7944	struct wmi_arp_offload_params *arp;
7945	struct wmi_tlv *tlv;
7946	void *buf_ptr = *ptr;
7947	int i;
7948
7949	/* fill arp tuple */
7950	tlv = buf_ptr;
7951	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
7952					 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
7953	buf_ptr += sizeof(*tlv);
7954
7955	for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
7956		arp = buf_ptr;
7957		arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
7958							 sizeof(*arp));
7959
7960		if (enable && i < offload->ipv4_count) {
7961			/* Copy the target ip addr and flags */
7962			arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
7963			memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
7964
7965			ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
7966				   arp->target_ipaddr);
7967		}
7968
7969		buf_ptr += sizeof(*arp);
7970	}
7971
7972	*ptr = buf_ptr;
7973}
7974
7975int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
7976			      struct ath12k_link_vif *arvif,
7977			      struct wmi_arp_ns_offload_arg *offload,
7978			      bool enable)
7979{
7980	struct wmi_set_arp_ns_offload_cmd *cmd;
7981	struct wmi_tlv *tlv;
7982	struct sk_buff *skb;
7983	void *buf_ptr;
7984	size_t len;
7985	u8 ns_cnt, ns_ext_tuples = 0;
7986
7987	ns_cnt = offload->ipv6_count;
7988
7989	len = sizeof(*cmd) +
7990	      sizeof(*tlv) +
7991	      WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
7992	      sizeof(*tlv) +
7993	      WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
7994
7995	if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
7996		ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
7997		len += sizeof(*tlv) +
7998		       ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
7999	}
8000
8001	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8002	if (!skb)
8003		return -ENOMEM;
8004
8005	buf_ptr = skb->data;
8006	cmd = buf_ptr;
8007	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
8008						 sizeof(*cmd));
8009	cmd->flags = cpu_to_le32(0);
8010	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
8011	cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
8012
8013	buf_ptr += sizeof(*cmd);
8014
8015	ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
8016	ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
8017
8018	if (ns_ext_tuples)
8019		ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
8020
8021	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
8022}
8023
8024int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
8025				 struct ath12k_link_vif *arvif, bool enable)
8026{
8027	struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
8028	struct wmi_gtk_rekey_offload_cmd *cmd;
8029	struct sk_buff *skb;
8030	__le64 replay_ctr;
8031	int len;
8032
8033	len = sizeof(*cmd);
8034	skb =  ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8035	if (!skb)
8036		return -ENOMEM;
8037
8038	cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
8039	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
8040	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
8041
8042	if (enable) {
8043		cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
8044
8045		/* the length in rekey_data and cmd is equal */
8046		memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
8047		memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
8048
8049		replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
8050		memcpy(cmd->replay_ctr, &replay_ctr,
8051		       sizeof(replay_ctr));
8052	} else {
8053		cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
8054	}
8055
8056	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
8057		   arvif->vdev_id, enable);
8058	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
8059}
8060
8061int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
8062				 struct ath12k_link_vif *arvif)
8063{
8064	struct wmi_gtk_rekey_offload_cmd *cmd;
8065	struct sk_buff *skb;
8066	int len;
8067
8068	len = sizeof(*cmd);
8069	skb =  ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
8070	if (!skb)
8071		return -ENOMEM;
8072
8073	cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
8074	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
8075	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
8076	cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
8077
8078	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
8079		   arvif->vdev_id);
8080	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
8081}
8082
8083int ath12k_wmi_sta_keepalive(struct ath12k *ar,
8084			     const struct wmi_sta_keepalive_arg *arg)
8085{
8086	struct wmi_sta_keepalive_arp_resp_params *arp;
8087	struct ath12k_wmi_pdev *wmi = ar->wmi;
8088	struct wmi_sta_keepalive_cmd *cmd;
8089	struct sk_buff *skb;
8090	size_t len;
8091
8092	len = sizeof(*cmd) + sizeof(*arp);
8093	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
8094	if (!skb)
8095		return -ENOMEM;
8096
8097	cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
8098	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
8099	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
8100	cmd->enabled = cpu_to_le32(arg->enabled);
8101	cmd->interval = cpu_to_le32(arg->interval);
8102	cmd->method = cpu_to_le32(arg->method);
8103
8104	arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
8105	arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
8106						 sizeof(*arp));
8107	if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
8108	    arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
8109		arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
8110		arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
8111		ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
8112	}
8113
8114	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8115		   "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
8116		   arg->vdev_id, arg->enabled, arg->method, arg->interval);
8117
8118	return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
8119}