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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2003-2022, Intel Corporation. All rights reserved.
4 * Intel Management Engine Interface (Intel MEI) Linux driver
5 */
6
7#ifndef _MEI_DEV_H_
8#define _MEI_DEV_H_
9
10#include <linux/types.h>
11#include <linux/cdev.h>
12#include <linux/poll.h>
13#include <linux/mei.h>
14#include <linux/mei_cl_bus.h>
15
16static inline int uuid_le_cmp(const uuid_le u1, const uuid_le u2)
17{
18 return memcmp(&u1, &u2, sizeof(uuid_le));
19}
20
21#include "hw.h"
22#include "hbm.h"
23
24#define MEI_SLOT_SIZE sizeof(u32)
25#define MEI_RD_MSG_BUF_SIZE (128 * MEI_SLOT_SIZE)
26
27/*
28 * Number of Maximum MEI Clients
29 */
30#define MEI_CLIENTS_MAX 256
31
32/*
33 * maximum number of consecutive resets
34 */
35#define MEI_MAX_CONSEC_RESET 3
36
37/*
38 * Number of File descriptors/handles
39 * that can be opened to the driver.
40 *
41 * Limit to 255: 256 Total Clients
42 * minus internal client for MEI Bus Messages
43 */
44#define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1)
45
46/* File state */
47enum file_state {
48 MEI_FILE_UNINITIALIZED = 0,
49 MEI_FILE_INITIALIZING,
50 MEI_FILE_CONNECTING,
51 MEI_FILE_CONNECTED,
52 MEI_FILE_DISCONNECTING,
53 MEI_FILE_DISCONNECT_REPLY,
54 MEI_FILE_DISCONNECT_REQUIRED,
55 MEI_FILE_DISCONNECTED,
56};
57
58/* MEI device states */
59enum mei_dev_state {
60 MEI_DEV_INITIALIZING = 0,
61 MEI_DEV_INIT_CLIENTS,
62 MEI_DEV_ENABLED,
63 MEI_DEV_RESETTING,
64 MEI_DEV_DISABLED,
65 MEI_DEV_POWERING_DOWN,
66 MEI_DEV_POWER_DOWN,
67 MEI_DEV_POWER_UP
68};
69
70/**
71 * enum mei_dev_pxp_mode - MEI PXP mode state
72 *
73 * @MEI_DEV_PXP_DEFAULT: PCH based device, no initialization required
74 * @MEI_DEV_PXP_INIT: device requires initialization, send setup message to firmware
75 * @MEI_DEV_PXP_SETUP: device is in setup stage, waiting for firmware response
76 * @MEI_DEV_PXP_READY: device initialized
77 */
78enum mei_dev_pxp_mode {
79 MEI_DEV_PXP_DEFAULT = 0,
80 MEI_DEV_PXP_INIT = 1,
81 MEI_DEV_PXP_SETUP = 2,
82 MEI_DEV_PXP_READY = 3,
83};
84
85/**
86 * enum mei_dev_reset_to_pxp - reset to PXP mode performed
87 *
88 * @MEI_DEV_RESET_TO_PXP_DEFAULT: before reset
89 * @MEI_DEV_RESET_TO_PXP_PERFORMED: reset performed
90 * @MEI_DEV_RESET_TO_PXP_DONE: reset processed
91 */
92enum mei_dev_reset_to_pxp {
93 MEI_DEV_RESET_TO_PXP_DEFAULT = 0,
94 MEI_DEV_RESET_TO_PXP_PERFORMED = 1,
95 MEI_DEV_RESET_TO_PXP_DONE = 2,
96};
97
98const char *mei_dev_state_str(int state);
99
100enum mei_file_transaction_states {
101 MEI_IDLE,
102 MEI_WRITING,
103 MEI_WRITE_COMPLETE,
104};
105
106/**
107 * enum mei_cb_file_ops - file operation associated with the callback
108 * @MEI_FOP_READ: read
109 * @MEI_FOP_WRITE: write
110 * @MEI_FOP_CONNECT: connect
111 * @MEI_FOP_DISCONNECT: disconnect
112 * @MEI_FOP_DISCONNECT_RSP: disconnect response
113 * @MEI_FOP_NOTIFY_START: start notification
114 * @MEI_FOP_NOTIFY_STOP: stop notification
115 * @MEI_FOP_DMA_MAP: request client dma map
116 * @MEI_FOP_DMA_UNMAP: request client dma unmap
117 */
118enum mei_cb_file_ops {
119 MEI_FOP_READ = 0,
120 MEI_FOP_WRITE,
121 MEI_FOP_CONNECT,
122 MEI_FOP_DISCONNECT,
123 MEI_FOP_DISCONNECT_RSP,
124 MEI_FOP_NOTIFY_START,
125 MEI_FOP_NOTIFY_STOP,
126 MEI_FOP_DMA_MAP,
127 MEI_FOP_DMA_UNMAP,
128};
129
130/**
131 * enum mei_cl_io_mode - io mode between driver and fw
132 *
133 * @MEI_CL_IO_TX_BLOCKING: send is blocking
134 * @MEI_CL_IO_TX_INTERNAL: internal communication between driver and FW
135 *
136 * @MEI_CL_IO_RX_NONBLOCK: recv is non-blocking
137 *
138 * @MEI_CL_IO_SGL: send command with sgl list.
139 */
140enum mei_cl_io_mode {
141 MEI_CL_IO_TX_BLOCKING = BIT(0),
142 MEI_CL_IO_TX_INTERNAL = BIT(1),
143
144 MEI_CL_IO_RX_NONBLOCK = BIT(2),
145
146 MEI_CL_IO_SGL = BIT(3),
147};
148
149/*
150 * Intel MEI message data struct
151 */
152struct mei_msg_data {
153 size_t size;
154 unsigned char *data;
155};
156
157struct mei_dma_data {
158 u8 buffer_id;
159 void *vaddr;
160 dma_addr_t daddr;
161 size_t size;
162};
163
164/**
165 * struct mei_dma_dscr - dma address descriptor
166 *
167 * @vaddr: dma buffer virtual address
168 * @daddr: dma buffer physical address
169 * @size : dma buffer size
170 */
171struct mei_dma_dscr {
172 void *vaddr;
173 dma_addr_t daddr;
174 size_t size;
175};
176
177/* Maximum number of processed FW status registers */
178#define MEI_FW_STATUS_MAX 6
179/* Minimal buffer for FW status string (8 bytes in dw + space or '\0') */
180#define MEI_FW_STATUS_STR_SZ (MEI_FW_STATUS_MAX * (8 + 1))
181
182
183/*
184 * struct mei_fw_status - storage of FW status data
185 *
186 * @count: number of actually available elements in array
187 * @status: FW status registers
188 */
189struct mei_fw_status {
190 int count;
191 u32 status[MEI_FW_STATUS_MAX];
192};
193
194/**
195 * struct mei_me_client - representation of me (fw) client
196 *
197 * @list: link in me client list
198 * @refcnt: struct reference count
199 * @props: client properties
200 * @client_id: me client id
201 * @tx_flow_ctrl_creds: flow control credits
202 * @connect_count: number connections to this client
203 * @bus_added: added to bus
204 */
205struct mei_me_client {
206 struct list_head list;
207 struct kref refcnt;
208 struct mei_client_properties props;
209 u8 client_id;
210 u8 tx_flow_ctrl_creds;
211 u8 connect_count;
212 u8 bus_added;
213};
214
215
216struct mei_cl;
217
218/**
219 * struct mei_cl_cb - file operation callback structure
220 *
221 * @list: link in callback queue
222 * @cl: file client who is running this operation
223 * @fop_type: file operation type
224 * @buf: buffer for data associated with the callback
225 * @buf_idx: last read index
226 * @vtag: virtual tag
227 * @fp: pointer to file structure
228 * @status: io status of the cb
229 * @internal: communication between driver and FW flag
230 * @blocking: transmission blocking mode
231 * @ext_hdr: extended header
232 */
233struct mei_cl_cb {
234 struct list_head list;
235 struct mei_cl *cl;
236 enum mei_cb_file_ops fop_type;
237 struct mei_msg_data buf;
238 size_t buf_idx;
239 u8 vtag;
240 const struct file *fp;
241 int status;
242 u32 internal:1;
243 u32 blocking:1;
244 struct mei_ext_hdr *ext_hdr;
245};
246
247/**
248 * struct mei_cl_vtag - file pointer to vtag mapping structure
249 *
250 * @list: link in map queue
251 * @fp: file pointer
252 * @vtag: corresponding vtag
253 * @pending_read: the read is pending on this file
254 */
255struct mei_cl_vtag {
256 struct list_head list;
257 const struct file *fp;
258 u8 vtag;
259 u8 pending_read:1;
260};
261
262/**
263 * struct mei_cl - me client host representation
264 * carried in file->private_data
265 *
266 * @link: link in the clients list
267 * @dev: mei parent device
268 * @state: file operation state
269 * @tx_wait: wait queue for tx completion
270 * @rx_wait: wait queue for rx completion
271 * @wait: wait queue for management operation
272 * @ev_wait: notification wait queue
273 * @ev_async: event async notification
274 * @status: connection status
275 * @me_cl: fw client connected
276 * @fp: file associated with client
277 * @host_client_id: host id
278 * @vtag_map: vtag map
279 * @tx_flow_ctrl_creds: transmit flow credentials
280 * @rx_flow_ctrl_creds: receive flow credentials
281 * @timer_count: watchdog timer for operation completion
282 * @notify_en: notification - enabled/disabled
283 * @notify_ev: pending notification event
284 * @tx_cb_queued: number of tx callbacks in queue
285 * @writing_state: state of the tx
286 * @rd_pending: pending read credits
287 * @rd_completed_lock: protects rd_completed queue
288 * @rd_completed: completed read
289 * @dma: dma settings
290 * @dma_mapped: dma buffer is currently mapped.
291 *
292 * @cldev: device on the mei client bus
293 */
294struct mei_cl {
295 struct list_head link;
296 struct mei_device *dev;
297 enum file_state state;
298 wait_queue_head_t tx_wait;
299 wait_queue_head_t rx_wait;
300 wait_queue_head_t wait;
301 wait_queue_head_t ev_wait;
302 struct fasync_struct *ev_async;
303 int status;
304 struct mei_me_client *me_cl;
305 const struct file *fp;
306 u8 host_client_id;
307 struct list_head vtag_map;
308 u8 tx_flow_ctrl_creds;
309 u8 rx_flow_ctrl_creds;
310 u8 timer_count;
311 u8 notify_en;
312 u8 notify_ev;
313 u8 tx_cb_queued;
314 enum mei_file_transaction_states writing_state;
315 struct list_head rd_pending;
316 spinlock_t rd_completed_lock; /* protects rd_completed queue */
317 struct list_head rd_completed;
318 struct mei_dma_data dma;
319 u8 dma_mapped;
320
321 struct mei_cl_device *cldev;
322};
323
324#define MEI_TX_QUEUE_LIMIT_DEFAULT 50
325#define MEI_TX_QUEUE_LIMIT_MAX 255
326#define MEI_TX_QUEUE_LIMIT_MIN 30
327
328/**
329 * struct mei_hw_ops - hw specific ops
330 *
331 * @host_is_ready : query for host readiness
332 *
333 * @hw_is_ready : query if hw is ready
334 * @hw_reset : reset hw
335 * @hw_start : start hw after reset
336 * @hw_config : configure hw
337 *
338 * @fw_status : get fw status registers
339 * @trc_status : get trc status register
340 * @pg_state : power gating state of the device
341 * @pg_in_transition : is device now in pg transition
342 * @pg_is_enabled : is power gating enabled
343 *
344 * @intr_clear : clear pending interrupts
345 * @intr_enable : enable interrupts
346 * @intr_disable : disable interrupts
347 * @synchronize_irq : synchronize irqs
348 *
349 * @hbuf_free_slots : query for write buffer empty slots
350 * @hbuf_is_ready : query if write buffer is empty
351 * @hbuf_depth : query for write buffer depth
352 *
353 * @write : write a message to FW
354 *
355 * @rdbuf_full_slots : query how many slots are filled
356 *
357 * @read_hdr : get first 4 bytes (header)
358 * @read : read a buffer from the FW
359 */
360struct mei_hw_ops {
361
362 bool (*host_is_ready)(struct mei_device *dev);
363
364 bool (*hw_is_ready)(struct mei_device *dev);
365 int (*hw_reset)(struct mei_device *dev, bool enable);
366 int (*hw_start)(struct mei_device *dev);
367 int (*hw_config)(struct mei_device *dev);
368
369 int (*fw_status)(struct mei_device *dev, struct mei_fw_status *fw_sts);
370 int (*trc_status)(struct mei_device *dev, u32 *trc);
371
372 enum mei_pg_state (*pg_state)(struct mei_device *dev);
373 bool (*pg_in_transition)(struct mei_device *dev);
374 bool (*pg_is_enabled)(struct mei_device *dev);
375
376 void (*intr_clear)(struct mei_device *dev);
377 void (*intr_enable)(struct mei_device *dev);
378 void (*intr_disable)(struct mei_device *dev);
379 void (*synchronize_irq)(struct mei_device *dev);
380
381 int (*hbuf_free_slots)(struct mei_device *dev);
382 bool (*hbuf_is_ready)(struct mei_device *dev);
383 u32 (*hbuf_depth)(const struct mei_device *dev);
384 int (*write)(struct mei_device *dev,
385 const void *hdr, size_t hdr_len,
386 const void *data, size_t data_len);
387
388 int (*rdbuf_full_slots)(struct mei_device *dev);
389
390 u32 (*read_hdr)(const struct mei_device *dev);
391 int (*read)(struct mei_device *dev,
392 unsigned char *buf, unsigned long len);
393};
394
395/* MEI bus API*/
396void mei_cl_bus_rescan_work(struct work_struct *work);
397void mei_cl_bus_dev_fixup(struct mei_cl_device *dev);
398ssize_t __mei_cl_send(struct mei_cl *cl, const u8 *buf, size_t length, u8 vtag,
399 unsigned int mode);
400ssize_t __mei_cl_send_timeout(struct mei_cl *cl, const u8 *buf, size_t length, u8 vtag,
401 unsigned int mode, unsigned long timeout);
402ssize_t __mei_cl_recv(struct mei_cl *cl, u8 *buf, size_t length, u8 *vtag,
403 unsigned int mode, unsigned long timeout);
404bool mei_cl_bus_rx_event(struct mei_cl *cl);
405bool mei_cl_bus_notify_event(struct mei_cl *cl);
406void mei_cl_bus_remove_devices(struct mei_device *bus);
407int mei_cl_bus_init(void);
408void mei_cl_bus_exit(void);
409
410/**
411 * enum mei_pg_event - power gating transition events
412 *
413 * @MEI_PG_EVENT_IDLE: the driver is not in power gating transition
414 * @MEI_PG_EVENT_WAIT: the driver is waiting for a pg event to complete
415 * @MEI_PG_EVENT_RECEIVED: the driver received pg event
416 * @MEI_PG_EVENT_INTR_WAIT: the driver is waiting for a pg event interrupt
417 * @MEI_PG_EVENT_INTR_RECEIVED: the driver received pg event interrupt
418 */
419enum mei_pg_event {
420 MEI_PG_EVENT_IDLE,
421 MEI_PG_EVENT_WAIT,
422 MEI_PG_EVENT_RECEIVED,
423 MEI_PG_EVENT_INTR_WAIT,
424 MEI_PG_EVENT_INTR_RECEIVED,
425};
426
427/**
428 * enum mei_pg_state - device internal power gating state
429 *
430 * @MEI_PG_OFF: device is not power gated - it is active
431 * @MEI_PG_ON: device is power gated - it is in lower power state
432 */
433enum mei_pg_state {
434 MEI_PG_OFF = 0,
435 MEI_PG_ON = 1,
436};
437
438const char *mei_pg_state_str(enum mei_pg_state state);
439
440/**
441 * struct mei_fw_version - MEI FW version struct
442 *
443 * @platform: platform identifier
444 * @major: major version field
445 * @minor: minor version field
446 * @buildno: build number version field
447 * @hotfix: hotfix number version field
448 */
449struct mei_fw_version {
450 u8 platform;
451 u8 major;
452 u16 minor;
453 u16 buildno;
454 u16 hotfix;
455};
456
457#define MEI_MAX_FW_VER_BLOCKS 3
458
459struct mei_dev_timeouts {
460 unsigned long hw_ready; /* Timeout on ready message, in jiffies */
461 int connect; /* HPS: at least 2 seconds, in seconds */
462 unsigned long cl_connect; /* HPS: Client Connect Timeout, in jiffies */
463 int client_init; /* HPS: Clients Enumeration Timeout, in seconds */
464 unsigned long pgi; /* PG Isolation time response, in jiffies */
465 unsigned int d0i3; /* D0i3 set/unset max response time, in jiffies */
466 unsigned long hbm; /* HBM operation timeout, in jiffies */
467 unsigned long mkhi_recv; /* receive timeout, in jiffies */
468};
469
470/**
471 * struct mei_device - MEI private device struct
472 *
473 * @dev : device on a bus
474 * @cdev : character device
475 * @minor : minor number allocated for device
476 *
477 * @write_list : write pending list
478 * @write_waiting_list : write completion list
479 * @ctrl_wr_list : pending control write list
480 * @ctrl_rd_list : pending control read list
481 * @tx_queue_limit: tx queues per client linit
482 *
483 * @file_list : list of opened handles
484 * @open_handle_count: number of opened handles
485 *
486 * @device_lock : big device lock
487 * @timer_work : MEI timer delayed work (timeouts)
488 *
489 * @recvd_hw_ready : hw ready message received flag
490 *
491 * @wait_hw_ready : wait queue for receive HW ready message form FW
492 * @wait_pg : wait queue for receive PG message from FW
493 * @wait_hbm_start : wait queue for receive HBM start message from FW
494 *
495 * @reset_count : number of consecutive resets
496 * @dev_state : device state
497 * @hbm_state : state of host bus message protocol
498 * @pxp_mode : PXP device mode
499 * @init_clients_timer : HBM init handshake timeout
500 *
501 * @pg_event : power gating event
502 * @pg_domain : runtime PM domain
503 *
504 * @rd_msg_buf : control messages buffer
505 * @rd_msg_hdr : read message header storage
506 * @rd_msg_hdr_count : how many dwords were already read from header
507 *
508 * @hbuf_is_ready : query if the host host/write buffer is ready
509 * @dr_dscr: DMA ring descriptors: TX, RX, and CTRL
510 *
511 * @version : HBM protocol version in use
512 * @hbm_f_pg_supported : hbm feature pgi protocol
513 * @hbm_f_dc_supported : hbm feature dynamic clients
514 * @hbm_f_dot_supported : hbm feature disconnect on timeout
515 * @hbm_f_ev_supported : hbm feature event notification
516 * @hbm_f_fa_supported : hbm feature fixed address client
517 * @hbm_f_ie_supported : hbm feature immediate reply to enum request
518 * @hbm_f_os_supported : hbm feature support OS ver message
519 * @hbm_f_dr_supported : hbm feature dma ring supported
520 * @hbm_f_vt_supported : hbm feature vtag supported
521 * @hbm_f_cap_supported : hbm feature capabilities message supported
522 * @hbm_f_cd_supported : hbm feature client dma supported
523 * @hbm_f_gsc_supported : hbm feature gsc supported
524 *
525 * @fw_ver : FW versions
526 *
527 * @fw_f_fw_ver_supported : fw feature: fw version supported
528 * @fw_ver_received : fw version received
529 *
530 * @me_clients_rwsem: rw lock over me_clients list
531 * @me_clients : list of FW clients
532 * @me_clients_map : FW clients bit map
533 * @host_clients_map : host clients id pool
534 *
535 * @allow_fixed_address: allow user space to connect a fixed client
536 * @override_fixed_address: force allow fixed address behavior
537 *
538 * @timeouts: actual timeout values
539 *
540 * @reset_work : work item for the device reset
541 * @bus_rescan_work : work item for the bus rescan
542 *
543 * @device_list : mei client bus list
544 * @cl_bus_lock : client bus list lock
545 *
546 * @kind : kind of mei device
547 *
548 * @dbgfs_dir : debugfs mei root directory
549 *
550 * @saved_fw_status : saved firmware status
551 * @saved_dev_state : saved device state
552 * @saved_fw_status_flag : flag indicating that firmware status was saved
553 * @gsc_reset_to_pxp : state of reset to the PXP mode
554 *
555 * @ops: : hw specific operations
556 * @hw : hw specific data
557 */
558struct mei_device {
559 struct device *dev;
560 struct cdev cdev;
561 int minor;
562
563 struct list_head write_list;
564 struct list_head write_waiting_list;
565 struct list_head ctrl_wr_list;
566 struct list_head ctrl_rd_list;
567 u8 tx_queue_limit;
568
569 struct list_head file_list;
570 long open_handle_count;
571
572 struct mutex device_lock;
573 struct delayed_work timer_work;
574
575 bool recvd_hw_ready;
576 /*
577 * waiting queue for receive message from FW
578 */
579 wait_queue_head_t wait_hw_ready;
580 wait_queue_head_t wait_pg;
581 wait_queue_head_t wait_hbm_start;
582
583 /*
584 * mei device states
585 */
586 unsigned long reset_count;
587 enum mei_dev_state dev_state;
588 enum mei_hbm_state hbm_state;
589 enum mei_dev_pxp_mode pxp_mode;
590 u16 init_clients_timer;
591
592 /*
593 * Power Gating support
594 */
595 enum mei_pg_event pg_event;
596#ifdef CONFIG_PM
597 struct dev_pm_domain pg_domain;
598#endif /* CONFIG_PM */
599
600 unsigned char rd_msg_buf[MEI_RD_MSG_BUF_SIZE];
601 u32 rd_msg_hdr[MEI_RD_MSG_BUF_SIZE];
602 int rd_msg_hdr_count;
603
604 /* write buffer */
605 bool hbuf_is_ready;
606
607 struct mei_dma_dscr dr_dscr[DMA_DSCR_NUM];
608
609 struct hbm_version version;
610 unsigned int hbm_f_pg_supported:1;
611 unsigned int hbm_f_dc_supported:1;
612 unsigned int hbm_f_dot_supported:1;
613 unsigned int hbm_f_ev_supported:1;
614 unsigned int hbm_f_fa_supported:1;
615 unsigned int hbm_f_ie_supported:1;
616 unsigned int hbm_f_os_supported:1;
617 unsigned int hbm_f_dr_supported:1;
618 unsigned int hbm_f_vt_supported:1;
619 unsigned int hbm_f_cap_supported:1;
620 unsigned int hbm_f_cd_supported:1;
621 unsigned int hbm_f_gsc_supported:1;
622
623 struct mei_fw_version fw_ver[MEI_MAX_FW_VER_BLOCKS];
624
625 unsigned int fw_f_fw_ver_supported:1;
626 unsigned int fw_ver_received:1;
627
628 struct rw_semaphore me_clients_rwsem;
629 struct list_head me_clients;
630 DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX);
631 DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX);
632
633 bool allow_fixed_address;
634 bool override_fixed_address;
635
636 struct mei_dev_timeouts timeouts;
637
638 struct work_struct reset_work;
639 struct work_struct bus_rescan_work;
640
641 /* List of bus devices */
642 struct list_head device_list;
643 struct mutex cl_bus_lock;
644
645 const char *kind;
646
647#if IS_ENABLED(CONFIG_DEBUG_FS)
648 struct dentry *dbgfs_dir;
649#endif /* CONFIG_DEBUG_FS */
650
651 struct mei_fw_status saved_fw_status;
652 enum mei_dev_state saved_dev_state;
653 bool saved_fw_status_flag;
654 enum mei_dev_reset_to_pxp gsc_reset_to_pxp;
655
656 const struct mei_hw_ops *ops;
657 char hw[] __aligned(sizeof(void *));
658};
659
660static inline unsigned long mei_secs_to_jiffies(unsigned long sec)
661{
662 return msecs_to_jiffies(sec * MSEC_PER_SEC);
663}
664
665/**
666 * mei_data2slots - get slots number from a message length
667 *
668 * @length: size of the messages in bytes
669 *
670 * Return: number of slots
671 */
672static inline u32 mei_data2slots(size_t length)
673{
674 return DIV_ROUND_UP(length, MEI_SLOT_SIZE);
675}
676
677/**
678 * mei_hbm2slots - get slots number from a hbm message length
679 * length + size of the mei message header
680 *
681 * @length: size of the messages in bytes
682 *
683 * Return: number of slots
684 */
685static inline u32 mei_hbm2slots(size_t length)
686{
687 return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, MEI_SLOT_SIZE);
688}
689
690/**
691 * mei_slots2data - get data in slots - bytes from slots
692 *
693 * @slots: number of available slots
694 *
695 * Return: number of bytes in slots
696 */
697static inline u32 mei_slots2data(int slots)
698{
699 return slots * MEI_SLOT_SIZE;
700}
701
702/*
703 * mei init function prototypes
704 */
705void mei_device_init(struct mei_device *dev,
706 struct device *device,
707 bool slow_fw,
708 const struct mei_hw_ops *hw_ops);
709int mei_reset(struct mei_device *dev);
710int mei_start(struct mei_device *dev);
711int mei_restart(struct mei_device *dev);
712void mei_stop(struct mei_device *dev);
713void mei_cancel_work(struct mei_device *dev);
714
715void mei_set_devstate(struct mei_device *dev, enum mei_dev_state state);
716
717int mei_dmam_ring_alloc(struct mei_device *dev);
718void mei_dmam_ring_free(struct mei_device *dev);
719bool mei_dma_ring_is_allocated(struct mei_device *dev);
720void mei_dma_ring_reset(struct mei_device *dev);
721void mei_dma_ring_read(struct mei_device *dev, unsigned char *buf, u32 len);
722void mei_dma_ring_write(struct mei_device *dev, unsigned char *buf, u32 len);
723u32 mei_dma_ring_empty_slots(struct mei_device *dev);
724
725/*
726 * MEI interrupt functions prototype
727 */
728
729void mei_timer(struct work_struct *work);
730void mei_schedule_stall_timer(struct mei_device *dev);
731int mei_irq_read_handler(struct mei_device *dev,
732 struct list_head *cmpl_list, s32 *slots);
733
734int mei_irq_write_handler(struct mei_device *dev, struct list_head *cmpl_list);
735void mei_irq_compl_handler(struct mei_device *dev, struct list_head *cmpl_list);
736
737/*
738 * Register Access Function
739 */
740
741
742static inline int mei_hw_config(struct mei_device *dev)
743{
744 return dev->ops->hw_config(dev);
745}
746
747static inline enum mei_pg_state mei_pg_state(struct mei_device *dev)
748{
749 return dev->ops->pg_state(dev);
750}
751
752static inline bool mei_pg_in_transition(struct mei_device *dev)
753{
754 return dev->ops->pg_in_transition(dev);
755}
756
757static inline bool mei_pg_is_enabled(struct mei_device *dev)
758{
759 return dev->ops->pg_is_enabled(dev);
760}
761
762static inline int mei_hw_reset(struct mei_device *dev, bool enable)
763{
764 return dev->ops->hw_reset(dev, enable);
765}
766
767static inline int mei_hw_start(struct mei_device *dev)
768{
769 return dev->ops->hw_start(dev);
770}
771
772static inline void mei_clear_interrupts(struct mei_device *dev)
773{
774 dev->ops->intr_clear(dev);
775}
776
777static inline void mei_enable_interrupts(struct mei_device *dev)
778{
779 dev->ops->intr_enable(dev);
780}
781
782static inline void mei_disable_interrupts(struct mei_device *dev)
783{
784 dev->ops->intr_disable(dev);
785}
786
787static inline void mei_synchronize_irq(struct mei_device *dev)
788{
789 dev->ops->synchronize_irq(dev);
790}
791
792static inline bool mei_host_is_ready(struct mei_device *dev)
793{
794 return dev->ops->host_is_ready(dev);
795}
796static inline bool mei_hw_is_ready(struct mei_device *dev)
797{
798 return dev->ops->hw_is_ready(dev);
799}
800
801static inline bool mei_hbuf_is_ready(struct mei_device *dev)
802{
803 return dev->ops->hbuf_is_ready(dev);
804}
805
806static inline int mei_hbuf_empty_slots(struct mei_device *dev)
807{
808 return dev->ops->hbuf_free_slots(dev);
809}
810
811static inline u32 mei_hbuf_depth(const struct mei_device *dev)
812{
813 return dev->ops->hbuf_depth(dev);
814}
815
816static inline int mei_write_message(struct mei_device *dev,
817 const void *hdr, size_t hdr_len,
818 const void *data, size_t data_len)
819{
820 return dev->ops->write(dev, hdr, hdr_len, data, data_len);
821}
822
823static inline u32 mei_read_hdr(const struct mei_device *dev)
824{
825 return dev->ops->read_hdr(dev);
826}
827
828static inline void mei_read_slots(struct mei_device *dev,
829 unsigned char *buf, unsigned long len)
830{
831 dev->ops->read(dev, buf, len);
832}
833
834static inline int mei_count_full_read_slots(struct mei_device *dev)
835{
836 return dev->ops->rdbuf_full_slots(dev);
837}
838
839static inline int mei_trc_status(struct mei_device *dev, u32 *trc)
840{
841 if (dev->ops->trc_status)
842 return dev->ops->trc_status(dev, trc);
843 return -EOPNOTSUPP;
844}
845
846static inline int mei_fw_status(struct mei_device *dev,
847 struct mei_fw_status *fw_status)
848{
849 return dev->ops->fw_status(dev, fw_status);
850}
851
852bool mei_hbuf_acquire(struct mei_device *dev);
853
854bool mei_write_is_idle(struct mei_device *dev);
855
856#if IS_ENABLED(CONFIG_DEBUG_FS)
857void mei_dbgfs_register(struct mei_device *dev, const char *name);
858void mei_dbgfs_deregister(struct mei_device *dev);
859#else
860static inline void mei_dbgfs_register(struct mei_device *dev, const char *name) {}
861static inline void mei_dbgfs_deregister(struct mei_device *dev) {}
862#endif /* CONFIG_DEBUG_FS */
863
864int mei_register(struct mei_device *dev, struct device *parent);
865void mei_deregister(struct mei_device *dev);
866
867#define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d dma=%1d ext=%1d internal=%1d comp=%1d"
868#define MEI_HDR_PRM(hdr) \
869 (hdr)->host_addr, (hdr)->me_addr, \
870 (hdr)->length, (hdr)->dma_ring, (hdr)->extended, \
871 (hdr)->internal, (hdr)->msg_complete
872
873ssize_t mei_fw_status2str(struct mei_fw_status *fw_sts, char *buf, size_t len);
874/**
875 * mei_fw_status_str - fetch and convert fw status registers to printable string
876 *
877 * @dev: the device structure
878 * @buf: string buffer at minimal size MEI_FW_STATUS_STR_SZ
879 * @len: buffer len must be >= MEI_FW_STATUS_STR_SZ
880 *
881 * Return: number of bytes written or < 0 on failure
882 */
883static inline ssize_t mei_fw_status_str(struct mei_device *dev,
884 char *buf, size_t len)
885{
886 struct mei_fw_status fw_status;
887 int ret;
888
889 buf[0] = '\0';
890
891 ret = mei_fw_status(dev, &fw_status);
892 if (ret)
893 return ret;
894
895 ret = mei_fw_status2str(&fw_status, buf, MEI_FW_STATUS_STR_SZ);
896
897 return ret;
898}
899
900/**
901 * kind_is_gsc - checks whether the device is gsc
902 *
903 * @dev: the device structure
904 *
905 * Return: whether the device is gsc
906 */
907static inline bool kind_is_gsc(struct mei_device *dev)
908{
909 /* check kind for NULL because it may be not set, like at the fist call to hw_start */
910 return dev->kind && (strcmp(dev->kind, "gsc") == 0);
911}
912
913/**
914 * kind_is_gscfi - checks whether the device is gscfi
915 *
916 * @dev: the device structure
917 *
918 * Return: whether the device is gscfi
919 */
920static inline bool kind_is_gscfi(struct mei_device *dev)
921{
922 /* check kind for NULL because it may be not set, like at the fist call to hw_start */
923 return dev->kind && (strcmp(dev->kind, "gscfi") == 0);
924}
925#endif
1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#ifndef _MEI_DEV_H_
18#define _MEI_DEV_H_
19
20#include <linux/types.h>
21#include <linux/watchdog.h>
22#include <linux/mei.h>
23#include "hw.h"
24
25/*
26 * watch dog definition
27 */
28#define MEI_WATCHDOG_DATA_SIZE 16
29#define MEI_START_WD_DATA_SIZE 20
30#define MEI_WD_PARAMS_SIZE 4
31#define MEI_WD_STATE_INDEPENDENCE_MSG_SENT (1 << 0)
32
33#define MEI_RD_MSG_BUF_SIZE (128 * sizeof(u32))
34
35/*
36 * MEI PCI Device object
37 */
38extern struct pci_dev *mei_device;
39
40
41/*
42 * AMTHI Client UUID
43 */
44extern const uuid_le mei_amthi_guid;
45
46/*
47 * Watchdog Client UUID
48 */
49extern const uuid_le mei_wd_guid;
50
51/*
52 * Watchdog independence state message
53 */
54extern const u8 mei_wd_state_independence_msg[3][4];
55
56/*
57 * Number of File descriptors/handles
58 * that can be opened to the driver.
59 *
60 * Limit to 253: 255 Total Clients
61 * minus internal client for AMTHI
62 * minus internal client for Watchdog
63 */
64#define MEI_MAX_OPEN_HANDLE_COUNT 253
65
66/*
67 * Number of Maximum MEI Clients
68 */
69#define MEI_CLIENTS_MAX 255
70
71/* File state */
72enum file_state {
73 MEI_FILE_INITIALIZING = 0,
74 MEI_FILE_CONNECTING,
75 MEI_FILE_CONNECTED,
76 MEI_FILE_DISCONNECTING,
77 MEI_FILE_DISCONNECTED
78};
79
80/* MEI device states */
81enum mei_states {
82 MEI_INITIALIZING = 0,
83 MEI_INIT_CLIENTS,
84 MEI_ENABLED,
85 MEI_RESETING,
86 MEI_DISABLED,
87 MEI_RECOVERING_FROM_RESET,
88 MEI_POWER_DOWN,
89 MEI_POWER_UP
90};
91
92/* init clients states*/
93enum mei_init_clients_states {
94 MEI_START_MESSAGE = 0,
95 MEI_ENUM_CLIENTS_MESSAGE,
96 MEI_CLIENT_PROPERTIES_MESSAGE
97};
98
99enum iamthif_states {
100 MEI_IAMTHIF_IDLE,
101 MEI_IAMTHIF_WRITING,
102 MEI_IAMTHIF_FLOW_CONTROL,
103 MEI_IAMTHIF_READING,
104 MEI_IAMTHIF_READ_COMPLETE
105};
106
107enum mei_file_transaction_states {
108 MEI_IDLE,
109 MEI_WRITING,
110 MEI_WRITE_COMPLETE,
111 MEI_FLOW_CONTROL,
112 MEI_READING,
113 MEI_READ_COMPLETE
114};
115
116/* MEI CB */
117enum mei_cb_major_types {
118 MEI_READ = 0,
119 MEI_WRITE,
120 MEI_IOCTL,
121 MEI_OPEN,
122 MEI_CLOSE
123};
124
125/*
126 * Intel MEI message data struct
127 */
128struct mei_message_data {
129 u32 size;
130 unsigned char *data;
131} __packed;
132
133
134struct mei_cl_cb {
135 struct list_head cb_list;
136 enum mei_cb_major_types major_file_operations;
137 void *file_private;
138 struct mei_message_data request_buffer;
139 struct mei_message_data response_buffer;
140 unsigned long information;
141 unsigned long read_time;
142 struct file *file_object;
143};
144
145/* MEI client instance carried as file->pirvate_data*/
146struct mei_cl {
147 struct list_head link;
148 struct mei_device *dev;
149 enum file_state state;
150 wait_queue_head_t tx_wait;
151 wait_queue_head_t rx_wait;
152 wait_queue_head_t wait;
153 int read_pending;
154 int status;
155 /* ID of client connected */
156 u8 host_client_id;
157 u8 me_client_id;
158 u8 mei_flow_ctrl_creds;
159 u8 timer_count;
160 enum mei_file_transaction_states reading_state;
161 enum mei_file_transaction_states writing_state;
162 int sm_state;
163 struct mei_cl_cb *read_cb;
164};
165
166struct mei_io_list {
167 struct mei_cl_cb mei_cb;
168};
169
170/* MEI private device struct */
171struct mei_device {
172 struct pci_dev *pdev; /* pointer to pci device struct */
173 /*
174 * lists of queues
175 */
176 /* array of pointers to aio lists */
177 struct mei_io_list read_list; /* driver read queue */
178 struct mei_io_list write_list; /* driver write queue */
179 struct mei_io_list write_waiting_list; /* write waiting queue */
180 struct mei_io_list ctrl_wr_list; /* managed write IOCTL list */
181 struct mei_io_list ctrl_rd_list; /* managed read IOCTL list */
182 struct mei_io_list amthi_cmd_list; /* amthi list for cmd waiting */
183
184 /* driver managed amthi list for reading completed amthi cmd data */
185 struct mei_io_list amthi_read_complete_list;
186 /*
187 * list of files
188 */
189 struct list_head file_list;
190 long open_handle_count;
191 /*
192 * memory of device
193 */
194 unsigned int mem_base;
195 unsigned int mem_length;
196 void __iomem *mem_addr;
197 /*
198 * lock for the device
199 */
200 struct mutex device_lock; /* device lock */
201 struct delayed_work timer_work; /* MEI timer delayed work (timeouts) */
202 bool recvd_msg;
203 /*
204 * hw states of host and fw(ME)
205 */
206 u32 host_hw_state;
207 u32 me_hw_state;
208 /*
209 * waiting queue for receive message from FW
210 */
211 wait_queue_head_t wait_recvd_msg;
212 wait_queue_head_t wait_stop_wd;
213
214 /*
215 * mei device states
216 */
217 enum mei_states mei_state;
218 enum mei_init_clients_states init_clients_state;
219 u16 init_clients_timer;
220 bool stop;
221 bool need_reset;
222
223 u32 extra_write_index;
224 unsigned char rd_msg_buf[MEI_RD_MSG_BUF_SIZE]; /* control messages */
225 u32 wr_msg_buf[128]; /* used for control messages */
226 u32 ext_msg_buf[8]; /* for control responses */
227 u32 rd_msg_hdr;
228
229 struct hbm_version version;
230
231 struct mei_me_client *me_clients; /* Note: memory has to be allocated */
232 DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX);
233 DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX);
234 u8 me_clients_num;
235 u8 me_client_presentation_num;
236 u8 me_client_index;
237 bool mei_host_buffer_is_empty;
238
239 struct mei_cl wd_cl;
240 bool wd_pending;
241 bool wd_stopped;
242 bool wd_bypass; /* if false, don't refresh watchdog ME client */
243 u16 wd_timeout; /* seconds ((wd_data[1] << 8) + wd_data[0]) */
244 u16 wd_due_counter;
245 unsigned char wd_data[MEI_START_WD_DATA_SIZE];
246
247
248
249 struct file *iamthif_file_object;
250 struct mei_cl iamthif_cl;
251 struct mei_cl_cb *iamthif_current_cb;
252 int iamthif_mtu;
253 unsigned long iamthif_timer;
254 u32 iamthif_stall_timer;
255 unsigned char *iamthif_msg_buf; /* Note: memory has to be allocated */
256 u32 iamthif_msg_buf_size;
257 u32 iamthif_msg_buf_index;
258 enum iamthif_states iamthif_state;
259 bool iamthif_flow_control_pending;
260 bool iamthif_ioctl;
261 bool iamthif_canceled;
262
263 bool wd_interface_reg;
264};
265
266
267/*
268 * mei init function prototypes
269 */
270struct mei_device *mei_device_init(struct pci_dev *pdev);
271void mei_reset(struct mei_device *dev, int interrupts);
272int mei_hw_init(struct mei_device *dev);
273int mei_task_initialize_clients(void *data);
274int mei_initialize_clients(struct mei_device *dev);
275int mei_disconnect_host_client(struct mei_device *dev, struct mei_cl *cl);
276void mei_remove_client_from_file_list(struct mei_device *dev, u8 host_client_id);
277void mei_host_init_iamthif(struct mei_device *dev);
278void mei_allocate_me_clients_storage(struct mei_device *dev);
279
280
281u8 mei_find_me_client_update_filext(struct mei_device *dev,
282 struct mei_cl *priv,
283 const uuid_le *cguid, u8 client_id);
284
285/*
286 * MEI IO List Functions
287 */
288void mei_io_list_init(struct mei_io_list *list);
289void mei_io_list_flush(struct mei_io_list *list, struct mei_cl *cl);
290
291/*
292 * MEI ME Client Functions
293 */
294
295struct mei_cl *mei_cl_allocate(struct mei_device *dev);
296void mei_cl_init(struct mei_cl *cl, struct mei_device *dev);
297int mei_cl_flush_queues(struct mei_cl *cl);
298/**
299 * mei_cl_cmp_id - tells if file private data have same id
300 *
301 * @fe1: private data of 1. file object
302 * @fe2: private data of 2. file object
303 *
304 * returns true - if ids are the same and not NULL
305 */
306static inline bool mei_cl_cmp_id(const struct mei_cl *cl1,
307 const struct mei_cl *cl2)
308{
309 return cl1 && cl2 &&
310 (cl1->host_client_id == cl2->host_client_id) &&
311 (cl1->me_client_id == cl2->me_client_id);
312}
313
314
315
316/*
317 * MEI Host Client Functions
318 */
319void mei_host_start_message(struct mei_device *dev);
320void mei_host_enum_clients_message(struct mei_device *dev);
321int mei_host_client_properties(struct mei_device *dev);
322
323/*
324 * MEI interrupt functions prototype
325 */
326irqreturn_t mei_interrupt_quick_handler(int irq, void *dev_id);
327irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id);
328void mei_timer(struct work_struct *work);
329
330/*
331 * MEI input output function prototype
332 */
333int mei_ioctl_connect_client(struct file *file,
334 struct mei_connect_client_data *data);
335
336int mei_start_read(struct mei_device *dev, struct mei_cl *cl);
337
338int amthi_write(struct mei_device *dev, struct mei_cl_cb *priv_cb);
339
340int amthi_read(struct mei_device *dev, struct file *file,
341 char __user *ubuf, size_t length, loff_t *offset);
342
343struct mei_cl_cb *find_amthi_read_list_entry(struct mei_device *dev,
344 struct file *file);
345
346void mei_run_next_iamthif_cmd(struct mei_device *dev);
347
348void mei_free_cb_private(struct mei_cl_cb *priv_cb);
349
350int mei_find_me_client_index(const struct mei_device *dev, uuid_le cuuid);
351
352/*
353 * Register Access Function
354 */
355
356/**
357 * mei_reg_read - Reads 32bit data from the mei device
358 *
359 * @dev: the device structure
360 * @offset: offset from which to read the data
361 *
362 * returns register value (u32)
363 */
364static inline u32 mei_reg_read(struct mei_device *dev, unsigned long offset)
365{
366 return ioread32(dev->mem_addr + offset);
367}
368
369/**
370 * mei_reg_write - Writes 32bit data to the mei device
371 *
372 * @dev: the device structure
373 * @offset: offset from which to write the data
374 * @value: register value to write (u32)
375 */
376static inline void mei_reg_write(struct mei_device *dev,
377 unsigned long offset, u32 value)
378{
379 iowrite32(value, dev->mem_addr + offset);
380}
381
382/**
383 * mei_hcsr_read - Reads 32bit data from the host CSR
384 *
385 * @dev: the device structure
386 *
387 * returns the byte read.
388 */
389static inline u32 mei_hcsr_read(struct mei_device *dev)
390{
391 return mei_reg_read(dev, H_CSR);
392}
393
394/**
395 * mei_mecsr_read - Reads 32bit data from the ME CSR
396 *
397 * @dev: the device structure
398 *
399 * returns ME_CSR_HA register value (u32)
400 */
401static inline u32 mei_mecsr_read(struct mei_device *dev)
402{
403 return mei_reg_read(dev, ME_CSR_HA);
404}
405
406/**
407 * get_me_cb_rw - Reads 32bit data from the mei ME_CB_RW register
408 *
409 * @dev: the device structure
410 *
411 * returns ME_CB_RW register value (u32)
412 */
413static inline u32 mei_mecbrw_read(struct mei_device *dev)
414{
415 return mei_reg_read(dev, ME_CB_RW);
416}
417
418
419/*
420 * mei interface function prototypes
421 */
422void mei_hcsr_set(struct mei_device *dev);
423void mei_csr_clear_his(struct mei_device *dev);
424
425void mei_enable_interrupts(struct mei_device *dev);
426void mei_disable_interrupts(struct mei_device *dev);
427
428#endif