1/*
  2 * Copyright 2010 Red Hat Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Ben Skeggs
 23 */
 24
 25#ifndef __NOUVEAU_PM_H__
 26#define __NOUVEAU_PM_H__
 27
 28struct nouveau_mem_exec_func {
 29	struct drm_device *dev;
 30	void (*precharge)(struct nouveau_mem_exec_func *);
 31	void (*refresh)(struct nouveau_mem_exec_func *);
 32	void (*refresh_auto)(struct nouveau_mem_exec_func *, bool);
 33	void (*refresh_self)(struct nouveau_mem_exec_func *, bool);
 34	void (*wait)(struct nouveau_mem_exec_func *, u32 nsec);
 35	u32  (*mrg)(struct nouveau_mem_exec_func *, int mr);
 36	void (*mrs)(struct nouveau_mem_exec_func *, int mr, u32 data);
 37	void (*clock_set)(struct nouveau_mem_exec_func *);
 38	void (*timing_set)(struct nouveau_mem_exec_func *);
 39	void *priv;
 40};
 41
 42/* nouveau_mem.c */
 43int  nouveau_mem_exec(struct nouveau_mem_exec_func *,
 44		      struct nouveau_pm_level *);
 45
 46/* nouveau_pm.c */
 47int  nouveau_pm_init(struct drm_device *dev);
 48void nouveau_pm_fini(struct drm_device *dev);
 49void nouveau_pm_resume(struct drm_device *dev);
 50extern const struct nouveau_pm_profile_func nouveau_pm_static_profile_func;
 51void nouveau_pm_trigger(struct drm_device *dev);
 52
 53/* nouveau_volt.c */
 54void nouveau_volt_init(struct drm_device *);
 55void nouveau_volt_fini(struct drm_device *);
 56int  nouveau_volt_vid_lookup(struct drm_device *, int voltage);
 57int  nouveau_volt_lvl_lookup(struct drm_device *, int vid);
 58int  nouveau_voltage_gpio_get(struct drm_device *);
 59int  nouveau_voltage_gpio_set(struct drm_device *, int voltage);
 60
 61/* nouveau_perf.c */
 62void nouveau_perf_init(struct drm_device *);
 63void nouveau_perf_fini(struct drm_device *);
 64u8 *nouveau_perf_rammap(struct drm_device *, u32 freq, u8 *ver,
 65			u8 *hdr, u8 *cnt, u8 *len);
 66u8 *nouveau_perf_ramcfg(struct drm_device *, u32 freq, u8 *ver, u8 *len);
 67u8 *nouveau_perf_timing(struct drm_device *, u32 freq, u8 *ver, u8 *len);
 68
 69/* nouveau_mem.c */
 70void nouveau_mem_timing_init(struct drm_device *);
 71void nouveau_mem_timing_fini(struct drm_device *);
 72
 73/* nv04_pm.c */
 74int nv04_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 75void *nv04_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
 76int nv04_pm_clocks_set(struct drm_device *, void *);
 77
 78/* nv40_pm.c */
 79int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 80void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
 81int nv40_pm_clocks_set(struct drm_device *, void *);
 82int nv40_pm_pwm_get(struct drm_device *, int, u32 *, u32 *);
 83int nv40_pm_pwm_set(struct drm_device *, int, u32, u32);
 84
 85/* nv50_pm.c */
 86int nv50_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 87void *nv50_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
 88int nv50_pm_clocks_set(struct drm_device *, void *);
 89int nv50_pm_pwm_get(struct drm_device *, int, u32 *, u32 *);
 90int nv50_pm_pwm_set(struct drm_device *, int, u32, u32);
 91
 92/* nva3_pm.c */
 93int nva3_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 94void *nva3_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
 95int nva3_pm_clocks_set(struct drm_device *, void *);
 96
 97/* nvc0_pm.c */
 98int nvc0_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
 99void *nvc0_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
100int nvc0_pm_clocks_set(struct drm_device *, void *);
101
102/* nouveau_temp.c */
103void nouveau_temp_init(struct drm_device *dev);
104void nouveau_temp_fini(struct drm_device *dev);
105void nouveau_temp_safety_checks(struct drm_device *dev);
106int nv40_temp_get(struct drm_device *dev);
107int nv84_temp_get(struct drm_device *dev);
108
109#endif