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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * vSMPowered(tm) systems specific initialization
  4 * Copyright (C) 2005 ScaleMP Inc.
  5 *
 
 
 
 
  6 * Ravikiran Thirumalai <kiran@scalemp.com>,
  7 * Shai Fultheim <shai@scalemp.com>
  8 * Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>,
  9 *			     Ravikiran Thirumalai <kiran@scalemp.com>
 10 */
 11
 12#include <linux/init.h>
 13#include <linux/pci_ids.h>
 14#include <linux/pci_regs.h>
 15#include <linux/smp.h>
 16#include <linux/irq.h>
 17
 18#include <asm/apic.h>
 19#include <asm/pci-direct.h>
 20#include <asm/io.h>
 21#include <asm/paravirt.h>
 22#include <asm/setup.h>
 23
 24#define TOPOLOGY_REGISTER_OFFSET 0x10
 25
 26#ifdef CONFIG_PCI
 27static void __init set_vsmp_ctl(void)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 28{
 29	void __iomem *address;
 30	unsigned int cap, ctl, cfg;
 31
 32	/* set vSMP magic bits to indicate vSMP capable kernel */
 33	cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
 34	address = early_ioremap(cfg, 8);
 35	cap = readl(address);
 36	ctl = readl(address + 4);
 37	printk(KERN_INFO "vSMP CTL: capabilities:0x%08x  control:0x%08x\n",
 38	       cap, ctl);
 39
 40	/* If possible, let the vSMP foundation route the interrupt optimally */
 41#ifdef CONFIG_SMP
 42	if (cap & ctl & BIT(8)) {
 43		ctl &= ~BIT(8);
 44
 45#ifdef CONFIG_PROC_FS
 46		/* Don't let users change irq affinity via procfs */
 47		no_irq_affinity = 1;
 48#endif
 
 
 49	}
 50#endif
 51
 52	writel(ctl, address + 4);
 53	ctl = readl(address + 4);
 54	pr_info("vSMP CTL: control set to:0x%08x\n", ctl);
 55
 56	early_iounmap(address, 8);
 57}
 
 
 
 
 
 
 
 58static int is_vsmp = -1;
 59
 60static void __init detect_vsmp_box(void)
 61{
 62	is_vsmp = 0;
 63
 64	if (!early_pci_allowed())
 65		return;
 66
 67	/* Check if we are running on a ScaleMP vSMPowered box */
 68	if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
 69	     (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
 70		is_vsmp = 1;
 71}
 72
 73static int is_vsmp_box(void)
 74{
 75	if (is_vsmp != -1)
 76		return is_vsmp;
 77	else {
 78		WARN_ON_ONCE(1);
 79		return 0;
 80	}
 81}
 82
 83#else
 84static void __init detect_vsmp_box(void)
 85{
 86}
 87static int is_vsmp_box(void)
 88{
 89	return 0;
 90}
 91static void __init set_vsmp_ctl(void)
 92{
 93}
 94#endif
 95
 96static void __init vsmp_cap_cpus(void)
 97{
 98#if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
 99	void __iomem *address;
100	unsigned int cfg, topology, node_shift, maxcpus;
101
102	/*
103	 * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the
104	 * ones present in the first board, unless explicitly overridden by
105	 * setup_max_cpus
106	 */
107	if (setup_max_cpus != NR_CPUS)
108		return;
109
110	/* Read the vSMP Foundation topology register */
111	cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
112	address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4);
113	if (WARN_ON(!address))
114		return;
115
116	topology = readl(address);
117	node_shift = (topology >> 16) & 0x7;
118	if (!node_shift)
119		/* The value 0 should be decoded as 8 */
120		node_shift = 8;
121	maxcpus = (topology & ((1 << node_shift) - 1)) + 1;
122
123	pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",
124		maxcpus);
125	setup_max_cpus = maxcpus;
126	early_iounmap(address, 4);
127#endif
128}
129
130void __init vsmp_init(void)
131{
132	detect_vsmp_box();
133	if (!is_vsmp_box())
134		return;
135
136	vsmp_cap_cpus();
137
138	set_vsmp_ctl();
139	return;
140}
v3.5.6
 
  1/*
  2 * vSMPowered(tm) systems specific initialization
  3 * Copyright (C) 2005 ScaleMP Inc.
  4 *
  5 * Use of this code is subject to the terms and conditions of the
  6 * GNU general public license version 2. See "COPYING" or
  7 * http://www.gnu.org/licenses/gpl.html
  8 *
  9 * Ravikiran Thirumalai <kiran@scalemp.com>,
 10 * Shai Fultheim <shai@scalemp.com>
 11 * Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>,
 12 *			     Ravikiran Thirumalai <kiran@scalemp.com>
 13 */
 14
 15#include <linux/init.h>
 16#include <linux/pci_ids.h>
 17#include <linux/pci_regs.h>
 18#include <linux/smp.h>
 
 19
 20#include <asm/apic.h>
 21#include <asm/pci-direct.h>
 22#include <asm/io.h>
 23#include <asm/paravirt.h>
 24#include <asm/setup.h>
 25
 26#define TOPOLOGY_REGISTER_OFFSET 0x10
 27
 28#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
 29/*
 30 * Interrupt control on vSMPowered systems:
 31 * ~AC is a shadow of IF.  If IF is 'on' AC should be 'off'
 32 * and vice versa.
 33 */
 34
 35static unsigned long vsmp_save_fl(void)
 36{
 37	unsigned long flags = native_save_fl();
 38
 39	if (!(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC))
 40		flags &= ~X86_EFLAGS_IF;
 41	return flags;
 42}
 43PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
 44
 45static void vsmp_restore_fl(unsigned long flags)
 46{
 47	if (flags & X86_EFLAGS_IF)
 48		flags &= ~X86_EFLAGS_AC;
 49	else
 50		flags |= X86_EFLAGS_AC;
 51	native_restore_fl(flags);
 52}
 53PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
 54
 55static void vsmp_irq_disable(void)
 56{
 57	unsigned long flags = native_save_fl();
 58
 59	native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
 60}
 61PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
 62
 63static void vsmp_irq_enable(void)
 64{
 65	unsigned long flags = native_save_fl();
 66
 67	native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
 68}
 69PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
 70
 71static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
 72				  unsigned long addr, unsigned len)
 73{
 74	switch (type) {
 75	case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
 76	case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
 77	case PARAVIRT_PATCH(pv_irq_ops.save_fl):
 78	case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
 79		return paravirt_patch_default(type, clobbers, ibuf, addr, len);
 80	default:
 81		return native_patch(type, clobbers, ibuf, addr, len);
 82	}
 83
 84}
 85
 86static void __init set_vsmp_pv_ops(void)
 87{
 88	void __iomem *address;
 89	unsigned int cap, ctl, cfg;
 90
 91	/* set vSMP magic bits to indicate vSMP capable kernel */
 92	cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
 93	address = early_ioremap(cfg, 8);
 94	cap = readl(address);
 95	ctl = readl(address + 4);
 96	printk(KERN_INFO "vSMP CTL: capabilities:0x%08x  control:0x%08x\n",
 97	       cap, ctl);
 98	if (cap & ctl & (1 << 4)) {
 99		/* Setup irq ops and turn on vSMP  IRQ fastpath handling */
100		pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
101		pv_irq_ops.irq_enable  = PV_CALLEE_SAVE(vsmp_irq_enable);
102		pv_irq_ops.save_fl  = PV_CALLEE_SAVE(vsmp_save_fl);
103		pv_irq_ops.restore_fl  = PV_CALLEE_SAVE(vsmp_restore_fl);
104		pv_init_ops.patch = vsmp_patch;
105
106		ctl &= ~(1 << 4);
107		writel(ctl, address + 4);
108		ctl = readl(address + 4);
109		printk(KERN_INFO "vSMP CTL: control set to:0x%08x\n", ctl);
110	}
 
 
 
 
 
111
112	early_iounmap(address, 8);
113}
114#else
115static void __init set_vsmp_pv_ops(void)
116{
117}
118#endif
119
120#ifdef CONFIG_PCI
121static int is_vsmp = -1;
122
123static void __init detect_vsmp_box(void)
124{
125	is_vsmp = 0;
126
127	if (!early_pci_allowed())
128		return;
129
130	/* Check if we are running on a ScaleMP vSMPowered box */
131	if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
132	     (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
133		is_vsmp = 1;
134}
135
136int is_vsmp_box(void)
137{
138	if (is_vsmp != -1)
139		return is_vsmp;
140	else {
141		WARN_ON_ONCE(1);
142		return 0;
143	}
144}
145
146#else
147static void __init detect_vsmp_box(void)
148{
149}
150int is_vsmp_box(void)
151{
152	return 0;
153}
 
 
 
154#endif
155
156static void __init vsmp_cap_cpus(void)
157{
158#if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP)
159	void __iomem *address;
160	unsigned int cfg, topology, node_shift, maxcpus;
161
162	/*
163	 * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the
164	 * ones present in the first board, unless explicitly overridden by
165	 * setup_max_cpus
166	 */
167	if (setup_max_cpus != NR_CPUS)
168		return;
169
170	/* Read the vSMP Foundation topology register */
171	cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
172	address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4);
173	if (WARN_ON(!address))
174		return;
175
176	topology = readl(address);
177	node_shift = (topology >> 16) & 0x7;
178	if (!node_shift)
179		/* The value 0 should be decoded as 8 */
180		node_shift = 8;
181	maxcpus = (topology & ((1 << node_shift) - 1)) + 1;
182
183	pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",
184		maxcpus);
185	setup_max_cpus = maxcpus;
186	early_iounmap(address, 4);
187#endif
188}
189
190void __init vsmp_init(void)
191{
192	detect_vsmp_box();
193	if (!is_vsmp_box())
194		return;
195
196	vsmp_cap_cpus();
197
198	set_vsmp_pv_ops();
199	return;
200}