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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * arch/arm/include/asm/glue-cache.h
4 *
5 * Copyright (C) 1999-2002 Russell King
6 */
7#ifndef ASM_GLUE_CACHE_H
8#define ASM_GLUE_CACHE_H
9
10#include <asm/glue.h>
11
12/*
13 * Cache Model
14 * ===========
15 */
16#undef _CACHE
17#undef MULTI_CACHE
18
19#if defined(CONFIG_CPU_CACHE_V4)
20# ifdef _CACHE
21# define MULTI_CACHE 1
22# else
23# define _CACHE v4
24# endif
25#endif
26
27#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
28 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
29 defined(CONFIG_CPU_ARM1026)
30# define MULTI_CACHE 1
31#endif
32
33#if defined(CONFIG_CPU_FA526)
34# ifdef _CACHE
35# define MULTI_CACHE 1
36# else
37# define _CACHE fa
38# endif
39#endif
40
41#if defined(CONFIG_CPU_ARM926T)
42# ifdef _CACHE
43# define MULTI_CACHE 1
44# else
45# define _CACHE arm926
46# endif
47#endif
48
49#if defined(CONFIG_CPU_ARM940T)
50# ifdef _CACHE
51# define MULTI_CACHE 1
52# else
53# define _CACHE arm940
54# endif
55#endif
56
57#if defined(CONFIG_CPU_ARM946E)
58# ifdef _CACHE
59# define MULTI_CACHE 1
60# else
61# define _CACHE arm946
62# endif
63#endif
64
65#if defined(CONFIG_CPU_CACHE_V4WB)
66# ifdef _CACHE
67# define MULTI_CACHE 1
68# else
69# define _CACHE v4wb
70# endif
71#endif
72
73#if defined(CONFIG_CPU_XSCALE)
74# ifdef _CACHE
75# define MULTI_CACHE 1
76# else
77# define _CACHE xscale
78# endif
79#endif
80
81#if defined(CONFIG_CPU_XSC3)
82# ifdef _CACHE
83# define MULTI_CACHE 1
84# else
85# define _CACHE xsc3
86# endif
87#endif
88
89#if defined(CONFIG_CPU_MOHAWK)
90# ifdef _CACHE
91# define MULTI_CACHE 1
92# else
93# define _CACHE mohawk
94# endif
95#endif
96
97#if defined(CONFIG_CPU_FEROCEON)
98# define MULTI_CACHE 1
99#endif
100
101#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
102# ifdef _CACHE
103# define MULTI_CACHE 1
104# else
105# define _CACHE v6
106# endif
107#endif
108
109#if defined(CONFIG_CPU_V7)
110# ifdef _CACHE
111# define MULTI_CACHE 1
112# else
113# define _CACHE v7
114# endif
115#endif
116
117#if defined(CONFIG_CACHE_B15_RAC)
118# define MULTI_CACHE 1
119#endif
120
121#ifdef CONFIG_CPU_CACHE_NOP
122# define MULTI_CACHE 1
123#endif
124
125#if defined(CONFIG_CPU_V7M)
126# define MULTI_CACHE 1
127#endif
128
129#if !defined(_CACHE) && !defined(MULTI_CACHE)
130#error Unknown cache maintenance model
131#endif
132
133#ifndef MULTI_CACHE
134#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
135#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
136/* This function only has a dedicated assembly callback on the v7 cache */
137#ifdef CONFIG_CPU_CACHE_V7
138#define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis)
139#else
140#define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_all)
141#endif
142#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
143#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
144#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
145#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
146#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
147
148#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
149#endif
150
151#endif
1/*
2 * arch/arm/include/asm/glue-cache.h
3 *
4 * Copyright (C) 1999-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef ASM_GLUE_CACHE_H
11#define ASM_GLUE_CACHE_H
12
13#include <asm/glue.h>
14
15/*
16 * Cache Model
17 * ===========
18 */
19#undef _CACHE
20#undef MULTI_CACHE
21
22#if defined(CONFIG_CPU_CACHE_V3)
23# ifdef _CACHE
24# define MULTI_CACHE 1
25# else
26# define _CACHE v3
27# endif
28#endif
29
30#if defined(CONFIG_CPU_CACHE_V4)
31# ifdef _CACHE
32# define MULTI_CACHE 1
33# else
34# define _CACHE v4
35# endif
36#endif
37
38#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
39 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
40 defined(CONFIG_CPU_ARM1026)
41# define MULTI_CACHE 1
42#endif
43
44#if defined(CONFIG_CPU_FA526)
45# ifdef _CACHE
46# define MULTI_CACHE 1
47# else
48# define _CACHE fa
49# endif
50#endif
51
52#if defined(CONFIG_CPU_ARM926T)
53# ifdef _CACHE
54# define MULTI_CACHE 1
55# else
56# define _CACHE arm926
57# endif
58#endif
59
60#if defined(CONFIG_CPU_ARM940T)
61# ifdef _CACHE
62# define MULTI_CACHE 1
63# else
64# define _CACHE arm940
65# endif
66#endif
67
68#if defined(CONFIG_CPU_ARM946E)
69# ifdef _CACHE
70# define MULTI_CACHE 1
71# else
72# define _CACHE arm946
73# endif
74#endif
75
76#if defined(CONFIG_CPU_CACHE_V4WB)
77# ifdef _CACHE
78# define MULTI_CACHE 1
79# else
80# define _CACHE v4wb
81# endif
82#endif
83
84#if defined(CONFIG_CPU_XSCALE)
85# ifdef _CACHE
86# define MULTI_CACHE 1
87# else
88# define _CACHE xscale
89# endif
90#endif
91
92#if defined(CONFIG_CPU_XSC3)
93# ifdef _CACHE
94# define MULTI_CACHE 1
95# else
96# define _CACHE xsc3
97# endif
98#endif
99
100#if defined(CONFIG_CPU_MOHAWK)
101# ifdef _CACHE
102# define MULTI_CACHE 1
103# else
104# define _CACHE mohawk
105# endif
106#endif
107
108#if defined(CONFIG_CPU_FEROCEON)
109# define MULTI_CACHE 1
110#endif
111
112#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
113//# ifdef _CACHE
114# define MULTI_CACHE 1
115//# else
116//# define _CACHE v6
117//# endif
118#endif
119
120#if defined(CONFIG_CPU_V7)
121//# ifdef _CACHE
122# define MULTI_CACHE 1
123//# else
124//# define _CACHE v7
125//# endif
126#endif
127
128#if !defined(_CACHE) && !defined(MULTI_CACHE)
129#error Unknown cache maintenance model
130#endif
131
132#ifndef MULTI_CACHE
133#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
134#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
135#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
136#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
137#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
138#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
139#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
140
141#define dmac_map_area __glue(_CACHE,_dma_map_area)
142#define dmac_unmap_area __glue(_CACHE,_dma_unmap_area)
143#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
144#endif
145
146#endif