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1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9260 family SoC";
15 compatible = "atmel,at91sam9260";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 tcb0 = &tcb0;
30 tcb1 = &tcb1;
31 };
32 cpus {
33 cpu@0 {
34 compatible = "arm,arm926ejs";
35 };
36 };
37
38 memory {
39 reg = <0x20000000 0x04000000>;
40 };
41
42 ahb {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47
48 apb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 aic: interrupt-controller@fffff000 {
55 #interrupt-cells = <2>;
56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller;
58 reg = <0xfffff000 0x200>;
59 };
60
61 ramc0: ramc@ffffea00 {
62 compatible = "atmel,at91sam9260-sdramc";
63 reg = <0xffffea00 0x200>;
64 };
65
66 pmc: pmc@fffffc00 {
67 compatible = "atmel,at91rm9200-pmc";
68 reg = <0xfffffc00 0x100>;
69 };
70
71 rstc@fffffd00 {
72 compatible = "atmel,at91sam9260-rstc";
73 reg = <0xfffffd00 0x10>;
74 };
75
76 shdwc@fffffd10 {
77 compatible = "atmel,at91sam9260-shdwc";
78 reg = <0xfffffd10 0x10>;
79 };
80
81 pit: timer@fffffd30 {
82 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>;
84 interrupts = <1 4>;
85 };
86
87 tcb0: timer@fffa0000 {
88 compatible = "atmel,at91rm9200-tcb";
89 reg = <0xfffa0000 0x100>;
90 interrupts = <17 4 18 4 19 4>;
91 };
92
93 tcb1: timer@fffdc000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfffdc000 0x100>;
96 interrupts = <26 4 27 4 28 4>;
97 };
98
99 pioA: gpio@fffff400 {
100 compatible = "atmel,at91rm9200-gpio";
101 reg = <0xfffff400 0x100>;
102 interrupts = <2 4>;
103 #gpio-cells = <2>;
104 gpio-controller;
105 interrupt-controller;
106 };
107
108 pioB: gpio@fffff600 {
109 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff600 0x100>;
111 interrupts = <3 4>;
112 #gpio-cells = <2>;
113 gpio-controller;
114 interrupt-controller;
115 };
116
117 pioC: gpio@fffff800 {
118 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff800 0x100>;
120 interrupts = <4 4>;
121 #gpio-cells = <2>;
122 gpio-controller;
123 interrupt-controller;
124 };
125
126 dbgu: serial@fffff200 {
127 compatible = "atmel,at91sam9260-usart";
128 reg = <0xfffff200 0x200>;
129 interrupts = <1 4>;
130 status = "disabled";
131 };
132
133 usart0: serial@fffb0000 {
134 compatible = "atmel,at91sam9260-usart";
135 reg = <0xfffb0000 0x200>;
136 interrupts = <6 4>;
137 atmel,use-dma-rx;
138 atmel,use-dma-tx;
139 status = "disabled";
140 };
141
142 usart1: serial@fffb4000 {
143 compatible = "atmel,at91sam9260-usart";
144 reg = <0xfffb4000 0x200>;
145 interrupts = <7 4>;
146 atmel,use-dma-rx;
147 atmel,use-dma-tx;
148 status = "disabled";
149 };
150
151 usart2: serial@fffb8000 {
152 compatible = "atmel,at91sam9260-usart";
153 reg = <0xfffb8000 0x200>;
154 interrupts = <8 4>;
155 atmel,use-dma-rx;
156 atmel,use-dma-tx;
157 status = "disabled";
158 };
159
160 usart3: serial@fffd0000 {
161 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfffd0000 0x200>;
163 interrupts = <23 4>;
164 atmel,use-dma-rx;
165 atmel,use-dma-tx;
166 status = "disabled";
167 };
168
169 usart4: serial@fffd4000 {
170 compatible = "atmel,at91sam9260-usart";
171 reg = <0xfffd4000 0x200>;
172 interrupts = <24 4>;
173 atmel,use-dma-rx;
174 atmel,use-dma-tx;
175 status = "disabled";
176 };
177
178 usart5: serial@fffd8000 {
179 compatible = "atmel,at91sam9260-usart";
180 reg = <0xfffd8000 0x200>;
181 interrupts = <25 4>;
182 atmel,use-dma-rx;
183 atmel,use-dma-tx;
184 status = "disabled";
185 };
186
187 macb0: ethernet@fffc4000 {
188 compatible = "cdns,at32ap7000-macb", "cdns,macb";
189 reg = <0xfffc4000 0x100>;
190 interrupts = <21 4>;
191 status = "disabled";
192 };
193
194 usb1: gadget@fffa4000 {
195 compatible = "atmel,at91rm9200-udc";
196 reg = <0xfffa4000 0x4000>;
197 interrupts = <10 4>;
198 status = "disabled";
199 };
200
201 adc0: adc@fffe0000 {
202 compatible = "atmel,at91sam9260-adc";
203 reg = <0xfffe0000 0x100>;
204 interrupts = <5 4>;
205 atmel,adc-use-external-triggers;
206 atmel,adc-channels-used = <0xf>;
207 atmel,adc-vref = <3300>;
208 atmel,adc-num-channels = <4>;
209 atmel,adc-startup-time = <15>;
210 atmel,adc-channel-base = <0x30>;
211 atmel,adc-drdy-mask = <0x10000>;
212 atmel,adc-status-register = <0x1c>;
213 atmel,adc-trigger-register = <0x04>;
214
215 trigger@0 {
216 trigger-name = "timer-counter-0";
217 trigger-value = <0x1>;
218 };
219 trigger@1 {
220 trigger-name = "timer-counter-1";
221 trigger-value = <0x3>;
222 };
223
224 trigger@2 {
225 trigger-name = "timer-counter-2";
226 trigger-value = <0x5>;
227 };
228
229 trigger@3 {
230 trigger-name = "external";
231 trigger-value = <0x13>;
232 trigger-external;
233 };
234 };
235 };
236
237 nand0: nand@40000000 {
238 compatible = "atmel,at91rm9200-nand";
239 #address-cells = <1>;
240 #size-cells = <1>;
241 reg = <0x40000000 0x10000000
242 0xffffe800 0x200
243 >;
244 atmel,nand-addr-offset = <21>;
245 atmel,nand-cmd-offset = <22>;
246 gpios = <&pioC 13 0
247 &pioC 14 0
248 0
249 >;
250 status = "disabled";
251 };
252
253 usb0: ohci@00500000 {
254 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
255 reg = <0x00500000 0x100000>;
256 interrupts = <20 4>;
257 status = "disabled";
258 };
259 };
260
261 i2c@0 {
262 compatible = "i2c-gpio";
263 gpios = <&pioA 23 0 /* sda */
264 &pioA 24 0 /* scl */
265 >;
266 i2c-gpio,sda-open-drain;
267 i2c-gpio,scl-open-drain;
268 i2c-gpio,delay-us = <2>; /* ~100 kHz */
269 #address-cells = <1>;
270 #size-cells = <0>;
271 status = "disabled";
272 };
273};