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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * wm8960.c -- WM8960 ALSA SoC Audio driver
4 *
5 * Copyright 2007-11 Wolfson Microelectronics, plc
6 *
7 * Author: Liam Girdwood
8 */
9
10#include <linux/module.h>
11#include <linux/moduleparam.h>
12#include <linux/init.h>
13#include <linux/delay.h>
14#include <linux/pm.h>
15#include <linux/clk.h>
16#include <linux/i2c.h>
17#include <linux/acpi.h>
18#include <linux/slab.h>
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/soc.h>
23#include <sound/initval.h>
24#include <sound/tlv.h>
25#include <sound/wm8960.h>
26
27#include "wm8960.h"
28
29/* R25 - Power 1 */
30#define WM8960_VMID_MASK 0x180
31#define WM8960_VREF 0x40
32
33/* R26 - Power 2 */
34#define WM8960_PWR2_LOUT1 0x40
35#define WM8960_PWR2_ROUT1 0x20
36#define WM8960_PWR2_OUT3 0x02
37
38/* R28 - Anti-pop 1 */
39#define WM8960_POBCTRL 0x80
40#define WM8960_BUFDCOPEN 0x10
41#define WM8960_BUFIOEN 0x08
42#define WM8960_SOFT_ST 0x04
43#define WM8960_HPSTBY 0x01
44
45/* R29 - Anti-pop 2 */
46#define WM8960_DISOP 0x40
47#define WM8960_DRES_MASK 0x30
48
49#define WM8960_DSCH_TOUT 600 /* discharge timeout, ms */
50
51static bool is_pll_freq_available(unsigned int source, unsigned int target);
52static int wm8960_set_pll(struct snd_soc_component *component,
53 unsigned int freq_in, unsigned int freq_out);
54/*
55 * wm8960 register cache
56 * We can't read the WM8960 register space when we are
57 * using 2 wire for device control, so we cache them instead.
58 */
59static const struct reg_default wm8960_reg_defaults[] = {
60 { 0x0, 0x00a7 },
61 { 0x1, 0x00a7 },
62 { 0x2, 0x0000 },
63 { 0x3, 0x0000 },
64 { 0x4, 0x0000 },
65 { 0x5, 0x0008 },
66 { 0x6, 0x0000 },
67 { 0x7, 0x000a },
68 { 0x8, 0x01c0 },
69 { 0x9, 0x0000 },
70 { 0xa, 0x00ff },
71 { 0xb, 0x00ff },
72
73 { 0x10, 0x0000 },
74 { 0x11, 0x007b },
75 { 0x12, 0x0100 },
76 { 0x13, 0x0032 },
77 { 0x14, 0x0000 },
78 { 0x15, 0x00c3 },
79 { 0x16, 0x00c3 },
80 { 0x17, 0x01c0 },
81 { 0x18, 0x0000 },
82 { 0x19, 0x0000 },
83 { 0x1a, 0x0000 },
84 { 0x1b, 0x0000 },
85 { 0x1c, 0x0000 },
86 { 0x1d, 0x0000 },
87
88 { 0x20, 0x0100 },
89 { 0x21, 0x0100 },
90 { 0x22, 0x0050 },
91
92 { 0x25, 0x0050 },
93 { 0x26, 0x0000 },
94 { 0x27, 0x0000 },
95 { 0x28, 0x0000 },
96 { 0x29, 0x0000 },
97 { 0x2a, 0x0040 },
98 { 0x2b, 0x0000 },
99 { 0x2c, 0x0000 },
100 { 0x2d, 0x0050 },
101 { 0x2e, 0x0050 },
102 { 0x2f, 0x0000 },
103 { 0x30, 0x0002 },
104 { 0x31, 0x0037 },
105
106 { 0x33, 0x0080 },
107 { 0x34, 0x0008 },
108 { 0x35, 0x0031 },
109 { 0x36, 0x0026 },
110 { 0x37, 0x00e9 },
111};
112
113static bool wm8960_volatile(struct device *dev, unsigned int reg)
114{
115 switch (reg) {
116 case WM8960_RESET:
117 return true;
118 default:
119 return false;
120 }
121}
122
123#define WM8960_NUM_SUPPLIES 5
124static const char *wm8960_supply_names[WM8960_NUM_SUPPLIES] = {
125 "DCVDD",
126 "DBVDD",
127 "AVDD",
128 "SPKVDD1",
129 "SPKVDD2",
130};
131
132struct wm8960_priv {
133 struct clk *mclk;
134 struct regmap *regmap;
135 int (*set_bias_level)(struct snd_soc_component *,
136 enum snd_soc_bias_level level);
137 struct snd_soc_dapm_widget *lout1;
138 struct snd_soc_dapm_widget *rout1;
139 struct snd_soc_dapm_widget *out3;
140 bool deemph;
141 int lrclk;
142 int bclk;
143 int sysclk;
144 int clk_id;
145 int freq_in;
146 bool is_stream_in_use[2];
147 struct wm8960_data pdata;
148 ktime_t dsch_start;
149 struct regulator_bulk_data supplies[WM8960_NUM_SUPPLIES];
150};
151
152#define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
153
154/* enumerated controls */
155static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
156 "Right Inverted", "Stereo Inversion"};
157static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
158static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
159static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
160static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
161static const char *wm8960_adc_data_output_sel[] = {
162 "Left Data = Left ADC; Right Data = Right ADC",
163 "Left Data = Left ADC; Right Data = Left ADC",
164 "Left Data = Right ADC; Right Data = Right ADC",
165 "Left Data = Right ADC; Right Data = Left ADC",
166};
167static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
168static const char *wm8960_dacslope[] = {"Normal", "Sloping"};
169
170static const struct soc_enum wm8960_enum[] = {
171 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
172 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
173 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
174 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
175 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
176 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
177 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
178 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
179 SOC_ENUM_SINGLE(WM8960_DACCTL2, 1, 2, wm8960_dacslope),
180};
181
182static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
183
184static int wm8960_set_deemph(struct snd_soc_component *component)
185{
186 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
187 int val, i, best;
188
189 /* If we're using deemphasis select the nearest available sample
190 * rate.
191 */
192 if (wm8960->deemph) {
193 best = 1;
194 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
195 if (abs(deemph_settings[i] - wm8960->lrclk) <
196 abs(deemph_settings[best] - wm8960->lrclk))
197 best = i;
198 }
199
200 val = best << 1;
201 } else {
202 val = 0;
203 }
204
205 dev_dbg(component->dev, "Set deemphasis %d\n", val);
206
207 return snd_soc_component_update_bits(component, WM8960_DACCTL1,
208 0x6, val);
209}
210
211static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
212 struct snd_ctl_elem_value *ucontrol)
213{
214 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
215 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
216
217 ucontrol->value.integer.value[0] = wm8960->deemph;
218 return 0;
219}
220
221static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
222 struct snd_ctl_elem_value *ucontrol)
223{
224 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
225 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
226 unsigned int deemph = ucontrol->value.integer.value[0];
227
228 if (deemph > 1)
229 return -EINVAL;
230
231 wm8960->deemph = deemph;
232
233 return wm8960_set_deemph(component);
234}
235
236static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
237static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
238static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
239static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
240static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
241static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
242static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
243 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
244 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
245);
246
247static const struct snd_kcontrol_new wm8960_snd_controls[] = {
248SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
249 0, 63, 0, inpga_tlv),
250SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
251 6, 1, 0),
252SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
253 7, 1, 1),
254
255SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
256 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
257SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
258 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
259SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
260 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
261SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
262 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
263SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
264 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
265SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
266 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
267
268SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
269 0, 255, 0, dac_tlv),
270
271SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
272 0, 127, 0, out_tlv),
273SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
274 7, 1, 0),
275
276SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
277 0, 127, 0, out_tlv),
278SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
279 7, 1, 0),
280SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
281SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
282
283SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
284SOC_ENUM("ADC Polarity", wm8960_enum[0]),
285SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
286
287SOC_ENUM("DAC Polarity", wm8960_enum[1]),
288SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
289 wm8960_get_deemph, wm8960_put_deemph),
290
291SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
292SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
293SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
294SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
295
296SOC_ENUM("ALC Function", wm8960_enum[4]),
297SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
298SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
299SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
300SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
301SOC_ENUM("ALC Mode", wm8960_enum[5]),
302SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
303SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
304
305SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
306SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
307
308SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
309 0, 255, 0, adc_tlv),
310
311SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
312 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
313SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
314 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
315SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
316 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
317SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
318 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
319
320SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
321SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
322SOC_ENUM("DAC Filter Characteristics", wm8960_enum[8]),
323};
324
325static const struct snd_kcontrol_new wm8960_lin_boost[] = {
326SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
327SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
328SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
329};
330
331static const struct snd_kcontrol_new wm8960_lin[] = {
332SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
333};
334
335static const struct snd_kcontrol_new wm8960_rin_boost[] = {
336SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
337SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
338SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
339};
340
341static const struct snd_kcontrol_new wm8960_rin[] = {
342SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
343};
344
345static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
346SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
347SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
348SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
349};
350
351static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
352SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
353SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
354SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
355};
356
357static const struct snd_kcontrol_new wm8960_mono_out[] = {
358SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
359SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
360};
361
362static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
363SND_SOC_DAPM_INPUT("LINPUT1"),
364SND_SOC_DAPM_INPUT("RINPUT1"),
365SND_SOC_DAPM_INPUT("LINPUT2"),
366SND_SOC_DAPM_INPUT("RINPUT2"),
367SND_SOC_DAPM_INPUT("LINPUT3"),
368SND_SOC_DAPM_INPUT("RINPUT3"),
369
370SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
371
372SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
373 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
374SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
375 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
376
377SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
378 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
379SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
380 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
381
382SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
383SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
384
385SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
386SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
387
388SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
389 &wm8960_loutput_mixer[0],
390 ARRAY_SIZE(wm8960_loutput_mixer)),
391SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
392 &wm8960_routput_mixer[0],
393 ARRAY_SIZE(wm8960_routput_mixer)),
394
395SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
396SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
397
398SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
399SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
400
401SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
402SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
403
404SND_SOC_DAPM_OUTPUT("SPK_LP"),
405SND_SOC_DAPM_OUTPUT("SPK_LN"),
406SND_SOC_DAPM_OUTPUT("HP_L"),
407SND_SOC_DAPM_OUTPUT("HP_R"),
408SND_SOC_DAPM_OUTPUT("SPK_RP"),
409SND_SOC_DAPM_OUTPUT("SPK_RN"),
410SND_SOC_DAPM_OUTPUT("OUT3"),
411};
412
413static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
414SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
415 &wm8960_mono_out[0],
416 ARRAY_SIZE(wm8960_mono_out)),
417};
418
419/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
420static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
421SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
422};
423
424static const struct snd_soc_dapm_route audio_paths[] = {
425 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
426 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
427 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
428
429 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
430 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
431 { "Left Input Mixer", NULL, "LINPUT2" },
432 { "Left Input Mixer", NULL, "LINPUT3" },
433
434 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
435 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
436 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
437
438 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
439 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
440 { "Right Input Mixer", NULL, "RINPUT2" },
441 { "Right Input Mixer", NULL, "RINPUT3" },
442
443 { "Left ADC", NULL, "Left Input Mixer" },
444 { "Right ADC", NULL, "Right Input Mixer" },
445
446 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
447 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
448 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
449
450 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
451 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
452 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
453
454 { "LOUT1 PGA", NULL, "Left Output Mixer" },
455 { "ROUT1 PGA", NULL, "Right Output Mixer" },
456
457 { "HP_L", NULL, "LOUT1 PGA" },
458 { "HP_R", NULL, "ROUT1 PGA" },
459
460 { "Left Speaker PGA", NULL, "Left Output Mixer" },
461 { "Right Speaker PGA", NULL, "Right Output Mixer" },
462
463 { "Left Speaker Output", NULL, "Left Speaker PGA" },
464 { "Right Speaker Output", NULL, "Right Speaker PGA" },
465
466 { "SPK_LN", NULL, "Left Speaker Output" },
467 { "SPK_LP", NULL, "Left Speaker Output" },
468 { "SPK_RN", NULL, "Right Speaker Output" },
469 { "SPK_RP", NULL, "Right Speaker Output" },
470};
471
472static const struct snd_soc_dapm_route audio_paths_out3[] = {
473 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
474 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
475
476 { "OUT3", NULL, "Mono Output Mixer", }
477};
478
479static const struct snd_soc_dapm_route audio_paths_capless[] = {
480 { "HP_L", NULL, "OUT3 VMID" },
481 { "HP_R", NULL, "OUT3 VMID" },
482
483 { "OUT3 VMID", NULL, "Left Output Mixer" },
484 { "OUT3 VMID", NULL, "Right Output Mixer" },
485};
486
487static int wm8960_add_widgets(struct snd_soc_component *component)
488{
489 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
490 struct wm8960_data *pdata = &wm8960->pdata;
491 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
492 struct snd_soc_dapm_widget *w;
493
494 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
495 ARRAY_SIZE(wm8960_dapm_widgets));
496
497 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
498
499 /* In capless mode OUT3 is used to provide VMID for the
500 * headphone outputs, otherwise it is used as a mono mixer.
501 */
502 if (pdata && pdata->capless) {
503 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
504 ARRAY_SIZE(wm8960_dapm_widgets_capless));
505
506 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
507 ARRAY_SIZE(audio_paths_capless));
508 } else {
509 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
510 ARRAY_SIZE(wm8960_dapm_widgets_out3));
511
512 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
513 ARRAY_SIZE(audio_paths_out3));
514 }
515
516 /* We need to power up the headphone output stage out of
517 * sequence for capless mode. To save scanning the widget
518 * list each time to find the desired power state do so now
519 * and save the result.
520 */
521 list_for_each_entry(w, &component->card->widgets, list) {
522 if (w->dapm != dapm)
523 continue;
524 if (strcmp(w->name, "LOUT1 PGA") == 0)
525 wm8960->lout1 = w;
526 if (strcmp(w->name, "ROUT1 PGA") == 0)
527 wm8960->rout1 = w;
528 if (strcmp(w->name, "OUT3 VMID") == 0)
529 wm8960->out3 = w;
530 }
531
532 return 0;
533}
534
535static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
536 unsigned int fmt)
537{
538 struct snd_soc_component *component = codec_dai->component;
539 u16 iface = 0;
540
541 /* set master/slave audio interface */
542 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
543 case SND_SOC_DAIFMT_CBM_CFM:
544 iface |= 0x0040;
545 break;
546 case SND_SOC_DAIFMT_CBS_CFS:
547 break;
548 default:
549 return -EINVAL;
550 }
551
552 /* interface format */
553 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
554 case SND_SOC_DAIFMT_I2S:
555 iface |= 0x0002;
556 break;
557 case SND_SOC_DAIFMT_RIGHT_J:
558 break;
559 case SND_SOC_DAIFMT_LEFT_J:
560 iface |= 0x0001;
561 break;
562 case SND_SOC_DAIFMT_DSP_A:
563 iface |= 0x0003;
564 break;
565 case SND_SOC_DAIFMT_DSP_B:
566 iface |= 0x0013;
567 break;
568 default:
569 return -EINVAL;
570 }
571
572 /* clock inversion */
573 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
574 case SND_SOC_DAIFMT_NB_NF:
575 break;
576 case SND_SOC_DAIFMT_IB_IF:
577 iface |= 0x0090;
578 break;
579 case SND_SOC_DAIFMT_IB_NF:
580 iface |= 0x0080;
581 break;
582 case SND_SOC_DAIFMT_NB_IF:
583 iface |= 0x0010;
584 break;
585 default:
586 return -EINVAL;
587 }
588
589 /* set iface */
590 snd_soc_component_write(component, WM8960_IFACE1, iface);
591 return 0;
592}
593
594static struct {
595 int rate;
596 unsigned int val;
597} alc_rates[] = {
598 { 48000, 0 },
599 { 44100, 0 },
600 { 32000, 1 },
601 { 22050, 2 },
602 { 24000, 2 },
603 { 16000, 3 },
604 { 11025, 4 },
605 { 12000, 4 },
606 { 8000, 5 },
607};
608
609/* -1 for reserved value */
610static const int sysclk_divs[] = { 1, -1, 2, -1 };
611
612/* Multiply 256 for internal 256 div */
613static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
614
615/* Multiply 10 to eliminate decimials */
616static const int bclk_divs[] = {
617 10, 15, 20, 30, 40, 55, 60, 80, 110,
618 120, 160, 220, 240, 320, 320, 320
619};
620
621/**
622 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
623 * The sysclk must be chosen such that:
624 * - sysclk = MCLK / sysclk_divs
625 * - lrclk = sysclk / dac_divs
626 * - 10 * bclk = sysclk / bclk_divs
627 *
628 * @wm8960: codec private data
629 * @mclk: MCLK used to derive sysclk
630 * @sysclk_idx: sysclk_divs index for found sysclk
631 * @dac_idx: dac_divs index for found lrclk
632 * @bclk_idx: bclk_divs index for found bclk
633 *
634 * Returns:
635 * -1, in case no sysclk frequency available found
636 * >=0, in case we could derive bclk and lrclk from sysclk using
637 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
638 */
639static
640int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
641 int *sysclk_idx, int *dac_idx, int *bclk_idx)
642{
643 int sysclk, bclk, lrclk;
644 int i, j, k;
645 int diff;
646
647 /* marker for no match */
648 *bclk_idx = -1;
649
650 bclk = wm8960->bclk;
651 lrclk = wm8960->lrclk;
652
653 /* check if the sysclk frequency is available. */
654 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
655 if (sysclk_divs[i] == -1)
656 continue;
657 sysclk = mclk / sysclk_divs[i];
658 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
659 if (sysclk != dac_divs[j] * lrclk)
660 continue;
661 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
662 diff = sysclk - bclk * bclk_divs[k] / 10;
663 if (diff == 0) {
664 *sysclk_idx = i;
665 *dac_idx = j;
666 *bclk_idx = k;
667 break;
668 }
669 }
670 if (k != ARRAY_SIZE(bclk_divs))
671 break;
672 }
673 if (j != ARRAY_SIZE(dac_divs))
674 break;
675 }
676 return *bclk_idx;
677}
678
679/**
680 * wm8960_configure_pll - checks if there is a PLL out frequency available
681 * The PLL out frequency must be chosen such that:
682 * - sysclk = lrclk * dac_divs
683 * - freq_out = sysclk * sysclk_divs
684 * - 10 * sysclk = bclk * bclk_divs
685 *
686 * If we cannot find an exact match for (sysclk, lrclk, bclk)
687 * triplet, we relax the bclk such that bclk is chosen as the
688 * closest available frequency greater than expected bclk.
689 *
690 * @component: component structure
691 * @freq_in: input frequency used to derive freq out via PLL
692 * @sysclk_idx: sysclk_divs index for found sysclk
693 * @dac_idx: dac_divs index for found lrclk
694 * @bclk_idx: bclk_divs index for found bclk
695 *
696 * Returns:
697 * < 0, in case no PLL frequency out available was found
698 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
699 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
700 */
701static
702int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
703 int *sysclk_idx, int *dac_idx, int *bclk_idx)
704{
705 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
706 int sysclk, bclk, lrclk, freq_out;
707 int diff, closest, best_freq_out;
708 int i, j, k;
709
710 bclk = wm8960->bclk;
711 lrclk = wm8960->lrclk;
712 closest = freq_in;
713
714 best_freq_out = -EINVAL;
715 *sysclk_idx = *dac_idx = *bclk_idx = -1;
716
717 /*
718 * From Datasheet, the PLL performs best when f2 is between
719 * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
720 * or 12.288MHz, then sysclkdiv = 2 is the best choice.
721 * So search sysclk_divs from 2 to 1 other than from 1 to 2.
722 */
723 for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
724 if (sysclk_divs[i] == -1)
725 continue;
726 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
727 sysclk = lrclk * dac_divs[j];
728 freq_out = sysclk * sysclk_divs[i];
729
730 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
731 if (!is_pll_freq_available(freq_in, freq_out))
732 continue;
733
734 diff = sysclk - bclk * bclk_divs[k] / 10;
735 if (diff == 0) {
736 *sysclk_idx = i;
737 *dac_idx = j;
738 *bclk_idx = k;
739 return freq_out;
740 }
741 if (diff > 0 && closest > diff) {
742 *sysclk_idx = i;
743 *dac_idx = j;
744 *bclk_idx = k;
745 closest = diff;
746 best_freq_out = freq_out;
747 }
748 }
749 }
750 }
751
752 return best_freq_out;
753}
754static int wm8960_configure_clocking(struct snd_soc_component *component)
755{
756 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
757 int freq_out, freq_in;
758 u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1);
759 int i, j, k;
760 int ret;
761
762 /*
763 * For Slave mode clocking should still be configured,
764 * so this if statement should be removed, but some platform
765 * may not work if the sysclk is not configured, to avoid such
766 * compatible issue, just add '!wm8960->sysclk' condition in
767 * this if statement.
768 */
769 if (!(iface1 & (1 << 6)) && !wm8960->sysclk) {
770 dev_warn(component->dev,
771 "slave mode, but proceeding with no clock configuration\n");
772 return 0;
773 }
774
775 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
776 dev_err(component->dev, "No MCLK configured\n");
777 return -EINVAL;
778 }
779
780 freq_in = wm8960->freq_in;
781 /*
782 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
783 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
784 * directly. Otherwise, auto select a available pll out frequency
785 * and set PLL.
786 */
787 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
788 /* disable the PLL and using MCLK to provide sysclk */
789 wm8960_set_pll(component, 0, 0);
790 freq_out = freq_in;
791 } else if (wm8960->sysclk) {
792 freq_out = wm8960->sysclk;
793 } else {
794 dev_err(component->dev, "No SYSCLK configured\n");
795 return -EINVAL;
796 }
797
798 if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
799 ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
800 if (ret >= 0) {
801 goto configure_clock;
802 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
803 dev_err(component->dev, "failed to configure clock\n");
804 return -EINVAL;
805 }
806 }
807
808 freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
809 if (freq_out < 0) {
810 dev_err(component->dev, "failed to configure clock via PLL\n");
811 return freq_out;
812 }
813 wm8960_set_pll(component, freq_in, freq_out);
814
815configure_clock:
816 /* configure sysclk clock */
817 snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
818
819 /* configure frame clock */
820 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
821 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
822
823 /* configure bit clock */
824 snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
825
826 return 0;
827}
828
829static int wm8960_hw_params(struct snd_pcm_substream *substream,
830 struct snd_pcm_hw_params *params,
831 struct snd_soc_dai *dai)
832{
833 struct snd_soc_component *component = dai->component;
834 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
835 u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3;
836 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
837 int i;
838
839 wm8960->bclk = snd_soc_params_to_bclk(params);
840 if (params_channels(params) == 1)
841 wm8960->bclk *= 2;
842
843 /* bit size */
844 switch (params_width(params)) {
845 case 16:
846 break;
847 case 20:
848 iface |= 0x0004;
849 break;
850 case 24:
851 iface |= 0x0008;
852 break;
853 case 32:
854 /* right justify mode does not support 32 word length */
855 if ((iface & 0x3) != 0) {
856 iface |= 0x000c;
857 break;
858 }
859 fallthrough;
860 default:
861 dev_err(component->dev, "unsupported width %d\n",
862 params_width(params));
863 return -EINVAL;
864 }
865
866 wm8960->lrclk = params_rate(params);
867 /* Update filters for the new rate */
868 if (tx) {
869 wm8960_set_deemph(component);
870 } else {
871 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
872 if (alc_rates[i].rate == params_rate(params))
873 snd_soc_component_update_bits(component,
874 WM8960_ADDCTL3, 0x7,
875 alc_rates[i].val);
876 }
877
878 /* set iface */
879 snd_soc_component_write(component, WM8960_IFACE1, iface);
880
881 wm8960->is_stream_in_use[tx] = true;
882
883 if (!wm8960->is_stream_in_use[!tx])
884 return wm8960_configure_clocking(component);
885
886 return 0;
887}
888
889static int wm8960_hw_free(struct snd_pcm_substream *substream,
890 struct snd_soc_dai *dai)
891{
892 struct snd_soc_component *component = dai->component;
893 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
894 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
895
896 wm8960->is_stream_in_use[tx] = false;
897
898 return 0;
899}
900
901static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
902{
903 struct snd_soc_component *component = dai->component;
904
905 if (mute)
906 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
907 else
908 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
909 return 0;
910}
911
912static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
913 enum snd_soc_bias_level level)
914{
915 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
916 u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
917 int ret;
918 ktime_t tout;
919
920 switch (level) {
921 case SND_SOC_BIAS_ON:
922 break;
923
924 case SND_SOC_BIAS_PREPARE:
925 switch (snd_soc_component_get_bias_level(component)) {
926 case SND_SOC_BIAS_STANDBY:
927 if (!IS_ERR(wm8960->mclk)) {
928 ret = clk_prepare_enable(wm8960->mclk);
929 if (ret) {
930 dev_err(component->dev,
931 "Failed to enable MCLK: %d\n",
932 ret);
933 return ret;
934 }
935 }
936
937 ret = wm8960_configure_clocking(component);
938 if (ret)
939 return ret;
940
941 /* Set VMID to 2x50k */
942 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
943 break;
944
945 case SND_SOC_BIAS_ON:
946 /*
947 * If it's sysclk auto mode, and the pll is enabled,
948 * disable the pll
949 */
950 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
951 wm8960_set_pll(component, 0, 0);
952
953 if (!IS_ERR(wm8960->mclk))
954 clk_disable_unprepare(wm8960->mclk);
955 break;
956
957 default:
958 break;
959 }
960
961 break;
962
963 case SND_SOC_BIAS_STANDBY:
964 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
965 /* ensure discharge is complete */
966 tout = WM8960_DSCH_TOUT - ktime_ms_delta(ktime_get(), wm8960->dsch_start);
967 if (tout > 0)
968 msleep(tout);
969
970 regcache_sync(wm8960->regmap);
971
972 /* Enable anti-pop features */
973 snd_soc_component_write(component, WM8960_APOP1,
974 WM8960_POBCTRL | WM8960_SOFT_ST |
975 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
976
977 /* Enable & ramp VMID at 2x50k */
978 snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
979 msleep(100);
980
981 /* Enable VREF */
982 snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
983 WM8960_VREF);
984
985 /* Disable anti-pop features */
986 snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
987 }
988
989 /* Set VMID to 2x250k */
990 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
991 break;
992
993 case SND_SOC_BIAS_OFF:
994 /* Enable anti-pop features */
995 snd_soc_component_write(component, WM8960_APOP1,
996 WM8960_POBCTRL | WM8960_SOFT_ST |
997 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
998
999 /* Disable VMID and VREF, mark discharge */
1000 snd_soc_component_write(component, WM8960_POWER1, 0);
1001 wm8960->dsch_start = ktime_get();
1002 break;
1003 }
1004
1005 return 0;
1006}
1007
1008static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
1009 enum snd_soc_bias_level level)
1010{
1011 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1012 u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
1013 int reg, ret;
1014
1015 switch (level) {
1016 case SND_SOC_BIAS_ON:
1017 break;
1018
1019 case SND_SOC_BIAS_PREPARE:
1020 switch (snd_soc_component_get_bias_level(component)) {
1021 case SND_SOC_BIAS_STANDBY:
1022 /* Enable anti pop mode */
1023 snd_soc_component_update_bits(component, WM8960_APOP1,
1024 WM8960_POBCTRL | WM8960_SOFT_ST |
1025 WM8960_BUFDCOPEN,
1026 WM8960_POBCTRL | WM8960_SOFT_ST |
1027 WM8960_BUFDCOPEN);
1028
1029 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1030 reg = 0;
1031 if (wm8960->lout1 && wm8960->lout1->power)
1032 reg |= WM8960_PWR2_LOUT1;
1033 if (wm8960->rout1 && wm8960->rout1->power)
1034 reg |= WM8960_PWR2_ROUT1;
1035 if (wm8960->out3 && wm8960->out3->power)
1036 reg |= WM8960_PWR2_OUT3;
1037 snd_soc_component_update_bits(component, WM8960_POWER2,
1038 WM8960_PWR2_LOUT1 |
1039 WM8960_PWR2_ROUT1 |
1040 WM8960_PWR2_OUT3, reg);
1041
1042 /* Enable VMID at 2*50k */
1043 snd_soc_component_update_bits(component, WM8960_POWER1,
1044 WM8960_VMID_MASK, 0x80);
1045
1046 /* Ramp */
1047 msleep(100);
1048
1049 /* Enable VREF */
1050 snd_soc_component_update_bits(component, WM8960_POWER1,
1051 WM8960_VREF, WM8960_VREF);
1052
1053 msleep(100);
1054
1055 if (!IS_ERR(wm8960->mclk)) {
1056 ret = clk_prepare_enable(wm8960->mclk);
1057 if (ret) {
1058 dev_err(component->dev,
1059 "Failed to enable MCLK: %d\n",
1060 ret);
1061 return ret;
1062 }
1063 }
1064
1065 ret = wm8960_configure_clocking(component);
1066 if (ret)
1067 return ret;
1068
1069 break;
1070
1071 case SND_SOC_BIAS_ON:
1072 /*
1073 * If it's sysclk auto mode, and the pll is enabled,
1074 * disable the pll
1075 */
1076 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
1077 wm8960_set_pll(component, 0, 0);
1078
1079 if (!IS_ERR(wm8960->mclk))
1080 clk_disable_unprepare(wm8960->mclk);
1081
1082 /* Enable anti-pop mode */
1083 snd_soc_component_update_bits(component, WM8960_APOP1,
1084 WM8960_POBCTRL | WM8960_SOFT_ST |
1085 WM8960_BUFDCOPEN,
1086 WM8960_POBCTRL | WM8960_SOFT_ST |
1087 WM8960_BUFDCOPEN);
1088
1089 /* Disable VMID and VREF */
1090 snd_soc_component_update_bits(component, WM8960_POWER1,
1091 WM8960_VREF | WM8960_VMID_MASK, 0);
1092 break;
1093
1094 case SND_SOC_BIAS_OFF:
1095 regcache_sync(wm8960->regmap);
1096 break;
1097 default:
1098 break;
1099 }
1100 break;
1101
1102 case SND_SOC_BIAS_STANDBY:
1103 switch (snd_soc_component_get_bias_level(component)) {
1104 case SND_SOC_BIAS_PREPARE:
1105 /* Disable HP discharge */
1106 snd_soc_component_update_bits(component, WM8960_APOP2,
1107 WM8960_DISOP | WM8960_DRES_MASK,
1108 0);
1109
1110 /* Disable anti-pop features */
1111 snd_soc_component_update_bits(component, WM8960_APOP1,
1112 WM8960_POBCTRL | WM8960_SOFT_ST |
1113 WM8960_BUFDCOPEN,
1114 WM8960_POBCTRL | WM8960_SOFT_ST |
1115 WM8960_BUFDCOPEN);
1116 break;
1117
1118 default:
1119 break;
1120 }
1121 break;
1122
1123 case SND_SOC_BIAS_OFF:
1124 break;
1125 }
1126
1127 return 0;
1128}
1129
1130/* PLL divisors */
1131struct _pll_div {
1132 u32 pre_div:1;
1133 u32 n:4;
1134 u32 k:24;
1135};
1136
1137static bool is_pll_freq_available(unsigned int source, unsigned int target)
1138{
1139 unsigned int Ndiv;
1140
1141 if (source == 0 || target == 0)
1142 return false;
1143
1144 /* Scale up target to PLL operating frequency */
1145 target *= 4;
1146 Ndiv = target / source;
1147
1148 if (Ndiv < 6) {
1149 source >>= 1;
1150 Ndiv = target / source;
1151 }
1152
1153 if ((Ndiv < 6) || (Ndiv > 12))
1154 return false;
1155
1156 return true;
1157}
1158
1159/* The size in bits of the pll divide multiplied by 10
1160 * to allow rounding later */
1161#define FIXED_PLL_SIZE ((1 << 24) * 10)
1162
1163static int pll_factors(unsigned int source, unsigned int target,
1164 struct _pll_div *pll_div)
1165{
1166 unsigned long long Kpart;
1167 unsigned int K, Ndiv, Nmod;
1168
1169 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1170
1171 /* Scale up target to PLL operating frequency */
1172 target *= 4;
1173
1174 Ndiv = target / source;
1175 if (Ndiv < 6) {
1176 source >>= 1;
1177 pll_div->pre_div = 1;
1178 Ndiv = target / source;
1179 } else
1180 pll_div->pre_div = 0;
1181
1182 if ((Ndiv < 6) || (Ndiv > 12)) {
1183 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1184 return -EINVAL;
1185 }
1186
1187 pll_div->n = Ndiv;
1188 Nmod = target % source;
1189 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1190
1191 do_div(Kpart, source);
1192
1193 K = Kpart & 0xFFFFFFFF;
1194
1195 /* Check if we need to round */
1196 if ((K % 10) >= 5)
1197 K += 5;
1198
1199 /* Move down to proper range now rounding is done */
1200 K /= 10;
1201
1202 pll_div->k = K;
1203
1204 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1205 pll_div->n, pll_div->k, pll_div->pre_div);
1206
1207 return 0;
1208}
1209
1210static int wm8960_set_pll(struct snd_soc_component *component,
1211 unsigned int freq_in, unsigned int freq_out)
1212{
1213 u16 reg;
1214 static struct _pll_div pll_div;
1215 int ret;
1216
1217 if (freq_in && freq_out) {
1218 ret = pll_factors(freq_in, freq_out, &pll_div);
1219 if (ret != 0)
1220 return ret;
1221 }
1222
1223 /* Disable the PLL: even if we are changing the frequency the
1224 * PLL needs to be disabled while we do so. */
1225 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
1226 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
1227
1228 if (!freq_in || !freq_out)
1229 return 0;
1230
1231 reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f;
1232 reg |= pll_div.pre_div << 4;
1233 reg |= pll_div.n;
1234
1235 if (pll_div.k) {
1236 reg |= 0x20;
1237
1238 snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1239 snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1240 snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
1241 }
1242 snd_soc_component_write(component, WM8960_PLL1, reg);
1243
1244 /* Turn it on */
1245 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
1246 msleep(250);
1247 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
1248
1249 return 0;
1250}
1251
1252static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1253 int source, unsigned int freq_in, unsigned int freq_out)
1254{
1255 struct snd_soc_component *component = codec_dai->component;
1256 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1257
1258 wm8960->freq_in = freq_in;
1259
1260 if (pll_id == WM8960_SYSCLK_AUTO)
1261 return 0;
1262
1263 return wm8960_set_pll(component, freq_in, freq_out);
1264}
1265
1266static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1267 int div_id, int div)
1268{
1269 struct snd_soc_component *component = codec_dai->component;
1270 u16 reg;
1271
1272 switch (div_id) {
1273 case WM8960_SYSCLKDIV:
1274 reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9;
1275 snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1276 break;
1277 case WM8960_DACDIV:
1278 reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7;
1279 snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1280 break;
1281 case WM8960_OPCLKDIV:
1282 reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f;
1283 snd_soc_component_write(component, WM8960_PLL1, reg | div);
1284 break;
1285 case WM8960_DCLKDIV:
1286 reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f;
1287 snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
1288 break;
1289 case WM8960_TOCLKSEL:
1290 reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd;
1291 snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
1292 break;
1293 default:
1294 return -EINVAL;
1295 }
1296
1297 return 0;
1298}
1299
1300static int wm8960_set_bias_level(struct snd_soc_component *component,
1301 enum snd_soc_bias_level level)
1302{
1303 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1304
1305 return wm8960->set_bias_level(component, level);
1306}
1307
1308static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1309 unsigned int freq, int dir)
1310{
1311 struct snd_soc_component *component = dai->component;
1312 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1313
1314 switch (clk_id) {
1315 case WM8960_SYSCLK_MCLK:
1316 snd_soc_component_update_bits(component, WM8960_CLOCK1,
1317 0x1, WM8960_SYSCLK_MCLK);
1318 break;
1319 case WM8960_SYSCLK_PLL:
1320 snd_soc_component_update_bits(component, WM8960_CLOCK1,
1321 0x1, WM8960_SYSCLK_PLL);
1322 break;
1323 case WM8960_SYSCLK_AUTO:
1324 break;
1325 default:
1326 return -EINVAL;
1327 }
1328
1329 wm8960->sysclk = freq;
1330 wm8960->clk_id = clk_id;
1331
1332 return 0;
1333}
1334
1335#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1336
1337#define WM8960_FORMATS \
1338 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1339 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1340
1341static const struct snd_soc_dai_ops wm8960_dai_ops = {
1342 .hw_params = wm8960_hw_params,
1343 .hw_free = wm8960_hw_free,
1344 .mute_stream = wm8960_mute,
1345 .set_fmt = wm8960_set_dai_fmt,
1346 .set_clkdiv = wm8960_set_dai_clkdiv,
1347 .set_pll = wm8960_set_dai_pll,
1348 .set_sysclk = wm8960_set_dai_sysclk,
1349 .no_capture_mute = 1,
1350};
1351
1352static struct snd_soc_dai_driver wm8960_dai = {
1353 .name = "wm8960-hifi",
1354 .playback = {
1355 .stream_name = "Playback",
1356 .channels_min = 1,
1357 .channels_max = 2,
1358 .rates = WM8960_RATES,
1359 .formats = WM8960_FORMATS,},
1360 .capture = {
1361 .stream_name = "Capture",
1362 .channels_min = 1,
1363 .channels_max = 2,
1364 .rates = WM8960_RATES,
1365 .formats = WM8960_FORMATS,},
1366 .ops = &wm8960_dai_ops,
1367 .symmetric_rate = 1,
1368};
1369
1370static int wm8960_probe(struct snd_soc_component *component)
1371{
1372 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1373 struct wm8960_data *pdata = &wm8960->pdata;
1374
1375 if (pdata->capless)
1376 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1377 else
1378 wm8960->set_bias_level = wm8960_set_bias_level_out3;
1379
1380 snd_soc_add_component_controls(component, wm8960_snd_controls,
1381 ARRAY_SIZE(wm8960_snd_controls));
1382 wm8960_add_widgets(component);
1383
1384 return 0;
1385}
1386
1387static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
1388 .probe = wm8960_probe,
1389 .set_bias_level = wm8960_set_bias_level,
1390 .suspend_bias_off = 1,
1391 .idle_bias_on = 1,
1392 .use_pmdown_time = 1,
1393 .endianness = 1,
1394};
1395
1396static const struct regmap_config wm8960_regmap = {
1397 .reg_bits = 7,
1398 .val_bits = 9,
1399 .max_register = WM8960_PLL4,
1400
1401 .reg_defaults = wm8960_reg_defaults,
1402 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1403 .cache_type = REGCACHE_MAPLE,
1404
1405 .volatile_reg = wm8960_volatile,
1406};
1407
1408static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1409 struct wm8960_data *pdata)
1410{
1411 const struct device_node *np = i2c->dev.of_node;
1412
1413 if (of_property_read_bool(np, "wlf,capless"))
1414 pdata->capless = true;
1415
1416 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1417 pdata->shared_lrclk = true;
1418
1419 of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg,
1420 ARRAY_SIZE(pdata->gpio_cfg));
1421
1422 of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg,
1423 ARRAY_SIZE(pdata->hp_cfg));
1424}
1425
1426static int wm8960_i2c_probe(struct i2c_client *i2c)
1427{
1428 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1429 struct wm8960_priv *wm8960;
1430 unsigned int i;
1431 int ret;
1432 u8 val;
1433
1434 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1435 GFP_KERNEL);
1436 if (wm8960 == NULL)
1437 return -ENOMEM;
1438
1439 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1440 if (IS_ERR(wm8960->mclk)) {
1441 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1442 return -EPROBE_DEFER;
1443 } else {
1444 ret = clk_get_rate(wm8960->mclk);
1445 if (ret >= 0) {
1446 wm8960->freq_in = ret;
1447 } else {
1448 dev_err(&i2c->dev, "Failed to read MCLK rate: %d\n",
1449 ret);
1450 }
1451 }
1452
1453 for (i = 0; i < ARRAY_SIZE(wm8960->supplies); i++)
1454 wm8960->supplies[i].supply = wm8960_supply_names[i];
1455
1456 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8960->supplies),
1457 wm8960->supplies);
1458 if (ret < 0) {
1459 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
1460 return ret;
1461 }
1462
1463 ret = regulator_bulk_enable(ARRAY_SIZE(wm8960->supplies),
1464 wm8960->supplies);
1465 if (ret < 0) {
1466 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
1467 return ret;
1468 }
1469
1470 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1471 if (IS_ERR(wm8960->regmap)) {
1472 ret = PTR_ERR(wm8960->regmap);
1473 goto bulk_disable;
1474 }
1475
1476 if (pdata)
1477 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1478 else if (i2c->dev.of_node)
1479 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1480
1481 ret = i2c_master_recv(i2c, &val, sizeof(val));
1482 if (ret >= 0) {
1483 dev_err(&i2c->dev, "Not wm8960, wm8960 reg can not read by i2c\n");
1484 ret = -EINVAL;
1485 goto bulk_disable;
1486 }
1487
1488 ret = wm8960_reset(wm8960->regmap);
1489 if (ret != 0) {
1490 dev_err(&i2c->dev, "Failed to issue reset\n");
1491 goto bulk_disable;
1492 }
1493
1494 if (wm8960->pdata.shared_lrclk) {
1495 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1496 0x4, 0x4);
1497 if (ret != 0) {
1498 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1499 ret);
1500 goto bulk_disable;
1501 }
1502 }
1503
1504 /* Latch the update bits */
1505 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1506 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1507 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1508 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1509 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1510 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1511 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1512 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1513 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1514 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1515
1516 /* ADCLRC pin configured as GPIO. */
1517 regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6,
1518 wm8960->pdata.gpio_cfg[0] << 6);
1519 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4,
1520 wm8960->pdata.gpio_cfg[1] << 4);
1521
1522 /* Enable headphone jack detect */
1523 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2,
1524 wm8960->pdata.hp_cfg[0] << 2);
1525 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5,
1526 wm8960->pdata.hp_cfg[1] << 5);
1527 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3,
1528 wm8960->pdata.hp_cfg[2]);
1529
1530 i2c_set_clientdata(i2c, wm8960);
1531
1532 ret = devm_snd_soc_register_component(&i2c->dev,
1533 &soc_component_dev_wm8960, &wm8960_dai, 1);
1534 if (ret)
1535 goto bulk_disable;
1536
1537 return 0;
1538
1539bulk_disable:
1540 regulator_bulk_disable(ARRAY_SIZE(wm8960->supplies), wm8960->supplies);
1541 return ret;
1542}
1543
1544static void wm8960_i2c_remove(struct i2c_client *client)
1545{
1546 struct wm8960_priv *wm8960 = i2c_get_clientdata(client);
1547
1548 regulator_bulk_disable(ARRAY_SIZE(wm8960->supplies), wm8960->supplies);
1549}
1550
1551static const struct i2c_device_id wm8960_i2c_id[] = {
1552 { "wm8960" },
1553 { }
1554};
1555MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1556
1557#if defined(CONFIG_OF)
1558static const struct of_device_id wm8960_of_match[] = {
1559 { .compatible = "wlf,wm8960", },
1560 { }
1561};
1562MODULE_DEVICE_TABLE(of, wm8960_of_match);
1563#endif
1564
1565#if defined(CONFIG_ACPI)
1566static const struct acpi_device_id wm8960_acpi_match[] = {
1567 { "1AEC8960", 0 }, /* Wolfson PCI ID + part ID */
1568 { "10138960", 0 }, /* Cirrus Logic PCI ID + part ID */
1569 { },
1570};
1571MODULE_DEVICE_TABLE(acpi, wm8960_acpi_match);
1572#endif
1573
1574static struct i2c_driver wm8960_i2c_driver = {
1575 .driver = {
1576 .name = "wm8960",
1577 .of_match_table = of_match_ptr(wm8960_of_match),
1578 .acpi_match_table = ACPI_PTR(wm8960_acpi_match),
1579 },
1580 .probe = wm8960_i2c_probe,
1581 .remove = wm8960_i2c_remove,
1582 .id_table = wm8960_i2c_id,
1583};
1584
1585module_i2c_driver(wm8960_i2c_driver);
1586
1587MODULE_DESCRIPTION("ASoC WM8960 driver");
1588MODULE_AUTHOR("Liam Girdwood");
1589MODULE_LICENSE("GPL");
1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Author: Liam Girdwood
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/i2c.h>
17#include <linux/slab.h>
18#include <sound/core.h>
19#include <sound/pcm.h>
20#include <sound/pcm_params.h>
21#include <sound/soc.h>
22#include <sound/initval.h>
23#include <sound/tlv.h>
24#include <sound/wm8960.h>
25
26#include "wm8960.h"
27
28/* R25 - Power 1 */
29#define WM8960_VMID_MASK 0x180
30#define WM8960_VREF 0x40
31
32/* R26 - Power 2 */
33#define WM8960_PWR2_LOUT1 0x40
34#define WM8960_PWR2_ROUT1 0x20
35#define WM8960_PWR2_OUT3 0x02
36
37/* R28 - Anti-pop 1 */
38#define WM8960_POBCTRL 0x80
39#define WM8960_BUFDCOPEN 0x10
40#define WM8960_BUFIOEN 0x08
41#define WM8960_SOFT_ST 0x04
42#define WM8960_HPSTBY 0x01
43
44/* R29 - Anti-pop 2 */
45#define WM8960_DISOP 0x40
46#define WM8960_DRES_MASK 0x30
47
48/*
49 * wm8960 register cache
50 * We can't read the WM8960 register space when we are
51 * using 2 wire for device control, so we cache them instead.
52 */
53static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
54 0x0097, 0x0097, 0x0000, 0x0000,
55 0x0000, 0x0008, 0x0000, 0x000a,
56 0x01c0, 0x0000, 0x00ff, 0x00ff,
57 0x0000, 0x0000, 0x0000, 0x0000,
58 0x0000, 0x007b, 0x0100, 0x0032,
59 0x0000, 0x00c3, 0x00c3, 0x01c0,
60 0x0000, 0x0000, 0x0000, 0x0000,
61 0x0000, 0x0000, 0x0000, 0x0000,
62 0x0100, 0x0100, 0x0050, 0x0050,
63 0x0050, 0x0050, 0x0000, 0x0000,
64 0x0000, 0x0000, 0x0040, 0x0000,
65 0x0000, 0x0050, 0x0050, 0x0000,
66 0x0002, 0x0037, 0x004d, 0x0080,
67 0x0008, 0x0031, 0x0026, 0x00e9,
68};
69
70struct wm8960_priv {
71 enum snd_soc_control_type control_type;
72 int (*set_bias_level)(struct snd_soc_codec *,
73 enum snd_soc_bias_level level);
74 struct snd_soc_dapm_widget *lout1;
75 struct snd_soc_dapm_widget *rout1;
76 struct snd_soc_dapm_widget *out3;
77 bool deemph;
78 int playback_fs;
79};
80
81#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
82
83/* enumerated controls */
84static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
85 "Right Inverted", "Stereo Inversion"};
86static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
87static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
88static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
89static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
90
91static const struct soc_enum wm8960_enum[] = {
92 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
93 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
94 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
95 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
96 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
97 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
98};
99
100static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
101
102static int wm8960_set_deemph(struct snd_soc_codec *codec)
103{
104 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
105 int val, i, best;
106
107 /* If we're using deemphasis select the nearest available sample
108 * rate.
109 */
110 if (wm8960->deemph) {
111 best = 1;
112 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
113 if (abs(deemph_settings[i] - wm8960->playback_fs) <
114 abs(deemph_settings[best] - wm8960->playback_fs))
115 best = i;
116 }
117
118 val = best << 1;
119 } else {
120 val = 0;
121 }
122
123 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
124
125 return snd_soc_update_bits(codec, WM8960_DACCTL1,
126 0x6, val);
127}
128
129static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
130 struct snd_ctl_elem_value *ucontrol)
131{
132 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
133 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
134
135 ucontrol->value.enumerated.item[0] = wm8960->deemph;
136 return 0;
137}
138
139static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
140 struct snd_ctl_elem_value *ucontrol)
141{
142 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
143 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
144 int deemph = ucontrol->value.enumerated.item[0];
145
146 if (deemph > 1)
147 return -EINVAL;
148
149 wm8960->deemph = deemph;
150
151 return wm8960_set_deemph(codec);
152}
153
154static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
155static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
156static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
157static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
158
159static const struct snd_kcontrol_new wm8960_snd_controls[] = {
160SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
161 0, 63, 0, adc_tlv),
162SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
163 6, 1, 0),
164SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
165 7, 1, 0),
166
167SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
168 0, 255, 0, dac_tlv),
169
170SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
171 0, 127, 0, out_tlv),
172SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
173 7, 1, 0),
174
175SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
176 0, 127, 0, out_tlv),
177SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
178 7, 1, 0),
179SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
180SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
181
182SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
183SOC_ENUM("ADC Polarity", wm8960_enum[0]),
184SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
185
186SOC_ENUM("DAC Polarity", wm8960_enum[2]),
187SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
188 wm8960_get_deemph, wm8960_put_deemph),
189
190SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
191SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
192SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
193SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
194
195SOC_ENUM("ALC Function", wm8960_enum[4]),
196SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
197SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
198SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
199SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
200SOC_ENUM("ALC Mode", wm8960_enum[5]),
201SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
202SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
203
204SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
205SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
206
207SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
208 0, 127, 0),
209
210SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
211 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
212SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
213 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
214SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
215 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
216SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
217 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
218};
219
220static const struct snd_kcontrol_new wm8960_lin_boost[] = {
221SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
222SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
223SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
224};
225
226static const struct snd_kcontrol_new wm8960_lin[] = {
227SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
228};
229
230static const struct snd_kcontrol_new wm8960_rin_boost[] = {
231SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
232SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
233SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
234};
235
236static const struct snd_kcontrol_new wm8960_rin[] = {
237SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
238};
239
240static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
241SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
242SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
243SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
244};
245
246static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
247SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
248SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
249SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
250};
251
252static const struct snd_kcontrol_new wm8960_mono_out[] = {
253SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
254SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
255};
256
257static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
258SND_SOC_DAPM_INPUT("LINPUT1"),
259SND_SOC_DAPM_INPUT("RINPUT1"),
260SND_SOC_DAPM_INPUT("LINPUT2"),
261SND_SOC_DAPM_INPUT("RINPUT2"),
262SND_SOC_DAPM_INPUT("LINPUT3"),
263SND_SOC_DAPM_INPUT("RINPUT3"),
264
265SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
266
267SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
268 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
269SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
270 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
271
272SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
273 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
274SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
275 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
276
277SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
278SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
279
280SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
281SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
282
283SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
284 &wm8960_loutput_mixer[0],
285 ARRAY_SIZE(wm8960_loutput_mixer)),
286SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
287 &wm8960_routput_mixer[0],
288 ARRAY_SIZE(wm8960_routput_mixer)),
289
290SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
291SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
292
293SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
294SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
295
296SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
297SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
298
299SND_SOC_DAPM_OUTPUT("SPK_LP"),
300SND_SOC_DAPM_OUTPUT("SPK_LN"),
301SND_SOC_DAPM_OUTPUT("HP_L"),
302SND_SOC_DAPM_OUTPUT("HP_R"),
303SND_SOC_DAPM_OUTPUT("SPK_RP"),
304SND_SOC_DAPM_OUTPUT("SPK_RN"),
305SND_SOC_DAPM_OUTPUT("OUT3"),
306};
307
308static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
309SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
310 &wm8960_mono_out[0],
311 ARRAY_SIZE(wm8960_mono_out)),
312};
313
314/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
315static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
316SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
317};
318
319static const struct snd_soc_dapm_route audio_paths[] = {
320 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
321 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
322 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
323
324 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
325 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
326 { "Left Input Mixer", NULL, "LINPUT2" },
327 { "Left Input Mixer", NULL, "LINPUT3" },
328
329 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
330 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
331 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
332
333 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
334 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
335 { "Right Input Mixer", NULL, "RINPUT2" },
336 { "Right Input Mixer", NULL, "LINPUT3" },
337
338 { "Left ADC", NULL, "Left Input Mixer" },
339 { "Right ADC", NULL, "Right Input Mixer" },
340
341 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
342 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
343 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
344
345 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
346 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
347 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
348
349 { "LOUT1 PGA", NULL, "Left Output Mixer" },
350 { "ROUT1 PGA", NULL, "Right Output Mixer" },
351
352 { "HP_L", NULL, "LOUT1 PGA" },
353 { "HP_R", NULL, "ROUT1 PGA" },
354
355 { "Left Speaker PGA", NULL, "Left Output Mixer" },
356 { "Right Speaker PGA", NULL, "Right Output Mixer" },
357
358 { "Left Speaker Output", NULL, "Left Speaker PGA" },
359 { "Right Speaker Output", NULL, "Right Speaker PGA" },
360
361 { "SPK_LN", NULL, "Left Speaker Output" },
362 { "SPK_LP", NULL, "Left Speaker Output" },
363 { "SPK_RN", NULL, "Right Speaker Output" },
364 { "SPK_RP", NULL, "Right Speaker Output" },
365};
366
367static const struct snd_soc_dapm_route audio_paths_out3[] = {
368 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
369 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
370
371 { "OUT3", NULL, "Mono Output Mixer", }
372};
373
374static const struct snd_soc_dapm_route audio_paths_capless[] = {
375 { "HP_L", NULL, "OUT3 VMID" },
376 { "HP_R", NULL, "OUT3 VMID" },
377
378 { "OUT3 VMID", NULL, "Left Output Mixer" },
379 { "OUT3 VMID", NULL, "Right Output Mixer" },
380};
381
382static int wm8960_add_widgets(struct snd_soc_codec *codec)
383{
384 struct wm8960_data *pdata = codec->dev->platform_data;
385 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
386 struct snd_soc_dapm_context *dapm = &codec->dapm;
387 struct snd_soc_dapm_widget *w;
388
389 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
390 ARRAY_SIZE(wm8960_dapm_widgets));
391
392 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
393
394 /* In capless mode OUT3 is used to provide VMID for the
395 * headphone outputs, otherwise it is used as a mono mixer.
396 */
397 if (pdata && pdata->capless) {
398 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
399 ARRAY_SIZE(wm8960_dapm_widgets_capless));
400
401 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
402 ARRAY_SIZE(audio_paths_capless));
403 } else {
404 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
405 ARRAY_SIZE(wm8960_dapm_widgets_out3));
406
407 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
408 ARRAY_SIZE(audio_paths_out3));
409 }
410
411 /* We need to power up the headphone output stage out of
412 * sequence for capless mode. To save scanning the widget
413 * list each time to find the desired power state do so now
414 * and save the result.
415 */
416 list_for_each_entry(w, &codec->card->widgets, list) {
417 if (w->dapm != &codec->dapm)
418 continue;
419 if (strcmp(w->name, "LOUT1 PGA") == 0)
420 wm8960->lout1 = w;
421 if (strcmp(w->name, "ROUT1 PGA") == 0)
422 wm8960->rout1 = w;
423 if (strcmp(w->name, "OUT3 VMID") == 0)
424 wm8960->out3 = w;
425 }
426
427 return 0;
428}
429
430static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
431 unsigned int fmt)
432{
433 struct snd_soc_codec *codec = codec_dai->codec;
434 u16 iface = 0;
435
436 /* set master/slave audio interface */
437 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
438 case SND_SOC_DAIFMT_CBM_CFM:
439 iface |= 0x0040;
440 break;
441 case SND_SOC_DAIFMT_CBS_CFS:
442 break;
443 default:
444 return -EINVAL;
445 }
446
447 /* interface format */
448 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
449 case SND_SOC_DAIFMT_I2S:
450 iface |= 0x0002;
451 break;
452 case SND_SOC_DAIFMT_RIGHT_J:
453 break;
454 case SND_SOC_DAIFMT_LEFT_J:
455 iface |= 0x0001;
456 break;
457 case SND_SOC_DAIFMT_DSP_A:
458 iface |= 0x0003;
459 break;
460 case SND_SOC_DAIFMT_DSP_B:
461 iface |= 0x0013;
462 break;
463 default:
464 return -EINVAL;
465 }
466
467 /* clock inversion */
468 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
469 case SND_SOC_DAIFMT_NB_NF:
470 break;
471 case SND_SOC_DAIFMT_IB_IF:
472 iface |= 0x0090;
473 break;
474 case SND_SOC_DAIFMT_IB_NF:
475 iface |= 0x0080;
476 break;
477 case SND_SOC_DAIFMT_NB_IF:
478 iface |= 0x0010;
479 break;
480 default:
481 return -EINVAL;
482 }
483
484 /* set iface */
485 snd_soc_write(codec, WM8960_IFACE1, iface);
486 return 0;
487}
488
489static struct {
490 int rate;
491 unsigned int val;
492} alc_rates[] = {
493 { 48000, 0 },
494 { 44100, 0 },
495 { 32000, 1 },
496 { 22050, 2 },
497 { 24000, 2 },
498 { 16000, 3 },
499 { 11250, 4 },
500 { 12000, 4 },
501 { 8000, 5 },
502};
503
504static int wm8960_hw_params(struct snd_pcm_substream *substream,
505 struct snd_pcm_hw_params *params,
506 struct snd_soc_dai *dai)
507{
508 struct snd_soc_codec *codec = dai->codec;
509 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
510 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
511 int i;
512
513 /* bit size */
514 switch (params_format(params)) {
515 case SNDRV_PCM_FORMAT_S16_LE:
516 break;
517 case SNDRV_PCM_FORMAT_S20_3LE:
518 iface |= 0x0004;
519 break;
520 case SNDRV_PCM_FORMAT_S24_LE:
521 iface |= 0x0008;
522 break;
523 }
524
525 /* Update filters for the new rate */
526 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
527 wm8960->playback_fs = params_rate(params);
528 wm8960_set_deemph(codec);
529 } else {
530 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
531 if (alc_rates[i].rate == params_rate(params))
532 snd_soc_update_bits(codec,
533 WM8960_ADDCTL3, 0x7,
534 alc_rates[i].val);
535 }
536
537 /* set iface */
538 snd_soc_write(codec, WM8960_IFACE1, iface);
539 return 0;
540}
541
542static int wm8960_mute(struct snd_soc_dai *dai, int mute)
543{
544 struct snd_soc_codec *codec = dai->codec;
545
546 if (mute)
547 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
548 else
549 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
550 return 0;
551}
552
553static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
554 enum snd_soc_bias_level level)
555{
556 switch (level) {
557 case SND_SOC_BIAS_ON:
558 break;
559
560 case SND_SOC_BIAS_PREPARE:
561 /* Set VMID to 2x50k */
562 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
563 break;
564
565 case SND_SOC_BIAS_STANDBY:
566 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
567 snd_soc_cache_sync(codec);
568
569 /* Enable anti-pop features */
570 snd_soc_write(codec, WM8960_APOP1,
571 WM8960_POBCTRL | WM8960_SOFT_ST |
572 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
573
574 /* Enable & ramp VMID at 2x50k */
575 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
576 msleep(100);
577
578 /* Enable VREF */
579 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
580 WM8960_VREF);
581
582 /* Disable anti-pop features */
583 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
584 }
585
586 /* Set VMID to 2x250k */
587 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
588 break;
589
590 case SND_SOC_BIAS_OFF:
591 /* Enable anti-pop features */
592 snd_soc_write(codec, WM8960_APOP1,
593 WM8960_POBCTRL | WM8960_SOFT_ST |
594 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
595
596 /* Disable VMID and VREF, let them discharge */
597 snd_soc_write(codec, WM8960_POWER1, 0);
598 msleep(600);
599 break;
600 }
601
602 codec->dapm.bias_level = level;
603
604 return 0;
605}
606
607static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
608 enum snd_soc_bias_level level)
609{
610 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
611 int reg;
612
613 switch (level) {
614 case SND_SOC_BIAS_ON:
615 break;
616
617 case SND_SOC_BIAS_PREPARE:
618 switch (codec->dapm.bias_level) {
619 case SND_SOC_BIAS_STANDBY:
620 /* Enable anti pop mode */
621 snd_soc_update_bits(codec, WM8960_APOP1,
622 WM8960_POBCTRL | WM8960_SOFT_ST |
623 WM8960_BUFDCOPEN,
624 WM8960_POBCTRL | WM8960_SOFT_ST |
625 WM8960_BUFDCOPEN);
626
627 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
628 reg = 0;
629 if (wm8960->lout1 && wm8960->lout1->power)
630 reg |= WM8960_PWR2_LOUT1;
631 if (wm8960->rout1 && wm8960->rout1->power)
632 reg |= WM8960_PWR2_ROUT1;
633 if (wm8960->out3 && wm8960->out3->power)
634 reg |= WM8960_PWR2_OUT3;
635 snd_soc_update_bits(codec, WM8960_POWER2,
636 WM8960_PWR2_LOUT1 |
637 WM8960_PWR2_ROUT1 |
638 WM8960_PWR2_OUT3, reg);
639
640 /* Enable VMID at 2*50k */
641 snd_soc_update_bits(codec, WM8960_POWER1,
642 WM8960_VMID_MASK, 0x80);
643
644 /* Ramp */
645 msleep(100);
646
647 /* Enable VREF */
648 snd_soc_update_bits(codec, WM8960_POWER1,
649 WM8960_VREF, WM8960_VREF);
650
651 msleep(100);
652 break;
653
654 case SND_SOC_BIAS_ON:
655 /* Enable anti-pop mode */
656 snd_soc_update_bits(codec, WM8960_APOP1,
657 WM8960_POBCTRL | WM8960_SOFT_ST |
658 WM8960_BUFDCOPEN,
659 WM8960_POBCTRL | WM8960_SOFT_ST |
660 WM8960_BUFDCOPEN);
661
662 /* Disable VMID and VREF */
663 snd_soc_update_bits(codec, WM8960_POWER1,
664 WM8960_VREF | WM8960_VMID_MASK, 0);
665 break;
666
667 case SND_SOC_BIAS_OFF:
668 snd_soc_cache_sync(codec);
669 break;
670 default:
671 break;
672 }
673 break;
674
675 case SND_SOC_BIAS_STANDBY:
676 switch (codec->dapm.bias_level) {
677 case SND_SOC_BIAS_PREPARE:
678 /* Disable HP discharge */
679 snd_soc_update_bits(codec, WM8960_APOP2,
680 WM8960_DISOP | WM8960_DRES_MASK,
681 0);
682
683 /* Disable anti-pop features */
684 snd_soc_update_bits(codec, WM8960_APOP1,
685 WM8960_POBCTRL | WM8960_SOFT_ST |
686 WM8960_BUFDCOPEN,
687 WM8960_POBCTRL | WM8960_SOFT_ST |
688 WM8960_BUFDCOPEN);
689 break;
690
691 default:
692 break;
693 }
694 break;
695
696 case SND_SOC_BIAS_OFF:
697 break;
698 }
699
700 codec->dapm.bias_level = level;
701
702 return 0;
703}
704
705/* PLL divisors */
706struct _pll_div {
707 u32 pre_div:1;
708 u32 n:4;
709 u32 k:24;
710};
711
712/* The size in bits of the pll divide multiplied by 10
713 * to allow rounding later */
714#define FIXED_PLL_SIZE ((1 << 24) * 10)
715
716static int pll_factors(unsigned int source, unsigned int target,
717 struct _pll_div *pll_div)
718{
719 unsigned long long Kpart;
720 unsigned int K, Ndiv, Nmod;
721
722 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
723
724 /* Scale up target to PLL operating frequency */
725 target *= 4;
726
727 Ndiv = target / source;
728 if (Ndiv < 6) {
729 source >>= 1;
730 pll_div->pre_div = 1;
731 Ndiv = target / source;
732 } else
733 pll_div->pre_div = 0;
734
735 if ((Ndiv < 6) || (Ndiv > 12)) {
736 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
737 return -EINVAL;
738 }
739
740 pll_div->n = Ndiv;
741 Nmod = target % source;
742 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
743
744 do_div(Kpart, source);
745
746 K = Kpart & 0xFFFFFFFF;
747
748 /* Check if we need to round */
749 if ((K % 10) >= 5)
750 K += 5;
751
752 /* Move down to proper range now rounding is done */
753 K /= 10;
754
755 pll_div->k = K;
756
757 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
758 pll_div->n, pll_div->k, pll_div->pre_div);
759
760 return 0;
761}
762
763static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
764 int source, unsigned int freq_in, unsigned int freq_out)
765{
766 struct snd_soc_codec *codec = codec_dai->codec;
767 u16 reg;
768 static struct _pll_div pll_div;
769 int ret;
770
771 if (freq_in && freq_out) {
772 ret = pll_factors(freq_in, freq_out, &pll_div);
773 if (ret != 0)
774 return ret;
775 }
776
777 /* Disable the PLL: even if we are changing the frequency the
778 * PLL needs to be disabled while we do so. */
779 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
780 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
781
782 if (!freq_in || !freq_out)
783 return 0;
784
785 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
786 reg |= pll_div.pre_div << 4;
787 reg |= pll_div.n;
788
789 if (pll_div.k) {
790 reg |= 0x20;
791
792 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
793 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
794 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
795 }
796 snd_soc_write(codec, WM8960_PLL1, reg);
797
798 /* Turn it on */
799 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
800 msleep(250);
801 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
802
803 return 0;
804}
805
806static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
807 int div_id, int div)
808{
809 struct snd_soc_codec *codec = codec_dai->codec;
810 u16 reg;
811
812 switch (div_id) {
813 case WM8960_SYSCLKDIV:
814 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
815 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
816 break;
817 case WM8960_DACDIV:
818 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
819 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
820 break;
821 case WM8960_OPCLKDIV:
822 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
823 snd_soc_write(codec, WM8960_PLL1, reg | div);
824 break;
825 case WM8960_DCLKDIV:
826 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
827 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
828 break;
829 case WM8960_TOCLKSEL:
830 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
831 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
832 break;
833 default:
834 return -EINVAL;
835 }
836
837 return 0;
838}
839
840static int wm8960_set_bias_level(struct snd_soc_codec *codec,
841 enum snd_soc_bias_level level)
842{
843 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
844
845 return wm8960->set_bias_level(codec, level);
846}
847
848#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
849
850#define WM8960_FORMATS \
851 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
852 SNDRV_PCM_FMTBIT_S24_LE)
853
854static const struct snd_soc_dai_ops wm8960_dai_ops = {
855 .hw_params = wm8960_hw_params,
856 .digital_mute = wm8960_mute,
857 .set_fmt = wm8960_set_dai_fmt,
858 .set_clkdiv = wm8960_set_dai_clkdiv,
859 .set_pll = wm8960_set_dai_pll,
860};
861
862static struct snd_soc_dai_driver wm8960_dai = {
863 .name = "wm8960-hifi",
864 .playback = {
865 .stream_name = "Playback",
866 .channels_min = 1,
867 .channels_max = 2,
868 .rates = WM8960_RATES,
869 .formats = WM8960_FORMATS,},
870 .capture = {
871 .stream_name = "Capture",
872 .channels_min = 1,
873 .channels_max = 2,
874 .rates = WM8960_RATES,
875 .formats = WM8960_FORMATS,},
876 .ops = &wm8960_dai_ops,
877 .symmetric_rates = 1,
878};
879
880static int wm8960_suspend(struct snd_soc_codec *codec)
881{
882 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
883
884 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
885 return 0;
886}
887
888static int wm8960_resume(struct snd_soc_codec *codec)
889{
890 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
891
892 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
893 return 0;
894}
895
896static int wm8960_probe(struct snd_soc_codec *codec)
897{
898 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
899 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
900 int ret;
901
902 wm8960->set_bias_level = wm8960_set_bias_level_out3;
903
904 if (!pdata) {
905 dev_warn(codec->dev, "No platform data supplied\n");
906 } else {
907 if (pdata->dres > WM8960_DRES_MAX) {
908 dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
909 pdata->dres = 0;
910 }
911
912 if (pdata->capless)
913 wm8960->set_bias_level = wm8960_set_bias_level_capless;
914 }
915
916 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
917 if (ret < 0) {
918 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
919 return ret;
920 }
921
922 ret = wm8960_reset(codec);
923 if (ret < 0) {
924 dev_err(codec->dev, "Failed to issue reset\n");
925 return ret;
926 }
927
928 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
929
930 /* Latch the update bits */
931 snd_soc_update_bits(codec, WM8960_LINVOL, 0x100, 0x100);
932 snd_soc_update_bits(codec, WM8960_RINVOL, 0x100, 0x100);
933 snd_soc_update_bits(codec, WM8960_LADC, 0x100, 0x100);
934 snd_soc_update_bits(codec, WM8960_RADC, 0x100, 0x100);
935 snd_soc_update_bits(codec, WM8960_LDAC, 0x100, 0x100);
936 snd_soc_update_bits(codec, WM8960_RDAC, 0x100, 0x100);
937 snd_soc_update_bits(codec, WM8960_LOUT1, 0x100, 0x100);
938 snd_soc_update_bits(codec, WM8960_ROUT1, 0x100, 0x100);
939 snd_soc_update_bits(codec, WM8960_LOUT2, 0x100, 0x100);
940 snd_soc_update_bits(codec, WM8960_ROUT2, 0x100, 0x100);
941
942 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
943 ARRAY_SIZE(wm8960_snd_controls));
944 wm8960_add_widgets(codec);
945
946 return 0;
947}
948
949/* power down chip */
950static int wm8960_remove(struct snd_soc_codec *codec)
951{
952 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
953
954 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
955 return 0;
956}
957
958static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
959 .probe = wm8960_probe,
960 .remove = wm8960_remove,
961 .suspend = wm8960_suspend,
962 .resume = wm8960_resume,
963 .set_bias_level = wm8960_set_bias_level,
964 .reg_cache_size = ARRAY_SIZE(wm8960_reg),
965 .reg_word_size = sizeof(u16),
966 .reg_cache_default = wm8960_reg,
967};
968
969static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
970 const struct i2c_device_id *id)
971{
972 struct wm8960_priv *wm8960;
973 int ret;
974
975 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
976 GFP_KERNEL);
977 if (wm8960 == NULL)
978 return -ENOMEM;
979
980 i2c_set_clientdata(i2c, wm8960);
981 wm8960->control_type = SND_SOC_I2C;
982
983 ret = snd_soc_register_codec(&i2c->dev,
984 &soc_codec_dev_wm8960, &wm8960_dai, 1);
985
986 return ret;
987}
988
989static __devexit int wm8960_i2c_remove(struct i2c_client *client)
990{
991 snd_soc_unregister_codec(&client->dev);
992 return 0;
993}
994
995static const struct i2c_device_id wm8960_i2c_id[] = {
996 { "wm8960", 0 },
997 { }
998};
999MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1000
1001static struct i2c_driver wm8960_i2c_driver = {
1002 .driver = {
1003 .name = "wm8960",
1004 .owner = THIS_MODULE,
1005 },
1006 .probe = wm8960_i2c_probe,
1007 .remove = __devexit_p(wm8960_i2c_remove),
1008 .id_table = wm8960_i2c_id,
1009};
1010
1011static int __init wm8960_modinit(void)
1012{
1013 int ret = 0;
1014 ret = i2c_add_driver(&wm8960_i2c_driver);
1015 if (ret != 0) {
1016 printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
1017 ret);
1018 }
1019 return ret;
1020}
1021module_init(wm8960_modinit);
1022
1023static void __exit wm8960_exit(void)
1024{
1025 i2c_del_driver(&wm8960_i2c_driver);
1026}
1027module_exit(wm8960_exit);
1028
1029MODULE_DESCRIPTION("ASoC WM8960 driver");
1030MODULE_AUTHOR("Liam Girdwood");
1031MODULE_LICENSE("GPL");