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  1/*
  2 * drivers/net/ethernet/netx-eth.c
  3 *
  4 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License version 2
  8 * as published by the Free Software Foundation.
  9 *
 10 * This program is distributed in the hope that it will be useful,
 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13 * GNU General Public License for more details.
 14 *
 15 * You should have received a copy of the GNU General Public License
 16 * along with this program; if not, see <http://www.gnu.org/licenses/>.
 17 */
 18
 19#include <linux/init.h>
 20#include <linux/interrupt.h>
 21#include <linux/module.h>
 22#include <linux/kernel.h>
 23#include <linux/delay.h>
 24
 25#include <linux/netdevice.h>
 26#include <linux/platform_device.h>
 27#include <linux/etherdevice.h>
 28#include <linux/skbuff.h>
 29#include <linux/mii.h>
 30
 31#include <asm/io.h>
 32#include <mach/hardware.h>
 33#include <mach/netx-regs.h>
 34#include <mach/pfifo.h>
 35#include <mach/xc.h>
 36#include <linux/platform_data/eth-netx.h>
 37
 38/* XC Fifo Offsets */
 39#define EMPTY_PTR_FIFO(xcno)    (0 + ((xcno) << 3))	/* Index of the empty pointer FIFO */
 40#define IND_FIFO_PORT_HI(xcno)  (1 + ((xcno) << 3))	/* Index of the FIFO where received */
 41							/* Data packages are indicated by XC */
 42#define IND_FIFO_PORT_LO(xcno)  (2 + ((xcno) << 3))	/* Index of the FIFO where received */
 43							/* Data packages are indicated by XC */
 44#define REQ_FIFO_PORT_HI(xcno)  (3 + ((xcno) << 3))	/* Index of the FIFO where Data packages */
 45							/* have to be indicated by ARM which */
 46							/* shall be sent */
 47#define REQ_FIFO_PORT_LO(xcno)  (4 + ((xcno) << 3))	/* Index of the FIFO where Data packages */
 48							/* have to be indicated by ARM which shall */
 49							/* be sent */
 50#define CON_FIFO_PORT_HI(xcno)  (5 + ((xcno) << 3))	/* Index of the FIFO where sent Data packages */
 51							/* are confirmed */
 52#define CON_FIFO_PORT_LO(xcno)  (6 + ((xcno) << 3))	/* Index of the FIFO where sent Data */
 53							/* packages are confirmed */
 54#define PFIFO_MASK(xcno)        (0x7f << (xcno*8))
 55
 56#define FIFO_PTR_FRAMELEN_SHIFT 0
 57#define FIFO_PTR_FRAMELEN_MASK  (0x7ff << 0)
 58#define FIFO_PTR_FRAMELEN(len)  (((len) << 0) & FIFO_PTR_FRAMELEN_MASK)
 59#define FIFO_PTR_TIMETRIG       (1<<11)
 60#define FIFO_PTR_MULTI_REQ
 61#define FIFO_PTR_ORIGIN         (1<<14)
 62#define FIFO_PTR_VLAN           (1<<15)
 63#define FIFO_PTR_FRAMENO_SHIFT  16
 64#define FIFO_PTR_FRAMENO_MASK   (0x3f << 16)
 65#define FIFO_PTR_FRAMENO(no)    (((no) << 16) & FIFO_PTR_FRAMENO_MASK)
 66#define FIFO_PTR_SEGMENT_SHIFT  22
 67#define FIFO_PTR_SEGMENT_MASK   (0xf << 22)
 68#define FIFO_PTR_SEGMENT(seg)   (((seg) & 0xf) << 22)
 69#define FIFO_PTR_ERROR_SHIFT    28
 70#define FIFO_PTR_ERROR_MASK     (0xf << 28)
 71
 72#define ISR_LINK_STATUS_CHANGE (1<<4)
 73#define ISR_IND_LO             (1<<3)
 74#define ISR_CON_LO             (1<<2)
 75#define ISR_IND_HI             (1<<1)
 76#define ISR_CON_HI             (1<<0)
 77
 78#define ETH_MAC_LOCAL_CONFIG 0x1560
 79#define ETH_MAC_4321         0x1564
 80#define ETH_MAC_65           0x1568
 81
 82#define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16
 83#define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK (0xf<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT)
 84#define MAC_TRAFFIC_CLASS_ARRANGEMENT(x) (((x)<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT) & MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK)
 85#define LOCAL_CONFIG_LINK_STATUS_IRQ_EN (1<<24)
 86#define LOCAL_CONFIG_CON_LO_IRQ_EN (1<<23)
 87#define LOCAL_CONFIG_CON_HI_IRQ_EN (1<<22)
 88#define LOCAL_CONFIG_IND_LO_IRQ_EN (1<<21)
 89#define LOCAL_CONFIG_IND_HI_IRQ_EN (1<<20)
 90
 91#define CARDNAME "netx-eth"
 92
 93/* LSB must be zero */
 94#define INTERNAL_PHY_ADR 0x1c
 95
 96struct netx_eth_priv {
 97	void                    __iomem *sram_base, *xpec_base, *xmac_base;
 98	int                     id;
 99	struct mii_if_info      mii;
100	u32                     msg_enable;
101	struct xc               *xc;
102	spinlock_t              lock;
103};
104
105static void netx_eth_set_multicast_list(struct net_device *ndev)
106{
107	/* implement me */
108}
109
110static int
111netx_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev)
112{
113	struct netx_eth_priv *priv = netdev_priv(ndev);
114	unsigned char *buf = skb->data;
115	unsigned int len = skb->len;
116
117	spin_lock_irq(&priv->lock);
118	memcpy_toio(priv->sram_base + 1560, (void *)buf, len);
119	if (len < 60) {
120		memset_io(priv->sram_base + 1560 + len, 0, 60 - len);
121		len = 60;
122	}
123
124	pfifo_push(REQ_FIFO_PORT_LO(priv->id),
125	           FIFO_PTR_SEGMENT(priv->id) |
126	           FIFO_PTR_FRAMENO(1) |
127	           FIFO_PTR_FRAMELEN(len));
128
129	ndev->stats.tx_packets++;
130	ndev->stats.tx_bytes += skb->len;
131
132	netif_stop_queue(ndev);
133	spin_unlock_irq(&priv->lock);
134	dev_kfree_skb(skb);
135
136	return NETDEV_TX_OK;
137}
138
139static void netx_eth_receive(struct net_device *ndev)
140{
141	struct netx_eth_priv *priv = netdev_priv(ndev);
142	unsigned int val, frameno, seg, len;
143	unsigned char *data;
144	struct sk_buff *skb;
145
146	val = pfifo_pop(IND_FIFO_PORT_LO(priv->id));
147
148	frameno = (val & FIFO_PTR_FRAMENO_MASK) >> FIFO_PTR_FRAMENO_SHIFT;
149	seg = (val & FIFO_PTR_SEGMENT_MASK) >> FIFO_PTR_SEGMENT_SHIFT;
150	len = (val & FIFO_PTR_FRAMELEN_MASK) >> FIFO_PTR_FRAMELEN_SHIFT;
151
152	skb = netdev_alloc_skb(ndev, len);
153	if (unlikely(skb == NULL)) {
154		ndev->stats.rx_dropped++;
155		return;
156	}
157
158	data = skb_put(skb, len);
159
160	memcpy_fromio(data, priv->sram_base + frameno * 1560, len);
161
162	pfifo_push(EMPTY_PTR_FIFO(priv->id),
163		FIFO_PTR_SEGMENT(seg) | FIFO_PTR_FRAMENO(frameno));
164
165	skb->protocol = eth_type_trans(skb, ndev);
166	netif_rx(skb);
167	ndev->stats.rx_packets++;
168	ndev->stats.rx_bytes += len;
169}
170
171static irqreturn_t
172netx_eth_interrupt(int irq, void *dev_id)
173{
174	struct net_device *ndev = dev_id;
175	struct netx_eth_priv *priv = netdev_priv(ndev);
176	int status;
177	unsigned long flags;
178
179	spin_lock_irqsave(&priv->lock, flags);
180
181	status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
182	while (status) {
183		int fill_level;
184		writel(status, NETX_PFIFO_XPEC_ISR(priv->id));
185
186		if ((status & ISR_CON_HI) || (status & ISR_IND_HI))
187			printk("%s: unexpected status: 0x%08x\n",
188			    __func__, status);
189
190		fill_level =
191		    readl(NETX_PFIFO_FILL_LEVEL(IND_FIFO_PORT_LO(priv->id)));
192		while (fill_level--)
193			netx_eth_receive(ndev);
194
195		if (status & ISR_CON_LO)
196			netif_wake_queue(ndev);
197
198		if (status & ISR_LINK_STATUS_CHANGE)
199			mii_check_media(&priv->mii, netif_msg_link(priv), 1);
200
201		status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
202	}
203	spin_unlock_irqrestore(&priv->lock, flags);
204	return IRQ_HANDLED;
205}
206
207static int netx_eth_open(struct net_device *ndev)
208{
209	struct netx_eth_priv *priv = netdev_priv(ndev);
210
211	if (request_irq
212	    (ndev->irq, netx_eth_interrupt, IRQF_SHARED, ndev->name, ndev))
213		return -EAGAIN;
214
215	writel(ndev->dev_addr[0] |
216	       ndev->dev_addr[1]<<8 |
217	       ndev->dev_addr[2]<<16 |
218	       ndev->dev_addr[3]<<24,
219	       priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
220	writel(ndev->dev_addr[4] |
221	       ndev->dev_addr[5]<<8,
222	       priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
223
224	writel(LOCAL_CONFIG_LINK_STATUS_IRQ_EN |
225		LOCAL_CONFIG_CON_LO_IRQ_EN |
226		LOCAL_CONFIG_CON_HI_IRQ_EN |
227		LOCAL_CONFIG_IND_LO_IRQ_EN |
228		LOCAL_CONFIG_IND_HI_IRQ_EN,
229		priv->xpec_base + NETX_XPEC_RAM_START_OFS +
230		ETH_MAC_LOCAL_CONFIG);
231
232	mii_check_media(&priv->mii, netif_msg_link(priv), 1);
233	netif_start_queue(ndev);
234
235	return 0;
236}
237
238static int netx_eth_close(struct net_device *ndev)
239{
240	struct netx_eth_priv *priv = netdev_priv(ndev);
241
242	netif_stop_queue(ndev);
243
244	writel(0,
245	    priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_LOCAL_CONFIG);
246
247	free_irq(ndev->irq, ndev);
248
249	return 0;
250}
251
252static void netx_eth_timeout(struct net_device *ndev)
253{
254	struct netx_eth_priv *priv = netdev_priv(ndev);
255	int i;
256
257	printk(KERN_ERR "%s: transmit timed out, resetting\n", ndev->name);
258
259	spin_lock_irq(&priv->lock);
260
261	xc_reset(priv->xc);
262	xc_start(priv->xc);
263
264	for (i=2; i<=18; i++)
265		pfifo_push(EMPTY_PTR_FIFO(priv->id),
266			FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
267
268	spin_unlock_irq(&priv->lock);
269
270	netif_wake_queue(ndev);
271}
272
273static int
274netx_eth_phy_read(struct net_device *ndev, int phy_id, int reg)
275{
276	unsigned int val;
277
278	val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
279	      MIIMU_REGADDR(reg) | MIIMU_PHY_NRES;
280
281	writel(val, NETX_MIIMU);
282	while (readl(NETX_MIIMU) & MIIMU_SNRDY);
283
284	return readl(NETX_MIIMU) >> 16;
285
286}
287
288static void
289netx_eth_phy_write(struct net_device *ndev, int phy_id, int reg, int value)
290{
291	unsigned int val;
292
293	val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
294	      MIIMU_REGADDR(reg) | MIIMU_PHY_NRES | MIIMU_OPMODE_WRITE |
295	      MIIMU_DATA(value);
296
297	writel(val, NETX_MIIMU);
298	while (readl(NETX_MIIMU) & MIIMU_SNRDY);
299}
300
301static const struct net_device_ops netx_eth_netdev_ops = {
302	.ndo_open		= netx_eth_open,
303	.ndo_stop		= netx_eth_close,
304	.ndo_start_xmit		= netx_eth_hard_start_xmit,
305	.ndo_tx_timeout		= netx_eth_timeout,
306	.ndo_set_rx_mode	= netx_eth_set_multicast_list,
307	.ndo_change_mtu		= eth_change_mtu,
308	.ndo_validate_addr	= eth_validate_addr,
309	.ndo_set_mac_address	= eth_mac_addr,
310};
311
312static int netx_eth_enable(struct net_device *ndev)
313{
314	struct netx_eth_priv *priv = netdev_priv(ndev);
315	unsigned int mac4321, mac65;
316	int running, i;
317
318	ether_setup(ndev);
319
320	ndev->netdev_ops = &netx_eth_netdev_ops;
321	ndev->watchdog_timeo = msecs_to_jiffies(5000);
322
323	priv->msg_enable       = NETIF_MSG_LINK;
324	priv->mii.phy_id_mask  = 0x1f;
325	priv->mii.reg_num_mask = 0x1f;
326	priv->mii.force_media  = 0;
327	priv->mii.full_duplex  = 0;
328	priv->mii.dev	     = ndev;
329	priv->mii.mdio_read    = netx_eth_phy_read;
330	priv->mii.mdio_write   = netx_eth_phy_write;
331	priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
332
333	running = xc_running(priv->xc);
334	xc_stop(priv->xc);
335
336	/* if the xc engine is already running, assume the bootloader has
337	 * loaded the firmware for us
338	 */
339	if (running) {
340		/* get Node Address from hardware */
341		mac4321 = readl(priv->xpec_base +
342			NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
343		mac65 = readl(priv->xpec_base +
344			NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
345
346		ndev->dev_addr[0] = mac4321 & 0xff;
347		ndev->dev_addr[1] = (mac4321 >> 8) & 0xff;
348		ndev->dev_addr[2] = (mac4321 >> 16) & 0xff;
349		ndev->dev_addr[3] = (mac4321 >> 24) & 0xff;
350		ndev->dev_addr[4] = mac65 & 0xff;
351		ndev->dev_addr[5] = (mac65 >> 8) & 0xff;
352	} else {
353		if (xc_request_firmware(priv->xc)) {
354			printk(CARDNAME ": requesting firmware failed\n");
355			return -ENODEV;
356		}
357	}
358
359	xc_reset(priv->xc);
360	xc_start(priv->xc);
361
362	if (!is_valid_ether_addr(ndev->dev_addr))
363		printk("%s: Invalid ethernet MAC address.  Please "
364		       "set using ifconfig\n", ndev->name);
365
366	for (i=2; i<=18; i++)
367		pfifo_push(EMPTY_PTR_FIFO(priv->id),
368			FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
369
370	return register_netdev(ndev);
371
372}
373
374static int netx_eth_drv_probe(struct platform_device *pdev)
375{
376	struct netx_eth_priv *priv;
377	struct net_device *ndev;
378	struct netxeth_platform_data *pdata;
379	int ret;
380
381	ndev = alloc_etherdev(sizeof (struct netx_eth_priv));
382	if (!ndev) {
383		ret = -ENOMEM;
384		goto exit;
385	}
386	SET_NETDEV_DEV(ndev, &pdev->dev);
387
388	platform_set_drvdata(pdev, ndev);
389
390	priv = netdev_priv(ndev);
391
392	pdata = dev_get_platdata(&pdev->dev);
393	priv->xc = request_xc(pdata->xcno, &pdev->dev);
394	if (!priv->xc) {
395		dev_err(&pdev->dev, "unable to request xc engine\n");
396		ret = -ENODEV;
397		goto exit_free_netdev;
398	}
399
400	ndev->irq = priv->xc->irq;
401	priv->id = pdev->id;
402	priv->xpec_base = priv->xc->xpec_base;
403	priv->xmac_base = priv->xc->xmac_base;
404	priv->sram_base = priv->xc->sram_base;
405
406	spin_lock_init(&priv->lock);
407
408	ret = pfifo_request(PFIFO_MASK(priv->id));
409	if (ret) {
410		printk("unable to request PFIFO\n");
411		goto exit_free_xc;
412	}
413
414	ret = netx_eth_enable(ndev);
415	if (ret)
416		goto exit_free_pfifo;
417
418	return 0;
419exit_free_pfifo:
420	pfifo_free(PFIFO_MASK(priv->id));
421exit_free_xc:
422	free_xc(priv->xc);
423exit_free_netdev:
424	free_netdev(ndev);
425exit:
426	return ret;
427}
428
429static int netx_eth_drv_remove(struct platform_device *pdev)
430{
431	struct net_device *ndev = platform_get_drvdata(pdev);
432	struct netx_eth_priv *priv = netdev_priv(ndev);
433
434	unregister_netdev(ndev);
435	xc_stop(priv->xc);
436	free_xc(priv->xc);
437	free_netdev(ndev);
438	pfifo_free(PFIFO_MASK(priv->id));
439
440	return 0;
441}
442
443static int netx_eth_drv_suspend(struct platform_device *pdev, pm_message_t state)
444{
445	dev_err(&pdev->dev, "suspend not implemented\n");
446	return 0;
447}
448
449static int netx_eth_drv_resume(struct platform_device *pdev)
450{
451	dev_err(&pdev->dev, "resume not implemented\n");
452	return 0;
453}
454
455static struct platform_driver netx_eth_driver = {
456	.probe		= netx_eth_drv_probe,
457	.remove		= netx_eth_drv_remove,
458	.suspend	= netx_eth_drv_suspend,
459	.resume		= netx_eth_drv_resume,
460	.driver		= {
461		.name	= CARDNAME,
462		.owner	= THIS_MODULE,
463	},
464};
465
466static int __init netx_eth_init(void)
467{
468	unsigned int phy_control, val;
469
470	printk("NetX Ethernet driver\n");
471
472	phy_control = PHY_CONTROL_PHY_ADDRESS(INTERNAL_PHY_ADR>>1) |
473		      PHY_CONTROL_PHY1_MODE(PHY_MODE_ALL) |
474		      PHY_CONTROL_PHY1_AUTOMDIX |
475		      PHY_CONTROL_PHY1_EN |
476		      PHY_CONTROL_PHY0_MODE(PHY_MODE_ALL) |
477		      PHY_CONTROL_PHY0_AUTOMDIX |
478		      PHY_CONTROL_PHY0_EN |
479		      PHY_CONTROL_CLK_XLATIN;
480
481	val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
482	writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
483
484	writel(phy_control | PHY_CONTROL_RESET, NETX_SYSTEM_PHY_CONTROL);
485	udelay(100);
486
487	val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
488	writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
489
490	writel(phy_control, NETX_SYSTEM_PHY_CONTROL);
491
492	return platform_driver_register(&netx_eth_driver);
493}
494
495static void __exit netx_eth_cleanup(void)
496{
497	platform_driver_unregister(&netx_eth_driver);
498}
499
500module_init(netx_eth_init);
501module_exit(netx_eth_cleanup);
502
503MODULE_AUTHOR("Sascha Hauer, Pengutronix");
504MODULE_LICENSE("GPL");
505MODULE_ALIAS("platform:" CARDNAME);
506MODULE_FIRMWARE("xc0.bin");
507MODULE_FIRMWARE("xc1.bin");
508MODULE_FIRMWARE("xc2.bin");