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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2013 - 2018 Intel Corporation. */
3
4#ifndef _I40E_HMC_H_
5#define _I40E_HMC_H_
6
7#include "i40e_alloc.h"
8#include "i40e_io.h"
9#include "i40e_register.h"
10
11#define I40E_HMC_MAX_BP_COUNT 512
12
13/* forward-declare the HW struct for the compiler */
14struct i40e_hw;
15
16#define I40E_HMC_INFO_SIGNATURE 0x484D5347 /* HMSG */
17#define I40E_HMC_PD_CNT_IN_SD 512
18#define I40E_HMC_DIRECT_BP_SIZE 0x200000 /* 2M */
19#define I40E_HMC_PAGED_BP_SIZE 4096
20#define I40E_HMC_PD_BP_BUF_ALIGNMENT 4096
21
22struct i40e_hmc_obj_info {
23 u64 base; /* base addr in FPM */
24 u32 max_cnt; /* max count available for this hmc func */
25 u32 cnt; /* count of objects driver actually wants to create */
26 u64 size; /* size in bytes of one object */
27};
28
29enum i40e_sd_entry_type {
30 I40E_SD_TYPE_INVALID = 0,
31 I40E_SD_TYPE_PAGED = 1,
32 I40E_SD_TYPE_DIRECT = 2
33};
34
35struct i40e_hmc_bp {
36 enum i40e_sd_entry_type entry_type;
37 struct i40e_dma_mem addr; /* populate to be used by hw */
38 u32 sd_pd_index;
39 u32 ref_cnt;
40};
41
42struct i40e_hmc_pd_entry {
43 struct i40e_hmc_bp bp;
44 u32 sd_index;
45 bool rsrc_pg;
46 bool valid;
47};
48
49struct i40e_hmc_pd_table {
50 struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
51 struct i40e_hmc_pd_entry *pd_entry; /* [512] for sw book keeping */
52 struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
53
54 u32 ref_cnt;
55 u32 sd_index;
56};
57
58struct i40e_hmc_sd_entry {
59 enum i40e_sd_entry_type entry_type;
60 bool valid;
61
62 union {
63 struct i40e_hmc_pd_table pd_table;
64 struct i40e_hmc_bp bp;
65 } u;
66};
67
68struct i40e_hmc_sd_table {
69 struct i40e_virt_mem addr; /* used to track sd_entry allocations */
70 u32 sd_cnt;
71 u32 ref_cnt;
72 struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
73};
74
75struct i40e_hmc_info {
76 u32 signature;
77 /* equals to pci func num for PF and dynamically allocated for VFs */
78 u8 hmc_fn_id;
79 u16 first_sd_index; /* index of the first available SD */
80
81 /* hmc objects */
82 struct i40e_hmc_obj_info *hmc_obj;
83 struct i40e_virt_mem hmc_obj_virt_mem;
84 struct i40e_hmc_sd_table sd_table;
85};
86
87#define I40E_INC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt++)
88#define I40E_INC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt++)
89#define I40E_INC_BP_REFCNT(bp) ((bp)->ref_cnt++)
90
91#define I40E_DEC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt--)
92#define I40E_DEC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt--)
93#define I40E_DEC_BP_REFCNT(bp) ((bp)->ref_cnt--)
94
95/**
96 * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
97 * @hw: pointer to our hw struct
98 * @pa: pointer to physical address
99 * @sd_index: segment descriptor index
100 * @type: if sd entry is direct or paged
101 **/
102#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type) \
103{ \
104 u32 val1, val2, val3; \
105 val1 = (u32)(upper_32_bits(pa)); \
106 val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT << \
107 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \
108 ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
109 I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) | \
110 BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \
111 val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
112 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
113 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
114 wr32((hw), I40E_PFHMC_SDCMD, val3); \
115}
116
117/**
118 * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
119 * @hw: pointer to our hw struct
120 * @sd_index: segment descriptor index
121 * @type: if sd entry is direct or paged
122 **/
123#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type) \
124{ \
125 u32 val2, val3; \
126 val2 = (I40E_HMC_MAX_BP_COUNT << \
127 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \
128 ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
129 I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \
130 val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
131 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
132 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
133 wr32((hw), I40E_PFHMC_SDCMD, val3); \
134}
135
136/**
137 * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
138 * @hw: pointer to our hw struct
139 * @sd_idx: segment descriptor index
140 * @pd_idx: page descriptor index
141 **/
142#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \
143 wr32((hw), I40E_PFHMC_PDINV, \
144 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
145 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
146
147/**
148 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
149 * @hmc_info: pointer to the HMC configuration information structure
150 * @type: type of HMC resources we're searching
151 * @index: starting index for the object
152 * @cnt: number of objects we're trying to create
153 * @sd_idx: pointer to return index of the segment descriptor in question
154 * @sd_limit: pointer to return the maximum number of segment descriptors
155 *
156 * This function calculates the segment descriptor index and index limit
157 * for the resource defined by i40e_hmc_rsrc_type.
158 **/
159#define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
160{ \
161 u64 fpm_addr, fpm_limit; \
162 fpm_addr = (hmc_info)->hmc_obj[(type)].base + \
163 (hmc_info)->hmc_obj[(type)].size * (index); \
164 fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
165 *(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \
166 *(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \
167 /* add one more to the limit to correct our range */ \
168 *(sd_limit) += 1; \
169}
170
171/**
172 * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
173 * @hmc_info: pointer to the HMC configuration information struct
174 * @type: HMC resource type we're examining
175 * @idx: starting index for the object
176 * @cnt: number of objects we're trying to create
177 * @pd_index: pointer to return page descriptor index
178 * @pd_limit: pointer to return page descriptor index limit
179 *
180 * Calculates the page descriptor index and index limit for the resource
181 * defined by i40e_hmc_rsrc_type.
182 **/
183#define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
184{ \
185 u64 fpm_adr, fpm_limit; \
186 fpm_adr = (hmc_info)->hmc_obj[(type)].base + \
187 (hmc_info)->hmc_obj[(type)].size * (idx); \
188 fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt); \
189 *(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \
190 *(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \
191 /* add one more to the limit to correct our range */ \
192 *(pd_limit) += 1; \
193}
194
195int i40e_add_sd_table_entry(struct i40e_hw *hw,
196 struct i40e_hmc_info *hmc_info,
197 u32 sd_index,
198 enum i40e_sd_entry_type type,
199 u64 direct_mode_sz);
200int i40e_add_pd_table_entry(struct i40e_hw *hw,
201 struct i40e_hmc_info *hmc_info,
202 u32 pd_index,
203 struct i40e_dma_mem *rsrc_pg);
204int i40e_remove_pd_bp(struct i40e_hw *hw,
205 struct i40e_hmc_info *hmc_info,
206 u32 idx);
207int i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
208 u32 idx);
209int i40e_remove_sd_bp_new(struct i40e_hw *hw,
210 struct i40e_hmc_info *hmc_info,
211 u32 idx, bool is_pf);
212int i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
213 u32 idx);
214int i40e_remove_pd_page_new(struct i40e_hw *hw,
215 struct i40e_hmc_info *hmc_info,
216 u32 idx, bool is_pf);
217
218#endif /* _I40E_HMC_H_ */
1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_HMC_H_
28#define _I40E_HMC_H_
29
30#define I40E_HMC_MAX_BP_COUNT 512
31
32/* forward-declare the HW struct for the compiler */
33struct i40e_hw;
34
35#define I40E_HMC_INFO_SIGNATURE 0x484D5347 /* HMSG */
36#define I40E_HMC_PD_CNT_IN_SD 512
37#define I40E_HMC_DIRECT_BP_SIZE 0x200000 /* 2M */
38#define I40E_HMC_PAGED_BP_SIZE 4096
39#define I40E_HMC_PD_BP_BUF_ALIGNMENT 4096
40#define I40E_FIRST_VF_FPM_ID 16
41
42struct i40e_hmc_obj_info {
43 u64 base; /* base addr in FPM */
44 u32 max_cnt; /* max count available for this hmc func */
45 u32 cnt; /* count of objects driver actually wants to create */
46 u64 size; /* size in bytes of one object */
47};
48
49enum i40e_sd_entry_type {
50 I40E_SD_TYPE_INVALID = 0,
51 I40E_SD_TYPE_PAGED = 1,
52 I40E_SD_TYPE_DIRECT = 2
53};
54
55struct i40e_hmc_bp {
56 enum i40e_sd_entry_type entry_type;
57 struct i40e_dma_mem addr; /* populate to be used by hw */
58 u32 sd_pd_index;
59 u32 ref_cnt;
60};
61
62struct i40e_hmc_pd_entry {
63 struct i40e_hmc_bp bp;
64 u32 sd_index;
65 bool valid;
66};
67
68struct i40e_hmc_pd_table {
69 struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
70 struct i40e_hmc_pd_entry *pd_entry; /* [512] for sw book keeping */
71 struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
72
73 u32 ref_cnt;
74 u32 sd_index;
75};
76
77struct i40e_hmc_sd_entry {
78 enum i40e_sd_entry_type entry_type;
79 bool valid;
80
81 union {
82 struct i40e_hmc_pd_table pd_table;
83 struct i40e_hmc_bp bp;
84 } u;
85};
86
87struct i40e_hmc_sd_table {
88 struct i40e_virt_mem addr; /* used to track sd_entry allocations */
89 u32 sd_cnt;
90 u32 ref_cnt;
91 struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
92};
93
94struct i40e_hmc_info {
95 u32 signature;
96 /* equals to pci func num for PF and dynamically allocated for VFs */
97 u8 hmc_fn_id;
98 u16 first_sd_index; /* index of the first available SD */
99
100 /* hmc objects */
101 struct i40e_hmc_obj_info *hmc_obj;
102 struct i40e_virt_mem hmc_obj_virt_mem;
103 struct i40e_hmc_sd_table sd_table;
104};
105
106#define I40E_INC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt++)
107#define I40E_INC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt++)
108#define I40E_INC_BP_REFCNT(bp) ((bp)->ref_cnt++)
109
110#define I40E_DEC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt--)
111#define I40E_DEC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt--)
112#define I40E_DEC_BP_REFCNT(bp) ((bp)->ref_cnt--)
113
114/**
115 * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
116 * @hw: pointer to our hw struct
117 * @pa: pointer to physical address
118 * @sd_index: segment descriptor index
119 * @type: if sd entry is direct or paged
120 **/
121#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type) \
122{ \
123 u32 val1, val2, val3; \
124 val1 = (u32)(upper_32_bits(pa)); \
125 val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT << \
126 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \
127 ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
128 I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) | \
129 (1 << I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \
130 val3 = (sd_index) | (1 << I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
131 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
132 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
133 wr32((hw), I40E_PFHMC_SDCMD, val3); \
134}
135
136/**
137 * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
138 * @hw: pointer to our hw struct
139 * @sd_index: segment descriptor index
140 * @type: if sd entry is direct or paged
141 **/
142#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type) \
143{ \
144 u32 val2, val3; \
145 val2 = (I40E_HMC_MAX_BP_COUNT << \
146 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \
147 ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
148 I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \
149 val3 = (sd_index) | (1 << I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
150 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
151 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
152 wr32((hw), I40E_PFHMC_SDCMD, val3); \
153}
154
155/**
156 * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
157 * @hw: pointer to our hw struct
158 * @sd_idx: segment descriptor index
159 * @pd_idx: page descriptor index
160 **/
161#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \
162 wr32((hw), I40E_PFHMC_PDINV, \
163 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
164 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
165
166#define I40E_INVALIDATE_VF_HMC_PD(hw, sd_idx, pd_idx, hmc_fn_id) \
167 wr32((hw), I40E_GLHMC_VFPDINV((hmc_fn_id) - I40E_FIRST_VF_FPM_ID), \
168 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
169 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
170
171/**
172 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
173 * @hmc_info: pointer to the HMC configuration information structure
174 * @type: type of HMC resources we're searching
175 * @index: starting index for the object
176 * @cnt: number of objects we're trying to create
177 * @sd_idx: pointer to return index of the segment descriptor in question
178 * @sd_limit: pointer to return the maximum number of segment descriptors
179 *
180 * This function calculates the segment descriptor index and index limit
181 * for the resource defined by i40e_hmc_rsrc_type.
182 **/
183#define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
184{ \
185 u64 fpm_addr, fpm_limit; \
186 fpm_addr = (hmc_info)->hmc_obj[(type)].base + \
187 (hmc_info)->hmc_obj[(type)].size * (index); \
188 fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
189 *(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \
190 *(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \
191 /* add one more to the limit to correct our range */ \
192 *(sd_limit) += 1; \
193}
194
195/**
196 * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
197 * @hmc_info: pointer to the HMC configuration information struct
198 * @type: HMC resource type we're examining
199 * @idx: starting index for the object
200 * @cnt: number of objects we're trying to create
201 * @pd_index: pointer to return page descriptor index
202 * @pd_limit: pointer to return page descriptor index limit
203 *
204 * Calculates the page descriptor index and index limit for the resource
205 * defined by i40e_hmc_rsrc_type.
206 **/
207#define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
208{ \
209 u64 fpm_adr, fpm_limit; \
210 fpm_adr = (hmc_info)->hmc_obj[(type)].base + \
211 (hmc_info)->hmc_obj[(type)].size * (idx); \
212 fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt); \
213 *(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \
214 *(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \
215 /* add one more to the limit to correct our range */ \
216 *(pd_limit) += 1; \
217}
218i40e_status i40e_add_sd_table_entry(struct i40e_hw *hw,
219 struct i40e_hmc_info *hmc_info,
220 u32 sd_index,
221 enum i40e_sd_entry_type type,
222 u64 direct_mode_sz);
223
224i40e_status i40e_add_pd_table_entry(struct i40e_hw *hw,
225 struct i40e_hmc_info *hmc_info,
226 u32 pd_index);
227i40e_status i40e_remove_pd_bp(struct i40e_hw *hw,
228 struct i40e_hmc_info *hmc_info,
229 u32 idx, bool is_pf);
230i40e_status i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
231 u32 idx);
232i40e_status i40e_remove_sd_bp_new(struct i40e_hw *hw,
233 struct i40e_hmc_info *hmc_info,
234 u32 idx, bool is_pf);
235i40e_status i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
236 u32 idx);
237i40e_status i40e_remove_pd_page_new(struct i40e_hw *hw,
238 struct i40e_hmc_info *hmc_info,
239 u32 idx, bool is_pf);
240
241#endif /* _I40E_HMC_H_ */