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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3    Copyright (c) 1999  Frodo Looijaard <frodol@dds.nl> and
  4    Philip Edelbrock <phil@netroedge.com> and
  5    Mark D. Studebaker <mdsxyz123@yahoo.com>
  6
 
 
 
 
 
 
 
 
 
 
 
 
 
  7*/
  8
  9/*
 10    This is the driver for the SMB Host controller on
 11    Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
 12
 13    The M1543C is a South bridge for desktop systems.
 14    The M1533 is a South bridge for portable systems.
 15    They are part of the following ALI chipsets:
 16       "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
 17       with AGP and 100MHz CPU Front Side bus
 18       "Aladdin V": Includes the M1541 Socket 7 North bridge
 19       with AGP and 100MHz CPU Front Side bus
 20       "Aladdin IV": Includes the M1541 Socket 7 North bridge
 21       with host bus up to 83.3 MHz.
 22    For an overview of these chips see http://www.acerlabs.com
 23
 24    The M1533/M1543C devices appear as FOUR separate devices
 25    on the PCI bus. An output of lspci will show something similar
 26    to the following:
 27
 28	00:02.0 USB Controller: Acer Laboratories Inc. M5237
 29	00:03.0 Bridge: Acer Laboratories Inc. M7101
 30	00:07.0 ISA bridge: Acer Laboratories Inc. M1533
 31	00:0f.0 IDE interface: Acer Laboratories Inc. M5229
 32
 33    The SMB controller is part of the 7101 device, which is an
 34    ACPI-compliant Power Management Unit (PMU).
 35
 36    The whole 7101 device has to be enabled for the SMB to work.
 37    You can't just enable the SMB alone.
 38    The SMB and the ACPI have separate I/O spaces.
 39    We make sure that the SMB is enabled. We leave the ACPI alone.
 40
 41    This driver controls the SMB Host only.
 42    The SMB Target controller on the M15X3 is not enabled.
 43
 44    This driver does not use interrupts.
 45*/
 46
 47/* Note: we assume there can only be one ALI15X3, with one SMBus interface */
 48
 49#include <linux/module.h>
 50#include <linux/pci.h>
 51#include <linux/kernel.h>
 52#include <linux/stddef.h>
 53#include <linux/ioport.h>
 54#include <linux/delay.h>
 55#include <linux/i2c.h>
 56#include <linux/acpi.h>
 57#include <linux/io.h>
 58
 59/* ALI15X3 SMBus address offsets */
 60#define SMBHSTSTS	(0 + ali15x3_smba)
 61#define SMBHSTCNT	(1 + ali15x3_smba)
 62#define SMBHSTSTART	(2 + ali15x3_smba)
 63#define SMBHSTCMD	(7 + ali15x3_smba)
 64#define SMBHSTADD	(3 + ali15x3_smba)
 65#define SMBHSTDAT0	(4 + ali15x3_smba)
 66#define SMBHSTDAT1	(5 + ali15x3_smba)
 67#define SMBBLKDAT	(6 + ali15x3_smba)
 68
 69/* PCI Address Constants */
 70#define SMBCOM		0x004
 71#define SMBBA		0x014
 72#define SMBATPC		0x05B	/* used to unlock xxxBA registers */
 73#define SMBHSTCFG	0x0E0
 74#define SMBSLVC		0x0E1
 75#define SMBCLK		0x0E2
 76#define SMBREV		0x008
 77
 78/* Other settings */
 79#define MAX_TIMEOUT		200	/* times 1/100 sec */
 80#define ALI15X3_SMB_IOSIZE	32
 81
 82/* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
 83   We don't use these here. If the bases aren't set to some value we
 84   tell user to upgrade BIOS and we fail.
 85*/
 86#define ALI15X3_SMB_DEFAULTBASE	0xE800
 87
 88/* ALI15X3 address lock bits */
 89#define ALI15X3_LOCK		0x06
 90
 91/* ALI15X3 command constants */
 92#define ALI15X3_ABORT		0x02
 93#define ALI15X3_T_OUT		0x04
 94#define ALI15X3_QUICK		0x00
 95#define ALI15X3_BYTE		0x10
 96#define ALI15X3_BYTE_DATA	0x20
 97#define ALI15X3_WORD_DATA	0x30
 98#define ALI15X3_BLOCK_DATA	0x40
 99#define ALI15X3_BLOCK_CLR	0x80
100
101/* ALI15X3 status register bits */
102#define ALI15X3_STS_IDLE	0x04
103#define ALI15X3_STS_BUSY	0x08
104#define ALI15X3_STS_DONE	0x10
105#define ALI15X3_STS_DEV		0x20	/* device error */
106#define ALI15X3_STS_COLL	0x40	/* collision or no response */
107#define ALI15X3_STS_TERM	0x80	/* terminated by abort */
108#define ALI15X3_STS_ERR		0xE0	/* all the bad error bits */
109
110
111/* If force_addr is set to anything different from 0, we forcibly enable
112   the device at the given address. */
113static u16 force_addr;
114module_param_hw(force_addr, ushort, ioport, 0);
115MODULE_PARM_DESC(force_addr,
116		 "Initialize the base address of the i2c controller");
117
118static struct pci_driver ali15x3_driver;
119static unsigned short ali15x3_smba;
120
121static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
122{
123	u16 a;
124	unsigned char temp;
125
126	/* Check the following things:
127		- SMB I/O address is initialized
128		- Device is enabled
129		- We can use the addresses
130	*/
131
132	/* Unlock the register.
133	   The data sheet says that the address registers are read-only
134	   if the lock bits are 1, but in fact the address registers
135	   are zero unless you clear the lock bits.
136	*/
137	pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
138	if (temp & ALI15X3_LOCK) {
139		temp &= ~ALI15X3_LOCK;
140		pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
141	}
142
143	/* Determine the address of the SMBus area */
144	pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
145	ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
146	if (ali15x3_smba == 0 && force_addr == 0) {
147		dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
148			"- upgrade BIOS or use force_addr=0xaddr\n");
149		return -ENODEV;
150	}
151
152	if(force_addr)
153		ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
154
155	if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
156			      ali15x3_driver.name))
157		return -EBUSY;
158
159	if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
160			    ali15x3_driver.name)) {
161		dev_err(&ALI15X3_dev->dev,
162			"ALI15X3_smb region 0x%x already in use!\n",
163			ali15x3_smba);
164		return -ENODEV;
165	}
166
167	if(force_addr) {
168		int ret;
169
170		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
171			ali15x3_smba);
172		ret = pci_write_config_word(ALI15X3_dev, SMBBA, ali15x3_smba);
173		if (ret != PCIBIOS_SUCCESSFUL)
 
174			goto error;
175		ret = pci_read_config_word(ALI15X3_dev, SMBBA, &a);
176		if (ret != PCIBIOS_SUCCESSFUL)
177			goto error;
178		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
179			/* make sure it works */
180			dev_err(&ALI15X3_dev->dev,
181				"force address failed - not supported?\n");
182			goto error;
183		}
184	}
185	/* check if whole device is enabled */
186	pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
187	if ((temp & 1) == 0) {
188		dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
189		pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
190	}
191
192	/* Is SMB Host controller enabled? */
193	pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
194	if ((temp & 1) == 0) {
195		dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
196		pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
197	}
198
199	/* set SMB clock to 74KHz as recommended in data sheet */
200	pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
201
202	/*
203	  The interrupt routing for SMB is set up in register 0x77 in the
204	  1533 ISA Bridge device, NOT in the 7101 device.
205	  Don't bother with finding the 1533 device and reading the register.
206	if ((....... & 0x0F) == 1)
207		dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
208	*/
209	pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
210	dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
211	dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
212
213	return 0;
214error:
215	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
216	return -ENODEV;
217}
218
219/* Another internally used function */
220static int ali15x3_transaction(struct i2c_adapter *adap)
221{
222	int temp;
223	int result = 0;
224	int timeout = 0;
225
226	dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
227		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
228		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
229		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
230
231	/* get status */
232	temp = inb_p(SMBHSTSTS);
233
234	/* Make sure the SMBus host is ready to start transmitting */
235	/* Check the busy bit first */
236	if (temp & ALI15X3_STS_BUSY) {
237	/*
238	   If the host controller is still busy, it may have timed out in the
239	   previous transaction, resulting in a "SMBus Timeout" Dev.
240	   I've tried the following to reset a stuck busy bit.
241		1. Reset the controller with an ABORT command.
242		   (this doesn't seem to clear the controller if an external
243		   device is hung)
244		2. Reset the controller and the other SMBus devices with a
245		   T_OUT command.  (this clears the host busy bit if an
246		   external device is hung, but it comes back upon a new access
247		   to a device)
248		3. Disable and reenable the controller in SMBHSTCFG
249	   Worst case, nothing seems to work except power reset.
250	*/
251	/* Abort - reset the host controller */
252	/*
253	   Try resetting entire SMB bus, including other devices -
254	   This may not work either - it clears the BUSY bit but
255	   then the BUSY bit may come back on when you try and use the chip again.
256	   If that's the case you are stuck.
257	*/
258		dev_info(&adap->dev, "Resetting entire SMB Bus to "
259			"clear busy condition (%02x)\n", temp);
260		outb_p(ALI15X3_T_OUT, SMBHSTCNT);
261		temp = inb_p(SMBHSTSTS);
262	}
263
264	/* now check the error bits and the busy bit */
265	if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
266		/* do a clear-on-write */
267		outb_p(0xFF, SMBHSTSTS);
268		if ((temp = inb_p(SMBHSTSTS)) &
269		    (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
270			/* this is probably going to be correctable only by a power reset
271			   as one of the bits now appears to be stuck */
272			/* This may be a bus or device with electrical problems. */
273			dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
274				"controller or device on bus is probably hung\n",
275				temp);
276			return -EBUSY;
277		}
278	} else {
279		/* check and clear done bit */
280		if (temp & ALI15X3_STS_DONE) {
281			outb_p(temp, SMBHSTSTS);
282		}
283	}
284
285	/* start the transaction by writing anything to the start register */
286	outb_p(0xFF, SMBHSTSTART);
287
288	/* We will always wait for a fraction of a second! */
289	timeout = 0;
290	do {
291		msleep(1);
292		temp = inb_p(SMBHSTSTS);
293	} while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
294		 && (timeout++ < MAX_TIMEOUT));
295
296	/* If the SMBus is still busy, we give up */
297	if (timeout > MAX_TIMEOUT)
298		result = -ETIMEDOUT;
 
 
299
300	if (temp & ALI15X3_STS_TERM) {
301		result = -EIO;
302		dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
303	}
304
305	/*
306	  Unfortunately the ALI SMB controller maps "no response" and "bus
307	  collision" into a single bit. No response is the usual case so don't
308	  do a printk.
309	  This means that bus collisions go unreported.
310	*/
311	if (temp & ALI15X3_STS_COLL) {
312		result = -ENXIO;
313		dev_dbg(&adap->dev,
314			"Error: no response or bus collision ADD=%02x\n",
315			inb_p(SMBHSTADD));
316	}
317
318	/* haven't ever seen this */
319	if (temp & ALI15X3_STS_DEV) {
320		result = -EIO;
321		dev_err(&adap->dev, "Error: device error\n");
322	}
323	dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
324		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
325		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
326		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
327	return result;
328}
329
330/* Return negative errno on error. */
331static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
332		   unsigned short flags, char read_write, u8 command,
333		   int size, union i2c_smbus_data * data)
334{
335	int i, len;
336	int temp;
337	int timeout;
338
339	/* clear all the bits (clear-on-write) */
340	outb_p(0xFF, SMBHSTSTS);
341	/* make sure SMBus is idle */
342	temp = inb_p(SMBHSTSTS);
343	for (timeout = 0;
344	     (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
345	     timeout++) {
346		msleep(1);
347		temp = inb_p(SMBHSTSTS);
348	}
349	if (timeout >= MAX_TIMEOUT) {
350		dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
351	}
352
353	switch (size) {
354	case I2C_SMBUS_QUICK:
355		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
356		       SMBHSTADD);
357		size = ALI15X3_QUICK;
358		break;
359	case I2C_SMBUS_BYTE:
360		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
361		       SMBHSTADD);
362		if (read_write == I2C_SMBUS_WRITE)
363			outb_p(command, SMBHSTCMD);
364		size = ALI15X3_BYTE;
365		break;
366	case I2C_SMBUS_BYTE_DATA:
367		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
368		       SMBHSTADD);
369		outb_p(command, SMBHSTCMD);
370		if (read_write == I2C_SMBUS_WRITE)
371			outb_p(data->byte, SMBHSTDAT0);
372		size = ALI15X3_BYTE_DATA;
373		break;
374	case I2C_SMBUS_WORD_DATA:
375		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
376		       SMBHSTADD);
377		outb_p(command, SMBHSTCMD);
378		if (read_write == I2C_SMBUS_WRITE) {
379			outb_p(data->word & 0xff, SMBHSTDAT0);
380			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
381		}
382		size = ALI15X3_WORD_DATA;
383		break;
384	case I2C_SMBUS_BLOCK_DATA:
385		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
386		       SMBHSTADD);
387		outb_p(command, SMBHSTCMD);
388		if (read_write == I2C_SMBUS_WRITE) {
389			len = data->block[0];
390			if (len < 0) {
391				len = 0;
392				data->block[0] = len;
393			}
394			if (len > 32) {
395				len = 32;
396				data->block[0] = len;
397			}
398			outb_p(len, SMBHSTDAT0);
399			/* Reset SMBBLKDAT */
400			outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
401			for (i = 1; i <= len; i++)
402				outb_p(data->block[i], SMBBLKDAT);
403		}
404		size = ALI15X3_BLOCK_DATA;
405		break;
406	default:
407		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
408		return -EOPNOTSUPP;
409	}
410
411	outb_p(size, SMBHSTCNT);	/* output command */
412
413	temp = ali15x3_transaction(adap);
414	if (temp)
415		return temp;
416
417	if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
418		return 0;
419
420
421	switch (size) {
422	case ALI15X3_BYTE:	/* Result put in SMBHSTDAT0 */
423		data->byte = inb_p(SMBHSTDAT0);
424		break;
425	case ALI15X3_BYTE_DATA:
426		data->byte = inb_p(SMBHSTDAT0);
427		break;
428	case ALI15X3_WORD_DATA:
429		data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
430		break;
431	case ALI15X3_BLOCK_DATA:
432		len = inb_p(SMBHSTDAT0);
433		if (len > 32)
434			len = 32;
435		data->block[0] = len;
436		/* Reset SMBBLKDAT */
437		outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
438		for (i = 1; i <= data->block[0]; i++) {
439			data->block[i] = inb_p(SMBBLKDAT);
440			dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
441				len, i, data->block[i]);
442		}
443		break;
444	}
445	return 0;
446}
447
448static u32 ali15x3_func(struct i2c_adapter *adapter)
449{
450	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
451	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
452	    I2C_FUNC_SMBUS_BLOCK_DATA;
453}
454
455static const struct i2c_algorithm smbus_algorithm = {
456	.smbus_xfer	= ali15x3_access,
457	.functionality	= ali15x3_func,
458};
459
460static struct i2c_adapter ali15x3_adapter = {
461	.owner		= THIS_MODULE,
462	.class          = I2C_CLASS_HWMON,
463	.algo		= &smbus_algorithm,
464};
465
466static const struct pci_device_id ali15x3_ids[] = {
467	{ PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
468	{ 0, }
469};
470
471MODULE_DEVICE_TABLE (pci, ali15x3_ids);
472
473static int ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
474{
475	if (ali15x3_setup(dev)) {
476		dev_err(&dev->dev,
477			"ALI15X3 not detected, module not inserted.\n");
478		return -ENODEV;
479	}
480
481	/* set up the sysfs linkage to our parent device */
482	ali15x3_adapter.dev.parent = &dev->dev;
483
484	snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
485		"SMBus ALI15X3 adapter at %04x", ali15x3_smba);
486	return i2c_add_adapter(&ali15x3_adapter);
487}
488
489static void ali15x3_remove(struct pci_dev *dev)
490{
491	i2c_del_adapter(&ali15x3_adapter);
492	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
493}
494
495static struct pci_driver ali15x3_driver = {
496	.name		= "ali15x3_smbus",
497	.id_table	= ali15x3_ids,
498	.probe		= ali15x3_probe,
499	.remove		= ali15x3_remove,
500};
501
502module_pci_driver(ali15x3_driver);
503
504MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>");
505MODULE_AUTHOR("Philip Edelbrock <phil@netroedge.com>");
506MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>");
507MODULE_DESCRIPTION("ALI15X3 SMBus driver");
508MODULE_LICENSE("GPL");
v3.15
 
  1/*
  2    Copyright (c) 1999  Frodo Looijaard <frodol@dds.nl> and
  3    Philip Edelbrock <phil@netroedge.com> and
  4    Mark D. Studebaker <mdsxyz123@yahoo.com>
  5
  6    This program is free software; you can redistribute it and/or modify
  7    it under the terms of the GNU General Public License as published by
  8    the Free Software Foundation; either version 2 of the License, or
  9    (at your option) any later version.
 10
 11    This program is distributed in the hope that it will be useful,
 12    but WITHOUT ANY WARRANTY; without even the implied warranty of
 13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14    GNU General Public License for more details.
 15
 16    You should have received a copy of the GNU General Public License
 17    along with this program; if not, write to the Free Software
 18    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 19*/
 20
 21/*
 22    This is the driver for the SMB Host controller on
 23    Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
 24
 25    The M1543C is a South bridge for desktop systems.
 26    The M1533 is a South bridge for portable systems.
 27    They are part of the following ALI chipsets:
 28       "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
 29       with AGP and 100MHz CPU Front Side bus
 30       "Aladdin V": Includes the M1541 Socket 7 North bridge
 31       with AGP and 100MHz CPU Front Side bus
 32       "Aladdin IV": Includes the M1541 Socket 7 North bridge
 33       with host bus up to 83.3 MHz.
 34    For an overview of these chips see http://www.acerlabs.com
 35
 36    The M1533/M1543C devices appear as FOUR separate devices
 37    on the PCI bus. An output of lspci will show something similar
 38    to the following:
 39
 40	00:02.0 USB Controller: Acer Laboratories Inc. M5237
 41	00:03.0 Bridge: Acer Laboratories Inc. M7101
 42	00:07.0 ISA bridge: Acer Laboratories Inc. M1533
 43	00:0f.0 IDE interface: Acer Laboratories Inc. M5229
 44
 45    The SMB controller is part of the 7101 device, which is an
 46    ACPI-compliant Power Management Unit (PMU).
 47
 48    The whole 7101 device has to be enabled for the SMB to work.
 49    You can't just enable the SMB alone.
 50    The SMB and the ACPI have separate I/O spaces.
 51    We make sure that the SMB is enabled. We leave the ACPI alone.
 52
 53    This driver controls the SMB Host only.
 54    The SMB Slave controller on the M15X3 is not enabled.
 55
 56    This driver does not use interrupts.
 57*/
 58
 59/* Note: we assume there can only be one ALI15X3, with one SMBus interface */
 60
 61#include <linux/module.h>
 62#include <linux/pci.h>
 63#include <linux/kernel.h>
 64#include <linux/stddef.h>
 65#include <linux/ioport.h>
 66#include <linux/delay.h>
 67#include <linux/i2c.h>
 68#include <linux/acpi.h>
 69#include <linux/io.h>
 70
 71/* ALI15X3 SMBus address offsets */
 72#define SMBHSTSTS	(0 + ali15x3_smba)
 73#define SMBHSTCNT	(1 + ali15x3_smba)
 74#define SMBHSTSTART	(2 + ali15x3_smba)
 75#define SMBHSTCMD	(7 + ali15x3_smba)
 76#define SMBHSTADD	(3 + ali15x3_smba)
 77#define SMBHSTDAT0	(4 + ali15x3_smba)
 78#define SMBHSTDAT1	(5 + ali15x3_smba)
 79#define SMBBLKDAT	(6 + ali15x3_smba)
 80
 81/* PCI Address Constants */
 82#define SMBCOM		0x004
 83#define SMBBA		0x014
 84#define SMBATPC		0x05B	/* used to unlock xxxBA registers */
 85#define SMBHSTCFG	0x0E0
 86#define SMBSLVC		0x0E1
 87#define SMBCLK		0x0E2
 88#define SMBREV		0x008
 89
 90/* Other settings */
 91#define MAX_TIMEOUT		200	/* times 1/100 sec */
 92#define ALI15X3_SMB_IOSIZE	32
 93
 94/* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
 95   We don't use these here. If the bases aren't set to some value we
 96   tell user to upgrade BIOS and we fail.
 97*/
 98#define ALI15X3_SMB_DEFAULTBASE	0xE800
 99
100/* ALI15X3 address lock bits */
101#define ALI15X3_LOCK		0x06
102
103/* ALI15X3 command constants */
104#define ALI15X3_ABORT		0x02
105#define ALI15X3_T_OUT		0x04
106#define ALI15X3_QUICK		0x00
107#define ALI15X3_BYTE		0x10
108#define ALI15X3_BYTE_DATA	0x20
109#define ALI15X3_WORD_DATA	0x30
110#define ALI15X3_BLOCK_DATA	0x40
111#define ALI15X3_BLOCK_CLR	0x80
112
113/* ALI15X3 status register bits */
114#define ALI15X3_STS_IDLE	0x04
115#define ALI15X3_STS_BUSY	0x08
116#define ALI15X3_STS_DONE	0x10
117#define ALI15X3_STS_DEV		0x20	/* device error */
118#define ALI15X3_STS_COLL	0x40	/* collision or no response */
119#define ALI15X3_STS_TERM	0x80	/* terminated by abort */
120#define ALI15X3_STS_ERR		0xE0	/* all the bad error bits */
121
122
123/* If force_addr is set to anything different from 0, we forcibly enable
124   the device at the given address. */
125static u16 force_addr;
126module_param(force_addr, ushort, 0);
127MODULE_PARM_DESC(force_addr,
128		 "Initialize the base address of the i2c controller");
129
130static struct pci_driver ali15x3_driver;
131static unsigned short ali15x3_smba;
132
133static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
134{
135	u16 a;
136	unsigned char temp;
137
138	/* Check the following things:
139		- SMB I/O address is initialized
140		- Device is enabled
141		- We can use the addresses
142	*/
143
144	/* Unlock the register.
145	   The data sheet says that the address registers are read-only
146	   if the lock bits are 1, but in fact the address registers
147	   are zero unless you clear the lock bits.
148	*/
149	pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
150	if (temp & ALI15X3_LOCK) {
151		temp &= ~ALI15X3_LOCK;
152		pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
153	}
154
155	/* Determine the address of the SMBus area */
156	pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
157	ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
158	if (ali15x3_smba == 0 && force_addr == 0) {
159		dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
160			"- upgrade BIOS or use force_addr=0xaddr\n");
161		return -ENODEV;
162	}
163
164	if(force_addr)
165		ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
166
167	if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
168			      ali15x3_driver.name))
169		return -EBUSY;
170
171	if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
172			    ali15x3_driver.name)) {
173		dev_err(&ALI15X3_dev->dev,
174			"ALI15X3_smb region 0x%x already in use!\n",
175			ali15x3_smba);
176		return -ENODEV;
177	}
178
179	if(force_addr) {
 
 
180		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
181			ali15x3_smba);
182		if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
183								SMBBA,
184								ali15x3_smba))
185			goto error;
186		if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
187								SMBBA, &a))
188			goto error;
189		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
190			/* make sure it works */
191			dev_err(&ALI15X3_dev->dev,
192				"force address failed - not supported?\n");
193			goto error;
194		}
195	}
196	/* check if whole device is enabled */
197	pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
198	if ((temp & 1) == 0) {
199		dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
200		pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
201	}
202
203	/* Is SMB Host controller enabled? */
204	pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
205	if ((temp & 1) == 0) {
206		dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
207		pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
208	}
209
210	/* set SMB clock to 74KHz as recommended in data sheet */
211	pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
212
213	/*
214	  The interrupt routing for SMB is set up in register 0x77 in the
215	  1533 ISA Bridge device, NOT in the 7101 device.
216	  Don't bother with finding the 1533 device and reading the register.
217	if ((....... & 0x0F) == 1)
218		dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
219	*/
220	pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
221	dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
222	dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
223
224	return 0;
225error:
226	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
227	return -ENODEV;
228}
229
230/* Another internally used function */
231static int ali15x3_transaction(struct i2c_adapter *adap)
232{
233	int temp;
234	int result = 0;
235	int timeout = 0;
236
237	dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
238		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
239		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
240		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
241
242	/* get status */
243	temp = inb_p(SMBHSTSTS);
244
245	/* Make sure the SMBus host is ready to start transmitting */
246	/* Check the busy bit first */
247	if (temp & ALI15X3_STS_BUSY) {
248	/*
249	   If the host controller is still busy, it may have timed out in the
250	   previous transaction, resulting in a "SMBus Timeout" Dev.
251	   I've tried the following to reset a stuck busy bit.
252		1. Reset the controller with an ABORT command.
253		   (this doesn't seem to clear the controller if an external
254		   device is hung)
255		2. Reset the controller and the other SMBus devices with a
256		   T_OUT command.  (this clears the host busy bit if an
257		   external device is hung, but it comes back upon a new access
258		   to a device)
259		3. Disable and reenable the controller in SMBHSTCFG
260	   Worst case, nothing seems to work except power reset.
261	*/
262	/* Abort - reset the host controller */
263	/*
264	   Try resetting entire SMB bus, including other devices -
265	   This may not work either - it clears the BUSY bit but
266	   then the BUSY bit may come back on when you try and use the chip again.
267	   If that's the case you are stuck.
268	*/
269		dev_info(&adap->dev, "Resetting entire SMB Bus to "
270			"clear busy condition (%02x)\n", temp);
271		outb_p(ALI15X3_T_OUT, SMBHSTCNT);
272		temp = inb_p(SMBHSTSTS);
273	}
274
275	/* now check the error bits and the busy bit */
276	if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
277		/* do a clear-on-write */
278		outb_p(0xFF, SMBHSTSTS);
279		if ((temp = inb_p(SMBHSTSTS)) &
280		    (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
281			/* this is probably going to be correctable only by a power reset
282			   as one of the bits now appears to be stuck */
283			/* This may be a bus or device with electrical problems. */
284			dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
285				"controller or device on bus is probably hung\n",
286				temp);
287			return -EBUSY;
288		}
289	} else {
290		/* check and clear done bit */
291		if (temp & ALI15X3_STS_DONE) {
292			outb_p(temp, SMBHSTSTS);
293		}
294	}
295
296	/* start the transaction by writing anything to the start register */
297	outb_p(0xFF, SMBHSTSTART);
298
299	/* We will always wait for a fraction of a second! */
300	timeout = 0;
301	do {
302		msleep(1);
303		temp = inb_p(SMBHSTSTS);
304	} while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
305		 && (timeout++ < MAX_TIMEOUT));
306
307	/* If the SMBus is still busy, we give up */
308	if (timeout > MAX_TIMEOUT) {
309		result = -ETIMEDOUT;
310		dev_err(&adap->dev, "SMBus Timeout!\n");
311	}
312
313	if (temp & ALI15X3_STS_TERM) {
314		result = -EIO;
315		dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
316	}
317
318	/*
319	  Unfortunately the ALI SMB controller maps "no response" and "bus
320	  collision" into a single bit. No response is the usual case so don't
321	  do a printk.
322	  This means that bus collisions go unreported.
323	*/
324	if (temp & ALI15X3_STS_COLL) {
325		result = -ENXIO;
326		dev_dbg(&adap->dev,
327			"Error: no response or bus collision ADD=%02x\n",
328			inb_p(SMBHSTADD));
329	}
330
331	/* haven't ever seen this */
332	if (temp & ALI15X3_STS_DEV) {
333		result = -EIO;
334		dev_err(&adap->dev, "Error: device error\n");
335	}
336	dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
337		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
338		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
339		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
340	return result;
341}
342
343/* Return negative errno on error. */
344static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
345		   unsigned short flags, char read_write, u8 command,
346		   int size, union i2c_smbus_data * data)
347{
348	int i, len;
349	int temp;
350	int timeout;
351
352	/* clear all the bits (clear-on-write) */
353	outb_p(0xFF, SMBHSTSTS);
354	/* make sure SMBus is idle */
355	temp = inb_p(SMBHSTSTS);
356	for (timeout = 0;
357	     (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
358	     timeout++) {
359		msleep(1);
360		temp = inb_p(SMBHSTSTS);
361	}
362	if (timeout >= MAX_TIMEOUT) {
363		dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
364	}
365
366	switch (size) {
367	case I2C_SMBUS_QUICK:
368		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
369		       SMBHSTADD);
370		size = ALI15X3_QUICK;
371		break;
372	case I2C_SMBUS_BYTE:
373		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
374		       SMBHSTADD);
375		if (read_write == I2C_SMBUS_WRITE)
376			outb_p(command, SMBHSTCMD);
377		size = ALI15X3_BYTE;
378		break;
379	case I2C_SMBUS_BYTE_DATA:
380		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
381		       SMBHSTADD);
382		outb_p(command, SMBHSTCMD);
383		if (read_write == I2C_SMBUS_WRITE)
384			outb_p(data->byte, SMBHSTDAT0);
385		size = ALI15X3_BYTE_DATA;
386		break;
387	case I2C_SMBUS_WORD_DATA:
388		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
389		       SMBHSTADD);
390		outb_p(command, SMBHSTCMD);
391		if (read_write == I2C_SMBUS_WRITE) {
392			outb_p(data->word & 0xff, SMBHSTDAT0);
393			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
394		}
395		size = ALI15X3_WORD_DATA;
396		break;
397	case I2C_SMBUS_BLOCK_DATA:
398		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
399		       SMBHSTADD);
400		outb_p(command, SMBHSTCMD);
401		if (read_write == I2C_SMBUS_WRITE) {
402			len = data->block[0];
403			if (len < 0) {
404				len = 0;
405				data->block[0] = len;
406			}
407			if (len > 32) {
408				len = 32;
409				data->block[0] = len;
410			}
411			outb_p(len, SMBHSTDAT0);
412			/* Reset SMBBLKDAT */
413			outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
414			for (i = 1; i <= len; i++)
415				outb_p(data->block[i], SMBBLKDAT);
416		}
417		size = ALI15X3_BLOCK_DATA;
418		break;
419	default:
420		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
421		return -EOPNOTSUPP;
422	}
423
424	outb_p(size, SMBHSTCNT);	/* output command */
425
426	temp = ali15x3_transaction(adap);
427	if (temp)
428		return temp;
429
430	if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
431		return 0;
432
433
434	switch (size) {
435	case ALI15X3_BYTE:	/* Result put in SMBHSTDAT0 */
436		data->byte = inb_p(SMBHSTDAT0);
437		break;
438	case ALI15X3_BYTE_DATA:
439		data->byte = inb_p(SMBHSTDAT0);
440		break;
441	case ALI15X3_WORD_DATA:
442		data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
443		break;
444	case ALI15X3_BLOCK_DATA:
445		len = inb_p(SMBHSTDAT0);
446		if (len > 32)
447			len = 32;
448		data->block[0] = len;
449		/* Reset SMBBLKDAT */
450		outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
451		for (i = 1; i <= data->block[0]; i++) {
452			data->block[i] = inb_p(SMBBLKDAT);
453			dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
454				len, i, data->block[i]);
455		}
456		break;
457	}
458	return 0;
459}
460
461static u32 ali15x3_func(struct i2c_adapter *adapter)
462{
463	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
464	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
465	    I2C_FUNC_SMBUS_BLOCK_DATA;
466}
467
468static const struct i2c_algorithm smbus_algorithm = {
469	.smbus_xfer	= ali15x3_access,
470	.functionality	= ali15x3_func,
471};
472
473static struct i2c_adapter ali15x3_adapter = {
474	.owner		= THIS_MODULE,
475	.class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
476	.algo		= &smbus_algorithm,
477};
478
479static const struct pci_device_id ali15x3_ids[] = {
480	{ PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
481	{ 0, }
482};
483
484MODULE_DEVICE_TABLE (pci, ali15x3_ids);
485
486static int ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
487{
488	if (ali15x3_setup(dev)) {
489		dev_err(&dev->dev,
490			"ALI15X3 not detected, module not inserted.\n");
491		return -ENODEV;
492	}
493
494	/* set up the sysfs linkage to our parent device */
495	ali15x3_adapter.dev.parent = &dev->dev;
496
497	snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
498		"SMBus ALI15X3 adapter at %04x", ali15x3_smba);
499	return i2c_add_adapter(&ali15x3_adapter);
500}
501
502static void ali15x3_remove(struct pci_dev *dev)
503{
504	i2c_del_adapter(&ali15x3_adapter);
505	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
506}
507
508static struct pci_driver ali15x3_driver = {
509	.name		= "ali15x3_smbus",
510	.id_table	= ali15x3_ids,
511	.probe		= ali15x3_probe,
512	.remove		= ali15x3_remove,
513};
514
515module_pci_driver(ali15x3_driver);
516
517MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
518		"Philip Edelbrock <phil@netroedge.com>, "
519		"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
520MODULE_DESCRIPTION("ALI15X3 SMBus driver");
521MODULE_LICENSE("GPL");