1/*
  2 * P1022 RDK 32-bit Physical Address Map Device Tree Source
  3 *
  4 * Copyright 2012 Freescale Semiconductor Inc.
  5 *
  6 * Redistribution and use in source and binary forms, with or without
  7 * modification, are permitted provided that the following conditions are met:
  8 *     * Redistributions of source code must retain the above copyright
  9 *       notice, this list of conditions and the following disclaimer.
 10 *     * Redistributions in binary form must reproduce the above copyright
 11 *       notice, this list of conditions and the following disclaimer in the
 12 *       documentation and/or other materials provided with the distribution.
 13 *     * Neither the name of Freescale Semiconductor nor the
 14 *       names of its contributors may be used to endorse or promote products
 15 *       derived from this software without specific prior written permission.
 16 *
 17 *
 18 * ALTERNATIVELY, this software may be distributed under the terms of the
 19 * GNU General Public License ("GPL") as published by the Free Software
 20 * Foundation, either version 2 of that License or (at your option) any
 21 * later version.
 22 *
 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35/include/ "fsl/p1022si-pre.dtsi"
 36/ {
 37	model = "fsl,P1022RDK";
 38	compatible = "fsl,P1022RDK";
 39
 40	memory {
 41		device_type = "memory";
 42	};
 43
 44	board_lbc: lbc: localbus@ffe05000 {
 45		/* The P1022 RDK does not have any localbus devices */
 46		status = "disabled";
 47	};
 48
 49	board_soc: soc: soc@ffe00000 {
 50		ranges = <0x0 0x0 0xffe00000 0x100000>;
 51
 52		i2c@3100 {
 53			wm8960:codec@1a {
 54				compatible = "wlf,wm8960";
 55				reg = <0x1a>;
 56				/* MCLK source is a stand-alone oscillator */
 57				clock-frequency = <12288000>;
 58			};
 59			rtc@68 {
 60				compatible = "stm,m41t62";
 61				reg = <0x68>;
 62			};
 63			adt7461@4c{
 64				compatible = "adi,adt7461";
 65				reg = <0x4c>;
 66			};
 67			zl6100@21{
 68				compatible = "isil,zl6100";
 69				reg = <0x21>;
 70			};
 71			zl6100@24{
 72				compatible = "isil,zl6100";
 73				reg = <0x24>;
 74			};
 75			zl6100@26{
 76				compatible = "isil,zl6100";
 77				reg = <0x26>;
 78			};
 79			zl6100@29{
 80				compatible = "isil,zl6100";
 81				reg = <0x29>;
 82			};
 83		};
 84
 85		spi@7000 {
 86			flash@0 {
 87				#address-cells = <1>;
 88				#size-cells = <1>;
 89				compatible = "spansion,m25p80";
 90				reg = <0>;
 91				spi-max-frequency = <1000000>;
 92				partition@0 {
 93					label = "full-spi-flash";
 94					reg = <0x00000000 0x00100000>;
 95				};
 96			};
 97		};
 98
 99		ssi@15000 {
100			fsl,mode = "i2s-slave";
101			codec-handle = <&wm8960>;
102		};
103
104		usb@22000 {
105			phy_type = "ulpi";
106		};
107
108		usb@23000 {
109			phy_type = "ulpi";
110		};
111
112		mdio@24000 {
113			phy0: ethernet-phy@0 {
114				interrupts = <3 1 0 0>;
115				reg = <0x1>;
116			};
117			phy1: ethernet-phy@1 {
118				interrupts = <9 1 0 0>;
119				reg = <0x2>;
120			};
121		};
122
123		mdio@25000 {
124			tbi0: tbi-phy@11 {
125				reg = <0x11>;
126				device_type = "tbi-phy";
127			};
128		};
129
130		ethernet@b0000 {
131			phy-handle = <&phy0>;
132			phy-connection-type = "rgmii-id";
133		};
134
135		ethernet@b1000 {
136			phy-handle = <&phy1>;
137			tbi-handle = <&tbi0>;
138			phy-connection-type = "sgmii";
139		};
140	};
141
142	pci0: pcie@ffe09000 {
143		ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
144			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
145		reg = <0x0 0xffe09000 0 0x1000>;
146		pcie@0 {
147			ranges = <0x2000000 0x0 0xe0000000
148				  0x2000000 0x0 0xe0000000
149				  0x0 0x20000000
150
151				  0x1000000 0x0 0x0
152				  0x1000000 0x0 0x0
153				  0x0 0x100000>;
154		};
155	};
156
157	pci1: pcie@ffe0a000 {
158		ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
159			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
160		reg = <0 0xffe0a000 0 0x1000>;
161		pcie@0 {
162			ranges = <0x2000000 0x0 0xe0000000
163				  0x2000000 0x0 0xe0000000
164				  0x0 0x20000000
165
166				  0x1000000 0x0 0x0
167				  0x1000000 0x0 0x0
168				  0x0 0x100000>;
169		};
170	};
171
172	pci2: pcie@ffe0b000 {
173		ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
174			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
175		reg = <0 0xffe0b000 0 0x1000>;
176		pcie@0 {
177			ranges = <0x2000000 0x0 0xe0000000
178				  0x2000000 0x0 0xe0000000
179				  0x0 0x20000000
180
181				  0x1000000 0x0 0x0
182				  0x1000000 0x0 0x0
183				  0x0 0x100000>;
184		};
185	};
186};
187
188/include/ "fsl/p1022si-post.dtsi"