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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * omap-secure.h: OMAP Secure infrastructure header.
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
8 * Copyright (C) 2013 Pali Rohár <pali@kernel.org>
9 */
10#ifndef OMAP_ARCH_OMAP_SECURE_H
11#define OMAP_ARCH_OMAP_SECURE_H
12
13#include <linux/types.h>
14
15/* Monitor error code */
16#define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
17#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
18
19/* HAL API error codes */
20#define API_HAL_RET_VALUE_OK 0x00
21#define API_HAL_RET_VALUE_FAIL 0x01
22
23/* Secure HAL API flags */
24#define FLAG_START_CRITICAL 0x4
25#define FLAG_IRQFIQ_MASK 0x3
26#define FLAG_IRQ_ENABLE 0x2
27#define FLAG_FIQ_ENABLE 0x1
28#define NO_FLAG 0x0
29
30/* Maximum Secure memory storage size */
31#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
32
33#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F
34
35/* Secure low power HAL API index */
36#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
37#define OMAP4_HAL_SAVEHW_INDEX 0x1b
38#define OMAP4_HAL_SAVEALL_INDEX 0x1c
39#define OMAP4_HAL_SAVEGIC_INDEX 0x1d
40
41/* Secure Monitor mode APIs */
42#define OMAP4_MON_SCU_PWR_INDEX 0x108
43#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
44#define OMAP4_MON_L2X0_CTRL_INDEX 0x102
45#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
46#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
47
48#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
49#define OMAP5_MON_AMBA_IF_INDEX 0x108
50#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
51
52/* Secure PPA(Primary Protected Application) APIs */
53#define OMAP4_PPA_SERVICE_0 0x21
54#define OMAP4_PPA_L2_POR_INDEX 0x23
55#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
56
57#define AM43xx_PPA_SVC_PM_SUSPEND 0x71
58#define AM43xx_PPA_SVC_PM_RESUME 0x72
59
60/* Secure RX-51 PPA (Primary Protected Application) APIs */
61#define RX51_PPA_HWRNG 29
62#define RX51_PPA_L2_INVAL 40
63#define RX51_PPA_WRITE_ACR 42
64
65#ifndef __ASSEMBLER__
66
67extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
68 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
69extern void omap_smccc_smc(u32 fn, u32 arg);
70extern void omap_smc1(u32 fn, u32 arg);
71extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
72extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
73extern int omap_secure_ram_reserve_memblock(void);
74extern u32 save_secure_ram_context(u32 args_pa);
75extern u32 omap3_save_secure_ram(void *save_regs, int size);
76
77extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
78extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
79
80extern bool optee_available;
81void omap_secure_init(void);
82
83#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
84void set_cntfreq(void);
85#else
86static inline void set_cntfreq(void)
87{
88}
89#endif
90
91#endif /* __ASSEMBLER__ */
92#endif /* OMAP_ARCH_OMAP_SECURE_H */
1/*
2 * omap-secure.h: OMAP Secure infrastructure header.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
7 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifndef OMAP_ARCH_OMAP_SECURE_H
14#define OMAP_ARCH_OMAP_SECURE_H
15
16/* Monitor error code */
17#define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
18#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
19
20/* HAL API error codes */
21#define API_HAL_RET_VALUE_OK 0x00
22#define API_HAL_RET_VALUE_FAIL 0x01
23
24/* Secure HAL API flags */
25#define FLAG_START_CRITICAL 0x4
26#define FLAG_IRQFIQ_MASK 0x3
27#define FLAG_IRQ_ENABLE 0x2
28#define FLAG_FIQ_ENABLE 0x1
29#define NO_FLAG 0x0
30
31/* Maximum Secure memory storage size */
32#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
33
34/* Secure low power HAL API index */
35#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
36#define OMAP4_HAL_SAVEHW_INDEX 0x1b
37#define OMAP4_HAL_SAVEALL_INDEX 0x1c
38#define OMAP4_HAL_SAVEGIC_INDEX 0x1d
39
40/* Secure Monitor mode APIs */
41#define OMAP4_MON_SCU_PWR_INDEX 0x108
42#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
43#define OMAP4_MON_L2X0_CTRL_INDEX 0x102
44#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
45#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
46
47#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
48
49/* Secure PPA(Primary Protected Application) APIs */
50#define OMAP4_PPA_L2_POR_INDEX 0x23
51#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
52
53/* Secure RX-51 PPA (Primary Protected Application) APIs */
54#define RX51_PPA_HWRNG 29
55#define RX51_PPA_L2_INVAL 40
56#define RX51_PPA_WRITE_ACR 42
57
58#ifndef __ASSEMBLER__
59
60extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
61 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
62extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
63extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
64extern phys_addr_t omap_secure_ram_mempool_base(void);
65extern int omap_secure_ram_reserve_memblock(void);
66
67extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
68 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
69extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
70extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
71
72#ifdef CONFIG_OMAP4_ERRATA_I688
73extern int omap_barrier_reserve_memblock(void);
74#else
75static inline void omap_barrier_reserve_memblock(void)
76{ }
77#endif
78
79#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
80void set_cntfreq(void);
81#else
82static inline void set_cntfreq(void)
83{
84}
85#endif
86
87#endif /* __ASSEMBLER__ */
88#endif /* OMAP_ARCH_OMAP_SECURE_H */