Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/common/sa1111.c
4 *
5 * SA1111 support
6 *
7 * Original code by John Dorsey
8 *
9 * This file contains all generic SA1111 support.
10 *
11 * All initialization functions provided here are intended to be called
12 * from machine specific code with proper arguments when required.
13 */
14#include <linux/module.h>
15#include <linux/gpio/driver.h>
16#include <linux/init.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/delay.h>
20#include <linux/errno.h>
21#include <linux/ioport.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/spinlock.h>
25#include <linux/dma-map-ops.h>
26#include <linux/clk.h>
27#include <linux/io.h>
28
29#include <asm/mach/irq.h>
30#include <asm/mach-types.h>
31#include <linux/sizes.h>
32
33#include <asm/hardware/sa1111.h>
34
35#ifdef CONFIG_ARCH_SA1100
36#include <mach/hardware.h>
37#endif
38
39/* SA1111 IRQs */
40#define IRQ_GPAIN0 (0)
41#define IRQ_GPAIN1 (1)
42#define IRQ_GPAIN2 (2)
43#define IRQ_GPAIN3 (3)
44#define IRQ_GPBIN0 (4)
45#define IRQ_GPBIN1 (5)
46#define IRQ_GPBIN2 (6)
47#define IRQ_GPBIN3 (7)
48#define IRQ_GPBIN4 (8)
49#define IRQ_GPBIN5 (9)
50#define IRQ_GPCIN0 (10)
51#define IRQ_GPCIN1 (11)
52#define IRQ_GPCIN2 (12)
53#define IRQ_GPCIN3 (13)
54#define IRQ_GPCIN4 (14)
55#define IRQ_GPCIN5 (15)
56#define IRQ_GPCIN6 (16)
57#define IRQ_GPCIN7 (17)
58#define IRQ_MSTXINT (18)
59#define IRQ_MSRXINT (19)
60#define IRQ_MSSTOPERRINT (20)
61#define IRQ_TPTXINT (21)
62#define IRQ_TPRXINT (22)
63#define IRQ_TPSTOPERRINT (23)
64#define SSPXMTINT (24)
65#define SSPRCVINT (25)
66#define SSPROR (26)
67#define AUDXMTDMADONEA (32)
68#define AUDRCVDMADONEA (33)
69#define AUDXMTDMADONEB (34)
70#define AUDRCVDMADONEB (35)
71#define AUDTFSR (36)
72#define AUDRFSR (37)
73#define AUDTUR (38)
74#define AUDROR (39)
75#define AUDDTS (40)
76#define AUDRDD (41)
77#define AUDSTO (42)
78#define IRQ_USBPWR (43)
79#define IRQ_HCIM (44)
80#define IRQ_HCIBUFFACC (45)
81#define IRQ_HCIRMTWKP (46)
82#define IRQ_NHCIMFCIR (47)
83#define IRQ_USB_PORT_RESUME (48)
84#define IRQ_S0_READY_NINT (49)
85#define IRQ_S1_READY_NINT (50)
86#define IRQ_S0_CD_VALID (51)
87#define IRQ_S1_CD_VALID (52)
88#define IRQ_S0_BVD1_STSCHG (53)
89#define IRQ_S1_BVD1_STSCHG (54)
90#define SA1111_IRQ_NR (55)
91
92extern void sa1110_mb_enable(void);
93extern void sa1110_mb_disable(void);
94
95/*
96 * We keep the following data for the overall SA1111. Note that the
97 * struct device and struct resource are "fake"; they should be supplied
98 * by the bus above us. However, in the interests of getting all SA1111
99 * drivers converted over to the device model, we provide this as an
100 * anchor point for all the other drivers.
101 */
102struct sa1111 {
103 struct device *dev;
104 struct clk *clk;
105 unsigned long phys;
106 int irq;
107 int irq_base; /* base for cascaded on-chip IRQs */
108 spinlock_t lock;
109 void __iomem *base;
110 struct sa1111_platform_data *pdata;
111 struct irq_domain *irqdomain;
112 struct gpio_chip gc;
113#ifdef CONFIG_PM
114 void *saved_state;
115#endif
116};
117
118/*
119 * We _really_ need to eliminate this. Its only users
120 * are the PWM and DMA checking code.
121 */
122static struct sa1111 *g_sa1111;
123
124struct sa1111_dev_info {
125 unsigned long offset;
126 unsigned long skpcr_mask;
127 bool dma;
128 unsigned int devid;
129 unsigned int hwirq[6];
130};
131
132static struct sa1111_dev_info sa1111_devices[] = {
133 {
134 .offset = SA1111_USB,
135 .skpcr_mask = SKPCR_UCLKEN,
136 .dma = true,
137 .devid = SA1111_DEVID_USB,
138 .hwirq = {
139 IRQ_USBPWR,
140 IRQ_HCIM,
141 IRQ_HCIBUFFACC,
142 IRQ_HCIRMTWKP,
143 IRQ_NHCIMFCIR,
144 IRQ_USB_PORT_RESUME
145 },
146 },
147 {
148 .offset = 0x0600,
149 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
150 .dma = true,
151 .devid = SA1111_DEVID_SAC,
152 .hwirq = {
153 AUDXMTDMADONEA,
154 AUDXMTDMADONEB,
155 AUDRCVDMADONEA,
156 AUDRCVDMADONEB
157 },
158 },
159 {
160 .offset = 0x0800,
161 .skpcr_mask = SKPCR_SCLKEN,
162 .devid = SA1111_DEVID_SSP,
163 },
164 {
165 .offset = SA1111_KBD,
166 .skpcr_mask = SKPCR_PTCLKEN,
167 .devid = SA1111_DEVID_PS2_KBD,
168 .hwirq = {
169 IRQ_TPRXINT,
170 IRQ_TPTXINT
171 },
172 },
173 {
174 .offset = SA1111_MSE,
175 .skpcr_mask = SKPCR_PMCLKEN,
176 .devid = SA1111_DEVID_PS2_MSE,
177 .hwirq = {
178 IRQ_MSRXINT,
179 IRQ_MSTXINT
180 },
181 },
182 {
183 .offset = 0x1800,
184 .skpcr_mask = 0,
185 .devid = SA1111_DEVID_PCMCIA,
186 .hwirq = {
187 IRQ_S0_READY_NINT,
188 IRQ_S0_CD_VALID,
189 IRQ_S0_BVD1_STSCHG,
190 IRQ_S1_READY_NINT,
191 IRQ_S1_CD_VALID,
192 IRQ_S1_BVD1_STSCHG,
193 },
194 },
195};
196
197static int sa1111_map_irq(struct sa1111 *sachip, irq_hw_number_t hwirq)
198{
199 return irq_create_mapping(sachip->irqdomain, hwirq);
200}
201
202/*
203 * SA1111 interrupt support. Since clearing an IRQ while there are
204 * active IRQs causes the interrupt output to pulse, the upper levels
205 * will call us again if there are more interrupts to process.
206 */
207static void sa1111_irq_handler(struct irq_desc *desc)
208{
209 unsigned int stat0, stat1, i;
210 struct sa1111 *sachip = irq_desc_get_handler_data(desc);
211 struct irq_domain *irqdomain;
212 void __iomem *mapbase = sachip->base + SA1111_INTC;
213
214 stat0 = readl_relaxed(mapbase + SA1111_INTSTATCLR0);
215 stat1 = readl_relaxed(mapbase + SA1111_INTSTATCLR1);
216
217 writel_relaxed(stat0, mapbase + SA1111_INTSTATCLR0);
218
219 desc->irq_data.chip->irq_ack(&desc->irq_data);
220
221 writel_relaxed(stat1, mapbase + SA1111_INTSTATCLR1);
222
223 if (stat0 == 0 && stat1 == 0) {
224 do_bad_IRQ(desc);
225 return;
226 }
227
228 irqdomain = sachip->irqdomain;
229
230 for (i = 0; stat0; i++, stat0 >>= 1)
231 if (stat0 & 1)
232 generic_handle_domain_irq(irqdomain, i);
233
234 for (i = 32; stat1; i++, stat1 >>= 1)
235 if (stat1 & 1)
236 generic_handle_domain_irq(irqdomain, i);
237
238 /* For level-based interrupts */
239 desc->irq_data.chip->irq_unmask(&desc->irq_data);
240}
241
242static u32 sa1111_irqmask(struct irq_data *d)
243{
244 return BIT(irqd_to_hwirq(d) & 31);
245}
246
247static int sa1111_irqbank(struct irq_data *d)
248{
249 return (irqd_to_hwirq(d) / 32) * 4;
250}
251
252static void sa1111_ack_irq(struct irq_data *d)
253{
254}
255
256static void sa1111_mask_irq(struct irq_data *d)
257{
258 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
259 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
260 u32 ie;
261
262 ie = readl_relaxed(mapbase + SA1111_INTEN0);
263 ie &= ~sa1111_irqmask(d);
264 writel(ie, mapbase + SA1111_INTEN0);
265}
266
267static void sa1111_unmask_irq(struct irq_data *d)
268{
269 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
270 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
271 u32 ie;
272
273 ie = readl_relaxed(mapbase + SA1111_INTEN0);
274 ie |= sa1111_irqmask(d);
275 writel_relaxed(ie, mapbase + SA1111_INTEN0);
276}
277
278/*
279 * Attempt to re-trigger the interrupt. The SA1111 contains a register
280 * (INTSET) which claims to do this. However, in practice no amount of
281 * manipulation of INTEN and INTSET guarantees that the interrupt will
282 * be triggered. In fact, its very difficult, if not impossible to get
283 * INTSET to re-trigger the interrupt.
284 */
285static int sa1111_retrigger_irq(struct irq_data *d)
286{
287 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
288 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
289 u32 ip, mask = sa1111_irqmask(d);
290 int i;
291
292 ip = readl_relaxed(mapbase + SA1111_INTPOL0);
293 for (i = 0; i < 8; i++) {
294 writel_relaxed(ip ^ mask, mapbase + SA1111_INTPOL0);
295 writel_relaxed(ip, mapbase + SA1111_INTPOL0);
296 if (readl_relaxed(mapbase + SA1111_INTSTATCLR0) & mask)
297 break;
298 }
299
300 if (i == 8) {
301 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n",
302 d->irq);
303 return 0;
304 }
305
306 return 1;
307}
308
309static int sa1111_type_irq(struct irq_data *d, unsigned int flags)
310{
311 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
312 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
313 u32 ip, mask = sa1111_irqmask(d);
314
315 if (flags == IRQ_TYPE_PROBE)
316 return 0;
317
318 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
319 return -EINVAL;
320
321 ip = readl_relaxed(mapbase + SA1111_INTPOL0);
322 if (flags & IRQ_TYPE_EDGE_RISING)
323 ip &= ~mask;
324 else
325 ip |= mask;
326 writel_relaxed(ip, mapbase + SA1111_INTPOL0);
327 writel_relaxed(ip, mapbase + SA1111_WAKEPOL0);
328
329 return 0;
330}
331
332static int sa1111_wake_irq(struct irq_data *d, unsigned int on)
333{
334 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
335 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
336 u32 we, mask = sa1111_irqmask(d);
337
338 we = readl_relaxed(mapbase + SA1111_WAKEEN0);
339 if (on)
340 we |= mask;
341 else
342 we &= ~mask;
343 writel_relaxed(we, mapbase + SA1111_WAKEEN0);
344
345 return 0;
346}
347
348static struct irq_chip sa1111_irq_chip = {
349 .name = "SA1111",
350 .irq_ack = sa1111_ack_irq,
351 .irq_mask = sa1111_mask_irq,
352 .irq_unmask = sa1111_unmask_irq,
353 .irq_retrigger = sa1111_retrigger_irq,
354 .irq_set_type = sa1111_type_irq,
355 .irq_set_wake = sa1111_wake_irq,
356};
357
358static int sa1111_irqdomain_map(struct irq_domain *d, unsigned int irq,
359 irq_hw_number_t hwirq)
360{
361 struct sa1111 *sachip = d->host_data;
362
363 /* Disallow unavailable interrupts */
364 if (hwirq > SSPROR && hwirq < AUDXMTDMADONEA)
365 return -EINVAL;
366
367 irq_set_chip_data(irq, sachip);
368 irq_set_chip_and_handler(irq, &sa1111_irq_chip, handle_edge_irq);
369 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
370
371 return 0;
372}
373
374static const struct irq_domain_ops sa1111_irqdomain_ops = {
375 .map = sa1111_irqdomain_map,
376 .xlate = irq_domain_xlate_twocell,
377};
378
379static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
380{
381 void __iomem *irqbase = sachip->base + SA1111_INTC;
382 int ret;
383
384 /*
385 * We're guaranteed that this region hasn't been taken.
386 */
387 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
388
389 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
390 if (ret <= 0) {
391 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
392 SA1111_IRQ_NR, ret);
393 if (ret == 0)
394 ret = -EINVAL;
395 return ret;
396 }
397
398 sachip->irq_base = ret;
399
400 /* disable all IRQs */
401 writel_relaxed(0, irqbase + SA1111_INTEN0);
402 writel_relaxed(0, irqbase + SA1111_INTEN1);
403 writel_relaxed(0, irqbase + SA1111_WAKEEN0);
404 writel_relaxed(0, irqbase + SA1111_WAKEEN1);
405
406 /*
407 * detect on rising edge. Note: Feb 2001 Errata for SA1111
408 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
409 */
410 writel_relaxed(0, irqbase + SA1111_INTPOL0);
411 writel_relaxed(BIT(IRQ_S0_READY_NINT & 31) |
412 BIT(IRQ_S1_READY_NINT & 31),
413 irqbase + SA1111_INTPOL1);
414
415 /* clear all IRQs */
416 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);
417 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);
418
419 sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,
420 &sa1111_irqdomain_ops,
421 sachip);
422 if (!sachip->irqdomain) {
423 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
424 return -ENOMEM;
425 }
426
427 irq_domain_associate_many(sachip->irqdomain,
428 sachip->irq_base + IRQ_GPAIN0,
429 IRQ_GPAIN0, SSPROR + 1 - IRQ_GPAIN0);
430 irq_domain_associate_many(sachip->irqdomain,
431 sachip->irq_base + AUDXMTDMADONEA,
432 AUDXMTDMADONEA,
433 IRQ_S1_BVD1_STSCHG + 1 - AUDXMTDMADONEA);
434
435 /*
436 * Register SA1111 interrupt
437 */
438 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
439 irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler,
440 sachip);
441
442 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
443 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
444
445 return 0;
446}
447
448static void sa1111_remove_irq(struct sa1111 *sachip)
449{
450 struct irq_domain *domain = sachip->irqdomain;
451 void __iomem *irqbase = sachip->base + SA1111_INTC;
452 int i;
453
454 /* disable all IRQs */
455 writel_relaxed(0, irqbase + SA1111_INTEN0);
456 writel_relaxed(0, irqbase + SA1111_INTEN1);
457 writel_relaxed(0, irqbase + SA1111_WAKEEN0);
458 writel_relaxed(0, irqbase + SA1111_WAKEEN1);
459
460 irq_set_chained_handler_and_data(sachip->irq, NULL, NULL);
461 for (i = 0; i < SA1111_IRQ_NR; i++)
462 irq_dispose_mapping(irq_find_mapping(domain, i));
463 irq_domain_remove(domain);
464
465 release_mem_region(sachip->phys + SA1111_INTC, 512);
466}
467
468enum {
469 SA1111_GPIO_PXDDR = (SA1111_GPIO_PADDR - SA1111_GPIO_PADDR),
470 SA1111_GPIO_PXDRR = (SA1111_GPIO_PADRR - SA1111_GPIO_PADDR),
471 SA1111_GPIO_PXDWR = (SA1111_GPIO_PADWR - SA1111_GPIO_PADDR),
472 SA1111_GPIO_PXSDR = (SA1111_GPIO_PASDR - SA1111_GPIO_PADDR),
473 SA1111_GPIO_PXSSR = (SA1111_GPIO_PASSR - SA1111_GPIO_PADDR),
474};
475
476static struct sa1111 *gc_to_sa1111(struct gpio_chip *gc)
477{
478 return container_of(gc, struct sa1111, gc);
479}
480
481static void __iomem *sa1111_gpio_map_reg(struct sa1111 *sachip, unsigned offset)
482{
483 void __iomem *reg = sachip->base + SA1111_GPIO;
484
485 if (offset < 4)
486 return reg + SA1111_GPIO_PADDR;
487 if (offset < 10)
488 return reg + SA1111_GPIO_PBDDR;
489 if (offset < 18)
490 return reg + SA1111_GPIO_PCDDR;
491 return NULL;
492}
493
494static u32 sa1111_gpio_map_bit(unsigned offset)
495{
496 if (offset < 4)
497 return BIT(offset);
498 if (offset < 10)
499 return BIT(offset - 4);
500 if (offset < 18)
501 return BIT(offset - 10);
502 return 0;
503}
504
505static void sa1111_gpio_modify(void __iomem *reg, u32 mask, u32 set)
506{
507 u32 val;
508
509 val = readl_relaxed(reg);
510 val &= ~mask;
511 val |= mask & set;
512 writel_relaxed(val, reg);
513}
514
515static int sa1111_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
516{
517 struct sa1111 *sachip = gc_to_sa1111(gc);
518 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
519 u32 mask = sa1111_gpio_map_bit(offset);
520
521 return !!(readl_relaxed(reg + SA1111_GPIO_PXDDR) & mask);
522}
523
524static int sa1111_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
525{
526 struct sa1111 *sachip = gc_to_sa1111(gc);
527 unsigned long flags;
528 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
529 u32 mask = sa1111_gpio_map_bit(offset);
530
531 spin_lock_irqsave(&sachip->lock, flags);
532 sa1111_gpio_modify(reg + SA1111_GPIO_PXDDR, mask, mask);
533 sa1111_gpio_modify(reg + SA1111_GPIO_PXSDR, mask, mask);
534 spin_unlock_irqrestore(&sachip->lock, flags);
535
536 return 0;
537}
538
539static int sa1111_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
540 int value)
541{
542 struct sa1111 *sachip = gc_to_sa1111(gc);
543 unsigned long flags;
544 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
545 u32 mask = sa1111_gpio_map_bit(offset);
546
547 spin_lock_irqsave(&sachip->lock, flags);
548 sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);
549 sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);
550 sa1111_gpio_modify(reg + SA1111_GPIO_PXDDR, mask, 0);
551 sa1111_gpio_modify(reg + SA1111_GPIO_PXSDR, mask, 0);
552 spin_unlock_irqrestore(&sachip->lock, flags);
553
554 return 0;
555}
556
557static int sa1111_gpio_get(struct gpio_chip *gc, unsigned offset)
558{
559 struct sa1111 *sachip = gc_to_sa1111(gc);
560 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
561 u32 mask = sa1111_gpio_map_bit(offset);
562
563 return !!(readl_relaxed(reg + SA1111_GPIO_PXDRR) & mask);
564}
565
566static void sa1111_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
567{
568 struct sa1111 *sachip = gc_to_sa1111(gc);
569 unsigned long flags;
570 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
571 u32 mask = sa1111_gpio_map_bit(offset);
572
573 spin_lock_irqsave(&sachip->lock, flags);
574 sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);
575 sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);
576 spin_unlock_irqrestore(&sachip->lock, flags);
577}
578
579static void sa1111_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
580 unsigned long *bits)
581{
582 struct sa1111 *sachip = gc_to_sa1111(gc);
583 unsigned long flags;
584 void __iomem *reg = sachip->base + SA1111_GPIO;
585 u32 msk, val;
586
587 msk = *mask;
588 val = *bits;
589
590 spin_lock_irqsave(&sachip->lock, flags);
591 sa1111_gpio_modify(reg + SA1111_GPIO_PADWR, msk & 15, val);
592 sa1111_gpio_modify(reg + SA1111_GPIO_PASSR, msk & 15, val);
593 sa1111_gpio_modify(reg + SA1111_GPIO_PBDWR, (msk >> 4) & 255, val >> 4);
594 sa1111_gpio_modify(reg + SA1111_GPIO_PBSSR, (msk >> 4) & 255, val >> 4);
595 sa1111_gpio_modify(reg + SA1111_GPIO_PCDWR, (msk >> 12) & 255, val >> 12);
596 sa1111_gpio_modify(reg + SA1111_GPIO_PCSSR, (msk >> 12) & 255, val >> 12);
597 spin_unlock_irqrestore(&sachip->lock, flags);
598}
599
600static int sa1111_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
601{
602 struct sa1111 *sachip = gc_to_sa1111(gc);
603
604 return sa1111_map_irq(sachip, offset);
605}
606
607static int sa1111_setup_gpios(struct sa1111 *sachip)
608{
609 sachip->gc.label = "sa1111";
610 sachip->gc.parent = sachip->dev;
611 sachip->gc.owner = THIS_MODULE;
612 sachip->gc.get_direction = sa1111_gpio_get_direction;
613 sachip->gc.direction_input = sa1111_gpio_direction_input;
614 sachip->gc.direction_output = sa1111_gpio_direction_output;
615 sachip->gc.get = sa1111_gpio_get;
616 sachip->gc.set = sa1111_gpio_set;
617 sachip->gc.set_multiple = sa1111_gpio_set_multiple;
618 sachip->gc.to_irq = sa1111_gpio_to_irq;
619 sachip->gc.base = -1;
620 sachip->gc.ngpio = 18;
621
622 return devm_gpiochip_add_data(sachip->dev, &sachip->gc, sachip);
623}
624
625/*
626 * Bring the SA1111 out of reset. This requires a set procedure:
627 * 1. nRESET asserted (by hardware)
628 * 2. CLK turned on from SA1110
629 * 3. nRESET deasserted
630 * 4. VCO turned on, PLL_BYPASS turned off
631 * 5. Wait lock time, then assert RCLKEn
632 * 7. PCR set to allow clocking of individual functions
633 *
634 * Until we've done this, the only registers we can access are:
635 * SBI_SKCR
636 * SBI_SMCR
637 * SBI_SKID
638 */
639static void sa1111_wake(struct sa1111 *sachip)
640{
641 unsigned long flags, r;
642
643 spin_lock_irqsave(&sachip->lock, flags);
644
645 clk_enable(sachip->clk);
646
647 /*
648 * Turn VCO on, and disable PLL Bypass.
649 */
650 r = readl_relaxed(sachip->base + SA1111_SKCR);
651 r &= ~SKCR_VCO_OFF;
652 writel_relaxed(r, sachip->base + SA1111_SKCR);
653 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
654 writel_relaxed(r, sachip->base + SA1111_SKCR);
655
656 /*
657 * Wait lock time. SA1111 manual _doesn't_
658 * specify a figure for this! We choose 100us.
659 */
660 udelay(100);
661
662 /*
663 * Enable RCLK. We also ensure that RDYEN is set.
664 */
665 r |= SKCR_RCLKEN | SKCR_RDYEN;
666 writel_relaxed(r, sachip->base + SA1111_SKCR);
667
668 /*
669 * Wait 14 RCLK cycles for the chip to finish coming out
670 * of reset. (RCLK=24MHz). This is 590ns.
671 */
672 udelay(1);
673
674 /*
675 * Ensure all clocks are initially off.
676 */
677 writel_relaxed(0, sachip->base + SA1111_SKPCR);
678
679 spin_unlock_irqrestore(&sachip->lock, flags);
680}
681
682#ifdef CONFIG_ARCH_SA1100
683
684static u32 sa1111_dma_mask[] = {
685 ~0,
686 ~(1 << 20),
687 ~(1 << 23),
688 ~(1 << 24),
689 ~(1 << 25),
690 ~(1 << 20),
691 ~(1 << 20),
692 0,
693};
694
695/*
696 * Configure the SA1111 shared memory controller.
697 */
698static void
699sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
700 unsigned int cas_latency)
701{
702 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
703
704 if (cas_latency == 3)
705 smcr |= SMCR_CLAT;
706
707 writel_relaxed(smcr, sachip->base + SA1111_SMCR);
708
709 /*
710 * Now clear the bits in the DMA mask to work around the SA1111
711 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
712 * Chip Specification Update, June 2000, Erratum #7).
713 */
714 if (sachip->dev->dma_mask)
715 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
716
717 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
718}
719#endif
720
721static void sa1111_dev_release(struct device *_dev)
722{
723 struct sa1111_dev *dev = to_sa1111_device(_dev);
724
725 kfree(dev);
726}
727
728static int
729sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
730 struct sa1111_dev_info *info)
731{
732 struct sa1111_dev *dev;
733 unsigned i;
734 int ret;
735
736 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
737 if (!dev) {
738 ret = -ENOMEM;
739 goto err_alloc;
740 }
741
742 device_initialize(&dev->dev);
743 dev_set_name(&dev->dev, "%4.4lx", info->offset);
744 dev->devid = info->devid;
745 dev->dev.parent = sachip->dev;
746 dev->dev.bus = &sa1111_bus_type;
747 dev->dev.release = sa1111_dev_release;
748 dev->res.start = sachip->phys + info->offset;
749 dev->res.end = dev->res.start + 511;
750 dev->res.name = dev_name(&dev->dev);
751 dev->res.flags = IORESOURCE_MEM;
752 dev->mapbase = sachip->base + info->offset;
753 dev->skpcr_mask = info->skpcr_mask;
754
755 for (i = 0; i < ARRAY_SIZE(info->hwirq); i++)
756 dev->hwirq[i] = info->hwirq[i];
757
758 /*
759 * If the parent device has a DMA mask associated with it, and
760 * this child supports DMA, propagate it down to the children.
761 */
762 if (info->dma && sachip->dev->dma_mask) {
763 dev->dma_mask = *sachip->dev->dma_mask;
764 dev->dev.dma_mask = &dev->dma_mask;
765 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
766 }
767
768 ret = request_resource(parent, &dev->res);
769 if (ret) {
770 dev_err(sachip->dev, "failed to allocate resource for %s\n",
771 dev->res.name);
772 goto err_resource;
773 }
774
775 ret = device_add(&dev->dev);
776 if (ret)
777 goto err_add;
778 return 0;
779
780 err_add:
781 release_resource(&dev->res);
782 err_resource:
783 put_device(&dev->dev);
784 err_alloc:
785 return ret;
786}
787
788static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
789{
790 struct sa1111_platform_data *pd = me->platform_data;
791 struct sa1111 *sachip;
792 unsigned long id;
793 unsigned int has_devs;
794 int i, ret = -ENODEV;
795
796 if (!pd)
797 return -EINVAL;
798
799 sachip = devm_kzalloc(me, sizeof(struct sa1111), GFP_KERNEL);
800 if (!sachip)
801 return -ENOMEM;
802
803 sachip->clk = devm_clk_get(me, "SA1111_CLK");
804 if (IS_ERR(sachip->clk))
805 return PTR_ERR(sachip->clk);
806
807 ret = clk_prepare(sachip->clk);
808 if (ret)
809 return ret;
810
811 spin_lock_init(&sachip->lock);
812
813 sachip->dev = me;
814 dev_set_drvdata(sachip->dev, sachip);
815
816 sachip->pdata = pd;
817 sachip->phys = mem->start;
818 sachip->irq = irq;
819
820 /*
821 * Map the whole region. This also maps the
822 * registers for our children.
823 */
824 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
825 if (!sachip->base) {
826 ret = -ENOMEM;
827 goto err_clk_unprep;
828 }
829
830 /*
831 * Probe for the chip. Only touch the SBI registers.
832 */
833 id = readl_relaxed(sachip->base + SA1111_SKID);
834 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
835 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
836 ret = -ENODEV;
837 goto err_unmap;
838 }
839
840 pr_info("SA1111 Microprocessor Companion Chip: silicon revision %lx, metal revision %lx\n",
841 (id & SKID_SIREV_MASK) >> 4, id & SKID_MTREV_MASK);
842
843 /*
844 * We found it. Wake the chip up, and initialise.
845 */
846 sa1111_wake(sachip);
847
848 /*
849 * The interrupt controller must be initialised before any
850 * other device to ensure that the interrupts are available.
851 */
852 ret = sa1111_setup_irq(sachip, pd->irq_base);
853 if (ret)
854 goto err_clk;
855
856 /* Setup the GPIOs - should really be done after the IRQ setup */
857 ret = sa1111_setup_gpios(sachip);
858 if (ret)
859 goto err_irq;
860
861#ifdef CONFIG_ARCH_SA1100
862 {
863 unsigned int val;
864
865 /*
866 * The SDRAM configuration of the SA1110 and the SA1111 must
867 * match. This is very important to ensure that SA1111 accesses
868 * don't corrupt the SDRAM. Note that this ungates the SA1111's
869 * MBGNT signal, so we must have called sa1110_mb_disable()
870 * beforehand.
871 */
872 sa1111_configure_smc(sachip, 1,
873 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
874 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
875
876 /*
877 * We only need to turn on DCLK whenever we want to use the
878 * DMA. It can otherwise be held firmly in the off position.
879 * (currently, we always enable it.)
880 */
881 val = readl_relaxed(sachip->base + SA1111_SKPCR);
882 writel_relaxed(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
883
884 /*
885 * Enable the SA1110 memory bus request and grant signals.
886 */
887 sa1110_mb_enable();
888 }
889#endif
890
891 g_sa1111 = sachip;
892
893 has_devs = ~0;
894 if (pd)
895 has_devs &= ~pd->disable_devs;
896
897 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
898 if (sa1111_devices[i].devid & has_devs)
899 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
900
901 return 0;
902
903 err_irq:
904 sa1111_remove_irq(sachip);
905 err_clk:
906 clk_disable(sachip->clk);
907 err_unmap:
908 iounmap(sachip->base);
909 err_clk_unprep:
910 clk_unprepare(sachip->clk);
911 return ret;
912}
913
914static int sa1111_remove_one(struct device *dev, void *data)
915{
916 struct sa1111_dev *sadev = to_sa1111_device(dev);
917 if (dev->bus != &sa1111_bus_type)
918 return 0;
919 device_del(&sadev->dev);
920 release_resource(&sadev->res);
921 put_device(&sadev->dev);
922 return 0;
923}
924
925static void __sa1111_remove(struct sa1111 *sachip)
926{
927 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
928
929 sa1111_remove_irq(sachip);
930
931 clk_disable(sachip->clk);
932 clk_unprepare(sachip->clk);
933
934 iounmap(sachip->base);
935}
936
937struct sa1111_save_data {
938 unsigned int skcr;
939 unsigned int skpcr;
940 unsigned int skcdr;
941 unsigned char skaud;
942 unsigned char skpwm0;
943 unsigned char skpwm1;
944
945 /*
946 * Interrupt controller
947 */
948 unsigned int intpol0;
949 unsigned int intpol1;
950 unsigned int inten0;
951 unsigned int inten1;
952 unsigned int wakepol0;
953 unsigned int wakepol1;
954 unsigned int wakeen0;
955 unsigned int wakeen1;
956};
957
958#ifdef CONFIG_PM
959
960static int sa1111_suspend_noirq(struct device *dev)
961{
962 struct sa1111 *sachip = dev_get_drvdata(dev);
963 struct sa1111_save_data *save;
964 unsigned long flags;
965 unsigned int val;
966 void __iomem *base;
967
968 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
969 if (!save)
970 return -ENOMEM;
971 sachip->saved_state = save;
972
973 spin_lock_irqsave(&sachip->lock, flags);
974
975 /*
976 * Save state.
977 */
978 base = sachip->base;
979 save->skcr = readl_relaxed(base + SA1111_SKCR);
980 save->skpcr = readl_relaxed(base + SA1111_SKPCR);
981 save->skcdr = readl_relaxed(base + SA1111_SKCDR);
982 save->skaud = readl_relaxed(base + SA1111_SKAUD);
983 save->skpwm0 = readl_relaxed(base + SA1111_SKPWM0);
984 save->skpwm1 = readl_relaxed(base + SA1111_SKPWM1);
985
986 writel_relaxed(0, sachip->base + SA1111_SKPWM0);
987 writel_relaxed(0, sachip->base + SA1111_SKPWM1);
988
989 base = sachip->base + SA1111_INTC;
990 save->intpol0 = readl_relaxed(base + SA1111_INTPOL0);
991 save->intpol1 = readl_relaxed(base + SA1111_INTPOL1);
992 save->inten0 = readl_relaxed(base + SA1111_INTEN0);
993 save->inten1 = readl_relaxed(base + SA1111_INTEN1);
994 save->wakepol0 = readl_relaxed(base + SA1111_WAKEPOL0);
995 save->wakepol1 = readl_relaxed(base + SA1111_WAKEPOL1);
996 save->wakeen0 = readl_relaxed(base + SA1111_WAKEEN0);
997 save->wakeen1 = readl_relaxed(base + SA1111_WAKEEN1);
998
999 /*
1000 * Disable.
1001 */
1002 val = readl_relaxed(sachip->base + SA1111_SKCR);
1003 writel_relaxed(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
1004
1005 clk_disable(sachip->clk);
1006
1007 spin_unlock_irqrestore(&sachip->lock, flags);
1008
1009#ifdef CONFIG_ARCH_SA1100
1010 sa1110_mb_disable();
1011#endif
1012
1013 return 0;
1014}
1015
1016/*
1017 * sa1111_resume - Restore the SA1111 device state.
1018 * @dev: device to restore
1019 *
1020 * Restore the general state of the SA1111; clock control and
1021 * interrupt controller. Other parts of the SA1111 must be
1022 * restored by their respective drivers, and must be called
1023 * via LDM after this function.
1024 */
1025static int sa1111_resume_noirq(struct device *dev)
1026{
1027 struct sa1111 *sachip = dev_get_drvdata(dev);
1028 struct sa1111_save_data *save;
1029 unsigned long flags, id;
1030 void __iomem *base;
1031
1032 save = sachip->saved_state;
1033 if (!save)
1034 return 0;
1035
1036 /*
1037 * Ensure that the SA1111 is still here.
1038 * FIXME: shouldn't do this here.
1039 */
1040 id = readl_relaxed(sachip->base + SA1111_SKID);
1041 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
1042 __sa1111_remove(sachip);
1043 dev_set_drvdata(dev, NULL);
1044 kfree(save);
1045 return 0;
1046 }
1047
1048 /*
1049 * First of all, wake up the chip.
1050 */
1051 sa1111_wake(sachip);
1052
1053#ifdef CONFIG_ARCH_SA1100
1054 /* Enable the memory bus request/grant signals */
1055 sa1110_mb_enable();
1056#endif
1057
1058 /*
1059 * Only lock for write ops. Also, sa1111_wake must be called with
1060 * released spinlock!
1061 */
1062 spin_lock_irqsave(&sachip->lock, flags);
1063
1064 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
1065 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
1066
1067 base = sachip->base;
1068 writel_relaxed(save->skcr, base + SA1111_SKCR);
1069 writel_relaxed(save->skpcr, base + SA1111_SKPCR);
1070 writel_relaxed(save->skcdr, base + SA1111_SKCDR);
1071 writel_relaxed(save->skaud, base + SA1111_SKAUD);
1072 writel_relaxed(save->skpwm0, base + SA1111_SKPWM0);
1073 writel_relaxed(save->skpwm1, base + SA1111_SKPWM1);
1074
1075 base = sachip->base + SA1111_INTC;
1076 writel_relaxed(save->intpol0, base + SA1111_INTPOL0);
1077 writel_relaxed(save->intpol1, base + SA1111_INTPOL1);
1078 writel_relaxed(save->inten0, base + SA1111_INTEN0);
1079 writel_relaxed(save->inten1, base + SA1111_INTEN1);
1080 writel_relaxed(save->wakepol0, base + SA1111_WAKEPOL0);
1081 writel_relaxed(save->wakepol1, base + SA1111_WAKEPOL1);
1082 writel_relaxed(save->wakeen0, base + SA1111_WAKEEN0);
1083 writel_relaxed(save->wakeen1, base + SA1111_WAKEEN1);
1084
1085 spin_unlock_irqrestore(&sachip->lock, flags);
1086
1087 sachip->saved_state = NULL;
1088 kfree(save);
1089
1090 return 0;
1091}
1092
1093#else
1094#define sa1111_suspend_noirq NULL
1095#define sa1111_resume_noirq NULL
1096#endif
1097
1098/**
1099 * sa1111_probe - probe for a single SA1111 chip.
1100 * @pdev: platform device.
1101 *
1102 * Probe for a SA1111 chip. This must be called
1103 * before any other SA1111-specific code.
1104 *
1105 * Returns:
1106 * * %-ENODEV - device not found.
1107 * * %-ENOMEM - memory allocation failure.
1108 * * %-EBUSY - physical address already marked in-use.
1109 * * %-EINVAL - no platform data passed
1110 * * %0 - successful.
1111 */
1112static int sa1111_probe(struct platform_device *pdev)
1113{
1114 struct resource *mem;
1115 int irq;
1116
1117 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1118 if (!mem)
1119 return -EINVAL;
1120 irq = platform_get_irq(pdev, 0);
1121 if (irq < 0)
1122 return irq;
1123
1124 return __sa1111_probe(&pdev->dev, mem, irq);
1125}
1126
1127static void sa1111_remove(struct platform_device *pdev)
1128{
1129 struct sa1111 *sachip = platform_get_drvdata(pdev);
1130
1131 if (sachip) {
1132#ifdef CONFIG_PM
1133 kfree(sachip->saved_state);
1134 sachip->saved_state = NULL;
1135#endif
1136 __sa1111_remove(sachip);
1137 platform_set_drvdata(pdev, NULL);
1138 }
1139}
1140
1141static struct dev_pm_ops sa1111_pm_ops = {
1142 .suspend_noirq = sa1111_suspend_noirq,
1143 .resume_noirq = sa1111_resume_noirq,
1144};
1145
1146/*
1147 * Not sure if this should be on the system bus or not yet.
1148 * We really want some way to register a system device at
1149 * the per-machine level, and then have this driver pick
1150 * up the registered devices.
1151 *
1152 * We also need to handle the SDRAM configuration for
1153 * PXA250/SA1110 machine classes.
1154 */
1155static struct platform_driver sa1111_device_driver = {
1156 .probe = sa1111_probe,
1157 .remove = sa1111_remove,
1158 .driver = {
1159 .name = "sa1111",
1160 .pm = &sa1111_pm_ops,
1161 },
1162};
1163
1164/*
1165 * Get the parent device driver (us) structure
1166 * from a child function device
1167 */
1168static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1169{
1170 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1171}
1172
1173/*
1174 * The bits in the opdiv field are non-linear.
1175 */
1176static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1177
1178static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1179{
1180 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1181
1182 skcdr = readl_relaxed(sachip->base + SA1111_SKCDR);
1183
1184 fbdiv = (skcdr & 0x007f) + 2;
1185 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1186 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1187
1188 return 3686400 * fbdiv / (ipdiv * opdiv);
1189}
1190
1191/**
1192 * sa1111_pll_clock - return the current PLL clock frequency.
1193 * @sadev: SA1111 function block
1194 *
1195 * BUG: we should look at SKCR. We also blindly believe that
1196 * the chip is being fed with the 3.6864MHz clock.
1197 *
1198 * Returns the PLL clock in Hz.
1199 */
1200unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1201{
1202 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1203
1204 return __sa1111_pll_clock(sachip);
1205}
1206EXPORT_SYMBOL(sa1111_pll_clock);
1207
1208/**
1209 * sa1111_select_audio_mode - select I2S or AC link mode
1210 * @sadev: SA1111 function block
1211 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1212 *
1213 * Frob the SKCR to select AC Link mode or I2S mode for
1214 * the audio block.
1215 */
1216void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1217{
1218 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1219 unsigned long flags;
1220 unsigned int val;
1221
1222 spin_lock_irqsave(&sachip->lock, flags);
1223
1224 val = readl_relaxed(sachip->base + SA1111_SKCR);
1225 if (mode == SA1111_AUDIO_I2S) {
1226 val &= ~SKCR_SELAC;
1227 } else {
1228 val |= SKCR_SELAC;
1229 }
1230 writel_relaxed(val, sachip->base + SA1111_SKCR);
1231
1232 spin_unlock_irqrestore(&sachip->lock, flags);
1233}
1234EXPORT_SYMBOL(sa1111_select_audio_mode);
1235
1236/**
1237 * sa1111_set_audio_rate - set the audio sample rate
1238 * @sadev: SA1111 SAC function block
1239 * @rate: sample rate to select
1240 */
1241int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1242{
1243 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1244 unsigned int div;
1245
1246 if (sadev->devid != SA1111_DEVID_SAC)
1247 return -EINVAL;
1248
1249 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1250 if (div == 0)
1251 div = 1;
1252 if (div > 128)
1253 div = 128;
1254
1255 writel_relaxed(div - 1, sachip->base + SA1111_SKAUD);
1256
1257 return 0;
1258}
1259EXPORT_SYMBOL(sa1111_set_audio_rate);
1260
1261/**
1262 * sa1111_get_audio_rate - get the audio sample rate
1263 * @sadev: SA1111 SAC function block device
1264 */
1265int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1266{
1267 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1268 unsigned long div;
1269
1270 if (sadev->devid != SA1111_DEVID_SAC)
1271 return -EINVAL;
1272
1273 div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1;
1274
1275 return __sa1111_pll_clock(sachip) / (256 * div);
1276}
1277EXPORT_SYMBOL(sa1111_get_audio_rate);
1278
1279/*
1280 * Individual device operations.
1281 */
1282
1283/**
1284 * sa1111_enable_device - enable an on-chip SA1111 function block
1285 * @sadev: SA1111 function block device to enable
1286 */
1287int sa1111_enable_device(struct sa1111_dev *sadev)
1288{
1289 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1290 unsigned long flags;
1291 unsigned int val;
1292 int ret = 0;
1293
1294 if (sachip->pdata && sachip->pdata->enable)
1295 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1296
1297 if (ret == 0) {
1298 spin_lock_irqsave(&sachip->lock, flags);
1299 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1300 writel_relaxed(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1301 spin_unlock_irqrestore(&sachip->lock, flags);
1302 }
1303 return ret;
1304}
1305EXPORT_SYMBOL(sa1111_enable_device);
1306
1307/**
1308 * sa1111_disable_device - disable an on-chip SA1111 function block
1309 * @sadev: SA1111 function block device to disable
1310 */
1311void sa1111_disable_device(struct sa1111_dev *sadev)
1312{
1313 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1314 unsigned long flags;
1315 unsigned int val;
1316
1317 spin_lock_irqsave(&sachip->lock, flags);
1318 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1319 writel_relaxed(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1320 spin_unlock_irqrestore(&sachip->lock, flags);
1321
1322 if (sachip->pdata && sachip->pdata->disable)
1323 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1324}
1325EXPORT_SYMBOL(sa1111_disable_device);
1326
1327int sa1111_get_irq(struct sa1111_dev *sadev, unsigned num)
1328{
1329 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1330 if (num >= ARRAY_SIZE(sadev->hwirq))
1331 return -EINVAL;
1332 return sa1111_map_irq(sachip, sadev->hwirq[num]);
1333}
1334EXPORT_SYMBOL_GPL(sa1111_get_irq);
1335
1336/*
1337 * SA1111 "Register Access Bus."
1338 *
1339 * We model this as a regular bus type, and hang devices directly
1340 * off this.
1341 */
1342static int sa1111_match(struct device *_dev, const struct device_driver *_drv)
1343{
1344 struct sa1111_dev *dev = to_sa1111_device(_dev);
1345 const struct sa1111_driver *drv = SA1111_DRV(_drv);
1346
1347 return !!(dev->devid & drv->devid);
1348}
1349
1350static int sa1111_bus_probe(struct device *dev)
1351{
1352 struct sa1111_dev *sadev = to_sa1111_device(dev);
1353 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1354 int ret = -ENODEV;
1355
1356 if (drv->probe)
1357 ret = drv->probe(sadev);
1358 return ret;
1359}
1360
1361static void sa1111_bus_remove(struct device *dev)
1362{
1363 struct sa1111_dev *sadev = to_sa1111_device(dev);
1364 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1365
1366 if (drv->remove)
1367 drv->remove(sadev);
1368}
1369
1370struct bus_type sa1111_bus_type = {
1371 .name = "sa1111-rab",
1372 .match = sa1111_match,
1373 .probe = sa1111_bus_probe,
1374 .remove = sa1111_bus_remove,
1375};
1376EXPORT_SYMBOL(sa1111_bus_type);
1377
1378int sa1111_driver_register(struct sa1111_driver *driver)
1379{
1380 driver->drv.bus = &sa1111_bus_type;
1381 return driver_register(&driver->drv);
1382}
1383EXPORT_SYMBOL(sa1111_driver_register);
1384
1385void sa1111_driver_unregister(struct sa1111_driver *driver)
1386{
1387 driver_unregister(&driver->drv);
1388}
1389EXPORT_SYMBOL(sa1111_driver_unregister);
1390
1391static int __init sa1111_init(void)
1392{
1393 int ret = bus_register(&sa1111_bus_type);
1394 if (ret == 0)
1395 platform_driver_register(&sa1111_device_driver);
1396 return ret;
1397}
1398
1399static void __exit sa1111_exit(void)
1400{
1401 platform_driver_unregister(&sa1111_device_driver);
1402 bus_unregister(&sa1111_bus_type);
1403}
1404
1405subsys_initcall(sa1111_init);
1406module_exit(sa1111_exit);
1407
1408MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1409MODULE_LICENSE("GPL");
1/*
2 * linux/arch/arm/common/sa1111.c
3 *
4 * SA1111 support
5 *
6 * Original code by John Dorsey
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This file contains all generic SA1111 support.
13 *
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
16 */
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/irq.h>
20#include <linux/kernel.h>
21#include <linux/delay.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/platform_device.h>
25#include <linux/slab.h>
26#include <linux/spinlock.h>
27#include <linux/dma-mapping.h>
28#include <linux/clk.h>
29#include <linux/io.h>
30
31#include <mach/hardware.h>
32#include <asm/mach/irq.h>
33#include <asm/mach-types.h>
34#include <asm/sizes.h>
35
36#include <asm/hardware/sa1111.h>
37
38/* SA1111 IRQs */
39#define IRQ_GPAIN0 (0)
40#define IRQ_GPAIN1 (1)
41#define IRQ_GPAIN2 (2)
42#define IRQ_GPAIN3 (3)
43#define IRQ_GPBIN0 (4)
44#define IRQ_GPBIN1 (5)
45#define IRQ_GPBIN2 (6)
46#define IRQ_GPBIN3 (7)
47#define IRQ_GPBIN4 (8)
48#define IRQ_GPBIN5 (9)
49#define IRQ_GPCIN0 (10)
50#define IRQ_GPCIN1 (11)
51#define IRQ_GPCIN2 (12)
52#define IRQ_GPCIN3 (13)
53#define IRQ_GPCIN4 (14)
54#define IRQ_GPCIN5 (15)
55#define IRQ_GPCIN6 (16)
56#define IRQ_GPCIN7 (17)
57#define IRQ_MSTXINT (18)
58#define IRQ_MSRXINT (19)
59#define IRQ_MSSTOPERRINT (20)
60#define IRQ_TPTXINT (21)
61#define IRQ_TPRXINT (22)
62#define IRQ_TPSTOPERRINT (23)
63#define SSPXMTINT (24)
64#define SSPRCVINT (25)
65#define SSPROR (26)
66#define AUDXMTDMADONEA (32)
67#define AUDRCVDMADONEA (33)
68#define AUDXMTDMADONEB (34)
69#define AUDRCVDMADONEB (35)
70#define AUDTFSR (36)
71#define AUDRFSR (37)
72#define AUDTUR (38)
73#define AUDROR (39)
74#define AUDDTS (40)
75#define AUDRDD (41)
76#define AUDSTO (42)
77#define IRQ_USBPWR (43)
78#define IRQ_HCIM (44)
79#define IRQ_HCIBUFFACC (45)
80#define IRQ_HCIRMTWKP (46)
81#define IRQ_NHCIMFCIR (47)
82#define IRQ_USB_PORT_RESUME (48)
83#define IRQ_S0_READY_NINT (49)
84#define IRQ_S1_READY_NINT (50)
85#define IRQ_S0_CD_VALID (51)
86#define IRQ_S1_CD_VALID (52)
87#define IRQ_S0_BVD1_STSCHG (53)
88#define IRQ_S1_BVD1_STSCHG (54)
89#define SA1111_IRQ_NR (55)
90
91extern void sa1110_mb_enable(void);
92extern void sa1110_mb_disable(void);
93
94/*
95 * We keep the following data for the overall SA1111. Note that the
96 * struct device and struct resource are "fake"; they should be supplied
97 * by the bus above us. However, in the interests of getting all SA1111
98 * drivers converted over to the device model, we provide this as an
99 * anchor point for all the other drivers.
100 */
101struct sa1111 {
102 struct device *dev;
103 struct clk *clk;
104 unsigned long phys;
105 int irq;
106 int irq_base; /* base for cascaded on-chip IRQs */
107 spinlock_t lock;
108 void __iomem *base;
109 struct sa1111_platform_data *pdata;
110#ifdef CONFIG_PM
111 void *saved_state;
112#endif
113};
114
115/*
116 * We _really_ need to eliminate this. Its only users
117 * are the PWM and DMA checking code.
118 */
119static struct sa1111 *g_sa1111;
120
121struct sa1111_dev_info {
122 unsigned long offset;
123 unsigned long skpcr_mask;
124 bool dma;
125 unsigned int devid;
126 unsigned int irq[6];
127};
128
129static struct sa1111_dev_info sa1111_devices[] = {
130 {
131 .offset = SA1111_USB,
132 .skpcr_mask = SKPCR_UCLKEN,
133 .dma = true,
134 .devid = SA1111_DEVID_USB,
135 .irq = {
136 IRQ_USBPWR,
137 IRQ_HCIM,
138 IRQ_HCIBUFFACC,
139 IRQ_HCIRMTWKP,
140 IRQ_NHCIMFCIR,
141 IRQ_USB_PORT_RESUME
142 },
143 },
144 {
145 .offset = 0x0600,
146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
147 .dma = true,
148 .devid = SA1111_DEVID_SAC,
149 .irq = {
150 AUDXMTDMADONEA,
151 AUDXMTDMADONEB,
152 AUDRCVDMADONEA,
153 AUDRCVDMADONEB
154 },
155 },
156 {
157 .offset = 0x0800,
158 .skpcr_mask = SKPCR_SCLKEN,
159 .devid = SA1111_DEVID_SSP,
160 },
161 {
162 .offset = SA1111_KBD,
163 .skpcr_mask = SKPCR_PTCLKEN,
164 .devid = SA1111_DEVID_PS2_KBD,
165 .irq = {
166 IRQ_TPRXINT,
167 IRQ_TPTXINT
168 },
169 },
170 {
171 .offset = SA1111_MSE,
172 .skpcr_mask = SKPCR_PMCLKEN,
173 .devid = SA1111_DEVID_PS2_MSE,
174 .irq = {
175 IRQ_MSRXINT,
176 IRQ_MSTXINT
177 },
178 },
179 {
180 .offset = 0x1800,
181 .skpcr_mask = 0,
182 .devid = SA1111_DEVID_PCMCIA,
183 .irq = {
184 IRQ_S0_READY_NINT,
185 IRQ_S0_CD_VALID,
186 IRQ_S0_BVD1_STSCHG,
187 IRQ_S1_READY_NINT,
188 IRQ_S1_CD_VALID,
189 IRQ_S1_BVD1_STSCHG,
190 },
191 },
192};
193
194/*
195 * SA1111 interrupt support. Since clearing an IRQ while there are
196 * active IRQs causes the interrupt output to pulse, the upper levels
197 * will call us again if there are more interrupts to process.
198 */
199static void
200sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
201{
202 unsigned int stat0, stat1, i;
203 struct sa1111 *sachip = irq_get_handler_data(irq);
204 void __iomem *mapbase = sachip->base + SA1111_INTC;
205
206 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
207 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
208
209 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
210
211 desc->irq_data.chip->irq_ack(&desc->irq_data);
212
213 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
214
215 if (stat0 == 0 && stat1 == 0) {
216 do_bad_IRQ(irq, desc);
217 return;
218 }
219
220 for (i = 0; stat0; i++, stat0 >>= 1)
221 if (stat0 & 1)
222 generic_handle_irq(i + sachip->irq_base);
223
224 for (i = 32; stat1; i++, stat1 >>= 1)
225 if (stat1 & 1)
226 generic_handle_irq(i + sachip->irq_base);
227
228 /* For level-based interrupts */
229 desc->irq_data.chip->irq_unmask(&desc->irq_data);
230}
231
232#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
233#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
234
235static void sa1111_ack_irq(struct irq_data *d)
236{
237}
238
239static void sa1111_mask_lowirq(struct irq_data *d)
240{
241 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
242 void __iomem *mapbase = sachip->base + SA1111_INTC;
243 unsigned long ie0;
244
245 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
246 ie0 &= ~SA1111_IRQMASK_LO(d->irq);
247 writel(ie0, mapbase + SA1111_INTEN0);
248}
249
250static void sa1111_unmask_lowirq(struct irq_data *d)
251{
252 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
253 void __iomem *mapbase = sachip->base + SA1111_INTC;
254 unsigned long ie0;
255
256 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
257 ie0 |= SA1111_IRQMASK_LO(d->irq);
258 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
259}
260
261/*
262 * Attempt to re-trigger the interrupt. The SA1111 contains a register
263 * (INTSET) which claims to do this. However, in practice no amount of
264 * manipulation of INTEN and INTSET guarantees that the interrupt will
265 * be triggered. In fact, its very difficult, if not impossible to get
266 * INTSET to re-trigger the interrupt.
267 */
268static int sa1111_retrigger_lowirq(struct irq_data *d)
269{
270 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
271 void __iomem *mapbase = sachip->base + SA1111_INTC;
272 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
273 unsigned long ip0;
274 int i;
275
276 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
277 for (i = 0; i < 8; i++) {
278 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
279 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
280 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)
281 break;
282 }
283
284 if (i == 8)
285 printk(KERN_ERR "Danger Will Robinson: failed to "
286 "re-trigger IRQ%d\n", d->irq);
287 return i == 8 ? -1 : 0;
288}
289
290static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
291{
292 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
293 void __iomem *mapbase = sachip->base + SA1111_INTC;
294 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
295 unsigned long ip0;
296
297 if (flags == IRQ_TYPE_PROBE)
298 return 0;
299
300 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
301 return -EINVAL;
302
303 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
304 if (flags & IRQ_TYPE_EDGE_RISING)
305 ip0 &= ~mask;
306 else
307 ip0 |= mask;
308 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
309 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
310
311 return 0;
312}
313
314static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
315{
316 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
317 void __iomem *mapbase = sachip->base + SA1111_INTC;
318 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
319 unsigned long we0;
320
321 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
322 if (on)
323 we0 |= mask;
324 else
325 we0 &= ~mask;
326 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
327
328 return 0;
329}
330
331static struct irq_chip sa1111_low_chip = {
332 .name = "SA1111-l",
333 .irq_ack = sa1111_ack_irq,
334 .irq_mask = sa1111_mask_lowirq,
335 .irq_unmask = sa1111_unmask_lowirq,
336 .irq_retrigger = sa1111_retrigger_lowirq,
337 .irq_set_type = sa1111_type_lowirq,
338 .irq_set_wake = sa1111_wake_lowirq,
339};
340
341static void sa1111_mask_highirq(struct irq_data *d)
342{
343 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
344 void __iomem *mapbase = sachip->base + SA1111_INTC;
345 unsigned long ie1;
346
347 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
348 ie1 &= ~SA1111_IRQMASK_HI(d->irq);
349 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
350}
351
352static void sa1111_unmask_highirq(struct irq_data *d)
353{
354 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
355 void __iomem *mapbase = sachip->base + SA1111_INTC;
356 unsigned long ie1;
357
358 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
359 ie1 |= SA1111_IRQMASK_HI(d->irq);
360 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
361}
362
363/*
364 * Attempt to re-trigger the interrupt. The SA1111 contains a register
365 * (INTSET) which claims to do this. However, in practice no amount of
366 * manipulation of INTEN and INTSET guarantees that the interrupt will
367 * be triggered. In fact, its very difficult, if not impossible to get
368 * INTSET to re-trigger the interrupt.
369 */
370static int sa1111_retrigger_highirq(struct irq_data *d)
371{
372 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
373 void __iomem *mapbase = sachip->base + SA1111_INTC;
374 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
375 unsigned long ip1;
376 int i;
377
378 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
379 for (i = 0; i < 8; i++) {
380 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
381 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
382 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
383 break;
384 }
385
386 if (i == 8)
387 printk(KERN_ERR "Danger Will Robinson: failed to "
388 "re-trigger IRQ%d\n", d->irq);
389 return i == 8 ? -1 : 0;
390}
391
392static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
393{
394 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
395 void __iomem *mapbase = sachip->base + SA1111_INTC;
396 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
397 unsigned long ip1;
398
399 if (flags == IRQ_TYPE_PROBE)
400 return 0;
401
402 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
403 return -EINVAL;
404
405 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
406 if (flags & IRQ_TYPE_EDGE_RISING)
407 ip1 &= ~mask;
408 else
409 ip1 |= mask;
410 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
411 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
412
413 return 0;
414}
415
416static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
417{
418 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
419 void __iomem *mapbase = sachip->base + SA1111_INTC;
420 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
421 unsigned long we1;
422
423 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
424 if (on)
425 we1 |= mask;
426 else
427 we1 &= ~mask;
428 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
429
430 return 0;
431}
432
433static struct irq_chip sa1111_high_chip = {
434 .name = "SA1111-h",
435 .irq_ack = sa1111_ack_irq,
436 .irq_mask = sa1111_mask_highirq,
437 .irq_unmask = sa1111_unmask_highirq,
438 .irq_retrigger = sa1111_retrigger_highirq,
439 .irq_set_type = sa1111_type_highirq,
440 .irq_set_wake = sa1111_wake_highirq,
441};
442
443static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
444{
445 void __iomem *irqbase = sachip->base + SA1111_INTC;
446 unsigned i, irq;
447 int ret;
448
449 /*
450 * We're guaranteed that this region hasn't been taken.
451 */
452 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
453
454 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
455 if (ret <= 0) {
456 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
457 SA1111_IRQ_NR, ret);
458 if (ret == 0)
459 ret = -EINVAL;
460 return ret;
461 }
462
463 sachip->irq_base = ret;
464
465 /* disable all IRQs */
466 sa1111_writel(0, irqbase + SA1111_INTEN0);
467 sa1111_writel(0, irqbase + SA1111_INTEN1);
468 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
469 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
470
471 /*
472 * detect on rising edge. Note: Feb 2001 Errata for SA1111
473 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
474 */
475 sa1111_writel(0, irqbase + SA1111_INTPOL0);
476 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
477 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
478 irqbase + SA1111_INTPOL1);
479
480 /* clear all IRQs */
481 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
482 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
483
484 for (i = IRQ_GPAIN0; i <= SSPROR; i++) {
485 irq = sachip->irq_base + i;
486 irq_set_chip_and_handler(irq, &sa1111_low_chip,
487 handle_edge_irq);
488 irq_set_chip_data(irq, sachip);
489 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
490 }
491
492 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) {
493 irq = sachip->irq_base + i;
494 irq_set_chip_and_handler(irq, &sa1111_high_chip,
495 handle_edge_irq);
496 irq_set_chip_data(irq, sachip);
497 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
498 }
499
500 /*
501 * Register SA1111 interrupt
502 */
503 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
504 irq_set_handler_data(sachip->irq, sachip);
505 irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
506
507 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
508 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
509
510 return 0;
511}
512
513/*
514 * Bring the SA1111 out of reset. This requires a set procedure:
515 * 1. nRESET asserted (by hardware)
516 * 2. CLK turned on from SA1110
517 * 3. nRESET deasserted
518 * 4. VCO turned on, PLL_BYPASS turned off
519 * 5. Wait lock time, then assert RCLKEn
520 * 7. PCR set to allow clocking of individual functions
521 *
522 * Until we've done this, the only registers we can access are:
523 * SBI_SKCR
524 * SBI_SMCR
525 * SBI_SKID
526 */
527static void sa1111_wake(struct sa1111 *sachip)
528{
529 unsigned long flags, r;
530
531 spin_lock_irqsave(&sachip->lock, flags);
532
533 clk_enable(sachip->clk);
534
535 /*
536 * Turn VCO on, and disable PLL Bypass.
537 */
538 r = sa1111_readl(sachip->base + SA1111_SKCR);
539 r &= ~SKCR_VCO_OFF;
540 sa1111_writel(r, sachip->base + SA1111_SKCR);
541 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
542 sa1111_writel(r, sachip->base + SA1111_SKCR);
543
544 /*
545 * Wait lock time. SA1111 manual _doesn't_
546 * specify a figure for this! We choose 100us.
547 */
548 udelay(100);
549
550 /*
551 * Enable RCLK. We also ensure that RDYEN is set.
552 */
553 r |= SKCR_RCLKEN | SKCR_RDYEN;
554 sa1111_writel(r, sachip->base + SA1111_SKCR);
555
556 /*
557 * Wait 14 RCLK cycles for the chip to finish coming out
558 * of reset. (RCLK=24MHz). This is 590ns.
559 */
560 udelay(1);
561
562 /*
563 * Ensure all clocks are initially off.
564 */
565 sa1111_writel(0, sachip->base + SA1111_SKPCR);
566
567 spin_unlock_irqrestore(&sachip->lock, flags);
568}
569
570#ifdef CONFIG_ARCH_SA1100
571
572static u32 sa1111_dma_mask[] = {
573 ~0,
574 ~(1 << 20),
575 ~(1 << 23),
576 ~(1 << 24),
577 ~(1 << 25),
578 ~(1 << 20),
579 ~(1 << 20),
580 0,
581};
582
583/*
584 * Configure the SA1111 shared memory controller.
585 */
586void
587sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
588 unsigned int cas_latency)
589{
590 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
591
592 if (cas_latency == 3)
593 smcr |= SMCR_CLAT;
594
595 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
596
597 /*
598 * Now clear the bits in the DMA mask to work around the SA1111
599 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
600 * Chip Specification Update, June 2000, Erratum #7).
601 */
602 if (sachip->dev->dma_mask)
603 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
604
605 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
606}
607#endif
608
609static void sa1111_dev_release(struct device *_dev)
610{
611 struct sa1111_dev *dev = SA1111_DEV(_dev);
612
613 kfree(dev);
614}
615
616static int
617sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
618 struct sa1111_dev_info *info)
619{
620 struct sa1111_dev *dev;
621 unsigned i;
622 int ret;
623
624 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
625 if (!dev) {
626 ret = -ENOMEM;
627 goto err_alloc;
628 }
629
630 device_initialize(&dev->dev);
631 dev_set_name(&dev->dev, "%4.4lx", info->offset);
632 dev->devid = info->devid;
633 dev->dev.parent = sachip->dev;
634 dev->dev.bus = &sa1111_bus_type;
635 dev->dev.release = sa1111_dev_release;
636 dev->res.start = sachip->phys + info->offset;
637 dev->res.end = dev->res.start + 511;
638 dev->res.name = dev_name(&dev->dev);
639 dev->res.flags = IORESOURCE_MEM;
640 dev->mapbase = sachip->base + info->offset;
641 dev->skpcr_mask = info->skpcr_mask;
642
643 for (i = 0; i < ARRAY_SIZE(info->irq); i++)
644 dev->irq[i] = sachip->irq_base + info->irq[i];
645
646 /*
647 * If the parent device has a DMA mask associated with it, and
648 * this child supports DMA, propagate it down to the children.
649 */
650 if (info->dma && sachip->dev->dma_mask) {
651 dev->dma_mask = *sachip->dev->dma_mask;
652 dev->dev.dma_mask = &dev->dma_mask;
653 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
654 }
655
656 ret = request_resource(parent, &dev->res);
657 if (ret) {
658 dev_err(sachip->dev, "failed to allocate resource for %s\n",
659 dev->res.name);
660 goto err_resource;
661 }
662
663 ret = device_add(&dev->dev);
664 if (ret)
665 goto err_add;
666 return 0;
667
668 err_add:
669 release_resource(&dev->res);
670 err_resource:
671 put_device(&dev->dev);
672 err_alloc:
673 return ret;
674}
675
676/**
677 * sa1111_probe - probe for a single SA1111 chip.
678 * @phys_addr: physical address of device.
679 *
680 * Probe for a SA1111 chip. This must be called
681 * before any other SA1111-specific code.
682 *
683 * Returns:
684 * %-ENODEV device not found.
685 * %-EBUSY physical address already marked in-use.
686 * %-EINVAL no platform data passed
687 * %0 successful.
688 */
689static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
690{
691 struct sa1111_platform_data *pd = me->platform_data;
692 struct sa1111 *sachip;
693 unsigned long id;
694 unsigned int has_devs;
695 int i, ret = -ENODEV;
696
697 if (!pd)
698 return -EINVAL;
699
700 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
701 if (!sachip)
702 return -ENOMEM;
703
704 sachip->clk = clk_get(me, "SA1111_CLK");
705 if (IS_ERR(sachip->clk)) {
706 ret = PTR_ERR(sachip->clk);
707 goto err_free;
708 }
709
710 ret = clk_prepare(sachip->clk);
711 if (ret)
712 goto err_clkput;
713
714 spin_lock_init(&sachip->lock);
715
716 sachip->dev = me;
717 dev_set_drvdata(sachip->dev, sachip);
718
719 sachip->pdata = pd;
720 sachip->phys = mem->start;
721 sachip->irq = irq;
722
723 /*
724 * Map the whole region. This also maps the
725 * registers for our children.
726 */
727 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
728 if (!sachip->base) {
729 ret = -ENOMEM;
730 goto err_clk_unprep;
731 }
732
733 /*
734 * Probe for the chip. Only touch the SBI registers.
735 */
736 id = sa1111_readl(sachip->base + SA1111_SKID);
737 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
738 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
739 ret = -ENODEV;
740 goto err_unmap;
741 }
742
743 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
744 "silicon revision %lx, metal revision %lx\n",
745 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
746
747 /*
748 * We found it. Wake the chip up, and initialise.
749 */
750 sa1111_wake(sachip);
751
752 /*
753 * The interrupt controller must be initialised before any
754 * other device to ensure that the interrupts are available.
755 */
756 if (sachip->irq != NO_IRQ) {
757 ret = sa1111_setup_irq(sachip, pd->irq_base);
758 if (ret)
759 goto err_unmap;
760 }
761
762#ifdef CONFIG_ARCH_SA1100
763 {
764 unsigned int val;
765
766 /*
767 * The SDRAM configuration of the SA1110 and the SA1111 must
768 * match. This is very important to ensure that SA1111 accesses
769 * don't corrupt the SDRAM. Note that this ungates the SA1111's
770 * MBGNT signal, so we must have called sa1110_mb_disable()
771 * beforehand.
772 */
773 sa1111_configure_smc(sachip, 1,
774 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
775 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
776
777 /*
778 * We only need to turn on DCLK whenever we want to use the
779 * DMA. It can otherwise be held firmly in the off position.
780 * (currently, we always enable it.)
781 */
782 val = sa1111_readl(sachip->base + SA1111_SKPCR);
783 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
784
785 /*
786 * Enable the SA1110 memory bus request and grant signals.
787 */
788 sa1110_mb_enable();
789 }
790#endif
791
792 g_sa1111 = sachip;
793
794 has_devs = ~0;
795 if (pd)
796 has_devs &= ~pd->disable_devs;
797
798 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
799 if (sa1111_devices[i].devid & has_devs)
800 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
801
802 return 0;
803
804 err_unmap:
805 iounmap(sachip->base);
806 err_clk_unprep:
807 clk_unprepare(sachip->clk);
808 err_clkput:
809 clk_put(sachip->clk);
810 err_free:
811 kfree(sachip);
812 return ret;
813}
814
815static int sa1111_remove_one(struct device *dev, void *data)
816{
817 struct sa1111_dev *sadev = SA1111_DEV(dev);
818 device_del(&sadev->dev);
819 release_resource(&sadev->res);
820 put_device(&sadev->dev);
821 return 0;
822}
823
824static void __sa1111_remove(struct sa1111 *sachip)
825{
826 void __iomem *irqbase = sachip->base + SA1111_INTC;
827
828 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
829
830 /* disable all IRQs */
831 sa1111_writel(0, irqbase + SA1111_INTEN0);
832 sa1111_writel(0, irqbase + SA1111_INTEN1);
833 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
834 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
835
836 clk_disable(sachip->clk);
837 clk_unprepare(sachip->clk);
838
839 if (sachip->irq != NO_IRQ) {
840 irq_set_chained_handler(sachip->irq, NULL);
841 irq_set_handler_data(sachip->irq, NULL);
842 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
843
844 release_mem_region(sachip->phys + SA1111_INTC, 512);
845 }
846
847 iounmap(sachip->base);
848 clk_put(sachip->clk);
849 kfree(sachip);
850}
851
852struct sa1111_save_data {
853 unsigned int skcr;
854 unsigned int skpcr;
855 unsigned int skcdr;
856 unsigned char skaud;
857 unsigned char skpwm0;
858 unsigned char skpwm1;
859
860 /*
861 * Interrupt controller
862 */
863 unsigned int intpol0;
864 unsigned int intpol1;
865 unsigned int inten0;
866 unsigned int inten1;
867 unsigned int wakepol0;
868 unsigned int wakepol1;
869 unsigned int wakeen0;
870 unsigned int wakeen1;
871};
872
873#ifdef CONFIG_PM
874
875static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
876{
877 struct sa1111 *sachip = platform_get_drvdata(dev);
878 struct sa1111_save_data *save;
879 unsigned long flags;
880 unsigned int val;
881 void __iomem *base;
882
883 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
884 if (!save)
885 return -ENOMEM;
886 sachip->saved_state = save;
887
888 spin_lock_irqsave(&sachip->lock, flags);
889
890 /*
891 * Save state.
892 */
893 base = sachip->base;
894 save->skcr = sa1111_readl(base + SA1111_SKCR);
895 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
896 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
897 save->skaud = sa1111_readl(base + SA1111_SKAUD);
898 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
899 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
900
901 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
902 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
903
904 base = sachip->base + SA1111_INTC;
905 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
906 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
907 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
908 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
909 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
910 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
911 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
912 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
913
914 /*
915 * Disable.
916 */
917 val = sa1111_readl(sachip->base + SA1111_SKCR);
918 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
919
920 clk_disable(sachip->clk);
921
922 spin_unlock_irqrestore(&sachip->lock, flags);
923
924#ifdef CONFIG_ARCH_SA1100
925 sa1110_mb_disable();
926#endif
927
928 return 0;
929}
930
931/*
932 * sa1111_resume - Restore the SA1111 device state.
933 * @dev: device to restore
934 *
935 * Restore the general state of the SA1111; clock control and
936 * interrupt controller. Other parts of the SA1111 must be
937 * restored by their respective drivers, and must be called
938 * via LDM after this function.
939 */
940static int sa1111_resume(struct platform_device *dev)
941{
942 struct sa1111 *sachip = platform_get_drvdata(dev);
943 struct sa1111_save_data *save;
944 unsigned long flags, id;
945 void __iomem *base;
946
947 save = sachip->saved_state;
948 if (!save)
949 return 0;
950
951 /*
952 * Ensure that the SA1111 is still here.
953 * FIXME: shouldn't do this here.
954 */
955 id = sa1111_readl(sachip->base + SA1111_SKID);
956 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
957 __sa1111_remove(sachip);
958 platform_set_drvdata(dev, NULL);
959 kfree(save);
960 return 0;
961 }
962
963 /*
964 * First of all, wake up the chip.
965 */
966 sa1111_wake(sachip);
967
968#ifdef CONFIG_ARCH_SA1100
969 /* Enable the memory bus request/grant signals */
970 sa1110_mb_enable();
971#endif
972
973 /*
974 * Only lock for write ops. Also, sa1111_wake must be called with
975 * released spinlock!
976 */
977 spin_lock_irqsave(&sachip->lock, flags);
978
979 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
980 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
981
982 base = sachip->base;
983 sa1111_writel(save->skcr, base + SA1111_SKCR);
984 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
985 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
986 sa1111_writel(save->skaud, base + SA1111_SKAUD);
987 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
988 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
989
990 base = sachip->base + SA1111_INTC;
991 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
992 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
993 sa1111_writel(save->inten0, base + SA1111_INTEN0);
994 sa1111_writel(save->inten1, base + SA1111_INTEN1);
995 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
996 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
997 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
998 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
999
1000 spin_unlock_irqrestore(&sachip->lock, flags);
1001
1002 sachip->saved_state = NULL;
1003 kfree(save);
1004
1005 return 0;
1006}
1007
1008#else
1009#define sa1111_suspend NULL
1010#define sa1111_resume NULL
1011#endif
1012
1013static int sa1111_probe(struct platform_device *pdev)
1014{
1015 struct resource *mem;
1016 int irq;
1017
1018 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1019 if (!mem)
1020 return -EINVAL;
1021 irq = platform_get_irq(pdev, 0);
1022 if (irq < 0)
1023 return -ENXIO;
1024
1025 return __sa1111_probe(&pdev->dev, mem, irq);
1026}
1027
1028static int sa1111_remove(struct platform_device *pdev)
1029{
1030 struct sa1111 *sachip = platform_get_drvdata(pdev);
1031
1032 if (sachip) {
1033#ifdef CONFIG_PM
1034 kfree(sachip->saved_state);
1035 sachip->saved_state = NULL;
1036#endif
1037 __sa1111_remove(sachip);
1038 platform_set_drvdata(pdev, NULL);
1039 }
1040
1041 return 0;
1042}
1043
1044/*
1045 * Not sure if this should be on the system bus or not yet.
1046 * We really want some way to register a system device at
1047 * the per-machine level, and then have this driver pick
1048 * up the registered devices.
1049 *
1050 * We also need to handle the SDRAM configuration for
1051 * PXA250/SA1110 machine classes.
1052 */
1053static struct platform_driver sa1111_device_driver = {
1054 .probe = sa1111_probe,
1055 .remove = sa1111_remove,
1056 .suspend = sa1111_suspend,
1057 .resume = sa1111_resume,
1058 .driver = {
1059 .name = "sa1111",
1060 .owner = THIS_MODULE,
1061 },
1062};
1063
1064/*
1065 * Get the parent device driver (us) structure
1066 * from a child function device
1067 */
1068static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1069{
1070 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1071}
1072
1073/*
1074 * The bits in the opdiv field are non-linear.
1075 */
1076static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1077
1078static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1079{
1080 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1081
1082 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1083
1084 fbdiv = (skcdr & 0x007f) + 2;
1085 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1086 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1087
1088 return 3686400 * fbdiv / (ipdiv * opdiv);
1089}
1090
1091/**
1092 * sa1111_pll_clock - return the current PLL clock frequency.
1093 * @sadev: SA1111 function block
1094 *
1095 * BUG: we should look at SKCR. We also blindly believe that
1096 * the chip is being fed with the 3.6864MHz clock.
1097 *
1098 * Returns the PLL clock in Hz.
1099 */
1100unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1101{
1102 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1103
1104 return __sa1111_pll_clock(sachip);
1105}
1106EXPORT_SYMBOL(sa1111_pll_clock);
1107
1108/**
1109 * sa1111_select_audio_mode - select I2S or AC link mode
1110 * @sadev: SA1111 function block
1111 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1112 *
1113 * Frob the SKCR to select AC Link mode or I2S mode for
1114 * the audio block.
1115 */
1116void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1117{
1118 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1119 unsigned long flags;
1120 unsigned int val;
1121
1122 spin_lock_irqsave(&sachip->lock, flags);
1123
1124 val = sa1111_readl(sachip->base + SA1111_SKCR);
1125 if (mode == SA1111_AUDIO_I2S) {
1126 val &= ~SKCR_SELAC;
1127 } else {
1128 val |= SKCR_SELAC;
1129 }
1130 sa1111_writel(val, sachip->base + SA1111_SKCR);
1131
1132 spin_unlock_irqrestore(&sachip->lock, flags);
1133}
1134EXPORT_SYMBOL(sa1111_select_audio_mode);
1135
1136/**
1137 * sa1111_set_audio_rate - set the audio sample rate
1138 * @sadev: SA1111 SAC function block
1139 * @rate: sample rate to select
1140 */
1141int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1142{
1143 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1144 unsigned int div;
1145
1146 if (sadev->devid != SA1111_DEVID_SAC)
1147 return -EINVAL;
1148
1149 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1150 if (div == 0)
1151 div = 1;
1152 if (div > 128)
1153 div = 128;
1154
1155 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1156
1157 return 0;
1158}
1159EXPORT_SYMBOL(sa1111_set_audio_rate);
1160
1161/**
1162 * sa1111_get_audio_rate - get the audio sample rate
1163 * @sadev: SA1111 SAC function block device
1164 */
1165int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1166{
1167 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1168 unsigned long div;
1169
1170 if (sadev->devid != SA1111_DEVID_SAC)
1171 return -EINVAL;
1172
1173 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1174
1175 return __sa1111_pll_clock(sachip) / (256 * div);
1176}
1177EXPORT_SYMBOL(sa1111_get_audio_rate);
1178
1179void sa1111_set_io_dir(struct sa1111_dev *sadev,
1180 unsigned int bits, unsigned int dir,
1181 unsigned int sleep_dir)
1182{
1183 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1184 unsigned long flags;
1185 unsigned int val;
1186 void __iomem *gpio = sachip->base + SA1111_GPIO;
1187
1188#define MODIFY_BITS(port, mask, dir) \
1189 if (mask) { \
1190 val = sa1111_readl(port); \
1191 val &= ~(mask); \
1192 val |= (dir) & (mask); \
1193 sa1111_writel(val, port); \
1194 }
1195
1196 spin_lock_irqsave(&sachip->lock, flags);
1197 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1198 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1199 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1200
1201 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1202 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1203 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1204 spin_unlock_irqrestore(&sachip->lock, flags);
1205}
1206EXPORT_SYMBOL(sa1111_set_io_dir);
1207
1208void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1209{
1210 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1211 unsigned long flags;
1212 unsigned int val;
1213 void __iomem *gpio = sachip->base + SA1111_GPIO;
1214
1215 spin_lock_irqsave(&sachip->lock, flags);
1216 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1217 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1218 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1219 spin_unlock_irqrestore(&sachip->lock, flags);
1220}
1221EXPORT_SYMBOL(sa1111_set_io);
1222
1223void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1224{
1225 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1226 unsigned long flags;
1227 unsigned int val;
1228 void __iomem *gpio = sachip->base + SA1111_GPIO;
1229
1230 spin_lock_irqsave(&sachip->lock, flags);
1231 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1232 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1233 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1234 spin_unlock_irqrestore(&sachip->lock, flags);
1235}
1236EXPORT_SYMBOL(sa1111_set_sleep_io);
1237
1238/*
1239 * Individual device operations.
1240 */
1241
1242/**
1243 * sa1111_enable_device - enable an on-chip SA1111 function block
1244 * @sadev: SA1111 function block device to enable
1245 */
1246int sa1111_enable_device(struct sa1111_dev *sadev)
1247{
1248 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1249 unsigned long flags;
1250 unsigned int val;
1251 int ret = 0;
1252
1253 if (sachip->pdata && sachip->pdata->enable)
1254 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1255
1256 if (ret == 0) {
1257 spin_lock_irqsave(&sachip->lock, flags);
1258 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1259 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1260 spin_unlock_irqrestore(&sachip->lock, flags);
1261 }
1262 return ret;
1263}
1264EXPORT_SYMBOL(sa1111_enable_device);
1265
1266/**
1267 * sa1111_disable_device - disable an on-chip SA1111 function block
1268 * @sadev: SA1111 function block device to disable
1269 */
1270void sa1111_disable_device(struct sa1111_dev *sadev)
1271{
1272 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1273 unsigned long flags;
1274 unsigned int val;
1275
1276 spin_lock_irqsave(&sachip->lock, flags);
1277 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1278 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1279 spin_unlock_irqrestore(&sachip->lock, flags);
1280
1281 if (sachip->pdata && sachip->pdata->disable)
1282 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1283}
1284EXPORT_SYMBOL(sa1111_disable_device);
1285
1286/*
1287 * SA1111 "Register Access Bus."
1288 *
1289 * We model this as a regular bus type, and hang devices directly
1290 * off this.
1291 */
1292static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1293{
1294 struct sa1111_dev *dev = SA1111_DEV(_dev);
1295 struct sa1111_driver *drv = SA1111_DRV(_drv);
1296
1297 return dev->devid & drv->devid;
1298}
1299
1300static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1301{
1302 struct sa1111_dev *sadev = SA1111_DEV(dev);
1303 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1304 int ret = 0;
1305
1306 if (drv && drv->suspend)
1307 ret = drv->suspend(sadev, state);
1308 return ret;
1309}
1310
1311static int sa1111_bus_resume(struct device *dev)
1312{
1313 struct sa1111_dev *sadev = SA1111_DEV(dev);
1314 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1315 int ret = 0;
1316
1317 if (drv && drv->resume)
1318 ret = drv->resume(sadev);
1319 return ret;
1320}
1321
1322static void sa1111_bus_shutdown(struct device *dev)
1323{
1324 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1325
1326 if (drv && drv->shutdown)
1327 drv->shutdown(SA1111_DEV(dev));
1328}
1329
1330static int sa1111_bus_probe(struct device *dev)
1331{
1332 struct sa1111_dev *sadev = SA1111_DEV(dev);
1333 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1334 int ret = -ENODEV;
1335
1336 if (drv->probe)
1337 ret = drv->probe(sadev);
1338 return ret;
1339}
1340
1341static int sa1111_bus_remove(struct device *dev)
1342{
1343 struct sa1111_dev *sadev = SA1111_DEV(dev);
1344 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1345 int ret = 0;
1346
1347 if (drv->remove)
1348 ret = drv->remove(sadev);
1349 return ret;
1350}
1351
1352struct bus_type sa1111_bus_type = {
1353 .name = "sa1111-rab",
1354 .match = sa1111_match,
1355 .probe = sa1111_bus_probe,
1356 .remove = sa1111_bus_remove,
1357 .suspend = sa1111_bus_suspend,
1358 .resume = sa1111_bus_resume,
1359 .shutdown = sa1111_bus_shutdown,
1360};
1361EXPORT_SYMBOL(sa1111_bus_type);
1362
1363int sa1111_driver_register(struct sa1111_driver *driver)
1364{
1365 driver->drv.bus = &sa1111_bus_type;
1366 return driver_register(&driver->drv);
1367}
1368EXPORT_SYMBOL(sa1111_driver_register);
1369
1370void sa1111_driver_unregister(struct sa1111_driver *driver)
1371{
1372 driver_unregister(&driver->drv);
1373}
1374EXPORT_SYMBOL(sa1111_driver_unregister);
1375
1376#ifdef CONFIG_DMABOUNCE
1377/*
1378 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
1379 * Chip Specification Update" (June 2000), erratum #7, there is a
1380 * significant bug in the SA1111 SDRAM shared memory controller. If
1381 * an access to a region of memory above 1MB relative to the bank base,
1382 * it is important that address bit 10 _NOT_ be asserted. Depending
1383 * on the configuration of the RAM, bit 10 may correspond to one
1384 * of several different (processor-relative) address bits.
1385 *
1386 * This routine only identifies whether or not a given DMA address
1387 * is susceptible to the bug.
1388 *
1389 * This should only get called for sa1111_device types due to the
1390 * way we configure our device dma_masks.
1391 */
1392static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
1393{
1394 /*
1395 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
1396 * User's Guide" mentions that jumpers R51 and R52 control the
1397 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
1398 * SDRAM bank 1 on Neponset). The default configuration selects
1399 * Assabet, so any address in bank 1 is necessarily invalid.
1400 */
1401 return (machine_is_assabet() || machine_is_pfs168()) &&
1402 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
1403}
1404
1405static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
1406 void *data)
1407{
1408 struct sa1111_dev *dev = SA1111_DEV(data);
1409
1410 switch (action) {
1411 case BUS_NOTIFY_ADD_DEVICE:
1412 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
1413 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
1414 sa1111_needs_bounce);
1415 if (ret)
1416 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
1417 }
1418 break;
1419
1420 case BUS_NOTIFY_DEL_DEVICE:
1421 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
1422 dmabounce_unregister_dev(&dev->dev);
1423 break;
1424 }
1425 return NOTIFY_OK;
1426}
1427
1428static struct notifier_block sa1111_bus_notifier = {
1429 .notifier_call = sa1111_notifier_call,
1430};
1431#endif
1432
1433static int __init sa1111_init(void)
1434{
1435 int ret = bus_register(&sa1111_bus_type);
1436#ifdef CONFIG_DMABOUNCE
1437 if (ret == 0)
1438 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1439#endif
1440 if (ret == 0)
1441 platform_driver_register(&sa1111_device_driver);
1442 return ret;
1443}
1444
1445static void __exit sa1111_exit(void)
1446{
1447 platform_driver_unregister(&sa1111_device_driver);
1448#ifdef CONFIG_DMABOUNCE
1449 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1450#endif
1451 bus_unregister(&sa1111_bus_type);
1452}
1453
1454subsys_initcall(sa1111_init);
1455module_exit(sa1111_exit);
1456
1457MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1458MODULE_LICENSE("GPL");