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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Common boot and setup code for both 32-bit and 64-bit.
4 * Extracted from arch/powerpc/kernel/setup_64.c.
5 *
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 */
8
9#undef DEBUG
10
11#include <linux/export.h>
12#include <linux/panic_notifier.h>
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/reboot.h>
18#include <linux/delay.h>
19#include <linux/initrd.h>
20#include <linux/platform_device.h>
21#include <linux/printk.h>
22#include <linux/seq_file.h>
23#include <linux/ioport.h>
24#include <linux/console.h>
25#include <linux/root_dev.h>
26#include <linux/cpu.h>
27#include <linux/unistd.h>
28#include <linux/seq_buf.h>
29#include <linux/serial.h>
30#include <linux/serial_8250.h>
31#include <linux/percpu.h>
32#include <linux/memblock.h>
33#include <linux/of.h>
34#include <linux/of_fdt.h>
35#include <linux/of_irq.h>
36#include <linux/hugetlb.h>
37#include <linux/pgtable.h>
38#include <asm/io.h>
39#include <asm/paca.h>
40#include <asm/processor.h>
41#include <asm/vdso_datapage.h>
42#include <asm/smp.h>
43#include <asm/elf.h>
44#include <asm/machdep.h>
45#include <asm/time.h>
46#include <asm/cputable.h>
47#include <asm/sections.h>
48#include <asm/firmware.h>
49#include <asm/btext.h>
50#include <asm/nvram.h>
51#include <asm/setup.h>
52#include <asm/rtas.h>
53#include <asm/iommu.h>
54#include <asm/serial.h>
55#include <asm/cache.h>
56#include <asm/page.h>
57#include <asm/mmu.h>
58#include <asm/xmon.h>
59#include <asm/cputhreads.h>
60#include <mm/mmu_decl.h>
61#include <asm/archrandom.h>
62#include <asm/fadump.h>
63#include <asm/udbg.h>
64#include <asm/hugetlb.h>
65#include <asm/livepatch.h>
66#include <asm/mmu_context.h>
67#include <asm/cpu_has_feature.h>
68#include <asm/kasan.h>
69#include <asm/mce.h>
70#include <asm/systemcfg.h>
71
72#include "setup.h"
73
74#ifdef DEBUG
75#define DBG(fmt...) udbg_printf(fmt)
76#else
77#define DBG(fmt...)
78#endif
79
80/* The main machine-dep calls structure
81 */
82struct machdep_calls ppc_md;
83EXPORT_SYMBOL(ppc_md);
84struct machdep_calls *machine_id;
85EXPORT_SYMBOL(machine_id);
86
87int boot_cpuid = -1;
88EXPORT_SYMBOL_GPL(boot_cpuid);
89int __initdata boot_core_hwid = -1;
90
91#ifdef CONFIG_PPC64
92int boot_cpu_hwid = -1;
93#endif
94
95/*
96 * These are used in binfmt_elf.c to put aux entries on the stack
97 * for each elf executable being started.
98 */
99int dcache_bsize;
100int icache_bsize;
101
102/* Variables required to store legacy IO irq routing */
103int of_i8042_kbd_irq;
104EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
105int of_i8042_aux_irq;
106EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
107
108#ifdef __DO_IRQ_CANON
109/* XXX should go elsewhere eventually */
110int ppc_do_canonicalize_irqs;
111EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
112#endif
113
114#ifdef CONFIG_CRASH_DUMP
115/* This keeps a track of which one is the crashing cpu. */
116int crashing_cpu = -1;
117#endif
118
119/* also used by kexec */
120void machine_shutdown(void)
121{
122 /*
123 * if fadump is active, cleanup the fadump registration before we
124 * shutdown.
125 */
126 fadump_cleanup();
127
128 if (ppc_md.machine_shutdown)
129 ppc_md.machine_shutdown();
130}
131
132static void machine_hang(void)
133{
134 pr_emerg("System Halted, OK to turn off power\n");
135 local_irq_disable();
136 while (1)
137 ;
138}
139
140void machine_restart(char *cmd)
141{
142 machine_shutdown();
143 if (ppc_md.restart)
144 ppc_md.restart(cmd);
145
146 smp_send_stop();
147
148 do_kernel_restart(cmd);
149 mdelay(1000);
150
151 machine_hang();
152}
153
154void machine_power_off(void)
155{
156 machine_shutdown();
157 do_kernel_power_off();
158 smp_send_stop();
159 machine_hang();
160}
161/* Used by the G5 thermal driver */
162EXPORT_SYMBOL_GPL(machine_power_off);
163
164void (*pm_power_off)(void);
165EXPORT_SYMBOL_GPL(pm_power_off);
166
167size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
168{
169 if (max_longs && ppc_md.get_random_seed && ppc_md.get_random_seed(v))
170 return 1;
171 return 0;
172}
173EXPORT_SYMBOL(arch_get_random_seed_longs);
174
175void machine_halt(void)
176{
177 machine_shutdown();
178 if (ppc_md.halt)
179 ppc_md.halt();
180
181 smp_send_stop();
182 machine_hang();
183}
184
185#ifdef CONFIG_SMP
186DEFINE_PER_CPU(unsigned int, cpu_pvr);
187#endif
188
189static void show_cpuinfo_summary(struct seq_file *m)
190{
191 struct device_node *root;
192 const char *model = NULL;
193 unsigned long bogosum = 0;
194 int i;
195
196 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
197 for_each_online_cpu(i)
198 bogosum += loops_per_jiffy;
199 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
200 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
201 }
202 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
203 if (ppc_md.name)
204 seq_printf(m, "platform\t: %s\n", ppc_md.name);
205 root = of_find_node_by_path("/");
206 if (root)
207 model = of_get_property(root, "model", NULL);
208 if (model)
209 seq_printf(m, "model\t\t: %s\n", model);
210 of_node_put(root);
211
212 if (ppc_md.show_cpuinfo != NULL)
213 ppc_md.show_cpuinfo(m);
214
215 /* Display the amount of memory */
216 if (IS_ENABLED(CONFIG_PPC32))
217 seq_printf(m, "Memory\t\t: %d MB\n",
218 (unsigned int)(total_memory / (1024 * 1024)));
219}
220
221static int show_cpuinfo(struct seq_file *m, void *v)
222{
223 unsigned long cpu_id = (unsigned long)v - 1;
224 unsigned int pvr;
225 unsigned long proc_freq;
226 unsigned short maj;
227 unsigned short min;
228
229#ifdef CONFIG_SMP
230 pvr = per_cpu(cpu_pvr, cpu_id);
231#else
232 pvr = mfspr(SPRN_PVR);
233#endif
234 maj = (pvr >> 8) & 0xFF;
235 min = pvr & 0xFF;
236
237 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
238
239 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
240 seq_puts(m, cur_cpu_spec->cpu_name);
241 else
242 seq_printf(m, "unknown (%08x)", pvr);
243
244 if (cpu_has_feature(CPU_FTR_ALTIVEC))
245 seq_puts(m, ", altivec supported");
246
247 seq_putc(m, '\n');
248
249#ifdef CONFIG_TAU
250 if (cpu_has_feature(CPU_FTR_TAU)) {
251 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
252 /* more straightforward, but potentially misleading */
253 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
254 cpu_temp(cpu_id));
255 } else {
256 /* show the actual temp sensor range */
257 u32 temp;
258 temp = cpu_temp_both(cpu_id);
259 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
260 temp & 0xff, temp >> 16);
261 }
262 }
263#endif /* CONFIG_TAU */
264
265 /*
266 * Platforms that have variable clock rates, should implement
267 * the method ppc_md.get_proc_freq() that reports the clock
268 * rate of a given cpu. The rest can use ppc_proc_freq to
269 * report the clock rate that is same across all cpus.
270 */
271 if (ppc_md.get_proc_freq)
272 proc_freq = ppc_md.get_proc_freq(cpu_id);
273 else
274 proc_freq = ppc_proc_freq;
275
276 if (proc_freq)
277 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
278 proc_freq / 1000000, proc_freq % 1000000);
279
280 /* If we are a Freescale core do a simple check so
281 * we don't have to keep adding cases in the future */
282 if (PVR_VER(pvr) & 0x8000) {
283 switch (PVR_VER(pvr)) {
284 case 0x8000: /* 7441/7450/7451, Voyager */
285 case 0x8001: /* 7445/7455, Apollo 6 */
286 case 0x8002: /* 7447/7457, Apollo 7 */
287 case 0x8003: /* 7447A, Apollo 7 PM */
288 case 0x8004: /* 7448, Apollo 8 */
289 case 0x800c: /* 7410, Nitro */
290 maj = ((pvr >> 8) & 0xF);
291 min = PVR_MIN(pvr);
292 break;
293 default: /* e500/book-e */
294 maj = PVR_MAJ(pvr);
295 min = PVR_MIN(pvr);
296 break;
297 }
298 } else {
299 switch (PVR_VER(pvr)) {
300 case 0x1008: /* 740P/750P ?? */
301 maj = ((pvr >> 8) & 0xFF) - 1;
302 min = pvr & 0xFF;
303 break;
304 case 0x004e: /* POWER9 bits 12-15 give chip type */
305 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
306 maj = (pvr >> 8) & 0x0F;
307 min = pvr & 0xFF;
308 break;
309 default:
310 maj = (pvr >> 8) & 0xFF;
311 min = pvr & 0xFF;
312 break;
313 }
314 }
315
316 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
317 maj, min, PVR_VER(pvr), PVR_REV(pvr));
318
319 if (IS_ENABLED(CONFIG_PPC32))
320 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
321 (loops_per_jiffy / (5000 / HZ)) % 100);
322
323 seq_putc(m, '\n');
324
325 /* If this is the last cpu, print the summary */
326 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
327 show_cpuinfo_summary(m);
328
329 return 0;
330}
331
332static void *c_start(struct seq_file *m, loff_t *pos)
333{
334 if (*pos == 0) /* just in case, cpu 0 is not the first */
335 *pos = cpumask_first(cpu_online_mask);
336 else
337 *pos = cpumask_next(*pos - 1, cpu_online_mask);
338 if ((*pos) < nr_cpu_ids)
339 return (void *)(unsigned long)(*pos + 1);
340 return NULL;
341}
342
343static void *c_next(struct seq_file *m, void *v, loff_t *pos)
344{
345 (*pos)++;
346 return c_start(m, pos);
347}
348
349static void c_stop(struct seq_file *m, void *v)
350{
351}
352
353const struct seq_operations cpuinfo_op = {
354 .start = c_start,
355 .next = c_next,
356 .stop = c_stop,
357 .show = show_cpuinfo,
358};
359
360void __init check_for_initrd(void)
361{
362#ifdef CONFIG_BLK_DEV_INITRD
363 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
364 initrd_start, initrd_end);
365
366 /* If we were passed an initrd, set the ROOT_DEV properly if the values
367 * look sensible. If not, clear initrd reference.
368 */
369 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
370 initrd_end > initrd_start)
371 ROOT_DEV = Root_RAM0;
372 else
373 initrd_start = initrd_end = 0;
374
375 if (initrd_start)
376 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
377
378 DBG(" <- check_for_initrd()\n");
379#endif /* CONFIG_BLK_DEV_INITRD */
380}
381
382#ifdef CONFIG_SMP
383
384int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
385cpumask_t threads_core_mask __read_mostly;
386EXPORT_SYMBOL_GPL(threads_per_core);
387EXPORT_SYMBOL_GPL(threads_per_subcore);
388EXPORT_SYMBOL_GPL(threads_shift);
389EXPORT_SYMBOL_GPL(threads_core_mask);
390
391static void __init cpu_init_thread_core_maps(int tpc)
392{
393 int i;
394
395 threads_per_core = tpc;
396 threads_per_subcore = tpc;
397 cpumask_clear(&threads_core_mask);
398
399 /* This implementation only supports power of 2 number of threads
400 * for simplicity and performance
401 */
402 threads_shift = ilog2(tpc);
403 BUG_ON(tpc != (1 << threads_shift));
404
405 for (i = 0; i < tpc; i++)
406 cpumask_set_cpu(i, &threads_core_mask);
407
408 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
409 tpc, str_plural(tpc));
410 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
411}
412
413
414u32 *cpu_to_phys_id = NULL;
415
416static int assign_threads(unsigned int cpu, unsigned int nthreads, bool present,
417 const __be32 *hw_ids)
418{
419 for (int i = 0; i < nthreads && cpu < nr_cpu_ids; i++) {
420 __be32 hwid;
421
422 hwid = be32_to_cpu(hw_ids[i]);
423
424 DBG(" thread %d -> cpu %d (hard id %d)\n", i, cpu, hwid);
425
426 set_cpu_present(cpu, present);
427 set_cpu_possible(cpu, true);
428 cpu_to_phys_id[cpu] = hwid;
429 cpu++;
430 }
431
432 return cpu;
433}
434
435/**
436 * setup_cpu_maps - initialize the following cpu maps:
437 * cpu_possible_mask
438 * cpu_present_mask
439 *
440 * Having the possible map set up early allows us to restrict allocations
441 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
442 *
443 * We do not initialize the online map here; cpus set their own bits in
444 * cpu_online_mask as they come up.
445 *
446 * This function is valid only for Open Firmware systems. finish_device_tree
447 * must be called before using this.
448 *
449 * While we're here, we may as well set the "physical" cpu ids in the paca.
450 *
451 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
452 */
453void __init smp_setup_cpu_maps(void)
454{
455 struct device_node *dn;
456 int cpu = 0;
457 int nthreads = 1;
458
459 DBG("smp_setup_cpu_maps()\n");
460
461 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
462 __alignof__(u32));
463 if (!cpu_to_phys_id)
464 panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
465 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
466
467 for_each_node_by_type(dn, "cpu") {
468 const __be32 *intserv;
469 __be32 cpu_be;
470 int len;
471
472 DBG(" * %pOF...\n", dn);
473
474 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
475 &len);
476 if (intserv) {
477 DBG(" ibm,ppc-interrupt-server#s -> %lu threads\n",
478 (len / sizeof(int)));
479 } else {
480 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
481 intserv = of_get_property(dn, "reg", &len);
482 if (!intserv) {
483 cpu_be = cpu_to_be32(cpu);
484 /* XXX: what is this? uninitialized?? */
485 intserv = &cpu_be; /* assume logical == phys */
486 len = 4;
487 }
488 }
489
490 nthreads = len / sizeof(int);
491
492 bool avail = of_device_is_available(dn);
493 if (!avail)
494 avail = !of_property_match_string(dn,
495 "enable-method", "spin-table");
496
497 if (boot_core_hwid >= 0) {
498 if (cpu == 0) {
499 pr_info("Skipping CPU node %pOF to allow for boot core.\n", dn);
500 cpu = nthreads;
501 continue;
502 }
503
504 if (be32_to_cpu(intserv[0]) == boot_core_hwid) {
505 pr_info("Renumbered boot core %pOF to logical 0\n", dn);
506 assign_threads(0, nthreads, avail, intserv);
507 of_node_put(dn);
508 break;
509 }
510 } else if (cpu >= nr_cpu_ids) {
511 of_node_put(dn);
512 break;
513 }
514
515 if (cpu < nr_cpu_ids)
516 cpu = assign_threads(cpu, nthreads, avail, intserv);
517 }
518
519 /* If no SMT supported, nthreads is forced to 1 */
520 if (!cpu_has_feature(CPU_FTR_SMT)) {
521 DBG(" SMT disabled ! nthreads forced to 1\n");
522 nthreads = 1;
523 }
524
525#ifdef CONFIG_PPC64
526 /*
527 * On pSeries LPAR, we need to know how many cpus
528 * could possibly be added to this partition.
529 */
530 if (firmware_has_feature(FW_FEATURE_LPAR) &&
531 (dn = of_find_node_by_path("/rtas"))) {
532 int num_addr_cell, num_size_cell, maxcpus;
533 const __be32 *ireg;
534
535 num_addr_cell = of_n_addr_cells(dn);
536 num_size_cell = of_n_size_cells(dn);
537
538 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
539
540 if (!ireg)
541 goto out;
542
543 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
544
545 /* Double maxcpus for processors which have SMT capability */
546 if (cpu_has_feature(CPU_FTR_SMT))
547 maxcpus *= nthreads;
548
549 if (maxcpus > nr_cpu_ids) {
550 printk(KERN_WARNING
551 "Partition configured for %d cpus, "
552 "operating system maximum is %u.\n",
553 maxcpus, nr_cpu_ids);
554 maxcpus = nr_cpu_ids;
555 } else
556 printk(KERN_INFO "Partition configured for %d cpus.\n",
557 maxcpus);
558
559 for (cpu = 0; cpu < maxcpus; cpu++)
560 set_cpu_possible(cpu, true);
561 out:
562 of_node_put(dn);
563 }
564#endif
565#ifdef CONFIG_PPC64_PROC_SYSTEMCFG
566 systemcfg->processorCount = num_present_cpus();
567#endif /* CONFIG_PPC64 */
568
569 /* Initialize CPU <=> thread mapping/
570 *
571 * WARNING: We assume that the number of threads is the same for
572 * every CPU in the system. If that is not the case, then some code
573 * here will have to be reworked
574 */
575 cpu_init_thread_core_maps(nthreads);
576
577 /* Now that possible cpus are set, set nr_cpu_ids for later use */
578 setup_nr_cpu_ids();
579
580 free_unused_pacas();
581}
582#endif /* CONFIG_SMP */
583
584#ifdef CONFIG_PCSPKR_PLATFORM
585static __init int add_pcspkr(void)
586{
587 struct device_node *np;
588 struct platform_device *pd;
589 int ret;
590
591 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
592 of_node_put(np);
593 if (!np)
594 return -ENODEV;
595
596 pd = platform_device_alloc("pcspkr", -1);
597 if (!pd)
598 return -ENOMEM;
599
600 ret = platform_device_add(pd);
601 if (ret)
602 platform_device_put(pd);
603
604 return ret;
605}
606device_initcall(add_pcspkr);
607#endif /* CONFIG_PCSPKR_PLATFORM */
608
609static char ppc_hw_desc_buf[128] __initdata;
610
611struct seq_buf ppc_hw_desc __initdata = {
612 .buffer = ppc_hw_desc_buf,
613 .size = sizeof(ppc_hw_desc_buf),
614 .len = 0,
615};
616
617static __init void probe_machine(void)
618{
619 extern struct machdep_calls __machine_desc_start;
620 extern struct machdep_calls __machine_desc_end;
621 unsigned int i;
622
623 /*
624 * Iterate all ppc_md structures until we find the proper
625 * one for the current machine type
626 */
627 DBG("Probing machine type ...\n");
628
629 /*
630 * Check ppc_md is empty, if not we have a bug, ie, we setup an
631 * entry before probe_machine() which will be overwritten
632 */
633 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
634 if (((void **)&ppc_md)[i]) {
635 printk(KERN_ERR "Entry %d in ppc_md non empty before"
636 " machine probe !\n", i);
637 }
638 }
639
640 for (machine_id = &__machine_desc_start;
641 machine_id < &__machine_desc_end;
642 machine_id++) {
643 DBG(" %s ...\n", machine_id->name);
644 if (machine_id->compatible && !of_machine_is_compatible(machine_id->compatible))
645 continue;
646 if (machine_id->compatibles && !of_machine_compatible_match(machine_id->compatibles))
647 continue;
648 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
649 if (ppc_md.probe && !ppc_md.probe())
650 continue;
651 DBG(" %s match !\n", machine_id->name);
652 break;
653 }
654 /* What can we do if we didn't find ? */
655 if (machine_id >= &__machine_desc_end) {
656 pr_err("No suitable machine description found !\n");
657 for (;;);
658 }
659
660 // Append the machine name to other info we've gathered
661 seq_buf_puts(&ppc_hw_desc, ppc_md.name);
662
663 // Set the generic hardware description shown in oopses
664 dump_stack_set_arch_desc(ppc_hw_desc.buffer);
665
666 pr_info("Hardware name: %s\n", ppc_hw_desc.buffer);
667}
668
669/* Match a class of boards, not a specific device configuration. */
670int check_legacy_ioport(unsigned long base_port)
671{
672 struct device_node *parent, *np = NULL;
673 int ret = -ENODEV;
674
675 switch(base_port) {
676 case I8042_DATA_REG:
677 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
678 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
679 if (np) {
680 parent = of_get_parent(np);
681
682 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
683 if (!of_i8042_kbd_irq)
684 of_i8042_kbd_irq = 1;
685
686 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
687 if (!of_i8042_aux_irq)
688 of_i8042_aux_irq = 12;
689
690 of_node_put(np);
691 np = parent;
692 break;
693 }
694 np = of_find_node_by_type(NULL, "8042");
695 /* Pegasos has no device_type on its 8042 node, look for the
696 * name instead */
697 if (!np)
698 np = of_find_node_by_name(NULL, "8042");
699 if (np) {
700 of_i8042_kbd_irq = 1;
701 of_i8042_aux_irq = 12;
702 }
703 break;
704 case FDC_BASE: /* FDC1 */
705 np = of_find_node_by_type(NULL, "fdc");
706 break;
707 default:
708 /* ipmi is supposed to fail here */
709 break;
710 }
711 if (!np)
712 return ret;
713 parent = of_get_parent(np);
714 if (parent) {
715 if (of_node_is_type(parent, "isa"))
716 ret = 0;
717 of_node_put(parent);
718 }
719 of_node_put(np);
720 return ret;
721}
722EXPORT_SYMBOL(check_legacy_ioport);
723
724/*
725 * Panic notifiers setup
726 *
727 * We have 3 notifiers for powerpc, each one from a different "nature":
728 *
729 * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables
730 * IRQs and deal with the Firmware-Assisted dump, when it is configured;
731 * should run early in the panic path.
732 *
733 * - dump_kernel_offset() is an informative notifier, just showing the KASLR
734 * offset if we have RANDOMIZE_BASE set.
735 *
736 * - ppc_panic_platform_handler() is a low-level handler that's registered
737 * only if the platform wishes to perform final actions in the panic path,
738 * hence it should run late and might not even return. Currently, only
739 * pseries and ps3 platforms register callbacks.
740 */
741static int ppc_panic_fadump_handler(struct notifier_block *this,
742 unsigned long event, void *ptr)
743{
744 /*
745 * panic does a local_irq_disable, but we really
746 * want interrupts to be hard disabled.
747 */
748 hard_irq_disable();
749
750 /*
751 * If firmware-assisted dump has been registered then trigger
752 * its callback and let the firmware handles everything else.
753 */
754 crash_fadump(NULL, ptr);
755
756 return NOTIFY_DONE;
757}
758
759static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
760 void *p)
761{
762 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
763 kaslr_offset(), KERNELBASE);
764
765 return NOTIFY_DONE;
766}
767
768static int ppc_panic_platform_handler(struct notifier_block *this,
769 unsigned long event, void *ptr)
770{
771 /*
772 * This handler is only registered if we have a panic callback
773 * on ppc_md, hence NULL check is not needed.
774 * Also, it may not return, so it runs really late on panic path.
775 */
776 ppc_md.panic(ptr);
777
778 return NOTIFY_DONE;
779}
780
781static struct notifier_block ppc_fadump_block = {
782 .notifier_call = ppc_panic_fadump_handler,
783 .priority = INT_MAX, /* run early, to notify the firmware ASAP */
784};
785
786static struct notifier_block kernel_offset_notifier = {
787 .notifier_call = dump_kernel_offset,
788};
789
790static struct notifier_block ppc_panic_block = {
791 .notifier_call = ppc_panic_platform_handler,
792 .priority = INT_MIN, /* may not return; must be done last */
793};
794
795void __init setup_panic(void)
796{
797 /* Hard-disables IRQs + deal with FW-assisted dump (fadump) */
798 atomic_notifier_chain_register(&panic_notifier_list,
799 &ppc_fadump_block);
800
801 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
802 atomic_notifier_chain_register(&panic_notifier_list,
803 &kernel_offset_notifier);
804
805 /* Low-level platform-specific routines that should run on panic */
806 if (ppc_md.panic)
807 atomic_notifier_chain_register(&panic_notifier_list,
808 &ppc_panic_block);
809}
810
811#ifdef CONFIG_CHECK_CACHE_COHERENCY
812/*
813 * For platforms that have configurable cache-coherency. This function
814 * checks that the cache coherency setting of the kernel matches the setting
815 * left by the firmware, as indicated in the device tree. Since a mismatch
816 * will eventually result in DMA failures, we print * and error and call
817 * BUG() in that case.
818 */
819
820#define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
821
822static int __init check_cache_coherency(void)
823{
824 struct device_node *np;
825 const void *prop;
826 bool devtree_coherency;
827
828 np = of_find_node_by_path("/");
829 prop = of_get_property(np, "coherency-off", NULL);
830 of_node_put(np);
831
832 devtree_coherency = prop ? false : true;
833
834 if (devtree_coherency != KERNEL_COHERENCY) {
835 printk(KERN_ERR
836 "kernel coherency:%s != device tree_coherency:%s\n",
837 KERNEL_COHERENCY ? "on" : "off",
838 devtree_coherency ? "on" : "off");
839 BUG();
840 }
841
842 return 0;
843}
844
845late_initcall(check_cache_coherency);
846#endif /* CONFIG_CHECK_CACHE_COHERENCY */
847
848void ppc_printk_progress(char *s, unsigned short hex)
849{
850 pr_info("%s\n", s);
851}
852
853static __init void print_system_info(void)
854{
855 pr_info("-----------------------------------------------------\n");
856 pr_info("phys_mem_size = 0x%llx\n",
857 (unsigned long long)memblock_phys_mem_size());
858
859 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
860 pr_info("icache_bsize = 0x%x\n", icache_bsize);
861
862 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
863 pr_info(" possible = 0x%016lx\n",
864 (unsigned long)CPU_FTRS_POSSIBLE);
865 pr_info(" always = 0x%016lx\n",
866 (unsigned long)CPU_FTRS_ALWAYS);
867 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
868 cur_cpu_spec->cpu_user_features,
869 cur_cpu_spec->cpu_user_features2);
870 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
871#ifdef CONFIG_PPC64
872 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
873#ifdef CONFIG_PPC_BOOK3S
874 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START);
875 pr_info("IO start = 0x%lx\n", KERN_IO_START);
876 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap);
877#endif
878#endif
879
880 if (!early_radix_enabled())
881 print_system_hash_info();
882
883 if (PHYSICAL_START > 0)
884 pr_info("physical_start = 0x%llx\n",
885 (unsigned long long)PHYSICAL_START);
886 pr_info("-----------------------------------------------------\n");
887}
888
889#ifdef CONFIG_SMP
890static void __init smp_setup_pacas(void)
891{
892 int cpu;
893
894 for_each_possible_cpu(cpu) {
895 if (cpu == smp_processor_id())
896 continue;
897 allocate_paca(cpu);
898 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
899 }
900
901 memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
902 cpu_to_phys_id = NULL;
903}
904#endif
905
906/*
907 * Called into from start_kernel this initializes memblock, which is used
908 * to manage page allocation until mem_init is called.
909 */
910void __init setup_arch(char **cmdline_p)
911{
912 kasan_init();
913
914 *cmdline_p = boot_command_line;
915
916 /* Set a half-reasonable default so udelay does something sensible */
917 loops_per_jiffy = 500000000 / HZ;
918
919 /* Unflatten the device-tree passed by prom_init or kexec */
920 unflatten_device_tree();
921
922 /*
923 * Initialize cache line/block info from device-tree (on ppc64) or
924 * just cputable (on ppc32).
925 */
926 initialize_cache_info();
927
928 /* Initialize RTAS if available. */
929 rtas_initialize();
930
931 /* Check if we have an initrd provided via the device-tree. */
932 check_for_initrd();
933
934 /* Probe the machine type, establish ppc_md. */
935 probe_machine();
936
937 /* Setup panic notifier if requested by the platform. */
938 setup_panic();
939
940 /*
941 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
942 * it from their respective probe() function.
943 */
944 setup_power_save();
945
946 /* Discover standard serial ports. */
947 find_legacy_serial_ports();
948
949 /* Register early console with the printk subsystem. */
950 register_early_udbg_console();
951
952 /* Setup the various CPU maps based on the device-tree. */
953 smp_setup_cpu_maps();
954
955 /* Initialize xmon. */
956 xmon_setup();
957
958 /* Check the SMT related command line arguments (ppc64). */
959 check_smt_enabled();
960
961 /* Parse memory topology */
962 mem_topology_setup();
963 /* Set max_mapnr before paging_init() */
964 set_max_mapnr(max_pfn);
965 high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);
966
967 /*
968 * Release secondary cpus out of their spinloops at 0x60 now that
969 * we can map physical -> logical CPU ids.
970 *
971 * Freescale Book3e parts spin in a loop provided by firmware,
972 * so smp_release_cpus() does nothing for them.
973 */
974#ifdef CONFIG_SMP
975 smp_setup_pacas();
976
977 /* On BookE, setup per-core TLB data structures. */
978 setup_tlb_core_data();
979#endif
980
981 /* Print various info about the machine that has been gathered so far. */
982 print_system_info();
983
984 klp_init_thread_info(&init_task);
985
986 setup_initial_init_mm(_stext, _etext, _edata, _end);
987 /* sched_init() does the mmgrab(&init_mm) for the primary CPU */
988 VM_WARN_ON(cpumask_test_cpu(smp_processor_id(), mm_cpumask(&init_mm)));
989 cpumask_set_cpu(smp_processor_id(), mm_cpumask(&init_mm));
990 inc_mm_active_cpus(&init_mm);
991 mm_iommu_init(&init_mm);
992
993 irqstack_early_init();
994 exc_lvl_early_init();
995 emergency_stack_init();
996
997 mce_init();
998 smp_release_cpus();
999
1000 initmem_init();
1001
1002 /*
1003 * Reserve large chunks of memory for use by CMA for fadump, KVM and
1004 * hugetlb. These must be called after initmem_init(), so that
1005 * pageblock_order is initialised.
1006 */
1007 fadump_cma_init();
1008 kvm_cma_reserve();
1009 gigantic_hugetlb_cma_reserve();
1010
1011 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
1012
1013 if (ppc_md.setup_arch)
1014 ppc_md.setup_arch();
1015
1016 setup_barrier_nospec();
1017 setup_spectre_v2();
1018
1019 paging_init();
1020
1021 /* Initialize the MMU context management stuff. */
1022 mmu_context_init();
1023
1024 /* Interrupt code needs to be 64K-aligned. */
1025 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
1026 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
1027 (unsigned long)_stext);
1028}
1/*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
15#include <linux/export.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
23#include <linux/platform_device.h>
24#include <linux/seq_file.h>
25#include <linux/ioport.h>
26#include <linux/console.h>
27#include <linux/screen_info.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
34#include <linux/debugfs.h>
35#include <linux/percpu.h>
36#include <linux/memblock.h>
37#include <linux/of_platform.h>
38#include <asm/io.h>
39#include <asm/paca.h>
40#include <asm/prom.h>
41#include <asm/processor.h>
42#include <asm/vdso_datapage.h>
43#include <asm/pgtable.h>
44#include <asm/smp.h>
45#include <asm/elf.h>
46#include <asm/machdep.h>
47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
50#include <asm/firmware.h>
51#include <asm/btext.h>
52#include <asm/nvram.h>
53#include <asm/setup.h>
54#include <asm/rtas.h>
55#include <asm/iommu.h>
56#include <asm/serial.h>
57#include <asm/cache.h>
58#include <asm/page.h>
59#include <asm/mmu.h>
60#include <asm/xmon.h>
61#include <asm/cputhreads.h>
62#include <mm/mmu_decl.h>
63#include <asm/fadump.h>
64
65#ifdef DEBUG
66#include <asm/udbg.h>
67#define DBG(fmt...) udbg_printf(fmt)
68#else
69#define DBG(fmt...)
70#endif
71
72/* The main machine-dep calls structure
73 */
74struct machdep_calls ppc_md;
75EXPORT_SYMBOL(ppc_md);
76struct machdep_calls *machine_id;
77EXPORT_SYMBOL(machine_id);
78
79int boot_cpuid = -1;
80EXPORT_SYMBOL_GPL(boot_cpuid);
81
82unsigned long klimit = (unsigned long) _end;
83
84char cmd_line[COMMAND_LINE_SIZE];
85
86/*
87 * This still seems to be needed... -- paulus
88 */
89struct screen_info screen_info = {
90 .orig_x = 0,
91 .orig_y = 25,
92 .orig_video_cols = 80,
93 .orig_video_lines = 25,
94 .orig_video_isVGA = 1,
95 .orig_video_points = 16
96};
97
98/* Variables required to store legacy IO irq routing */
99int of_i8042_kbd_irq;
100EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
101int of_i8042_aux_irq;
102EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
103
104#ifdef __DO_IRQ_CANON
105/* XXX should go elsewhere eventually */
106int ppc_do_canonicalize_irqs;
107EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
108#endif
109
110/* also used by kexec */
111void machine_shutdown(void)
112{
113#ifdef CONFIG_FA_DUMP
114 /*
115 * if fadump is active, cleanup the fadump registration before we
116 * shutdown.
117 */
118 fadump_cleanup();
119#endif
120
121 if (ppc_md.machine_shutdown)
122 ppc_md.machine_shutdown();
123}
124
125void machine_restart(char *cmd)
126{
127 machine_shutdown();
128 if (ppc_md.restart)
129 ppc_md.restart(cmd);
130#ifdef CONFIG_SMP
131 smp_send_stop();
132#endif
133 printk(KERN_EMERG "System Halted, OK to turn off power\n");
134 local_irq_disable();
135 while (1) ;
136}
137
138void machine_power_off(void)
139{
140 machine_shutdown();
141 if (ppc_md.power_off)
142 ppc_md.power_off();
143#ifdef CONFIG_SMP
144 smp_send_stop();
145#endif
146 printk(KERN_EMERG "System Halted, OK to turn off power\n");
147 local_irq_disable();
148 while (1) ;
149}
150/* Used by the G5 thermal driver */
151EXPORT_SYMBOL_GPL(machine_power_off);
152
153void (*pm_power_off)(void) = machine_power_off;
154EXPORT_SYMBOL_GPL(pm_power_off);
155
156void machine_halt(void)
157{
158 machine_shutdown();
159 if (ppc_md.halt)
160 ppc_md.halt();
161#ifdef CONFIG_SMP
162 smp_send_stop();
163#endif
164 printk(KERN_EMERG "System Halted, OK to turn off power\n");
165 local_irq_disable();
166 while (1) ;
167}
168
169
170#ifdef CONFIG_TAU
171extern u32 cpu_temp(unsigned long cpu);
172extern u32 cpu_temp_both(unsigned long cpu);
173#endif /* CONFIG_TAU */
174
175#ifdef CONFIG_SMP
176DEFINE_PER_CPU(unsigned int, cpu_pvr);
177#endif
178
179static void show_cpuinfo_summary(struct seq_file *m)
180{
181 struct device_node *root;
182 const char *model = NULL;
183#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
184 unsigned long bogosum = 0;
185 int i;
186 for_each_online_cpu(i)
187 bogosum += loops_per_jiffy;
188 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
189 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
190#endif /* CONFIG_SMP && CONFIG_PPC32 */
191 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
192 if (ppc_md.name)
193 seq_printf(m, "platform\t: %s\n", ppc_md.name);
194 root = of_find_node_by_path("/");
195 if (root)
196 model = of_get_property(root, "model", NULL);
197 if (model)
198 seq_printf(m, "model\t\t: %s\n", model);
199 of_node_put(root);
200
201 if (ppc_md.show_cpuinfo != NULL)
202 ppc_md.show_cpuinfo(m);
203
204#ifdef CONFIG_PPC32
205 /* Display the amount of memory */
206 seq_printf(m, "Memory\t\t: %d MB\n",
207 (unsigned int)(total_memory / (1024 * 1024)));
208#endif
209}
210
211static int show_cpuinfo(struct seq_file *m, void *v)
212{
213 unsigned long cpu_id = (unsigned long)v - 1;
214 unsigned int pvr;
215 unsigned short maj;
216 unsigned short min;
217
218 /* We only show online cpus: disable preempt (overzealous, I
219 * knew) to prevent cpu going down. */
220 preempt_disable();
221 if (!cpu_online(cpu_id)) {
222 preempt_enable();
223 return 0;
224 }
225
226#ifdef CONFIG_SMP
227 pvr = per_cpu(cpu_pvr, cpu_id);
228#else
229 pvr = mfspr(SPRN_PVR);
230#endif
231 maj = (pvr >> 8) & 0xFF;
232 min = pvr & 0xFF;
233
234 seq_printf(m, "processor\t: %lu\n", cpu_id);
235 seq_printf(m, "cpu\t\t: ");
236
237 if (cur_cpu_spec->pvr_mask)
238 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
239 else
240 seq_printf(m, "unknown (%08x)", pvr);
241
242#ifdef CONFIG_ALTIVEC
243 if (cpu_has_feature(CPU_FTR_ALTIVEC))
244 seq_printf(m, ", altivec supported");
245#endif /* CONFIG_ALTIVEC */
246
247 seq_printf(m, "\n");
248
249#ifdef CONFIG_TAU
250 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
251#ifdef CONFIG_TAU_AVERAGE
252 /* more straightforward, but potentially misleading */
253 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
254 cpu_temp(cpu_id));
255#else
256 /* show the actual temp sensor range */
257 u32 temp;
258 temp = cpu_temp_both(cpu_id);
259 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
260 temp & 0xff, temp >> 16);
261#endif
262 }
263#endif /* CONFIG_TAU */
264
265 /*
266 * Assume here that all clock rates are the same in a
267 * smp system. -- Cort
268 */
269 if (ppc_proc_freq)
270 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
271 ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
272
273 if (ppc_md.show_percpuinfo != NULL)
274 ppc_md.show_percpuinfo(m, cpu_id);
275
276 /* If we are a Freescale core do a simple check so
277 * we dont have to keep adding cases in the future */
278 if (PVR_VER(pvr) & 0x8000) {
279 switch (PVR_VER(pvr)) {
280 case 0x8000: /* 7441/7450/7451, Voyager */
281 case 0x8001: /* 7445/7455, Apollo 6 */
282 case 0x8002: /* 7447/7457, Apollo 7 */
283 case 0x8003: /* 7447A, Apollo 7 PM */
284 case 0x8004: /* 7448, Apollo 8 */
285 case 0x800c: /* 7410, Nitro */
286 maj = ((pvr >> 8) & 0xF);
287 min = PVR_MIN(pvr);
288 break;
289 default: /* e500/book-e */
290 maj = PVR_MAJ(pvr);
291 min = PVR_MIN(pvr);
292 break;
293 }
294 } else {
295 switch (PVR_VER(pvr)) {
296 case 0x0020: /* 403 family */
297 maj = PVR_MAJ(pvr) + 1;
298 min = PVR_MIN(pvr);
299 break;
300 case 0x1008: /* 740P/750P ?? */
301 maj = ((pvr >> 8) & 0xFF) - 1;
302 min = pvr & 0xFF;
303 break;
304 default:
305 maj = (pvr >> 8) & 0xFF;
306 min = pvr & 0xFF;
307 break;
308 }
309 }
310
311 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
312 maj, min, PVR_VER(pvr), PVR_REV(pvr));
313
314#ifdef CONFIG_PPC32
315 seq_printf(m, "bogomips\t: %lu.%02lu\n",
316 loops_per_jiffy / (500000/HZ),
317 (loops_per_jiffy / (5000/HZ)) % 100);
318#endif
319
320#ifdef CONFIG_SMP
321 seq_printf(m, "\n");
322#endif
323
324 preempt_enable();
325
326 /* If this is the last cpu, print the summary */
327 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
328 show_cpuinfo_summary(m);
329
330 return 0;
331}
332
333static void *c_start(struct seq_file *m, loff_t *pos)
334{
335 if (*pos == 0) /* just in case, cpu 0 is not the first */
336 *pos = cpumask_first(cpu_online_mask);
337 else
338 *pos = cpumask_next(*pos - 1, cpu_online_mask);
339 if ((*pos) < nr_cpu_ids)
340 return (void *)(unsigned long)(*pos + 1);
341 return NULL;
342}
343
344static void *c_next(struct seq_file *m, void *v, loff_t *pos)
345{
346 (*pos)++;
347 return c_start(m, pos);
348}
349
350static void c_stop(struct seq_file *m, void *v)
351{
352}
353
354const struct seq_operations cpuinfo_op = {
355 .start =c_start,
356 .next = c_next,
357 .stop = c_stop,
358 .show = show_cpuinfo,
359};
360
361void __init check_for_initrd(void)
362{
363#ifdef CONFIG_BLK_DEV_INITRD
364 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
365 initrd_start, initrd_end);
366
367 /* If we were passed an initrd, set the ROOT_DEV properly if the values
368 * look sensible. If not, clear initrd reference.
369 */
370 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
371 initrd_end > initrd_start)
372 ROOT_DEV = Root_RAM0;
373 else
374 initrd_start = initrd_end = 0;
375
376 if (initrd_start)
377 printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
378
379 DBG(" <- check_for_initrd()\n");
380#endif /* CONFIG_BLK_DEV_INITRD */
381}
382
383#ifdef CONFIG_SMP
384
385int threads_per_core, threads_shift;
386cpumask_t threads_core_mask;
387EXPORT_SYMBOL_GPL(threads_per_core);
388EXPORT_SYMBOL_GPL(threads_shift);
389EXPORT_SYMBOL_GPL(threads_core_mask);
390
391static void __init cpu_init_thread_core_maps(int tpc)
392{
393 int i;
394
395 threads_per_core = tpc;
396 cpumask_clear(&threads_core_mask);
397
398 /* This implementation only supports power of 2 number of threads
399 * for simplicity and performance
400 */
401 threads_shift = ilog2(tpc);
402 BUG_ON(tpc != (1 << threads_shift));
403
404 for (i = 0; i < tpc; i++)
405 cpumask_set_cpu(i, &threads_core_mask);
406
407 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
408 tpc, tpc > 1 ? "s" : "");
409 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
410}
411
412
413/**
414 * setup_cpu_maps - initialize the following cpu maps:
415 * cpu_possible_mask
416 * cpu_present_mask
417 *
418 * Having the possible map set up early allows us to restrict allocations
419 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
420 *
421 * We do not initialize the online map here; cpus set their own bits in
422 * cpu_online_mask as they come up.
423 *
424 * This function is valid only for Open Firmware systems. finish_device_tree
425 * must be called before using this.
426 *
427 * While we're here, we may as well set the "physical" cpu ids in the paca.
428 *
429 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
430 */
431void __init smp_setup_cpu_maps(void)
432{
433 struct device_node *dn = NULL;
434 int cpu = 0;
435 int nthreads = 1;
436
437 DBG("smp_setup_cpu_maps()\n");
438
439 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
440 const __be32 *intserv;
441 __be32 cpu_be;
442 int j, len;
443
444 DBG(" * %s...\n", dn->full_name);
445
446 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
447 &len);
448 if (intserv) {
449 nthreads = len / sizeof(int);
450 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
451 nthreads);
452 } else {
453 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
454 intserv = of_get_property(dn, "reg", NULL);
455 if (!intserv) {
456 cpu_be = cpu_to_be32(cpu);
457 intserv = &cpu_be; /* assume logical == phys */
458 }
459 }
460
461 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
462 DBG(" thread %d -> cpu %d (hard id %d)\n",
463 j, cpu, be32_to_cpu(intserv[j]));
464 set_cpu_present(cpu, true);
465 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
466 set_cpu_possible(cpu, true);
467 cpu++;
468 }
469 }
470
471 /* If no SMT supported, nthreads is forced to 1 */
472 if (!cpu_has_feature(CPU_FTR_SMT)) {
473 DBG(" SMT disabled ! nthreads forced to 1\n");
474 nthreads = 1;
475 }
476
477#ifdef CONFIG_PPC64
478 /*
479 * On pSeries LPAR, we need to know how many cpus
480 * could possibly be added to this partition.
481 */
482 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
483 (dn = of_find_node_by_path("/rtas"))) {
484 int num_addr_cell, num_size_cell, maxcpus;
485 const __be32 *ireg;
486
487 num_addr_cell = of_n_addr_cells(dn);
488 num_size_cell = of_n_size_cells(dn);
489
490 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
491
492 if (!ireg)
493 goto out;
494
495 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
496
497 /* Double maxcpus for processors which have SMT capability */
498 if (cpu_has_feature(CPU_FTR_SMT))
499 maxcpus *= nthreads;
500
501 if (maxcpus > nr_cpu_ids) {
502 printk(KERN_WARNING
503 "Partition configured for %d cpus, "
504 "operating system maximum is %d.\n",
505 maxcpus, nr_cpu_ids);
506 maxcpus = nr_cpu_ids;
507 } else
508 printk(KERN_INFO "Partition configured for %d cpus.\n",
509 maxcpus);
510
511 for (cpu = 0; cpu < maxcpus; cpu++)
512 set_cpu_possible(cpu, true);
513 out:
514 of_node_put(dn);
515 }
516 vdso_data->processorCount = num_present_cpus();
517#endif /* CONFIG_PPC64 */
518
519 /* Initialize CPU <=> thread mapping/
520 *
521 * WARNING: We assume that the number of threads is the same for
522 * every CPU in the system. If that is not the case, then some code
523 * here will have to be reworked
524 */
525 cpu_init_thread_core_maps(nthreads);
526
527 /* Now that possible cpus are set, set nr_cpu_ids for later use */
528 setup_nr_cpu_ids();
529
530 free_unused_pacas();
531}
532#endif /* CONFIG_SMP */
533
534#ifdef CONFIG_PCSPKR_PLATFORM
535static __init int add_pcspkr(void)
536{
537 struct device_node *np;
538 struct platform_device *pd;
539 int ret;
540
541 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
542 of_node_put(np);
543 if (!np)
544 return -ENODEV;
545
546 pd = platform_device_alloc("pcspkr", -1);
547 if (!pd)
548 return -ENOMEM;
549
550 ret = platform_device_add(pd);
551 if (ret)
552 platform_device_put(pd);
553
554 return ret;
555}
556device_initcall(add_pcspkr);
557#endif /* CONFIG_PCSPKR_PLATFORM */
558
559void probe_machine(void)
560{
561 extern struct machdep_calls __machine_desc_start;
562 extern struct machdep_calls __machine_desc_end;
563
564 /*
565 * Iterate all ppc_md structures until we find the proper
566 * one for the current machine type
567 */
568 DBG("Probing machine type ...\n");
569
570 for (machine_id = &__machine_desc_start;
571 machine_id < &__machine_desc_end;
572 machine_id++) {
573 DBG(" %s ...", machine_id->name);
574 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
575 if (ppc_md.probe()) {
576 DBG(" match !\n");
577 break;
578 }
579 DBG("\n");
580 }
581 /* What can we do if we didn't find ? */
582 if (machine_id >= &__machine_desc_end) {
583 DBG("No suitable machine found !\n");
584 for (;;);
585 }
586
587 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
588}
589
590/* Match a class of boards, not a specific device configuration. */
591int check_legacy_ioport(unsigned long base_port)
592{
593 struct device_node *parent, *np = NULL;
594 int ret = -ENODEV;
595
596 switch(base_port) {
597 case I8042_DATA_REG:
598 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
599 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
600 if (np) {
601 parent = of_get_parent(np);
602
603 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
604 if (!of_i8042_kbd_irq)
605 of_i8042_kbd_irq = 1;
606
607 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
608 if (!of_i8042_aux_irq)
609 of_i8042_aux_irq = 12;
610
611 of_node_put(np);
612 np = parent;
613 break;
614 }
615 np = of_find_node_by_type(NULL, "8042");
616 /* Pegasos has no device_type on its 8042 node, look for the
617 * name instead */
618 if (!np)
619 np = of_find_node_by_name(NULL, "8042");
620 if (np) {
621 of_i8042_kbd_irq = 1;
622 of_i8042_aux_irq = 12;
623 }
624 break;
625 case FDC_BASE: /* FDC1 */
626 np = of_find_node_by_type(NULL, "fdc");
627 break;
628 default:
629 /* ipmi is supposed to fail here */
630 break;
631 }
632 if (!np)
633 return ret;
634 parent = of_get_parent(np);
635 if (parent) {
636 if (strcmp(parent->type, "isa") == 0)
637 ret = 0;
638 of_node_put(parent);
639 }
640 of_node_put(np);
641 return ret;
642}
643EXPORT_SYMBOL(check_legacy_ioport);
644
645static int ppc_panic_event(struct notifier_block *this,
646 unsigned long event, void *ptr)
647{
648 /*
649 * If firmware-assisted dump has been registered then trigger
650 * firmware-assisted dump and let firmware handle everything else.
651 */
652 crash_fadump(NULL, ptr);
653 ppc_md.panic(ptr); /* May not return */
654 return NOTIFY_DONE;
655}
656
657static struct notifier_block ppc_panic_block = {
658 .notifier_call = ppc_panic_event,
659 .priority = INT_MIN /* may not return; must be done last */
660};
661
662void __init setup_panic(void)
663{
664 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
665}
666
667#ifdef CONFIG_CHECK_CACHE_COHERENCY
668/*
669 * For platforms that have configurable cache-coherency. This function
670 * checks that the cache coherency setting of the kernel matches the setting
671 * left by the firmware, as indicated in the device tree. Since a mismatch
672 * will eventually result in DMA failures, we print * and error and call
673 * BUG() in that case.
674 */
675
676#ifdef CONFIG_NOT_COHERENT_CACHE
677#define KERNEL_COHERENCY 0
678#else
679#define KERNEL_COHERENCY 1
680#endif
681
682static int __init check_cache_coherency(void)
683{
684 struct device_node *np;
685 const void *prop;
686 int devtree_coherency;
687
688 np = of_find_node_by_path("/");
689 prop = of_get_property(np, "coherency-off", NULL);
690 of_node_put(np);
691
692 devtree_coherency = prop ? 0 : 1;
693
694 if (devtree_coherency != KERNEL_COHERENCY) {
695 printk(KERN_ERR
696 "kernel coherency:%s != device tree_coherency:%s\n",
697 KERNEL_COHERENCY ? "on" : "off",
698 devtree_coherency ? "on" : "off");
699 BUG();
700 }
701
702 return 0;
703}
704
705late_initcall(check_cache_coherency);
706#endif /* CONFIG_CHECK_CACHE_COHERENCY */
707
708#ifdef CONFIG_DEBUG_FS
709struct dentry *powerpc_debugfs_root;
710EXPORT_SYMBOL(powerpc_debugfs_root);
711
712static int powerpc_debugfs_init(void)
713{
714 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
715
716 return powerpc_debugfs_root == NULL;
717}
718arch_initcall(powerpc_debugfs_init);
719#endif
720
721#ifdef CONFIG_BOOKE_WDT
722extern u32 booke_wdt_enabled;
723extern u32 booke_wdt_period;
724
725/* Checks wdt=x and wdt_period=xx command-line option */
726notrace int __init early_parse_wdt(char *p)
727{
728 if (p && strncmp(p, "0", 1) != 0)
729 booke_wdt_enabled = 1;
730
731 return 0;
732}
733early_param("wdt", early_parse_wdt);
734
735int __init early_parse_wdt_period(char *p)
736{
737 unsigned long ret;
738 if (p) {
739 if (!kstrtol(p, 0, &ret))
740 booke_wdt_period = ret;
741 }
742
743 return 0;
744}
745early_param("wdt_period", early_parse_wdt_period);
746#endif /* CONFIG_BOOKE_WDT */
747
748void ppc_printk_progress(char *s, unsigned short hex)
749{
750 pr_info("%s\n", s);
751}
752
753void arch_setup_pdev_archdata(struct platform_device *pdev)
754{
755 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
756 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
757 set_dma_ops(&pdev->dev, &dma_direct_ops);
758}