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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 */
6
7#ifndef __ASM_ARCH_MXC_H__
8#define __ASM_ARCH_MXC_H__
9
10#include <linux/types.h>
11#include <soc/imx/cpu.h>
12
13#ifndef __ASM_ARCH_MXC_HARDWARE_H__
14#error "Do not include directly."
15#endif
16
17#define IMX_DDR_TYPE_LPDDR2 1
18
19#ifndef __ASSEMBLY__
20
21#ifdef CONFIG_SOC_IMX6SL
22static inline bool cpu_is_imx6sl(void)
23{
24 return __mxc_cpu_type == MXC_CPU_IMX6SL;
25}
26#else
27static inline bool cpu_is_imx6sl(void)
28{
29 return false;
30}
31#endif
32
33static inline bool cpu_is_imx6dl(void)
34{
35 return __mxc_cpu_type == MXC_CPU_IMX6DL;
36}
37
38static inline bool cpu_is_imx6sx(void)
39{
40 return __mxc_cpu_type == MXC_CPU_IMX6SX;
41}
42
43static inline bool cpu_is_imx6ul(void)
44{
45 return __mxc_cpu_type == MXC_CPU_IMX6UL;
46}
47
48static inline bool cpu_is_imx6ull(void)
49{
50 return __mxc_cpu_type == MXC_CPU_IMX6ULL;
51}
52
53static inline bool cpu_is_imx6ulz(void)
54{
55 return __mxc_cpu_type == MXC_CPU_IMX6ULZ;
56}
57
58static inline bool cpu_is_imx6sll(void)
59{
60 return __mxc_cpu_type == MXC_CPU_IMX6SLL;
61}
62
63static inline bool cpu_is_imx6q(void)
64{
65 return __mxc_cpu_type == MXC_CPU_IMX6Q;
66}
67
68static inline bool cpu_is_imx7d(void)
69{
70 return __mxc_cpu_type == MXC_CPU_IMX7D;
71}
72
73struct cpu_op {
74 u32 cpu_rate;
75};
76
77int tzic_enable_wake(void);
78
79extern struct cpu_op *(*get_cpu_op)(int *op);
80#endif
81
82#define imx_readl readl_relaxed
83#define imx_readw readw_relaxed
84#define imx_writel writel_relaxed
85#define imx_writew writew_relaxed
86
87#endif /* __ASM_ARCH_MXC_H__ */
1/*
2 * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20#ifndef __ASM_ARCH_MXC_H__
21#define __ASM_ARCH_MXC_H__
22
23#include <linux/types.h>
24
25#ifndef __ASM_ARCH_MXC_HARDWARE_H__
26#error "Do not include directly."
27#endif
28
29#define MXC_CPU_MX1 1
30#define MXC_CPU_MX21 21
31#define MXC_CPU_MX25 25
32#define MXC_CPU_MX27 27
33#define MXC_CPU_MX31 31
34#define MXC_CPU_MX35 35
35#define MXC_CPU_MX51 51
36#define MXC_CPU_MX53 53
37#define MXC_CPU_IMX6SL 0x60
38#define MXC_CPU_IMX6DL 0x61
39#define MXC_CPU_IMX6Q 0x63
40
41#define IMX_CHIP_REVISION_1_0 0x10
42#define IMX_CHIP_REVISION_1_1 0x11
43#define IMX_CHIP_REVISION_1_2 0x12
44#define IMX_CHIP_REVISION_1_3 0x13
45#define IMX_CHIP_REVISION_2_0 0x20
46#define IMX_CHIP_REVISION_2_1 0x21
47#define IMX_CHIP_REVISION_2_2 0x22
48#define IMX_CHIP_REVISION_2_3 0x23
49#define IMX_CHIP_REVISION_3_0 0x30
50#define IMX_CHIP_REVISION_3_1 0x31
51#define IMX_CHIP_REVISION_3_2 0x32
52#define IMX_CHIP_REVISION_3_3 0x33
53#define IMX_CHIP_REVISION_UNKNOWN 0xff
54
55#ifndef __ASSEMBLY__
56extern unsigned int __mxc_cpu_type;
57#endif
58
59#ifdef CONFIG_SOC_IMX1
60# ifdef mxc_cpu_type
61# undef mxc_cpu_type
62# define mxc_cpu_type __mxc_cpu_type
63# else
64# define mxc_cpu_type MXC_CPU_MX1
65# endif
66# define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1)
67#else
68# define cpu_is_mx1() (0)
69#endif
70
71#ifdef CONFIG_SOC_IMX21
72# ifdef mxc_cpu_type
73# undef mxc_cpu_type
74# define mxc_cpu_type __mxc_cpu_type
75# else
76# define mxc_cpu_type MXC_CPU_MX21
77# endif
78# define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21)
79#else
80# define cpu_is_mx21() (0)
81#endif
82
83#ifdef CONFIG_SOC_IMX25
84# ifdef mxc_cpu_type
85# undef mxc_cpu_type
86# define mxc_cpu_type __mxc_cpu_type
87# else
88# define mxc_cpu_type MXC_CPU_MX25
89# endif
90# define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25)
91#else
92# define cpu_is_mx25() (0)
93#endif
94
95#ifdef CONFIG_SOC_IMX27
96# ifdef mxc_cpu_type
97# undef mxc_cpu_type
98# define mxc_cpu_type __mxc_cpu_type
99# else
100# define mxc_cpu_type MXC_CPU_MX27
101# endif
102# define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27)
103#else
104# define cpu_is_mx27() (0)
105#endif
106
107#ifdef CONFIG_SOC_IMX31
108# ifdef mxc_cpu_type
109# undef mxc_cpu_type
110# define mxc_cpu_type __mxc_cpu_type
111# else
112# define mxc_cpu_type MXC_CPU_MX31
113# endif
114# define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31)
115#else
116# define cpu_is_mx31() (0)
117#endif
118
119#ifdef CONFIG_SOC_IMX35
120# ifdef mxc_cpu_type
121# undef mxc_cpu_type
122# define mxc_cpu_type __mxc_cpu_type
123# else
124# define mxc_cpu_type MXC_CPU_MX35
125# endif
126# define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35)
127#else
128# define cpu_is_mx35() (0)
129#endif
130
131#ifdef CONFIG_SOC_IMX51
132# ifdef mxc_cpu_type
133# undef mxc_cpu_type
134# define mxc_cpu_type __mxc_cpu_type
135# else
136# define mxc_cpu_type MXC_CPU_MX51
137# endif
138# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51)
139#else
140# define cpu_is_mx51() (0)
141#endif
142
143#ifdef CONFIG_SOC_IMX53
144# ifdef mxc_cpu_type
145# undef mxc_cpu_type
146# define mxc_cpu_type __mxc_cpu_type
147# else
148# define mxc_cpu_type MXC_CPU_MX53
149# endif
150# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53)
151#else
152# define cpu_is_mx53() (0)
153#endif
154
155#ifndef __ASSEMBLY__
156static inline bool cpu_is_imx6sl(void)
157{
158 return __mxc_cpu_type == MXC_CPU_IMX6SL;
159}
160
161static inline bool cpu_is_imx6dl(void)
162{
163 return __mxc_cpu_type == MXC_CPU_IMX6DL;
164}
165
166static inline bool cpu_is_imx6q(void)
167{
168 return __mxc_cpu_type == MXC_CPU_IMX6Q;
169}
170
171struct cpu_op {
172 u32 cpu_rate;
173};
174
175int tzic_enable_wake(void);
176
177extern struct cpu_op *(*get_cpu_op)(int *op);
178#endif
179
180#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35())
181#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27())
182
183#endif /* __ASM_ARCH_MXC_H__ */