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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  linux/arch/arm/kernel/module.c
  4 *
  5 *  Copyright (C) 2002 Russell King.
  6 *  Modified for nommu by Hyok S. Choi
  7 *
 
 
 
 
  8 * Module allocation method suggested by Andi Kleen.
  9 */
 10#include <linux/module.h>
 11#include <linux/moduleloader.h>
 12#include <linux/kernel.h>
 13#include <linux/mm.h>
 14#include <linux/elf.h>
 
 15#include <linux/fs.h>
 16#include <linux/string.h>
 
 17
 
 18#include <asm/sections.h>
 19#include <asm/smp_plat.h>
 20#include <asm/unwind.h>
 21#include <asm/opcodes.h>
 22
 23bool module_init_section(const char *name)
 24{
 25	return strstarts(name, ".init") ||
 26		strstarts(name, ".ARM.extab.init") ||
 27		strstarts(name, ".ARM.exidx.init");
 28}
 29
 30bool module_exit_section(const char *name)
 31{
 32	return strstarts(name, ".exit") ||
 33		strstarts(name, ".ARM.extab.exit") ||
 34		strstarts(name, ".ARM.exidx.exit");
 35}
 36
 37#ifdef CONFIG_ARM_HAS_GROUP_RELOCS
 38/*
 39 * This implements the partitioning algorithm for group relocations as
 40 * documented in the ARM AArch32 ELF psABI (IHI 0044).
 41 *
 42 * A single PC-relative symbol reference is divided in up to 3 add or subtract
 43 * operations, where the final one could be incorporated into a load/store
 44 * instruction with immediate offset. E.g.,
 45 *
 46 *   ADD	Rd, PC, #...		or	ADD	Rd, PC, #...
 47 *   ADD	Rd, Rd, #...			ADD	Rd, Rd, #...
 48 *   LDR	Rd, [Rd, #...]			ADD	Rd, Rd, #...
 49 *
 50 * The latter has a guaranteed range of only 16 MiB (3x8 == 24 bits), so it is
 51 * of limited use in the kernel. However, the ADD/ADD/LDR combo has a range of
 52 * -/+ 256 MiB, (2x8 + 12 == 28 bits), which means it has sufficient range for
 53 * any in-kernel symbol reference (unless module PLTs are being used).
 54 *
 55 * The main advantage of this approach over the typical pattern using a literal
 56 * load is that literal loads may miss in the D-cache, and generally lead to
 57 * lower cache efficiency for variables that are referenced often from many
 58 * different places in the code.
 59 */
 60static u32 get_group_rem(u32 group, u32 *offset)
 
 
 
 
 
 61{
 62	u32 val = *offset;
 63	u32 shift;
 64	do {
 65		shift = val ? (31 - __fls(val)) & ~1 : 32;
 66		*offset = val;
 67		if (!val)
 68			break;
 69		val &= 0xffffff >> shift;
 70	} while (group--);
 71	return shift;
 72}
 73#endif
 74
 75int
 76apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
 77	       unsigned int relindex, struct module *module)
 78{
 79	Elf32_Shdr *symsec = sechdrs + symindex;
 80	Elf32_Shdr *relsec = sechdrs + relindex;
 81	Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
 82	Elf32_Rel *rel = (void *)relsec->sh_addr;
 83	unsigned int i;
 84
 85	for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
 86		unsigned long loc;
 87		Elf32_Sym *sym;
 88		const char *symname;
 89#ifdef CONFIG_ARM_HAS_GROUP_RELOCS
 90		u32 shift, group = 1;
 91#endif
 92		s32 offset;
 93		u32 tmp;
 94#ifdef CONFIG_THUMB2_KERNEL
 95		u32 upper, lower, sign, j1, j2;
 96#endif
 97
 98		offset = ELF32_R_SYM(rel->r_info);
 99		if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
100			pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
101				module->name, relindex, i);
102			return -ENOEXEC;
103		}
104
105		sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
106		symname = strtab + sym->st_name;
107
108		if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) {
109			pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
110			       module->name, relindex, i, symname,
111			       rel->r_offset, dstsec->sh_size);
112			return -ENOEXEC;
113		}
114
115		loc = dstsec->sh_addr + rel->r_offset;
116
117		switch (ELF32_R_TYPE(rel->r_info)) {
118		case R_ARM_NONE:
119			/* ignore */
120			break;
121
122		case R_ARM_ABS32:
123		case R_ARM_TARGET1:
124			*(u32 *)loc += sym->st_value;
125			break;
126
127		case R_ARM_PC24:
128		case R_ARM_CALL:
129		case R_ARM_JUMP24:
130			if (sym->st_value & 3) {
131				pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n",
132				       module->name, relindex, i, symname);
133				return -ENOEXEC;
134			}
135
136			offset = __mem_to_opcode_arm(*(u32 *)loc);
137			offset = (offset & 0x00ffffff) << 2;
138			offset = sign_extend32(offset, 25);
 
139
140			offset += sym->st_value - loc;
141
142			/*
143			 * Route through a PLT entry if 'offset' exceeds the
144			 * supported range. Note that 'offset + loc + 8'
145			 * contains the absolute jump target, i.e.,
146			 * @sym + addend, corrected for the +8 PC bias.
147			 */
148			if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
149			    (offset <= (s32)0xfe000000 ||
150			     offset >= (s32)0x02000000))
151				offset = get_module_plt(module, loc,
152							offset + loc + 8)
153					 - loc - 8;
154
155			if (offset <= (s32)0xfe000000 ||
156			    offset >= (s32)0x02000000) {
157				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
158				       module->name, relindex, i, symname,
159				       ELF32_R_TYPE(rel->r_info), loc,
160				       sym->st_value);
161				return -ENOEXEC;
162			}
163
164			offset >>= 2;
165			offset &= 0x00ffffff;
166
167			*(u32 *)loc &= __opcode_to_mem_arm(0xff000000);
168			*(u32 *)loc |= __opcode_to_mem_arm(offset);
169			break;
170
171	       case R_ARM_V4BX:
172		       /* Preserve Rm and the condition code. Alter
173			* other bits to re-code instruction as
174			* MOV PC,Rm.
175			*/
176		       *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f);
177		       *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000);
178		       break;
179
180		case R_ARM_PREL31:
181			offset = (*(s32 *)loc << 1) >> 1; /* sign extend */
182			offset += sym->st_value - loc;
183			if (offset >= 0x40000000 || offset < -0x40000000) {
184				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
185				       module->name, relindex, i, symname,
186				       ELF32_R_TYPE(rel->r_info), loc,
187				       sym->st_value);
188				return -ENOEXEC;
189			}
190			*(u32 *)loc &= 0x80000000;
191			*(u32 *)loc |= offset & 0x7fffffff;
192			break;
193
194		case R_ARM_REL32:
195			*(u32 *)loc += sym->st_value - loc;
196			break;
197
198		case R_ARM_MOVW_ABS_NC:
199		case R_ARM_MOVT_ABS:
200		case R_ARM_MOVW_PREL_NC:
201		case R_ARM_MOVT_PREL:
202			offset = tmp = __mem_to_opcode_arm(*(u32 *)loc);
203			offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
204			offset = sign_extend32(offset, 15);
205
206			offset += sym->st_value;
207			if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_PREL ||
208			    ELF32_R_TYPE(rel->r_info) == R_ARM_MOVW_PREL_NC)
209				offset -= loc;
210			if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS ||
211			    ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_PREL)
212				offset >>= 16;
213
214			tmp &= 0xfff0f000;
215			tmp |= ((offset & 0xf000) << 4) |
216				(offset & 0x0fff);
217
218			*(u32 *)loc = __opcode_to_mem_arm(tmp);
219			break;
220
221#ifdef CONFIG_ARM_HAS_GROUP_RELOCS
222		case R_ARM_ALU_PC_G0_NC:
223			group = 0;
224			fallthrough;
225		case R_ARM_ALU_PC_G1_NC:
226			tmp = __mem_to_opcode_arm(*(u32 *)loc);
227			offset = ror32(tmp & 0xff, (tmp & 0xf00) >> 7);
228			if (tmp & BIT(22))
229				offset = -offset;
230			offset += sym->st_value - loc;
231			if (offset < 0) {
232				offset = -offset;
233				tmp = (tmp & ~BIT(23)) | BIT(22); // SUB opcode
234			} else {
235				tmp = (tmp & ~BIT(22)) | BIT(23); // ADD opcode
236			}
237
238			shift = get_group_rem(group, &offset);
239			if (shift < 24) {
240				offset >>= 24 - shift;
241				offset |= (shift + 8) << 7;
242			}
243			*(u32 *)loc = __opcode_to_mem_arm((tmp & ~0xfff) | offset);
244			break;
245
246		case R_ARM_LDR_PC_G2:
247			tmp = __mem_to_opcode_arm(*(u32 *)loc);
248			offset = tmp & 0xfff;
249			if (~tmp & BIT(23))		// U bit cleared?
250				offset = -offset;
251			offset += sym->st_value - loc;
252			if (offset < 0) {
253				offset = -offset;
254				tmp &= ~BIT(23);	// clear U bit
255			} else {
256				tmp |= BIT(23);		// set U bit
257			}
258			get_group_rem(2, &offset);
259
260			if (offset > 0xfff) {
261				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
262				       module->name, relindex, i, symname,
263				       ELF32_R_TYPE(rel->r_info), loc,
264				       sym->st_value);
265				return -ENOEXEC;
266			}
267			*(u32 *)loc = __opcode_to_mem_arm((tmp & ~0xfff) | offset);
268			break;
269#endif
270#ifdef CONFIG_THUMB2_KERNEL
271		case R_ARM_THM_CALL:
272		case R_ARM_THM_JUMP24:
273			/*
274			 * For function symbols, only Thumb addresses are
275			 * allowed (no interworking).
276			 *
277			 * For non-function symbols, the destination
278			 * has no specific ARM/Thumb disposition, so
279			 * the branch is resolved under the assumption
280			 * that interworking is not required.
281			 */
282			if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
283			    !(sym->st_value & 1)) {
284				pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n",
285				       module->name, relindex, i, symname);
286				return -ENOEXEC;
287			}
288
289			upper = __mem_to_opcode_thumb16(*(u16 *)loc);
290			lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
291
292			/*
293			 * 25 bit signed address range (Thumb-2 BL and B.W
294			 * instructions):
295			 *   S:I1:I2:imm10:imm11:0
296			 * where:
297			 *   S     = upper[10]   = offset[24]
298			 *   I1    = ~(J1 ^ S)   = offset[23]
299			 *   I2    = ~(J2 ^ S)   = offset[22]
300			 *   imm10 = upper[9:0]  = offset[21:12]
301			 *   imm11 = lower[10:0] = offset[11:1]
302			 *   J1    = lower[13]
303			 *   J2    = lower[11]
304			 */
305			sign = (upper >> 10) & 1;
306			j1 = (lower >> 13) & 1;
307			j2 = (lower >> 11) & 1;
308			offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) |
309				((~(j2 ^ sign) & 1) << 22) |
310				((upper & 0x03ff) << 12) |
311				((lower & 0x07ff) << 1);
312			offset = sign_extend32(offset, 24);
 
313			offset += sym->st_value - loc;
314
315			/*
316			 * Route through a PLT entry if 'offset' exceeds the
317			 * supported range.
 
 
 
 
 
318			 */
319			if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
320			    (offset <= (s32)0xff000000 ||
321			     offset >= (s32)0x01000000))
322				offset = get_module_plt(module, loc,
323							offset + loc + 4)
324					 - loc - 4;
325
326			if (offset <= (s32)0xff000000 ||
327			    offset >= (s32)0x01000000) {
328				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
329				       module->name, relindex, i, symname,
330				       ELF32_R_TYPE(rel->r_info), loc,
331				       sym->st_value);
332				return -ENOEXEC;
333			}
334
335			sign = (offset >> 24) & 1;
336			j1 = sign ^ (~(offset >> 23) & 1);
337			j2 = sign ^ (~(offset >> 22) & 1);
338			upper = (u16)((upper & 0xf800) | (sign << 10) |
339					    ((offset >> 12) & 0x03ff));
340			lower = (u16)((lower & 0xd000) |
341				      (j1 << 13) | (j2 << 11) |
342				      ((offset >> 1) & 0x07ff));
343
344			*(u16 *)loc = __opcode_to_mem_thumb16(upper);
345			*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
346			break;
347
348		case R_ARM_THM_MOVW_ABS_NC:
349		case R_ARM_THM_MOVT_ABS:
350		case R_ARM_THM_MOVW_PREL_NC:
351		case R_ARM_THM_MOVT_PREL:
352			upper = __mem_to_opcode_thumb16(*(u16 *)loc);
353			lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
354
355			/*
356			 * MOVT/MOVW instructions encoding in Thumb-2:
357			 *
358			 * i	= upper[10]
359			 * imm4	= upper[3:0]
360			 * imm3	= lower[14:12]
361			 * imm8	= lower[7:0]
362			 *
363			 * imm16 = imm4:i:imm3:imm8
364			 */
365			offset = ((upper & 0x000f) << 12) |
366				((upper & 0x0400) << 1) |
367				((lower & 0x7000) >> 4) | (lower & 0x00ff);
368			offset = sign_extend32(offset, 15);
369			offset += sym->st_value;
370
371			if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_PREL ||
372			    ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVW_PREL_NC)
373				offset -= loc;
374			if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS ||
375			    ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_PREL)
376				offset >>= 16;
377
378			upper = (u16)((upper & 0xfbf0) |
379				      ((offset & 0xf000) >> 12) |
380				      ((offset & 0x0800) >> 1));
381			lower = (u16)((lower & 0x8f00) |
382				      ((offset & 0x0700) << 4) |
383				      (offset & 0x00ff));
384			*(u16 *)loc = __opcode_to_mem_thumb16(upper);
385			*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
386			break;
387#endif
388
389		default:
390			pr_err("%s: unknown relocation: %u\n",
391			       module->name, ELF32_R_TYPE(rel->r_info));
392			return -ENOEXEC;
393		}
394	}
395	return 0;
396}
397
 
 
 
 
 
398static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
399	const Elf_Shdr *sechdrs, const char *name)
400{
401	const Elf_Shdr *s, *se;
402	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
403
404	for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
405		if (strcmp(name, secstrs + s->sh_name) == 0)
406			return s;
407
408	return NULL;
409}
410
411extern void fixup_pv_table(const void *, unsigned long);
412extern void fixup_smp(const void *, unsigned long);
413
414int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
415		    struct module *mod)
416{
417	const Elf_Shdr *s = NULL;
418#ifdef CONFIG_ARM_UNWIND
419	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
420	const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
421	struct list_head *unwind_list = &mod->arch.unwind_list;
 
422
423	INIT_LIST_HEAD(unwind_list);
424	mod->arch.init_table = NULL;
425
426	for (s = sechdrs; s < sechdrs_end; s++) {
427		const char *secname = secstrs + s->sh_name;
428		const char *txtname;
429		const Elf_Shdr *txt_sec;
430
431		if (!(s->sh_flags & SHF_ALLOC) ||
432		    s->sh_type != ELF_SECTION_UNWIND)
433			continue;
434
435		if (!strcmp(".ARM.exidx", secname))
436			txtname = ".text";
437		else
438			txtname = secname + strlen(".ARM.exidx");
439		txt_sec = find_mod_section(hdr, sechdrs, txtname);
440
441		if (txt_sec) {
442			struct unwind_table *table =
443				unwind_table_add(s->sh_addr,
444						s->sh_size,
445						txt_sec->sh_addr,
446						txt_sec->sh_size);
447
448			list_add(&table->mod_list, unwind_list);
449
450			/* save init table for module_arch_freeing_init */
451			if (strcmp(".ARM.exidx.init.text", secname) == 0)
452				mod->arch.init_table = table;
453		}
 
454	}
 
 
 
 
 
 
 
 
455#endif
456#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
457	s = find_mod_section(hdr, sechdrs, ".pv_table");
458	if (s)
459		fixup_pv_table((void *)s->sh_addr, s->sh_size);
460#endif
461	s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
462	if (s && !is_smp())
463#ifdef CONFIG_SMP_ON_UP
464		fixup_smp((void *)s->sh_addr, s->sh_size);
465#else
466		return -EINVAL;
467#endif
468	return 0;
469}
470
471void
472module_arch_cleanup(struct module *mod)
473{
474#ifdef CONFIG_ARM_UNWIND
475	struct unwind_table *tmp;
476	struct unwind_table *n;
477
478	list_for_each_entry_safe(tmp, n,
479			&mod->arch.unwind_list, mod_list) {
480		list_del(&tmp->mod_list);
481		unwind_table_del(tmp);
482	}
483	mod->arch.init_table = NULL;
484#endif
485}
486
487void __weak module_arch_freeing_init(struct module *mod)
488{
489#ifdef CONFIG_ARM_UNWIND
490	struct unwind_table *init = mod->arch.init_table;
491
492	if (init) {
493		mod->arch.init_table = NULL;
494		list_del(&init->mod_list);
495		unwind_table_del(init);
496	}
497#endif
498}
v3.15
 
  1/*
  2 *  linux/arch/arm/kernel/module.c
  3 *
  4 *  Copyright (C) 2002 Russell King.
  5 *  Modified for nommu by Hyok S. Choi
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License version 2 as
  9 * published by the Free Software Foundation.
 10 *
 11 * Module allocation method suggested by Andi Kleen.
 12 */
 13#include <linux/module.h>
 14#include <linux/moduleloader.h>
 15#include <linux/kernel.h>
 16#include <linux/mm.h>
 17#include <linux/elf.h>
 18#include <linux/vmalloc.h>
 19#include <linux/fs.h>
 20#include <linux/string.h>
 21#include <linux/gfp.h>
 22
 23#include <asm/pgtable.h>
 24#include <asm/sections.h>
 25#include <asm/smp_plat.h>
 26#include <asm/unwind.h>
 27#include <asm/opcodes.h>
 28
 29#ifdef CONFIG_XIP_KERNEL
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 30/*
 31 * The XIP kernel text is mapped in the module area for modules and
 32 * some other stuff to work without any indirect relocations.
 33 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
 34 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 35 */
 36#undef MODULES_VADDR
 37#define MODULES_VADDR	(((unsigned long)_etext + ~PMD_MASK) & PMD_MASK)
 38#endif
 39
 40#ifdef CONFIG_MMU
 41void *module_alloc(unsigned long size)
 42{
 43	return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
 44				GFP_KERNEL, PAGE_KERNEL_EXEC, NUMA_NO_NODE,
 45				__builtin_return_address(0));
 
 
 
 
 
 
 
 46}
 47#endif
 48
 49int
 50apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
 51	       unsigned int relindex, struct module *module)
 52{
 53	Elf32_Shdr *symsec = sechdrs + symindex;
 54	Elf32_Shdr *relsec = sechdrs + relindex;
 55	Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
 56	Elf32_Rel *rel = (void *)relsec->sh_addr;
 57	unsigned int i;
 58
 59	for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
 60		unsigned long loc;
 61		Elf32_Sym *sym;
 62		const char *symname;
 
 
 
 63		s32 offset;
 64		u32 tmp;
 65#ifdef CONFIG_THUMB2_KERNEL
 66		u32 upper, lower, sign, j1, j2;
 67#endif
 68
 69		offset = ELF32_R_SYM(rel->r_info);
 70		if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
 71			pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
 72				module->name, relindex, i);
 73			return -ENOEXEC;
 74		}
 75
 76		sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
 77		symname = strtab + sym->st_name;
 78
 79		if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) {
 80			pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
 81			       module->name, relindex, i, symname,
 82			       rel->r_offset, dstsec->sh_size);
 83			return -ENOEXEC;
 84		}
 85
 86		loc = dstsec->sh_addr + rel->r_offset;
 87
 88		switch (ELF32_R_TYPE(rel->r_info)) {
 89		case R_ARM_NONE:
 90			/* ignore */
 91			break;
 92
 93		case R_ARM_ABS32:
 
 94			*(u32 *)loc += sym->st_value;
 95			break;
 96
 97		case R_ARM_PC24:
 98		case R_ARM_CALL:
 99		case R_ARM_JUMP24:
 
 
 
 
 
 
100			offset = __mem_to_opcode_arm(*(u32 *)loc);
101			offset = (offset & 0x00ffffff) << 2;
102			if (offset & 0x02000000)
103				offset -= 0x04000000;
104
105			offset += sym->st_value - loc;
106			if (offset & 3 ||
107			    offset <= (s32)0xfe000000 ||
 
 
 
 
 
 
 
 
 
 
 
 
 
108			    offset >= (s32)0x02000000) {
109				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
110				       module->name, relindex, i, symname,
111				       ELF32_R_TYPE(rel->r_info), loc,
112				       sym->st_value);
113				return -ENOEXEC;
114			}
115
116			offset >>= 2;
117			offset &= 0x00ffffff;
118
119			*(u32 *)loc &= __opcode_to_mem_arm(0xff000000);
120			*(u32 *)loc |= __opcode_to_mem_arm(offset);
121			break;
122
123	       case R_ARM_V4BX:
124		       /* Preserve Rm and the condition code. Alter
125			* other bits to re-code instruction as
126			* MOV PC,Rm.
127			*/
128		       *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f);
129		       *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000);
130		       break;
131
132		case R_ARM_PREL31:
133			offset = *(u32 *)loc + sym->st_value - loc;
134			*(u32 *)loc = offset & 0x7fffffff;
 
 
 
 
 
 
 
 
 
 
 
 
 
135			break;
136
137		case R_ARM_MOVW_ABS_NC:
138		case R_ARM_MOVT_ABS:
 
 
139			offset = tmp = __mem_to_opcode_arm(*(u32 *)loc);
140			offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
141			offset = (offset ^ 0x8000) - 0x8000;
142
143			offset += sym->st_value;
144			if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
 
 
 
 
145				offset >>= 16;
146
147			tmp &= 0xfff0f000;
148			tmp |= ((offset & 0xf000) << 4) |
149				(offset & 0x0fff);
150
151			*(u32 *)loc = __opcode_to_mem_arm(tmp);
152			break;
153
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
154#ifdef CONFIG_THUMB2_KERNEL
155		case R_ARM_THM_CALL:
156		case R_ARM_THM_JUMP24:
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
157			upper = __mem_to_opcode_thumb16(*(u16 *)loc);
158			lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
159
160			/*
161			 * 25 bit signed address range (Thumb-2 BL and B.W
162			 * instructions):
163			 *   S:I1:I2:imm10:imm11:0
164			 * where:
165			 *   S     = upper[10]   = offset[24]
166			 *   I1    = ~(J1 ^ S)   = offset[23]
167			 *   I2    = ~(J2 ^ S)   = offset[22]
168			 *   imm10 = upper[9:0]  = offset[21:12]
169			 *   imm11 = lower[10:0] = offset[11:1]
170			 *   J1    = lower[13]
171			 *   J2    = lower[11]
172			 */
173			sign = (upper >> 10) & 1;
174			j1 = (lower >> 13) & 1;
175			j2 = (lower >> 11) & 1;
176			offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) |
177				((~(j2 ^ sign) & 1) << 22) |
178				((upper & 0x03ff) << 12) |
179				((lower & 0x07ff) << 1);
180			if (offset & 0x01000000)
181				offset -= 0x02000000;
182			offset += sym->st_value - loc;
183
184			/*
185			 * For function symbols, only Thumb addresses are
186			 * allowed (no interworking).
187			 *
188			 * For non-function symbols, the destination
189			 * has no specific ARM/Thumb disposition, so
190			 * the branch is resolved under the assumption
191			 * that interworking is not required.
192			 */
193			if ((ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
194				!(offset & 1)) ||
195			    offset <= (s32)0xff000000 ||
 
 
 
 
 
196			    offset >= (s32)0x01000000) {
197				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
198				       module->name, relindex, i, symname,
199				       ELF32_R_TYPE(rel->r_info), loc,
200				       sym->st_value);
201				return -ENOEXEC;
202			}
203
204			sign = (offset >> 24) & 1;
205			j1 = sign ^ (~(offset >> 23) & 1);
206			j2 = sign ^ (~(offset >> 22) & 1);
207			upper = (u16)((upper & 0xf800) | (sign << 10) |
208					    ((offset >> 12) & 0x03ff));
209			lower = (u16)((lower & 0xd000) |
210				      (j1 << 13) | (j2 << 11) |
211				      ((offset >> 1) & 0x07ff));
212
213			*(u16 *)loc = __opcode_to_mem_thumb16(upper);
214			*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
215			break;
216
217		case R_ARM_THM_MOVW_ABS_NC:
218		case R_ARM_THM_MOVT_ABS:
 
 
219			upper = __mem_to_opcode_thumb16(*(u16 *)loc);
220			lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
221
222			/*
223			 * MOVT/MOVW instructions encoding in Thumb-2:
224			 *
225			 * i	= upper[10]
226			 * imm4	= upper[3:0]
227			 * imm3	= lower[14:12]
228			 * imm8	= lower[7:0]
229			 *
230			 * imm16 = imm4:i:imm3:imm8
231			 */
232			offset = ((upper & 0x000f) << 12) |
233				((upper & 0x0400) << 1) |
234				((lower & 0x7000) >> 4) | (lower & 0x00ff);
235			offset = (offset ^ 0x8000) - 0x8000;
236			offset += sym->st_value;
237
238			if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
 
 
 
 
239				offset >>= 16;
240
241			upper = (u16)((upper & 0xfbf0) |
242				      ((offset & 0xf000) >> 12) |
243				      ((offset & 0x0800) >> 1));
244			lower = (u16)((lower & 0x8f00) |
245				      ((offset & 0x0700) << 4) |
246				      (offset & 0x00ff));
247			*(u16 *)loc = __opcode_to_mem_thumb16(upper);
248			*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
249			break;
250#endif
251
252		default:
253			printk(KERN_ERR "%s: unknown relocation: %u\n",
254			       module->name, ELF32_R_TYPE(rel->r_info));
255			return -ENOEXEC;
256		}
257	}
258	return 0;
259}
260
261struct mod_unwind_map {
262	const Elf_Shdr *unw_sec;
263	const Elf_Shdr *txt_sec;
264};
265
266static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
267	const Elf_Shdr *sechdrs, const char *name)
268{
269	const Elf_Shdr *s, *se;
270	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
271
272	for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
273		if (strcmp(name, secstrs + s->sh_name) == 0)
274			return s;
275
276	return NULL;
277}
278
279extern void fixup_pv_table(const void *, unsigned long);
280extern void fixup_smp(const void *, unsigned long);
281
282int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
283		    struct module *mod)
284{
285	const Elf_Shdr *s = NULL;
286#ifdef CONFIG_ARM_UNWIND
287	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
288	const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
289	struct mod_unwind_map maps[ARM_SEC_MAX];
290	int i;
291
292	memset(maps, 0, sizeof(maps));
 
293
294	for (s = sechdrs; s < sechdrs_end; s++) {
295		const char *secname = secstrs + s->sh_name;
 
 
296
297		if (!(s->sh_flags & SHF_ALLOC))
 
298			continue;
299
300		if (strcmp(".ARM.exidx.init.text", secname) == 0)
301			maps[ARM_SEC_INIT].unw_sec = s;
302		else if (strcmp(".ARM.exidx", secname) == 0)
303			maps[ARM_SEC_CORE].unw_sec = s;
304		else if (strcmp(".ARM.exidx.exit.text", secname) == 0)
305			maps[ARM_SEC_EXIT].unw_sec = s;
306		else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0)
307			maps[ARM_SEC_UNLIKELY].unw_sec = s;
308		else if (strcmp(".ARM.exidx.text.hot", secname) == 0)
309			maps[ARM_SEC_HOT].unw_sec = s;
310		else if (strcmp(".init.text", secname) == 0)
311			maps[ARM_SEC_INIT].txt_sec = s;
312		else if (strcmp(".text", secname) == 0)
313			maps[ARM_SEC_CORE].txt_sec = s;
314		else if (strcmp(".exit.text", secname) == 0)
315			maps[ARM_SEC_EXIT].txt_sec = s;
316		else if (strcmp(".text.unlikely", secname) == 0)
317			maps[ARM_SEC_UNLIKELY].txt_sec = s;
318		else if (strcmp(".text.hot", secname) == 0)
319			maps[ARM_SEC_HOT].txt_sec = s;
320	}
321
322	for (i = 0; i < ARM_SEC_MAX; i++)
323		if (maps[i].unw_sec && maps[i].txt_sec)
324			mod->arch.unwind[i] =
325				unwind_table_add(maps[i].unw_sec->sh_addr,
326					         maps[i].unw_sec->sh_size,
327					         maps[i].txt_sec->sh_addr,
328					         maps[i].txt_sec->sh_size);
329#endif
330#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
331	s = find_mod_section(hdr, sechdrs, ".pv_table");
332	if (s)
333		fixup_pv_table((void *)s->sh_addr, s->sh_size);
334#endif
335	s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
336	if (s && !is_smp())
337#ifdef CONFIG_SMP_ON_UP
338		fixup_smp((void *)s->sh_addr, s->sh_size);
339#else
340		return -EINVAL;
341#endif
342	return 0;
343}
344
345void
346module_arch_cleanup(struct module *mod)
347{
348#ifdef CONFIG_ARM_UNWIND
349	int i;
 
 
 
 
 
 
 
 
 
 
350
351	for (i = 0; i < ARM_SEC_MAX; i++)
352		if (mod->arch.unwind[i])
353			unwind_table_del(mod->arch.unwind[i]);
 
 
 
 
 
 
 
354#endif
355}