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1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include "imx6sl.dtsi"
14
15/ {
16 model = "Freescale i.MX6 SoloLite EVK Board";
17 compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
18
19 memory {
20 reg = <0x80000000 0x40000000>;
21 };
22
23 leds {
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_led>;
27
28 user {
29 label = "debug";
30 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
31 linux,default-trigger = "heartbeat";
32 };
33 };
34
35 regulators {
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <0>;
39
40 reg_usb_otg1_vbus: regulator@0 {
41 compatible = "regulator-fixed";
42 reg = <0>;
43 regulator-name = "usb_otg1_vbus";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 gpio = <&gpio4 0 0>;
47 enable-active-high;
48 };
49
50 reg_usb_otg2_vbus: regulator@1 {
51 compatible = "regulator-fixed";
52 reg = <1>;
53 regulator-name = "usb_otg2_vbus";
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
56 gpio = <&gpio4 2 0>;
57 enable-active-high;
58 };
59
60 reg_aud3v: regulator@2 {
61 compatible = "regulator-fixed";
62 reg = <2>;
63 regulator-name = "wm8962-supply-3v15";
64 regulator-min-microvolt = <3150000>;
65 regulator-max-microvolt = <3150000>;
66 regulator-boot-on;
67 };
68
69 reg_aud4v: regulator@3 {
70 compatible = "regulator-fixed";
71 reg = <3>;
72 regulator-name = "wm8962-supply-4v2";
73 regulator-min-microvolt = <4325000>;
74 regulator-max-microvolt = <4325000>;
75 regulator-boot-on;
76 };
77 };
78
79 sound {
80 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
81 model = "wm8962-audio";
82 ssi-controller = <&ssi2>;
83 audio-codec = <&codec>;
84 audio-routing =
85 "Headphone Jack", "HPOUTL",
86 "Headphone Jack", "HPOUTR",
87 "Ext Spk", "SPKOUTL",
88 "Ext Spk", "SPKOUTR",
89 "AMIC", "MICBIAS",
90 "IN3R", "AMIC";
91 mux-int-port = <2>;
92 mux-ext-port = <3>;
93 };
94};
95
96&audmux {
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_audmux3>;
99 status = "okay";
100};
101
102&ecspi1 {
103 fsl,spi-num-chipselects = <1>;
104 cs-gpios = <&gpio4 11 0>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_ecspi1>;
107 status = "okay";
108
109 flash: m25p80@0 {
110 #address-cells = <1>;
111 #size-cells = <1>;
112 compatible = "st,m25p32";
113 spi-max-frequency = <20000000>;
114 reg = <0>;
115 };
116};
117
118&fec {
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_fec>;
121 phy-mode = "rmii";
122 status = "okay";
123};
124
125&i2c1 {
126 clock-frequency = <100000>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c1>;
129 status = "okay";
130
131 pmic: pfuze100@08 {
132 compatible = "fsl,pfuze100";
133 reg = <0x08>;
134
135 regulators {
136 sw1a_reg: sw1ab {
137 regulator-min-microvolt = <300000>;
138 regulator-max-microvolt = <1875000>;
139 regulator-boot-on;
140 regulator-always-on;
141 regulator-ramp-delay = <6250>;
142 };
143
144 sw1c_reg: sw1c {
145 regulator-min-microvolt = <300000>;
146 regulator-max-microvolt = <1875000>;
147 regulator-boot-on;
148 regulator-always-on;
149 regulator-ramp-delay = <6250>;
150 };
151
152 sw2_reg: sw2 {
153 regulator-min-microvolt = <800000>;
154 regulator-max-microvolt = <3300000>;
155 regulator-boot-on;
156 regulator-always-on;
157 };
158
159 sw3a_reg: sw3a {
160 regulator-min-microvolt = <400000>;
161 regulator-max-microvolt = <1975000>;
162 regulator-boot-on;
163 regulator-always-on;
164 };
165
166 sw3b_reg: sw3b {
167 regulator-min-microvolt = <400000>;
168 regulator-max-microvolt = <1975000>;
169 regulator-boot-on;
170 regulator-always-on;
171 };
172
173 sw4_reg: sw4 {
174 regulator-min-microvolt = <800000>;
175 regulator-max-microvolt = <3300000>;
176 };
177
178 swbst_reg: swbst {
179 regulator-min-microvolt = <5000000>;
180 regulator-max-microvolt = <5150000>;
181 };
182
183 snvs_reg: vsnvs {
184 regulator-min-microvolt = <1000000>;
185 regulator-max-microvolt = <3000000>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189
190 vref_reg: vrefddr {
191 regulator-boot-on;
192 regulator-always-on;
193 };
194
195 vgen1_reg: vgen1 {
196 regulator-min-microvolt = <800000>;
197 regulator-max-microvolt = <1550000>;
198 regulator-always-on;
199 };
200
201 vgen2_reg: vgen2 {
202 regulator-min-microvolt = <800000>;
203 regulator-max-microvolt = <1550000>;
204 };
205
206 vgen3_reg: vgen3 {
207 regulator-min-microvolt = <1800000>;
208 regulator-max-microvolt = <3300000>;
209 };
210
211 vgen4_reg: vgen4 {
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <3300000>;
214 regulator-always-on;
215 };
216
217 vgen5_reg: vgen5 {
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <3300000>;
220 regulator-always-on;
221 };
222
223 vgen6_reg: vgen6 {
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <3300000>;
226 regulator-always-on;
227 };
228 };
229 };
230};
231
232&i2c2 {
233 clock-frequency = <100000>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_i2c2>;
236 status = "okay";
237
238 codec: wm8962@1a {
239 compatible = "wlf,wm8962";
240 reg = <0x1a>;
241 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
242 DCVDD-supply = <&vgen3_reg>;
243 DBVDD-supply = <®_aud3v>;
244 AVDD-supply = <&vgen3_reg>;
245 CPVDD-supply = <&vgen3_reg>;
246 MICVDD-supply = <®_aud3v>;
247 PLLVDD-supply = <&vgen3_reg>;
248 SPKVDD1-supply = <®_aud4v>;
249 SPKVDD2-supply = <®_aud4v>;
250 };
251};
252
253&iomuxc {
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_hog>;
256
257 imx6sl-evk {
258 pinctrl_hog: hoggrp {
259 fsl,pins = <
260 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
261 MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
262 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
263 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
264 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
265 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
266 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
267 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
268 >;
269 };
270
271 pinctrl_audmux3: audmux3grp {
272 fsl,pins = <
273 MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
274 MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
275 MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
276 MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
277 >;
278 };
279
280 pinctrl_ecspi1: ecspi1grp {
281 fsl,pins = <
282 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
283 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
284 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
285 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
286 >;
287 };
288
289 pinctrl_fec: fecgrp {
290 fsl,pins = <
291 MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
292 MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
293 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
294 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
295 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
296 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
297 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
298 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
299 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
300 >;
301 };
302
303 pinctrl_i2c1: i2c1grp {
304 fsl,pins = <
305 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
306 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
307 >;
308 };
309
310
311 pinctrl_i2c2: i2c2grp {
312 fsl,pins = <
313 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
314 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
315 >;
316 };
317
318 pinctrl_led: ledgrp {
319 fsl,pins = <
320 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
321 >;
322 };
323
324 pinctrl_kpp: kppgrp {
325 fsl,pins = <
326 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
327 MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
328 MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
329 MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
330 MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
331 MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
332 >;
333 };
334
335 pinctrl_uart1: uart1grp {
336 fsl,pins = <
337 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
338 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
339 >;
340 };
341
342 pinctrl_usbotg1: usbotg1grp {
343 fsl,pins = <
344 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
345 >;
346 };
347
348 pinctrl_usdhc1: usdhc1grp {
349 fsl,pins = <
350 MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
351 MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
352 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
353 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
354 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
355 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
356 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
357 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
358 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
359 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
360 >;
361 };
362
363 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
364 fsl,pins = <
365 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
366 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
367 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
368 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
369 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
370 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
371 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
372 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
373 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
374 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
375 >;
376 };
377
378 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
379 fsl,pins = <
380 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
381 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
382 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
383 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
384 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
385 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
386 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
387 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
388 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
389 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
390 >;
391 };
392
393 pinctrl_usdhc2: usdhc2grp {
394 fsl,pins = <
395 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
396 MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
397 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
398 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
399 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
400 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
401 >;
402 };
403
404 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
405 fsl,pins = <
406 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
407 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
408 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
409 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
410 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
411 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
412 >;
413 };
414
415 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
416 fsl,pins = <
417 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
418 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
419 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
420 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
421 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
422 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
423 >;
424 };
425
426 pinctrl_usdhc3: usdhc3grp {
427 fsl,pins = <
428 MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
429 MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
430 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
431 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
432 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
433 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
434 >;
435 };
436
437 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
438 fsl,pins = <
439 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
440 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
441 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
442 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
443 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
444 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
445 >;
446 };
447
448 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
449 fsl,pins = <
450 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
451 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
452 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
453 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
454 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
455 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
456 >;
457 };
458 };
459};
460
461&kpp {
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_kpp>;
464 linux,keymap = <
465 MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
466 MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
467 MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
468 MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
469 MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
470 MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
471 MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
472 MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
473 >;
474 status = "okay";
475};
476
477&ssi2 {
478 fsl,mode = "i2s-slave";
479 status = "okay";
480};
481
482&uart1 {
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_uart1>;
485 status = "okay";
486};
487
488&usbotg1 {
489 vbus-supply = <®_usb_otg1_vbus>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&pinctrl_usbotg1>;
492 disable-over-current;
493 status = "okay";
494};
495
496&usbotg2 {
497 vbus-supply = <®_usb_otg2_vbus>;
498 dr_mode = "host";
499 disable-over-current;
500 status = "okay";
501};
502
503&usdhc1 {
504 pinctrl-names = "default", "state_100mhz", "state_200mhz";
505 pinctrl-0 = <&pinctrl_usdhc1>;
506 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
507 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
508 bus-width = <8>;
509 cd-gpios = <&gpio4 7 0>;
510 wp-gpios = <&gpio4 6 0>;
511 status = "okay";
512};
513
514&usdhc2 {
515 pinctrl-names = "default", "state_100mhz", "state_200mhz";
516 pinctrl-0 = <&pinctrl_usdhc2>;
517 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
518 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
519 cd-gpios = <&gpio5 0 0>;
520 wp-gpios = <&gpio4 29 0>;
521 status = "okay";
522};
523
524&usdhc3 {
525 pinctrl-names = "default", "state_100mhz", "state_200mhz";
526 pinctrl-0 = <&pinctrl_usdhc3>;
527 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
528 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
529 cd-gpios = <&gpio3 22 0>;
530 status = "okay";
531};