Loading...
Note: File does not exist in v3.1.
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2/*
3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2023, Linaro Limited
5 */
6
7#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SA8775P_H
8#define __DT_BINDINGS_INTERCONNECT_QCOM_SA8775P_H
9
10/* aggre1_noc */
11#define MASTER_QUP_3 0
12#define MASTER_EMAC 1
13#define MASTER_EMAC_1 2
14#define MASTER_SDC 3
15#define MASTER_UFS_MEM 4
16#define MASTER_USB2 5
17#define MASTER_USB3_0 6
18#define MASTER_USB3_1 7
19#define SLAVE_A1NOC_SNOC 8
20
21/* aggre2_noc */
22#define MASTER_QDSS_BAM 0
23#define MASTER_QUP_0 1
24#define MASTER_QUP_1 2
25#define MASTER_QUP_2 3
26#define MASTER_CNOC_A2NOC 4
27#define MASTER_CRYPTO_CORE0 5
28#define MASTER_CRYPTO_CORE1 6
29#define MASTER_IPA 7
30#define MASTER_QDSS_ETR_0 8
31#define MASTER_QDSS_ETR_1 9
32#define MASTER_UFS_CARD 10
33#define SLAVE_A2NOC_SNOC 11
34
35/* clk_virt */
36#define MASTER_QUP_CORE_0 0
37#define MASTER_QUP_CORE_1 1
38#define MASTER_QUP_CORE_2 2
39#define MASTER_QUP_CORE_3 3
40#define SLAVE_QUP_CORE_0 4
41#define SLAVE_QUP_CORE_1 5
42#define SLAVE_QUP_CORE_2 6
43#define SLAVE_QUP_CORE_3 7
44
45/* config_noc */
46#define MASTER_GEM_NOC_CNOC 0
47#define MASTER_GEM_NOC_PCIE_SNOC 1
48#define SLAVE_AHB2PHY_0 2
49#define SLAVE_AHB2PHY_1 3
50#define SLAVE_AHB2PHY_2 4
51#define SLAVE_AHB2PHY_3 5
52#define SLAVE_ANOC_THROTTLE_CFG 6
53#define SLAVE_AOSS 7
54#define SLAVE_APPSS 8
55#define SLAVE_BOOT_ROM 9
56#define SLAVE_CAMERA_CFG 10
57#define SLAVE_CAMERA_NRT_THROTTLE_CFG 11
58#define SLAVE_CAMERA_RT_THROTTLE_CFG 12
59#define SLAVE_CLK_CTL 13
60#define SLAVE_CDSP_CFG 14
61#define SLAVE_CDSP1_CFG 15
62#define SLAVE_RBCPR_CX_CFG 16
63#define SLAVE_RBCPR_MMCX_CFG 17
64#define SLAVE_RBCPR_MX_CFG 18
65#define SLAVE_CPR_NSPCX 19
66#define SLAVE_CRYPTO_0_CFG 20
67#define SLAVE_CX_RDPM 21
68#define SLAVE_DISPLAY_CFG 22
69#define SLAVE_DISPLAY_RT_THROTTLE_CFG 23
70#define SLAVE_DISPLAY1_CFG 24
71#define SLAVE_DISPLAY1_RT_THROTTLE_CFG 25
72#define SLAVE_EMAC_CFG 26
73#define SLAVE_EMAC1_CFG 27
74#define SLAVE_GP_DSP0_CFG 28
75#define SLAVE_GP_DSP1_CFG 29
76#define SLAVE_GPDSP0_THROTTLE_CFG 30
77#define SLAVE_GPDSP1_THROTTLE_CFG 31
78#define SLAVE_GPU_TCU_THROTTLE_CFG 32
79#define SLAVE_GFX3D_CFG 33
80#define SLAVE_HWKM 34
81#define SLAVE_IMEM_CFG 35
82#define SLAVE_IPA_CFG 36
83#define SLAVE_IPC_ROUTER_CFG 37
84#define SLAVE_LPASS 38
85#define SLAVE_LPASS_THROTTLE_CFG 39
86#define SLAVE_MX_RDPM 40
87#define SLAVE_MXC_RDPM 41
88#define SLAVE_PCIE_0_CFG 42
89#define SLAVE_PCIE_1_CFG 43
90#define SLAVE_PCIE_RSC_CFG 44
91#define SLAVE_PCIE_TCU_THROTTLE_CFG 45
92#define SLAVE_PCIE_THROTTLE_CFG 46
93#define SLAVE_PDM 47
94#define SLAVE_PIMEM_CFG 48
95#define SLAVE_PKA_WRAPPER_CFG 49
96#define SLAVE_QDSS_CFG 50
97#define SLAVE_QM_CFG 51
98#define SLAVE_QM_MPU_CFG 52
99#define SLAVE_QUP_0 53
100#define SLAVE_QUP_1 54
101#define SLAVE_QUP_2 55
102#define SLAVE_QUP_3 56
103#define SLAVE_SAIL_THROTTLE_CFG 57
104#define SLAVE_SDC1 58
105#define SLAVE_SECURITY 59
106#define SLAVE_SNOC_THROTTLE_CFG 60
107#define SLAVE_TCSR 61
108#define SLAVE_TLMM 62
109#define SLAVE_TSC_CFG 63
110#define SLAVE_UFS_CARD_CFG 64
111#define SLAVE_UFS_MEM_CFG 65
112#define SLAVE_USB2 66
113#define SLAVE_USB3_0 67
114#define SLAVE_USB3_1 68
115#define SLAVE_VENUS_CFG 69
116#define SLAVE_VENUS_CVP_THROTTLE_CFG 70
117#define SLAVE_VENUS_V_CPU_THROTTLE_CFG 71
118#define SLAVE_VENUS_VCODEC_THROTTLE_CFG 72
119#define SLAVE_DDRSS_CFG 73
120#define SLAVE_GPDSP_NOC_CFG 74
121#define SLAVE_CNOC_MNOC_HF_CFG 75
122#define SLAVE_CNOC_MNOC_SF_CFG 76
123#define SLAVE_PCIE_ANOC_CFG 77
124#define SLAVE_SNOC_CFG 78
125#define SLAVE_BOOT_IMEM 79
126#define SLAVE_IMEM 80
127#define SLAVE_PIMEM 81
128#define SLAVE_PCIE_0 82
129#define SLAVE_PCIE_1 83
130#define SLAVE_QDSS_STM 84
131#define SLAVE_TCU 85
132
133/* dc_noc */
134#define MASTER_CNOC_DC_NOC 0
135#define SLAVE_LLCC_CFG 1
136#define SLAVE_GEM_NOC_CFG 2
137
138/* gem_noc */
139#define MASTER_GPU_TCU 0
140#define MASTER_PCIE_TCU 1
141#define MASTER_SYS_TCU 2
142#define MASTER_APPSS_PROC 3
143#define MASTER_COMPUTE_NOC 4
144#define MASTER_COMPUTE_NOC_1 5
145#define MASTER_GEM_NOC_CFG 6
146#define MASTER_GPDSP_SAIL 7
147#define MASTER_GFX3D 8
148#define MASTER_MNOC_HF_MEM_NOC 9
149#define MASTER_MNOC_SF_MEM_NOC 10
150#define MASTER_ANOC_PCIE_GEM_NOC 11
151#define MASTER_SNOC_GC_MEM_NOC 12
152#define MASTER_SNOC_SF_MEM_NOC 13
153#define SLAVE_GEM_NOC_CNOC 14
154#define SLAVE_LLCC 15
155#define SLAVE_GEM_NOC_PCIE_CNOC 16
156#define SLAVE_SERVICE_GEM_NOC_1 17
157#define SLAVE_SERVICE_GEM_NOC_2 18
158#define SLAVE_SERVICE_GEM_NOC 19
159#define SLAVE_SERVICE_GEM_NOC2 20
160
161/* gpdsp_anoc */
162#define MASTER_DSP0 0
163#define MASTER_DSP1 1
164#define SLAVE_GP_DSP_SAIL_NOC 2
165
166/* lpass_ag_noc */
167#define MASTER_CNOC_LPASS_AG_NOC 0
168#define MASTER_LPASS_PROC 1
169#define SLAVE_LPASS_CORE_CFG 2
170#define SLAVE_LPASS_LPI_CFG 3
171#define SLAVE_LPASS_MPU_CFG 4
172#define SLAVE_LPASS_TOP_CFG 5
173#define SLAVE_LPASS_SNOC 6
174#define SLAVE_SERVICES_LPASS_AML_NOC 7
175#define SLAVE_SERVICE_LPASS_AG_NOC 8
176
177/* mc_virt */
178#define MASTER_LLCC 0
179#define SLAVE_EBI1 1
180
181/*mmss_noc */
182#define MASTER_CAMNOC_HF 0
183#define MASTER_CAMNOC_ICP 1
184#define MASTER_CAMNOC_SF 2
185#define MASTER_MDP0 3
186#define MASTER_MDP1 4
187#define MASTER_MDP_CORE1_0 5
188#define MASTER_MDP_CORE1_1 6
189#define MASTER_CNOC_MNOC_HF_CFG 7
190#define MASTER_CNOC_MNOC_SF_CFG 8
191#define MASTER_VIDEO_P0 9
192#define MASTER_VIDEO_P1 10
193#define MASTER_VIDEO_PROC 11
194#define MASTER_VIDEO_V_PROC 12
195#define SLAVE_MNOC_HF_MEM_NOC 13
196#define SLAVE_MNOC_SF_MEM_NOC 14
197#define SLAVE_SERVICE_MNOC_HF 15
198#define SLAVE_SERVICE_MNOC_SF 16
199
200/* nspa_noc */
201#define MASTER_CDSP_NOC_CFG 0
202#define MASTER_CDSP_PROC 1
203#define SLAVE_HCP_A 2
204#define SLAVE_CDSP_MEM_NOC 3
205#define SLAVE_SERVICE_NSP_NOC 4
206
207/* nspb_noc */
208#define MASTER_CDSPB_NOC_CFG 0
209#define MASTER_CDSP_PROC_B 1
210#define SLAVE_CDSPB_MEM_NOC 2
211#define SLAVE_HCP_B 3
212#define SLAVE_SERVICE_NSPB_NOC 4
213
214/* pcie_anoc */
215#define MASTER_PCIE_0 0
216#define MASTER_PCIE_1 1
217#define SLAVE_ANOC_PCIE_GEM_NOC 2
218
219/* system_noc */
220#define MASTER_GIC_AHB 0
221#define MASTER_A1NOC_SNOC 1
222#define MASTER_A2NOC_SNOC 2
223#define MASTER_LPASS_ANOC 3
224#define MASTER_SNOC_CFG 4
225#define MASTER_PIMEM 5
226#define MASTER_GIC 6
227#define SLAVE_SNOC_GEM_NOC_GC 7
228#define SLAVE_SNOC_GEM_NOC_SF 8
229#define SLAVE_SERVICE_SNOC 9
230
231#endif /* __DT_BINDINGS_INTERCONNECT_QCOM_SA8775P_H */