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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2/*
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6#ifndef _DT_BINDINGS_CLK_QCOM_QCA8K_NSS_CC_H
7#define _DT_BINDINGS_CLK_QCOM_QCA8K_NSS_CC_H
8
9#define NSS_CC_SWITCH_CORE_CLK_SRC 0
10#define NSS_CC_SWITCH_CORE_CLK 1
11#define NSS_CC_APB_BRIDGE_CLK 2
12#define NSS_CC_MAC0_TX_CLK_SRC 3
13#define NSS_CC_MAC0_TX_DIV_CLK_SRC 4
14#define NSS_CC_MAC0_TX_CLK 5
15#define NSS_CC_MAC0_TX_SRDS1_CLK 6
16#define NSS_CC_MAC0_RX_CLK_SRC 7
17#define NSS_CC_MAC0_RX_DIV_CLK_SRC 8
18#define NSS_CC_MAC0_RX_CLK 9
19#define NSS_CC_MAC0_RX_SRDS1_CLK 10
20#define NSS_CC_MAC1_TX_CLK_SRC 11
21#define NSS_CC_MAC1_TX_DIV_CLK_SRC 12
22#define NSS_CC_MAC1_SRDS1_CH0_XGMII_RX_DIV_CLK_SRC 13
23#define NSS_CC_MAC1_SRDS1_CH0_RX_CLK 14
24#define NSS_CC_MAC1_TX_CLK 15
25#define NSS_CC_MAC1_GEPHY0_TX_CLK 16
26#define NSS_CC_MAC1_SRDS1_CH0_XGMII_RX_CLK 17
27#define NSS_CC_MAC1_RX_CLK_SRC 18
28#define NSS_CC_MAC1_RX_DIV_CLK_SRC 19
29#define NSS_CC_MAC1_SRDS1_CH0_XGMII_TX_DIV_CLK_SRC 20
30#define NSS_CC_MAC1_SRDS1_CH0_TX_CLK 21
31#define NSS_CC_MAC1_RX_CLK 22
32#define NSS_CC_MAC1_GEPHY0_RX_CLK 23
33#define NSS_CC_MAC1_SRDS1_CH0_XGMII_TX_CLK 24
34#define NSS_CC_MAC2_TX_CLK_SRC 25
35#define NSS_CC_MAC2_TX_DIV_CLK_SRC 26
36#define NSS_CC_MAC2_SRDS1_CH1_XGMII_RX_DIV_CLK_SRC 27
37#define NSS_CC_MAC2_SRDS1_CH1_RX_CLK 28
38#define NSS_CC_MAC2_TX_CLK 29
39#define NSS_CC_MAC2_GEPHY1_TX_CLK 30
40#define NSS_CC_MAC2_SRDS1_CH1_XGMII_RX_CLK 31
41#define NSS_CC_MAC2_RX_CLK_SRC 32
42#define NSS_CC_MAC2_RX_DIV_CLK_SRC 33
43#define NSS_CC_MAC2_SRDS1_CH1_XGMII_TX_DIV_CLK_SRC 34
44#define NSS_CC_MAC2_SRDS1_CH1_TX_CLK 35
45#define NSS_CC_MAC2_RX_CLK 36
46#define NSS_CC_MAC2_GEPHY1_RX_CLK 37
47#define NSS_CC_MAC2_SRDS1_CH1_XGMII_TX_CLK 38
48#define NSS_CC_MAC3_TX_CLK_SRC 39
49#define NSS_CC_MAC3_TX_DIV_CLK_SRC 40
50#define NSS_CC_MAC3_SRDS1_CH2_XGMII_RX_DIV_CLK_SRC 41
51#define NSS_CC_MAC3_SRDS1_CH2_RX_CLK 42
52#define NSS_CC_MAC3_TX_CLK 43
53#define NSS_CC_MAC3_GEPHY2_TX_CLK 44
54#define NSS_CC_MAC3_SRDS1_CH2_XGMII_RX_CLK 45
55#define NSS_CC_MAC3_RX_CLK_SRC 46
56#define NSS_CC_MAC3_RX_DIV_CLK_SRC 47
57#define NSS_CC_MAC3_SRDS1_CH2_XGMII_TX_DIV_CLK_SRC 48
58#define NSS_CC_MAC3_SRDS1_CH2_TX_CLK 49
59#define NSS_CC_MAC3_RX_CLK 50
60#define NSS_CC_MAC3_GEPHY2_RX_CLK 51
61#define NSS_CC_MAC3_SRDS1_CH2_XGMII_TX_CLK 52
62#define NSS_CC_MAC4_TX_CLK_SRC 53
63#define NSS_CC_MAC4_TX_DIV_CLK_SRC 54
64#define NSS_CC_MAC4_SRDS1_CH3_XGMII_RX_DIV_CLK_SRC 55
65#define NSS_CC_MAC4_SRDS1_CH3_RX_CLK 56
66#define NSS_CC_MAC4_TX_CLK 57
67#define NSS_CC_MAC4_GEPHY3_TX_CLK 58
68#define NSS_CC_MAC4_SRDS1_CH3_XGMII_RX_CLK 59
69#define NSS_CC_MAC4_RX_CLK_SRC 60
70#define NSS_CC_MAC4_RX_DIV_CLK_SRC 61
71#define NSS_CC_MAC4_SRDS1_CH3_XGMII_TX_DIV_CLK_SRC 62
72#define NSS_CC_MAC4_SRDS1_CH3_TX_CLK 63
73#define NSS_CC_MAC4_RX_CLK 64
74#define NSS_CC_MAC4_GEPHY3_RX_CLK 65
75#define NSS_CC_MAC4_SRDS1_CH3_XGMII_TX_CLK 66
76#define NSS_CC_MAC5_TX_CLK_SRC 67
77#define NSS_CC_MAC5_TX_DIV_CLK_SRC 68
78#define NSS_CC_MAC5_TX_SRDS0_CLK 69
79#define NSS_CC_MAC5_TX_CLK 70
80#define NSS_CC_MAC5_RX_CLK_SRC 71
81#define NSS_CC_MAC5_RX_DIV_CLK_SRC 72
82#define NSS_CC_MAC5_RX_SRDS0_CLK 73
83#define NSS_CC_MAC5_RX_CLK 74
84#define NSS_CC_MAC5_TX_SRDS0_CLK_SRC 75
85#define NSS_CC_MAC5_RX_SRDS0_CLK_SRC 76
86#define NSS_CC_AHB_CLK_SRC 77
87#define NSS_CC_AHB_CLK 78
88#define NSS_CC_SEC_CTRL_AHB_CLK 79
89#define NSS_CC_TLMM_CLK 80
90#define NSS_CC_TLMM_AHB_CLK 81
91#define NSS_CC_CNOC_AHB_CLK 82
92#define NSS_CC_MDIO_AHB_CLK 83
93#define NSS_CC_MDIO_MASTER_AHB_CLK 84
94#define NSS_CC_SYS_CLK_SRC 85
95#define NSS_CC_SRDS0_SYS_CLK 86
96#define NSS_CC_SRDS1_SYS_CLK 87
97#define NSS_CC_GEPHY0_SYS_CLK 88
98#define NSS_CC_GEPHY1_SYS_CLK 89
99#define NSS_CC_GEPHY2_SYS_CLK 90
100#define NSS_CC_GEPHY3_SYS_CLK 91
101#endif