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1/***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
23 *
24 * Supported devices:
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
27 * LAN9210, LAN9211
28 * LAN9220, LAN9221
29 * LAN89218
30 *
31 */
32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35#include <linux/crc32.h>
36#include <linux/delay.h>
37#include <linux/errno.h>
38#include <linux/etherdevice.h>
39#include <linux/ethtool.h>
40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/ioport.h>
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/netdevice.h>
46#include <linux/platform_device.h>
47#include <linux/sched.h>
48#include <linux/timer.h>
49#include <linux/bug.h>
50#include <linux/bitops.h>
51#include <linux/irq.h>
52#include <linux/io.h>
53#include <linux/swab.h>
54#include <linux/phy.h>
55#include <linux/smsc911x.h>
56#include <linux/device.h>
57#include "smsc911x.h"
58
59#define SMSC_CHIPNAME "smsc911x"
60#define SMSC_MDIONAME "smsc911x-mdio"
61#define SMSC_DRV_VERSION "2008-10-21"
62
63MODULE_LICENSE("GPL");
64MODULE_VERSION(SMSC_DRV_VERSION);
65MODULE_ALIAS("platform:smsc911x");
66
67#if USE_DEBUG > 0
68static int debug = 16;
69#else
70static int debug = 3;
71#endif
72
73module_param(debug, int, 0);
74MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
75
76struct smsc911x_data;
77
78struct smsc911x_ops {
79 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
80 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
81 void (*rx_readfifo)(struct smsc911x_data *pdata,
82 unsigned int *buf, unsigned int wordcount);
83 void (*tx_writefifo)(struct smsc911x_data *pdata,
84 unsigned int *buf, unsigned int wordcount);
85};
86
87struct smsc911x_data {
88 void __iomem *ioaddr;
89
90 unsigned int idrev;
91
92 /* used to decide which workarounds apply */
93 unsigned int generation;
94
95 /* device configuration (copied from platform_data during probe) */
96 struct smsc911x_platform_config config;
97
98 /* This needs to be acquired before calling any of below:
99 * smsc911x_mac_read(), smsc911x_mac_write()
100 */
101 spinlock_t mac_lock;
102
103 /* spinlock to ensure register accesses are serialised */
104 spinlock_t dev_lock;
105
106 struct phy_device *phy_dev;
107 struct mii_bus *mii_bus;
108 int phy_irq[PHY_MAX_ADDR];
109 unsigned int using_extphy;
110 int last_duplex;
111 int last_carrier;
112
113 u32 msg_enable;
114 unsigned int gpio_setting;
115 unsigned int gpio_orig_setting;
116 struct net_device *dev;
117 struct napi_struct napi;
118
119 unsigned int software_irq_signal;
120
121#ifdef USE_PHY_WORK_AROUND
122#define MIN_PACKET_SIZE (64)
123 char loopback_tx_pkt[MIN_PACKET_SIZE];
124 char loopback_rx_pkt[MIN_PACKET_SIZE];
125 unsigned int resetcount;
126#endif
127
128 /* Members for Multicast filter workaround */
129 unsigned int multicast_update_pending;
130 unsigned int set_bits_mask;
131 unsigned int clear_bits_mask;
132 unsigned int hashhi;
133 unsigned int hashlo;
134
135 /* register access functions */
136 const struct smsc911x_ops *ops;
137};
138
139/* Easy access to information */
140#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
141
142static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
143{
144 if (pdata->config.flags & SMSC911X_USE_32BIT)
145 return readl(pdata->ioaddr + reg);
146
147 if (pdata->config.flags & SMSC911X_USE_16BIT)
148 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
149 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
150
151 BUG();
152 return 0;
153}
154
155static inline u32
156__smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
157{
158 if (pdata->config.flags & SMSC911X_USE_32BIT)
159 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
160
161 if (pdata->config.flags & SMSC911X_USE_16BIT)
162 return (readw(pdata->ioaddr +
163 __smsc_shift(pdata, reg)) & 0xFFFF) |
164 ((readw(pdata->ioaddr +
165 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
166
167 BUG();
168 return 0;
169}
170
171static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
172{
173 u32 data;
174 unsigned long flags;
175
176 spin_lock_irqsave(&pdata->dev_lock, flags);
177 data = pdata->ops->reg_read(pdata, reg);
178 spin_unlock_irqrestore(&pdata->dev_lock, flags);
179
180 return data;
181}
182
183static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
184 u32 val)
185{
186 if (pdata->config.flags & SMSC911X_USE_32BIT) {
187 writel(val, pdata->ioaddr + reg);
188 return;
189 }
190
191 if (pdata->config.flags & SMSC911X_USE_16BIT) {
192 writew(val & 0xFFFF, pdata->ioaddr + reg);
193 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
194 return;
195 }
196
197 BUG();
198}
199
200static inline void
201__smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
202{
203 if (pdata->config.flags & SMSC911X_USE_32BIT) {
204 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
205 return;
206 }
207
208 if (pdata->config.flags & SMSC911X_USE_16BIT) {
209 writew(val & 0xFFFF,
210 pdata->ioaddr + __smsc_shift(pdata, reg));
211 writew((val >> 16) & 0xFFFF,
212 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
213 return;
214 }
215
216 BUG();
217}
218
219static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
220 u32 val)
221{
222 unsigned long flags;
223
224 spin_lock_irqsave(&pdata->dev_lock, flags);
225 pdata->ops->reg_write(pdata, reg, val);
226 spin_unlock_irqrestore(&pdata->dev_lock, flags);
227}
228
229/* Writes a packet to the TX_DATA_FIFO */
230static inline void
231smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
232 unsigned int wordcount)
233{
234 unsigned long flags;
235
236 spin_lock_irqsave(&pdata->dev_lock, flags);
237
238 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
239 while (wordcount--)
240 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
241 swab32(*buf++));
242 goto out;
243 }
244
245 if (pdata->config.flags & SMSC911X_USE_32BIT) {
246 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
247 goto out;
248 }
249
250 if (pdata->config.flags & SMSC911X_USE_16BIT) {
251 while (wordcount--)
252 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
253 goto out;
254 }
255
256 BUG();
257out:
258 spin_unlock_irqrestore(&pdata->dev_lock, flags);
259}
260
261/* Writes a packet to the TX_DATA_FIFO - shifted version */
262static inline void
263smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
264 unsigned int wordcount)
265{
266 unsigned long flags;
267
268 spin_lock_irqsave(&pdata->dev_lock, flags);
269
270 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
271 while (wordcount--)
272 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
273 swab32(*buf++));
274 goto out;
275 }
276
277 if (pdata->config.flags & SMSC911X_USE_32BIT) {
278 writesl(pdata->ioaddr + __smsc_shift(pdata,
279 TX_DATA_FIFO), buf, wordcount);
280 goto out;
281 }
282
283 if (pdata->config.flags & SMSC911X_USE_16BIT) {
284 while (wordcount--)
285 __smsc911x_reg_write_shift(pdata,
286 TX_DATA_FIFO, *buf++);
287 goto out;
288 }
289
290 BUG();
291out:
292 spin_unlock_irqrestore(&pdata->dev_lock, flags);
293}
294
295/* Reads a packet out of the RX_DATA_FIFO */
296static inline void
297smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
298 unsigned int wordcount)
299{
300 unsigned long flags;
301
302 spin_lock_irqsave(&pdata->dev_lock, flags);
303
304 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
305 while (wordcount--)
306 *buf++ = swab32(__smsc911x_reg_read(pdata,
307 RX_DATA_FIFO));
308 goto out;
309 }
310
311 if (pdata->config.flags & SMSC911X_USE_32BIT) {
312 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
313 goto out;
314 }
315
316 if (pdata->config.flags & SMSC911X_USE_16BIT) {
317 while (wordcount--)
318 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
319 goto out;
320 }
321
322 BUG();
323out:
324 spin_unlock_irqrestore(&pdata->dev_lock, flags);
325}
326
327/* Reads a packet out of the RX_DATA_FIFO - shifted version */
328static inline void
329smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
330 unsigned int wordcount)
331{
332 unsigned long flags;
333
334 spin_lock_irqsave(&pdata->dev_lock, flags);
335
336 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
337 while (wordcount--)
338 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
339 RX_DATA_FIFO));
340 goto out;
341 }
342
343 if (pdata->config.flags & SMSC911X_USE_32BIT) {
344 readsl(pdata->ioaddr + __smsc_shift(pdata,
345 RX_DATA_FIFO), buf, wordcount);
346 goto out;
347 }
348
349 if (pdata->config.flags & SMSC911X_USE_16BIT) {
350 while (wordcount--)
351 *buf++ = __smsc911x_reg_read_shift(pdata,
352 RX_DATA_FIFO);
353 goto out;
354 }
355
356 BUG();
357out:
358 spin_unlock_irqrestore(&pdata->dev_lock, flags);
359}
360
361/* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
362 * and smsc911x_mac_write, so assumes mac_lock is held */
363static int smsc911x_mac_complete(struct smsc911x_data *pdata)
364{
365 int i;
366 u32 val;
367
368 SMSC_ASSERT_MAC_LOCK(pdata);
369
370 for (i = 0; i < 40; i++) {
371 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
372 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
373 return 0;
374 }
375 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
376 "MAC_CSR_CMD: 0x%08X", val);
377 return -EIO;
378}
379
380/* Fetches a MAC register value. Assumes mac_lock is acquired */
381static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
382{
383 unsigned int temp;
384
385 SMSC_ASSERT_MAC_LOCK(pdata);
386
387 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
388 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
389 SMSC_WARN(pdata, hw, "MAC busy at entry");
390 return 0xFFFFFFFF;
391 }
392
393 /* Send the MAC cmd */
394 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
395 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
396
397 /* Workaround for hardware read-after-write restriction */
398 temp = smsc911x_reg_read(pdata, BYTE_TEST);
399
400 /* Wait for the read to complete */
401 if (likely(smsc911x_mac_complete(pdata) == 0))
402 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
403
404 SMSC_WARN(pdata, hw, "MAC busy after read");
405 return 0xFFFFFFFF;
406}
407
408/* Set a mac register, mac_lock must be acquired before calling */
409static void smsc911x_mac_write(struct smsc911x_data *pdata,
410 unsigned int offset, u32 val)
411{
412 unsigned int temp;
413
414 SMSC_ASSERT_MAC_LOCK(pdata);
415
416 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
417 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
418 SMSC_WARN(pdata, hw,
419 "smsc911x_mac_write failed, MAC busy at entry");
420 return;
421 }
422
423 /* Send data to write */
424 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
425
426 /* Write the actual data */
427 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
428 MAC_CSR_CMD_CSR_BUSY_));
429
430 /* Workaround for hardware read-after-write restriction */
431 temp = smsc911x_reg_read(pdata, BYTE_TEST);
432
433 /* Wait for the write to complete */
434 if (likely(smsc911x_mac_complete(pdata) == 0))
435 return;
436
437 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
438}
439
440/* Get a phy register */
441static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
442{
443 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
444 unsigned long flags;
445 unsigned int addr;
446 int i, reg;
447
448 spin_lock_irqsave(&pdata->mac_lock, flags);
449
450 /* Confirm MII not busy */
451 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
452 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
453 reg = -EIO;
454 goto out;
455 }
456
457 /* Set the address, index & direction (read from PHY) */
458 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
459 smsc911x_mac_write(pdata, MII_ACC, addr);
460
461 /* Wait for read to complete w/ timeout */
462 for (i = 0; i < 100; i++)
463 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
464 reg = smsc911x_mac_read(pdata, MII_DATA);
465 goto out;
466 }
467
468 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
469 reg = -EIO;
470
471out:
472 spin_unlock_irqrestore(&pdata->mac_lock, flags);
473 return reg;
474}
475
476/* Set a phy register */
477static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
478 u16 val)
479{
480 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
481 unsigned long flags;
482 unsigned int addr;
483 int i, reg;
484
485 spin_lock_irqsave(&pdata->mac_lock, flags);
486
487 /* Confirm MII not busy */
488 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
489 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
490 reg = -EIO;
491 goto out;
492 }
493
494 /* Put the data to write in the MAC */
495 smsc911x_mac_write(pdata, MII_DATA, val);
496
497 /* Set the address, index & direction (write to PHY) */
498 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
499 MII_ACC_MII_WRITE_;
500 smsc911x_mac_write(pdata, MII_ACC, addr);
501
502 /* Wait for write to complete w/ timeout */
503 for (i = 0; i < 100; i++)
504 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
505 reg = 0;
506 goto out;
507 }
508
509 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
510 reg = -EIO;
511
512out:
513 spin_unlock_irqrestore(&pdata->mac_lock, flags);
514 return reg;
515}
516
517/* Switch to external phy. Assumes tx and rx are stopped. */
518static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
519{
520 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
521
522 /* Disable phy clocks to the MAC */
523 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
524 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
525 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
526 udelay(10); /* Enough time for clocks to stop */
527
528 /* Switch to external phy */
529 hwcfg |= HW_CFG_EXT_PHY_EN_;
530 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
531
532 /* Enable phy clocks to the MAC */
533 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
534 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
535 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
536 udelay(10); /* Enough time for clocks to restart */
537
538 hwcfg |= HW_CFG_SMI_SEL_;
539 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
540}
541
542/* Autodetects and enables external phy if present on supported chips.
543 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
544 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
545static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
546{
547 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
548
549 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
550 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
551 pdata->using_extphy = 0;
552 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
553 SMSC_TRACE(pdata, hw, "Forcing external PHY");
554 smsc911x_phy_enable_external(pdata);
555 pdata->using_extphy = 1;
556 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
557 SMSC_TRACE(pdata, hw,
558 "HW_CFG EXT_PHY_DET set, using external PHY");
559 smsc911x_phy_enable_external(pdata);
560 pdata->using_extphy = 1;
561 } else {
562 SMSC_TRACE(pdata, hw,
563 "HW_CFG EXT_PHY_DET clear, using internal PHY");
564 pdata->using_extphy = 0;
565 }
566}
567
568/* Fetches a tx status out of the status fifo */
569static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
570{
571 unsigned int result =
572 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
573
574 if (result != 0)
575 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
576
577 return result;
578}
579
580/* Fetches the next rx status */
581static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
582{
583 unsigned int result =
584 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
585
586 if (result != 0)
587 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
588
589 return result;
590}
591
592#ifdef USE_PHY_WORK_AROUND
593static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
594{
595 unsigned int tries;
596 u32 wrsz;
597 u32 rdsz;
598 ulong bufp;
599
600 for (tries = 0; tries < 10; tries++) {
601 unsigned int txcmd_a;
602 unsigned int txcmd_b;
603 unsigned int status;
604 unsigned int pktlength;
605 unsigned int i;
606
607 /* Zero-out rx packet memory */
608 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
609
610 /* Write tx packet to 118 */
611 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
612 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
613 txcmd_a |= MIN_PACKET_SIZE;
614
615 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
616
617 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
618 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
619
620 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
621 wrsz = MIN_PACKET_SIZE + 3;
622 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
623 wrsz >>= 2;
624
625 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
626
627 /* Wait till transmit is done */
628 i = 60;
629 do {
630 udelay(5);
631 status = smsc911x_tx_get_txstatus(pdata);
632 } while ((i--) && (!status));
633
634 if (!status) {
635 SMSC_WARN(pdata, hw,
636 "Failed to transmit during loopback test");
637 continue;
638 }
639 if (status & TX_STS_ES_) {
640 SMSC_WARN(pdata, hw,
641 "Transmit encountered errors during loopback test");
642 continue;
643 }
644
645 /* Wait till receive is done */
646 i = 60;
647 do {
648 udelay(5);
649 status = smsc911x_rx_get_rxstatus(pdata);
650 } while ((i--) && (!status));
651
652 if (!status) {
653 SMSC_WARN(pdata, hw,
654 "Failed to receive during loopback test");
655 continue;
656 }
657 if (status & RX_STS_ES_) {
658 SMSC_WARN(pdata, hw,
659 "Receive encountered errors during loopback test");
660 continue;
661 }
662
663 pktlength = ((status & 0x3FFF0000UL) >> 16);
664 bufp = (ulong)pdata->loopback_rx_pkt;
665 rdsz = pktlength + 3;
666 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
667 rdsz >>= 2;
668
669 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
670
671 if (pktlength != (MIN_PACKET_SIZE + 4)) {
672 SMSC_WARN(pdata, hw, "Unexpected packet size "
673 "during loop back test, size=%d, will retry",
674 pktlength);
675 } else {
676 unsigned int j;
677 int mismatch = 0;
678 for (j = 0; j < MIN_PACKET_SIZE; j++) {
679 if (pdata->loopback_tx_pkt[j]
680 != pdata->loopback_rx_pkt[j]) {
681 mismatch = 1;
682 break;
683 }
684 }
685 if (!mismatch) {
686 SMSC_TRACE(pdata, hw, "Successfully verified "
687 "loopback packet");
688 return 0;
689 } else {
690 SMSC_WARN(pdata, hw, "Data mismatch "
691 "during loop back test, will retry");
692 }
693 }
694 }
695
696 return -EIO;
697}
698
699static int smsc911x_phy_reset(struct smsc911x_data *pdata)
700{
701 struct phy_device *phy_dev = pdata->phy_dev;
702 unsigned int temp;
703 unsigned int i = 100000;
704
705 BUG_ON(!phy_dev);
706 BUG_ON(!phy_dev->bus);
707
708 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
709 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
710 do {
711 msleep(1);
712 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
713 MII_BMCR);
714 } while ((i--) && (temp & BMCR_RESET));
715
716 if (temp & BMCR_RESET) {
717 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
718 return -EIO;
719 }
720 /* Extra delay required because the phy may not be completed with
721 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
722 * enough delay but using 1ms here to be safe */
723 msleep(1);
724
725 return 0;
726}
727
728static int smsc911x_phy_loopbacktest(struct net_device *dev)
729{
730 struct smsc911x_data *pdata = netdev_priv(dev);
731 struct phy_device *phy_dev = pdata->phy_dev;
732 int result = -EIO;
733 unsigned int i, val;
734 unsigned long flags;
735
736 /* Initialise tx packet using broadcast destination address */
737 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
738
739 /* Use incrementing source address */
740 for (i = 6; i < 12; i++)
741 pdata->loopback_tx_pkt[i] = (char)i;
742
743 /* Set length type field */
744 pdata->loopback_tx_pkt[12] = 0x00;
745 pdata->loopback_tx_pkt[13] = 0x00;
746
747 for (i = 14; i < MIN_PACKET_SIZE; i++)
748 pdata->loopback_tx_pkt[i] = (char)i;
749
750 val = smsc911x_reg_read(pdata, HW_CFG);
751 val &= HW_CFG_TX_FIF_SZ_;
752 val |= HW_CFG_SF_;
753 smsc911x_reg_write(pdata, HW_CFG, val);
754
755 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
756 smsc911x_reg_write(pdata, RX_CFG,
757 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
758
759 for (i = 0; i < 10; i++) {
760 /* Set PHY to 10/FD, no ANEG, and loopback mode */
761 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
762 BMCR_LOOPBACK | BMCR_FULLDPLX);
763
764 /* Enable MAC tx/rx, FD */
765 spin_lock_irqsave(&pdata->mac_lock, flags);
766 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
767 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
768 spin_unlock_irqrestore(&pdata->mac_lock, flags);
769
770 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
771 result = 0;
772 break;
773 }
774 pdata->resetcount++;
775
776 /* Disable MAC rx */
777 spin_lock_irqsave(&pdata->mac_lock, flags);
778 smsc911x_mac_write(pdata, MAC_CR, 0);
779 spin_unlock_irqrestore(&pdata->mac_lock, flags);
780
781 smsc911x_phy_reset(pdata);
782 }
783
784 /* Disable MAC */
785 spin_lock_irqsave(&pdata->mac_lock, flags);
786 smsc911x_mac_write(pdata, MAC_CR, 0);
787 spin_unlock_irqrestore(&pdata->mac_lock, flags);
788
789 /* Cancel PHY loopback mode */
790 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
791
792 smsc911x_reg_write(pdata, TX_CFG, 0);
793 smsc911x_reg_write(pdata, RX_CFG, 0);
794
795 return result;
796}
797#endif /* USE_PHY_WORK_AROUND */
798
799static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
800{
801 struct phy_device *phy_dev = pdata->phy_dev;
802 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
803 u32 flow;
804 unsigned long flags;
805
806 if (phy_dev->duplex == DUPLEX_FULL) {
807 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
808 u16 rmtadv = phy_read(phy_dev, MII_LPA);
809 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
810
811 if (cap & FLOW_CTRL_RX)
812 flow = 0xFFFF0002;
813 else
814 flow = 0;
815
816 if (cap & FLOW_CTRL_TX)
817 afc |= 0xF;
818 else
819 afc &= ~0xF;
820
821 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
822 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
823 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
824 } else {
825 SMSC_TRACE(pdata, hw, "half duplex");
826 flow = 0;
827 afc |= 0xF;
828 }
829
830 spin_lock_irqsave(&pdata->mac_lock, flags);
831 smsc911x_mac_write(pdata, FLOW, flow);
832 spin_unlock_irqrestore(&pdata->mac_lock, flags);
833
834 smsc911x_reg_write(pdata, AFC_CFG, afc);
835}
836
837/* Update link mode if anything has changed. Called periodically when the
838 * PHY is in polling mode, even if nothing has changed. */
839static void smsc911x_phy_adjust_link(struct net_device *dev)
840{
841 struct smsc911x_data *pdata = netdev_priv(dev);
842 struct phy_device *phy_dev = pdata->phy_dev;
843 unsigned long flags;
844 int carrier;
845
846 if (phy_dev->duplex != pdata->last_duplex) {
847 unsigned int mac_cr;
848 SMSC_TRACE(pdata, hw, "duplex state has changed");
849
850 spin_lock_irqsave(&pdata->mac_lock, flags);
851 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
852 if (phy_dev->duplex) {
853 SMSC_TRACE(pdata, hw,
854 "configuring for full duplex mode");
855 mac_cr |= MAC_CR_FDPX_;
856 } else {
857 SMSC_TRACE(pdata, hw,
858 "configuring for half duplex mode");
859 mac_cr &= ~MAC_CR_FDPX_;
860 }
861 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
862 spin_unlock_irqrestore(&pdata->mac_lock, flags);
863
864 smsc911x_phy_update_flowcontrol(pdata);
865 pdata->last_duplex = phy_dev->duplex;
866 }
867
868 carrier = netif_carrier_ok(dev);
869 if (carrier != pdata->last_carrier) {
870 SMSC_TRACE(pdata, hw, "carrier state has changed");
871 if (carrier) {
872 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
873 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
874 (!pdata->using_extphy)) {
875 /* Restore original GPIO configuration */
876 pdata->gpio_setting = pdata->gpio_orig_setting;
877 smsc911x_reg_write(pdata, GPIO_CFG,
878 pdata->gpio_setting);
879 }
880 } else {
881 SMSC_TRACE(pdata, hw, "configuring for no carrier");
882 /* Check global setting that LED1
883 * usage is 10/100 indicator */
884 pdata->gpio_setting = smsc911x_reg_read(pdata,
885 GPIO_CFG);
886 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
887 (!pdata->using_extphy)) {
888 /* Force 10/100 LED off, after saving
889 * original GPIO configuration */
890 pdata->gpio_orig_setting = pdata->gpio_setting;
891
892 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
893 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
894 | GPIO_CFG_GPIODIR0_
895 | GPIO_CFG_GPIOD0_);
896 smsc911x_reg_write(pdata, GPIO_CFG,
897 pdata->gpio_setting);
898 }
899 }
900 pdata->last_carrier = carrier;
901 }
902}
903
904static int smsc911x_mii_probe(struct net_device *dev)
905{
906 struct smsc911x_data *pdata = netdev_priv(dev);
907 struct phy_device *phydev = NULL;
908 int ret;
909
910 /* find the first phy */
911 phydev = phy_find_first(pdata->mii_bus);
912 if (!phydev) {
913 netdev_err(dev, "no PHY found\n");
914 return -ENODEV;
915 }
916
917 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
918 phydev->addr, phydev->phy_id);
919
920 ret = phy_connect_direct(dev, phydev,
921 &smsc911x_phy_adjust_link, 0,
922 pdata->config.phy_interface);
923
924 if (ret) {
925 netdev_err(dev, "Could not attach to PHY\n");
926 return ret;
927 }
928
929 netdev_info(dev,
930 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
931 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
932
933 /* mask with MAC supported features */
934 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
935 SUPPORTED_Asym_Pause);
936 phydev->advertising = phydev->supported;
937
938 pdata->phy_dev = phydev;
939 pdata->last_duplex = -1;
940 pdata->last_carrier = -1;
941
942#ifdef USE_PHY_WORK_AROUND
943 if (smsc911x_phy_loopbacktest(dev) < 0) {
944 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
945 return -ENODEV;
946 }
947 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
948#endif /* USE_PHY_WORK_AROUND */
949
950 SMSC_TRACE(pdata, hw, "phy initialised successfully");
951 return 0;
952}
953
954static int __devinit smsc911x_mii_init(struct platform_device *pdev,
955 struct net_device *dev)
956{
957 struct smsc911x_data *pdata = netdev_priv(dev);
958 int err = -ENXIO, i;
959
960 pdata->mii_bus = mdiobus_alloc();
961 if (!pdata->mii_bus) {
962 err = -ENOMEM;
963 goto err_out_1;
964 }
965
966 pdata->mii_bus->name = SMSC_MDIONAME;
967 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
968 pdata->mii_bus->priv = pdata;
969 pdata->mii_bus->read = smsc911x_mii_read;
970 pdata->mii_bus->write = smsc911x_mii_write;
971 pdata->mii_bus->irq = pdata->phy_irq;
972 for (i = 0; i < PHY_MAX_ADDR; ++i)
973 pdata->mii_bus->irq[i] = PHY_POLL;
974
975 pdata->mii_bus->parent = &pdev->dev;
976
977 switch (pdata->idrev & 0xFFFF0000) {
978 case 0x01170000:
979 case 0x01150000:
980 case 0x117A0000:
981 case 0x115A0000:
982 /* External PHY supported, try to autodetect */
983 smsc911x_phy_initialise_external(pdata);
984 break;
985 default:
986 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
987 "using internal PHY");
988 pdata->using_extphy = 0;
989 break;
990 }
991
992 if (!pdata->using_extphy) {
993 /* Mask all PHYs except ID 1 (internal) */
994 pdata->mii_bus->phy_mask = ~(1 << 1);
995 }
996
997 if (mdiobus_register(pdata->mii_bus)) {
998 SMSC_WARN(pdata, probe, "Error registering mii bus");
999 goto err_out_free_bus_2;
1000 }
1001
1002 if (smsc911x_mii_probe(dev) < 0) {
1003 SMSC_WARN(pdata, probe, "Error registering mii bus");
1004 goto err_out_unregister_bus_3;
1005 }
1006
1007 return 0;
1008
1009err_out_unregister_bus_3:
1010 mdiobus_unregister(pdata->mii_bus);
1011err_out_free_bus_2:
1012 mdiobus_free(pdata->mii_bus);
1013err_out_1:
1014 return err;
1015}
1016
1017/* Gets the number of tx statuses in the fifo */
1018static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1019{
1020 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1021 & TX_FIFO_INF_TSUSED_) >> 16;
1022}
1023
1024/* Reads tx statuses and increments counters where necessary */
1025static void smsc911x_tx_update_txcounters(struct net_device *dev)
1026{
1027 struct smsc911x_data *pdata = netdev_priv(dev);
1028 unsigned int tx_stat;
1029
1030 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1031 if (unlikely(tx_stat & 0x80000000)) {
1032 /* In this driver the packet tag is used as the packet
1033 * length. Since a packet length can never reach the
1034 * size of 0x8000, this bit is reserved. It is worth
1035 * noting that the "reserved bit" in the warning above
1036 * does not reference a hardware defined reserved bit
1037 * but rather a driver defined one.
1038 */
1039 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1040 } else {
1041 if (unlikely(tx_stat & TX_STS_ES_)) {
1042 dev->stats.tx_errors++;
1043 } else {
1044 dev->stats.tx_packets++;
1045 dev->stats.tx_bytes += (tx_stat >> 16);
1046 }
1047 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1048 dev->stats.collisions += 16;
1049 dev->stats.tx_aborted_errors += 1;
1050 } else {
1051 dev->stats.collisions +=
1052 ((tx_stat >> 3) & 0xF);
1053 }
1054 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1055 dev->stats.tx_carrier_errors += 1;
1056 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1057 dev->stats.collisions++;
1058 dev->stats.tx_aborted_errors++;
1059 }
1060 }
1061 }
1062}
1063
1064/* Increments the Rx error counters */
1065static void
1066smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1067{
1068 int crc_err = 0;
1069
1070 if (unlikely(rxstat & RX_STS_ES_)) {
1071 dev->stats.rx_errors++;
1072 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1073 dev->stats.rx_crc_errors++;
1074 crc_err = 1;
1075 }
1076 }
1077 if (likely(!crc_err)) {
1078 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1079 (rxstat & RX_STS_LENGTH_ERR_)))
1080 dev->stats.rx_length_errors++;
1081 if (rxstat & RX_STS_MCAST_)
1082 dev->stats.multicast++;
1083 }
1084}
1085
1086/* Quickly dumps bad packets */
1087static void
1088smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
1089{
1090 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
1091
1092 if (likely(pktwords >= 4)) {
1093 unsigned int timeout = 500;
1094 unsigned int val;
1095 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1096 do {
1097 udelay(1);
1098 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1099 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1100
1101 if (unlikely(timeout == 0))
1102 SMSC_WARN(pdata, hw, "Timed out waiting for "
1103 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1104 } else {
1105 unsigned int temp;
1106 while (pktwords--)
1107 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1108 }
1109}
1110
1111/* NAPI poll function */
1112static int smsc911x_poll(struct napi_struct *napi, int budget)
1113{
1114 struct smsc911x_data *pdata =
1115 container_of(napi, struct smsc911x_data, napi);
1116 struct net_device *dev = pdata->dev;
1117 int npackets = 0;
1118
1119 while (npackets < budget) {
1120 unsigned int pktlength;
1121 unsigned int pktwords;
1122 struct sk_buff *skb;
1123 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1124
1125 if (!rxstat) {
1126 unsigned int temp;
1127 /* We processed all packets available. Tell NAPI it can
1128 * stop polling then re-enable rx interrupts */
1129 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1130 napi_complete(napi);
1131 temp = smsc911x_reg_read(pdata, INT_EN);
1132 temp |= INT_EN_RSFL_EN_;
1133 smsc911x_reg_write(pdata, INT_EN, temp);
1134 break;
1135 }
1136
1137 /* Count packet for NAPI scheduling, even if it has an error.
1138 * Error packets still require cycles to discard */
1139 npackets++;
1140
1141 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1142 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1143 smsc911x_rx_counterrors(dev, rxstat);
1144
1145 if (unlikely(rxstat & RX_STS_ES_)) {
1146 SMSC_WARN(pdata, rx_err,
1147 "Discarding packet with error bit set");
1148 /* Packet has an error, discard it and continue with
1149 * the next */
1150 smsc911x_rx_fastforward(pdata, pktwords);
1151 dev->stats.rx_dropped++;
1152 continue;
1153 }
1154
1155 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1156 if (unlikely(!skb)) {
1157 SMSC_WARN(pdata, rx_err,
1158 "Unable to allocate skb for rx packet");
1159 /* Drop the packet and stop this polling iteration */
1160 smsc911x_rx_fastforward(pdata, pktwords);
1161 dev->stats.rx_dropped++;
1162 break;
1163 }
1164
1165 skb->data = skb->head;
1166 skb_reset_tail_pointer(skb);
1167
1168 /* Align IP on 16B boundary */
1169 skb_reserve(skb, NET_IP_ALIGN);
1170 skb_put(skb, pktlength - 4);
1171 pdata->ops->rx_readfifo(pdata,
1172 (unsigned int *)skb->head, pktwords);
1173 skb->protocol = eth_type_trans(skb, dev);
1174 skb_checksum_none_assert(skb);
1175 netif_receive_skb(skb);
1176
1177 /* Update counters */
1178 dev->stats.rx_packets++;
1179 dev->stats.rx_bytes += (pktlength - 4);
1180 }
1181
1182 /* Return total received packets */
1183 return npackets;
1184}
1185
1186/* Returns hash bit number for given MAC address
1187 * Example:
1188 * 01 00 5E 00 00 01 -> returns bit number 31 */
1189static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1190{
1191 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1192}
1193
1194static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1195{
1196 /* Performs the multicast & mac_cr update. This is called when
1197 * safe on the current hardware, and with the mac_lock held */
1198 unsigned int mac_cr;
1199
1200 SMSC_ASSERT_MAC_LOCK(pdata);
1201
1202 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1203 mac_cr |= pdata->set_bits_mask;
1204 mac_cr &= ~(pdata->clear_bits_mask);
1205 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1206 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1207 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1208 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1209 mac_cr, pdata->hashhi, pdata->hashlo);
1210}
1211
1212static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1213{
1214 unsigned int mac_cr;
1215
1216 /* This function is only called for older LAN911x devices
1217 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1218 * be modified during Rx - newer devices immediately update the
1219 * registers.
1220 *
1221 * This is called from interrupt context */
1222
1223 spin_lock(&pdata->mac_lock);
1224
1225 /* Check Rx has stopped */
1226 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1227 SMSC_WARN(pdata, drv, "Rx not stopped");
1228
1229 /* Perform the update - safe to do now Rx has stopped */
1230 smsc911x_rx_multicast_update(pdata);
1231
1232 /* Re-enable Rx */
1233 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1234 mac_cr |= MAC_CR_RXEN_;
1235 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1236
1237 pdata->multicast_update_pending = 0;
1238
1239 spin_unlock(&pdata->mac_lock);
1240}
1241
1242static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1243{
1244 unsigned int timeout;
1245 unsigned int temp;
1246
1247 /* Reset the LAN911x */
1248 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1249 timeout = 10;
1250 do {
1251 udelay(10);
1252 temp = smsc911x_reg_read(pdata, HW_CFG);
1253 } while ((--timeout) && (temp & HW_CFG_SRST_));
1254
1255 if (unlikely(temp & HW_CFG_SRST_)) {
1256 SMSC_WARN(pdata, drv, "Failed to complete reset");
1257 return -EIO;
1258 }
1259 return 0;
1260}
1261
1262/* Sets the device MAC address to dev_addr, called with mac_lock held */
1263static void
1264smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1265{
1266 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1267 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1268 (dev_addr[1] << 8) | dev_addr[0];
1269
1270 SMSC_ASSERT_MAC_LOCK(pdata);
1271
1272 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1273 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1274}
1275
1276static int smsc911x_open(struct net_device *dev)
1277{
1278 struct smsc911x_data *pdata = netdev_priv(dev);
1279 unsigned int timeout;
1280 unsigned int temp;
1281 unsigned int intcfg;
1282
1283 /* if the phy is not yet registered, retry later*/
1284 if (!pdata->phy_dev) {
1285 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1286 return -EAGAIN;
1287 }
1288
1289 if (!is_valid_ether_addr(dev->dev_addr)) {
1290 SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1291 return -EADDRNOTAVAIL;
1292 }
1293
1294 /* Reset the LAN911x */
1295 if (smsc911x_soft_reset(pdata)) {
1296 SMSC_WARN(pdata, hw, "soft reset failed");
1297 return -EIO;
1298 }
1299
1300 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1301 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1302
1303 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1304 spin_lock_irq(&pdata->mac_lock);
1305 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1306 spin_unlock_irq(&pdata->mac_lock);
1307
1308 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1309 timeout = 50;
1310 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1311 --timeout) {
1312 udelay(10);
1313 }
1314
1315 if (unlikely(timeout == 0))
1316 SMSC_WARN(pdata, ifup,
1317 "Timed out waiting for EEPROM busy bit to clear");
1318
1319 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1320
1321 /* The soft reset above cleared the device's MAC address,
1322 * restore it from local copy (set in probe) */
1323 spin_lock_irq(&pdata->mac_lock);
1324 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1325 spin_unlock_irq(&pdata->mac_lock);
1326
1327 /* Initialise irqs, but leave all sources disabled */
1328 smsc911x_reg_write(pdata, INT_EN, 0);
1329 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1330
1331 /* Set interrupt deassertion to 100uS */
1332 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1333
1334 if (pdata->config.irq_polarity) {
1335 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1336 intcfg |= INT_CFG_IRQ_POL_;
1337 } else {
1338 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1339 }
1340
1341 if (pdata->config.irq_type) {
1342 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1343 intcfg |= INT_CFG_IRQ_TYPE_;
1344 } else {
1345 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1346 }
1347
1348 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1349
1350 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1351 pdata->software_irq_signal = 0;
1352 smp_wmb();
1353
1354 temp = smsc911x_reg_read(pdata, INT_EN);
1355 temp |= INT_EN_SW_INT_EN_;
1356 smsc911x_reg_write(pdata, INT_EN, temp);
1357
1358 timeout = 1000;
1359 while (timeout--) {
1360 if (pdata->software_irq_signal)
1361 break;
1362 msleep(1);
1363 }
1364
1365 if (!pdata->software_irq_signal) {
1366 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1367 dev->irq);
1368 return -ENODEV;
1369 }
1370 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1371 dev->irq);
1372
1373 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1374 (unsigned long)pdata->ioaddr, dev->irq);
1375
1376 /* Reset the last known duplex and carrier */
1377 pdata->last_duplex = -1;
1378 pdata->last_carrier = -1;
1379
1380 /* Bring the PHY up */
1381 phy_start(pdata->phy_dev);
1382
1383 temp = smsc911x_reg_read(pdata, HW_CFG);
1384 /* Preserve TX FIFO size and external PHY configuration */
1385 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1386 temp |= HW_CFG_SF_;
1387 smsc911x_reg_write(pdata, HW_CFG, temp);
1388
1389 temp = smsc911x_reg_read(pdata, FIFO_INT);
1390 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1391 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1392 smsc911x_reg_write(pdata, FIFO_INT, temp);
1393
1394 /* set RX Data offset to 2 bytes for alignment */
1395 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1396
1397 /* enable NAPI polling before enabling RX interrupts */
1398 napi_enable(&pdata->napi);
1399
1400 temp = smsc911x_reg_read(pdata, INT_EN);
1401 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1402 smsc911x_reg_write(pdata, INT_EN, temp);
1403
1404 spin_lock_irq(&pdata->mac_lock);
1405 temp = smsc911x_mac_read(pdata, MAC_CR);
1406 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1407 smsc911x_mac_write(pdata, MAC_CR, temp);
1408 spin_unlock_irq(&pdata->mac_lock);
1409
1410 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1411
1412 netif_start_queue(dev);
1413 return 0;
1414}
1415
1416/* Entry point for stopping the interface */
1417static int smsc911x_stop(struct net_device *dev)
1418{
1419 struct smsc911x_data *pdata = netdev_priv(dev);
1420 unsigned int temp;
1421
1422 /* Disable all device interrupts */
1423 temp = smsc911x_reg_read(pdata, INT_CFG);
1424 temp &= ~INT_CFG_IRQ_EN_;
1425 smsc911x_reg_write(pdata, INT_CFG, temp);
1426
1427 /* Stop Tx and Rx polling */
1428 netif_stop_queue(dev);
1429 napi_disable(&pdata->napi);
1430
1431 /* At this point all Rx and Tx activity is stopped */
1432 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1433 smsc911x_tx_update_txcounters(dev);
1434
1435 /* Bring the PHY down */
1436 if (pdata->phy_dev)
1437 phy_stop(pdata->phy_dev);
1438
1439 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1440 return 0;
1441}
1442
1443/* Entry point for transmitting a packet */
1444static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1445{
1446 struct smsc911x_data *pdata = netdev_priv(dev);
1447 unsigned int freespace;
1448 unsigned int tx_cmd_a;
1449 unsigned int tx_cmd_b;
1450 unsigned int temp;
1451 u32 wrsz;
1452 ulong bufp;
1453
1454 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1455
1456 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1457 SMSC_WARN(pdata, tx_err,
1458 "Tx data fifo low, space available: %d", freespace);
1459
1460 /* Word alignment adjustment */
1461 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1462 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1463 tx_cmd_a |= (unsigned int)skb->len;
1464
1465 tx_cmd_b = ((unsigned int)skb->len) << 16;
1466 tx_cmd_b |= (unsigned int)skb->len;
1467
1468 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1469 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1470
1471 bufp = (ulong)skb->data & (~0x3);
1472 wrsz = (u32)skb->len + 3;
1473 wrsz += (u32)((ulong)skb->data & 0x3);
1474 wrsz >>= 2;
1475
1476 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1477 freespace -= (skb->len + 32);
1478 skb_tx_timestamp(skb);
1479 dev_kfree_skb(skb);
1480
1481 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1482 smsc911x_tx_update_txcounters(dev);
1483
1484 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1485 netif_stop_queue(dev);
1486 temp = smsc911x_reg_read(pdata, FIFO_INT);
1487 temp &= 0x00FFFFFF;
1488 temp |= 0x32000000;
1489 smsc911x_reg_write(pdata, FIFO_INT, temp);
1490 }
1491
1492 return NETDEV_TX_OK;
1493}
1494
1495/* Entry point for getting status counters */
1496static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1497{
1498 struct smsc911x_data *pdata = netdev_priv(dev);
1499 smsc911x_tx_update_txcounters(dev);
1500 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1501 return &dev->stats;
1502}
1503
1504/* Entry point for setting addressing modes */
1505static void smsc911x_set_multicast_list(struct net_device *dev)
1506{
1507 struct smsc911x_data *pdata = netdev_priv(dev);
1508 unsigned long flags;
1509
1510 if (dev->flags & IFF_PROMISC) {
1511 /* Enabling promiscuous mode */
1512 pdata->set_bits_mask = MAC_CR_PRMS_;
1513 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1514 pdata->hashhi = 0;
1515 pdata->hashlo = 0;
1516 } else if (dev->flags & IFF_ALLMULTI) {
1517 /* Enabling all multicast mode */
1518 pdata->set_bits_mask = MAC_CR_MCPAS_;
1519 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1520 pdata->hashhi = 0;
1521 pdata->hashlo = 0;
1522 } else if (!netdev_mc_empty(dev)) {
1523 /* Enabling specific multicast addresses */
1524 unsigned int hash_high = 0;
1525 unsigned int hash_low = 0;
1526 struct netdev_hw_addr *ha;
1527
1528 pdata->set_bits_mask = MAC_CR_HPFILT_;
1529 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1530
1531 netdev_for_each_mc_addr(ha, dev) {
1532 unsigned int bitnum = smsc911x_hash(ha->addr);
1533 unsigned int mask = 0x01 << (bitnum & 0x1F);
1534
1535 if (bitnum & 0x20)
1536 hash_high |= mask;
1537 else
1538 hash_low |= mask;
1539 }
1540
1541 pdata->hashhi = hash_high;
1542 pdata->hashlo = hash_low;
1543 } else {
1544 /* Enabling local MAC address only */
1545 pdata->set_bits_mask = 0;
1546 pdata->clear_bits_mask =
1547 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1548 pdata->hashhi = 0;
1549 pdata->hashlo = 0;
1550 }
1551
1552 spin_lock_irqsave(&pdata->mac_lock, flags);
1553
1554 if (pdata->generation <= 1) {
1555 /* Older hardware revision - cannot change these flags while
1556 * receiving data */
1557 if (!pdata->multicast_update_pending) {
1558 unsigned int temp;
1559 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1560 pdata->multicast_update_pending = 1;
1561
1562 /* Request the hardware to stop, then perform the
1563 * update when we get an RX_STOP interrupt */
1564 temp = smsc911x_mac_read(pdata, MAC_CR);
1565 temp &= ~(MAC_CR_RXEN_);
1566 smsc911x_mac_write(pdata, MAC_CR, temp);
1567 } else {
1568 /* There is another update pending, this should now
1569 * use the newer values */
1570 }
1571 } else {
1572 /* Newer hardware revision - can write immediately */
1573 smsc911x_rx_multicast_update(pdata);
1574 }
1575
1576 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1577}
1578
1579static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1580{
1581 struct net_device *dev = dev_id;
1582 struct smsc911x_data *pdata = netdev_priv(dev);
1583 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1584 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1585 int serviced = IRQ_NONE;
1586 u32 temp;
1587
1588 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1589 temp = smsc911x_reg_read(pdata, INT_EN);
1590 temp &= (~INT_EN_SW_INT_EN_);
1591 smsc911x_reg_write(pdata, INT_EN, temp);
1592 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1593 pdata->software_irq_signal = 1;
1594 smp_wmb();
1595 serviced = IRQ_HANDLED;
1596 }
1597
1598 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1599 /* Called when there is a multicast update scheduled and
1600 * it is now safe to complete the update */
1601 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1602 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1603 if (pdata->multicast_update_pending)
1604 smsc911x_rx_multicast_update_workaround(pdata);
1605 serviced = IRQ_HANDLED;
1606 }
1607
1608 if (intsts & inten & INT_STS_TDFA_) {
1609 temp = smsc911x_reg_read(pdata, FIFO_INT);
1610 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1611 smsc911x_reg_write(pdata, FIFO_INT, temp);
1612 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1613 netif_wake_queue(dev);
1614 serviced = IRQ_HANDLED;
1615 }
1616
1617 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1618 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1619 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1620 serviced = IRQ_HANDLED;
1621 }
1622
1623 if (likely(intsts & inten & INT_STS_RSFL_)) {
1624 if (likely(napi_schedule_prep(&pdata->napi))) {
1625 /* Disable Rx interrupts */
1626 temp = smsc911x_reg_read(pdata, INT_EN);
1627 temp &= (~INT_EN_RSFL_EN_);
1628 smsc911x_reg_write(pdata, INT_EN, temp);
1629 /* Schedule a NAPI poll */
1630 __napi_schedule(&pdata->napi);
1631 } else {
1632 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1633 }
1634 serviced = IRQ_HANDLED;
1635 }
1636
1637 return serviced;
1638}
1639
1640#ifdef CONFIG_NET_POLL_CONTROLLER
1641static void smsc911x_poll_controller(struct net_device *dev)
1642{
1643 disable_irq(dev->irq);
1644 smsc911x_irqhandler(0, dev);
1645 enable_irq(dev->irq);
1646}
1647#endif /* CONFIG_NET_POLL_CONTROLLER */
1648
1649static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1650{
1651 struct smsc911x_data *pdata = netdev_priv(dev);
1652 struct sockaddr *addr = p;
1653
1654 /* On older hardware revisions we cannot change the mac address
1655 * registers while receiving data. Newer devices can safely change
1656 * this at any time. */
1657 if (pdata->generation <= 1 && netif_running(dev))
1658 return -EBUSY;
1659
1660 if (!is_valid_ether_addr(addr->sa_data))
1661 return -EADDRNOTAVAIL;
1662
1663 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1664
1665 spin_lock_irq(&pdata->mac_lock);
1666 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1667 spin_unlock_irq(&pdata->mac_lock);
1668
1669 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1670
1671 return 0;
1672}
1673
1674/* Standard ioctls for mii-tool */
1675static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1676{
1677 struct smsc911x_data *pdata = netdev_priv(dev);
1678
1679 if (!netif_running(dev) || !pdata->phy_dev)
1680 return -EINVAL;
1681
1682 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1683}
1684
1685static int
1686smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1687{
1688 struct smsc911x_data *pdata = netdev_priv(dev);
1689
1690 cmd->maxtxpkt = 1;
1691 cmd->maxrxpkt = 1;
1692 return phy_ethtool_gset(pdata->phy_dev, cmd);
1693}
1694
1695static int
1696smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1697{
1698 struct smsc911x_data *pdata = netdev_priv(dev);
1699
1700 return phy_ethtool_sset(pdata->phy_dev, cmd);
1701}
1702
1703static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1704 struct ethtool_drvinfo *info)
1705{
1706 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1707 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1708 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1709 sizeof(info->bus_info));
1710}
1711
1712static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1713{
1714 struct smsc911x_data *pdata = netdev_priv(dev);
1715
1716 return phy_start_aneg(pdata->phy_dev);
1717}
1718
1719static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1720{
1721 struct smsc911x_data *pdata = netdev_priv(dev);
1722 return pdata->msg_enable;
1723}
1724
1725static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1726{
1727 struct smsc911x_data *pdata = netdev_priv(dev);
1728 pdata->msg_enable = level;
1729}
1730
1731static int smsc911x_ethtool_getregslen(struct net_device *dev)
1732{
1733 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1734 sizeof(u32);
1735}
1736
1737static void
1738smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1739 void *buf)
1740{
1741 struct smsc911x_data *pdata = netdev_priv(dev);
1742 struct phy_device *phy_dev = pdata->phy_dev;
1743 unsigned long flags;
1744 unsigned int i;
1745 unsigned int j = 0;
1746 u32 *data = buf;
1747
1748 regs->version = pdata->idrev;
1749 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1750 data[j++] = smsc911x_reg_read(pdata, i);
1751
1752 for (i = MAC_CR; i <= WUCSR; i++) {
1753 spin_lock_irqsave(&pdata->mac_lock, flags);
1754 data[j++] = smsc911x_mac_read(pdata, i);
1755 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1756 }
1757
1758 for (i = 0; i <= 31; i++)
1759 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1760}
1761
1762static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1763{
1764 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1765 temp &= ~GPIO_CFG_EEPR_EN_;
1766 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1767 msleep(1);
1768}
1769
1770static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1771{
1772 int timeout = 100;
1773 u32 e2cmd;
1774
1775 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1776 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1777 SMSC_WARN(pdata, drv, "Busy at start");
1778 return -EBUSY;
1779 }
1780
1781 e2cmd = op | E2P_CMD_EPC_BUSY_;
1782 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1783
1784 do {
1785 msleep(1);
1786 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1787 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1788
1789 if (!timeout) {
1790 SMSC_TRACE(pdata, drv, "TIMED OUT");
1791 return -EAGAIN;
1792 }
1793
1794 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1795 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1796 return -EINVAL;
1797 }
1798
1799 return 0;
1800}
1801
1802static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1803 u8 address, u8 *data)
1804{
1805 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1806 int ret;
1807
1808 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1809 ret = smsc911x_eeprom_send_cmd(pdata, op);
1810
1811 if (!ret)
1812 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1813
1814 return ret;
1815}
1816
1817static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1818 u8 address, u8 data)
1819{
1820 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1821 u32 temp;
1822 int ret;
1823
1824 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1825 ret = smsc911x_eeprom_send_cmd(pdata, op);
1826
1827 if (!ret) {
1828 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1829 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1830
1831 /* Workaround for hardware read-after-write restriction */
1832 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1833
1834 ret = smsc911x_eeprom_send_cmd(pdata, op);
1835 }
1836
1837 return ret;
1838}
1839
1840static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1841{
1842 return SMSC911X_EEPROM_SIZE;
1843}
1844
1845static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1846 struct ethtool_eeprom *eeprom, u8 *data)
1847{
1848 struct smsc911x_data *pdata = netdev_priv(dev);
1849 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1850 int len;
1851 int i;
1852
1853 smsc911x_eeprom_enable_access(pdata);
1854
1855 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1856 for (i = 0; i < len; i++) {
1857 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1858 if (ret < 0) {
1859 eeprom->len = 0;
1860 return ret;
1861 }
1862 }
1863
1864 memcpy(data, &eeprom_data[eeprom->offset], len);
1865 eeprom->len = len;
1866 return 0;
1867}
1868
1869static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1870 struct ethtool_eeprom *eeprom, u8 *data)
1871{
1872 int ret;
1873 struct smsc911x_data *pdata = netdev_priv(dev);
1874
1875 smsc911x_eeprom_enable_access(pdata);
1876 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1877 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1878 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1879
1880 /* Single byte write, according to man page */
1881 eeprom->len = 1;
1882
1883 return ret;
1884}
1885
1886static const struct ethtool_ops smsc911x_ethtool_ops = {
1887 .get_settings = smsc911x_ethtool_getsettings,
1888 .set_settings = smsc911x_ethtool_setsettings,
1889 .get_link = ethtool_op_get_link,
1890 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1891 .nway_reset = smsc911x_ethtool_nwayreset,
1892 .get_msglevel = smsc911x_ethtool_getmsglevel,
1893 .set_msglevel = smsc911x_ethtool_setmsglevel,
1894 .get_regs_len = smsc911x_ethtool_getregslen,
1895 .get_regs = smsc911x_ethtool_getregs,
1896 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1897 .get_eeprom = smsc911x_ethtool_get_eeprom,
1898 .set_eeprom = smsc911x_ethtool_set_eeprom,
1899};
1900
1901static const struct net_device_ops smsc911x_netdev_ops = {
1902 .ndo_open = smsc911x_open,
1903 .ndo_stop = smsc911x_stop,
1904 .ndo_start_xmit = smsc911x_hard_start_xmit,
1905 .ndo_get_stats = smsc911x_get_stats,
1906 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1907 .ndo_do_ioctl = smsc911x_do_ioctl,
1908 .ndo_change_mtu = eth_change_mtu,
1909 .ndo_validate_addr = eth_validate_addr,
1910 .ndo_set_mac_address = smsc911x_set_mac_address,
1911#ifdef CONFIG_NET_POLL_CONTROLLER
1912 .ndo_poll_controller = smsc911x_poll_controller,
1913#endif
1914};
1915
1916/* copies the current mac address from hardware to dev->dev_addr */
1917static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1918{
1919 struct smsc911x_data *pdata = netdev_priv(dev);
1920 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1921 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1922
1923 dev->dev_addr[0] = (u8)(mac_low32);
1924 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1925 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1926 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1927 dev->dev_addr[4] = (u8)(mac_high16);
1928 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1929}
1930
1931/* Initializing private device structures, only called from probe */
1932static int __devinit smsc911x_init(struct net_device *dev)
1933{
1934 struct smsc911x_data *pdata = netdev_priv(dev);
1935 unsigned int byte_test;
1936
1937 SMSC_TRACE(pdata, probe, "Driver Parameters:");
1938 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
1939 (unsigned long)pdata->ioaddr);
1940 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
1941 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
1942
1943 spin_lock_init(&pdata->dev_lock);
1944 spin_lock_init(&pdata->mac_lock);
1945
1946 if (pdata->ioaddr == 0) {
1947 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
1948 return -ENODEV;
1949 }
1950
1951 /* Check byte ordering */
1952 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1953 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
1954 if (byte_test == 0x43218765) {
1955 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
1956 "applying WORD_SWAP");
1957 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1958
1959 /* 1 dummy read of BYTE_TEST is needed after a write to
1960 * WORD_SWAP before its contents are valid */
1961 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1962
1963 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1964 }
1965
1966 if (byte_test != 0x87654321) {
1967 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
1968 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1969 SMSC_WARN(pdata, probe,
1970 "top 16 bits equal to bottom 16 bits");
1971 SMSC_TRACE(pdata, probe,
1972 "This may mean the chip is set "
1973 "for 32 bit while the bus is reading 16 bit");
1974 }
1975 return -ENODEV;
1976 }
1977
1978 /* Default generation to zero (all workarounds apply) */
1979 pdata->generation = 0;
1980
1981 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1982 switch (pdata->idrev & 0xFFFF0000) {
1983 case 0x01180000:
1984 case 0x01170000:
1985 case 0x01160000:
1986 case 0x01150000:
1987 case 0x218A0000:
1988 /* LAN911[5678] family */
1989 pdata->generation = pdata->idrev & 0x0000FFFF;
1990 break;
1991
1992 case 0x118A0000:
1993 case 0x117A0000:
1994 case 0x116A0000:
1995 case 0x115A0000:
1996 /* LAN921[5678] family */
1997 pdata->generation = 3;
1998 break;
1999
2000 case 0x92100000:
2001 case 0x92110000:
2002 case 0x92200000:
2003 case 0x92210000:
2004 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2005 pdata->generation = 4;
2006 break;
2007
2008 default:
2009 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2010 pdata->idrev);
2011 return -ENODEV;
2012 }
2013
2014 SMSC_TRACE(pdata, probe,
2015 "LAN911x identified, idrev: 0x%08X, generation: %d",
2016 pdata->idrev, pdata->generation);
2017
2018 if (pdata->generation == 0)
2019 SMSC_WARN(pdata, probe,
2020 "This driver is not intended for this chip revision");
2021
2022 /* workaround for platforms without an eeprom, where the mac address
2023 * is stored elsewhere and set by the bootloader. This saves the
2024 * mac address before resetting the device */
2025 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2026 spin_lock_irq(&pdata->mac_lock);
2027 smsc911x_read_mac_address(dev);
2028 spin_unlock_irq(&pdata->mac_lock);
2029 }
2030
2031 /* Reset the LAN911x */
2032 if (smsc911x_soft_reset(pdata))
2033 return -ENODEV;
2034
2035 /* Disable all interrupt sources until we bring the device up */
2036 smsc911x_reg_write(pdata, INT_EN, 0);
2037
2038 ether_setup(dev);
2039 dev->flags |= IFF_MULTICAST;
2040 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2041 dev->netdev_ops = &smsc911x_netdev_ops;
2042 dev->ethtool_ops = &smsc911x_ethtool_ops;
2043
2044 return 0;
2045}
2046
2047static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
2048{
2049 struct net_device *dev;
2050 struct smsc911x_data *pdata;
2051 struct resource *res;
2052
2053 dev = platform_get_drvdata(pdev);
2054 BUG_ON(!dev);
2055 pdata = netdev_priv(dev);
2056 BUG_ON(!pdata);
2057 BUG_ON(!pdata->ioaddr);
2058 BUG_ON(!pdata->phy_dev);
2059
2060 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2061
2062 phy_disconnect(pdata->phy_dev);
2063 pdata->phy_dev = NULL;
2064 mdiobus_unregister(pdata->mii_bus);
2065 mdiobus_free(pdata->mii_bus);
2066
2067 platform_set_drvdata(pdev, NULL);
2068 unregister_netdev(dev);
2069 free_irq(dev->irq, dev);
2070 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2071 "smsc911x-memory");
2072 if (!res)
2073 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2074
2075 release_mem_region(res->start, resource_size(res));
2076
2077 iounmap(pdata->ioaddr);
2078
2079 free_netdev(dev);
2080
2081 return 0;
2082}
2083
2084/* standard register acces */
2085static const struct smsc911x_ops standard_smsc911x_ops = {
2086 .reg_read = __smsc911x_reg_read,
2087 .reg_write = __smsc911x_reg_write,
2088 .rx_readfifo = smsc911x_rx_readfifo,
2089 .tx_writefifo = smsc911x_tx_writefifo,
2090};
2091
2092/* shifted register access */
2093static const struct smsc911x_ops shifted_smsc911x_ops = {
2094 .reg_read = __smsc911x_reg_read_shift,
2095 .reg_write = __smsc911x_reg_write_shift,
2096 .rx_readfifo = smsc911x_rx_readfifo_shift,
2097 .tx_writefifo = smsc911x_tx_writefifo_shift,
2098};
2099
2100static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
2101{
2102 struct net_device *dev;
2103 struct smsc911x_data *pdata;
2104 struct smsc911x_platform_config *config = pdev->dev.platform_data;
2105 struct resource *res, *irq_res;
2106 unsigned int intcfg = 0;
2107 int res_size, irq_flags;
2108 int retval;
2109
2110 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2111
2112 /* platform data specifies irq & dynamic bus configuration */
2113 if (!pdev->dev.platform_data) {
2114 pr_warn("platform_data not provided\n");
2115 retval = -ENODEV;
2116 goto out_0;
2117 }
2118
2119 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2120 "smsc911x-memory");
2121 if (!res)
2122 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2123 if (!res) {
2124 pr_warn("Could not allocate resource\n");
2125 retval = -ENODEV;
2126 goto out_0;
2127 }
2128 res_size = resource_size(res);
2129
2130 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2131 if (!irq_res) {
2132 pr_warn("Could not allocate irq resource\n");
2133 retval = -ENODEV;
2134 goto out_0;
2135 }
2136
2137 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2138 retval = -EBUSY;
2139 goto out_0;
2140 }
2141
2142 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2143 if (!dev) {
2144 pr_warn("Could not allocate device\n");
2145 retval = -ENOMEM;
2146 goto out_release_io_1;
2147 }
2148
2149 SET_NETDEV_DEV(dev, &pdev->dev);
2150
2151 pdata = netdev_priv(dev);
2152
2153 dev->irq = irq_res->start;
2154 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2155 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2156
2157 /* copy config parameters across to pdata */
2158 memcpy(&pdata->config, config, sizeof(pdata->config));
2159
2160 pdata->dev = dev;
2161 pdata->msg_enable = ((1 << debug) - 1);
2162
2163 if (pdata->ioaddr == NULL) {
2164 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2165 retval = -ENOMEM;
2166 goto out_free_netdev_2;
2167 }
2168
2169 /* assume standard, non-shifted, access to HW registers */
2170 pdata->ops = &standard_smsc911x_ops;
2171 /* apply the right access if shifting is needed */
2172 if (config->shift)
2173 pdata->ops = &shifted_smsc911x_ops;
2174
2175 retval = smsc911x_init(dev);
2176 if (retval < 0)
2177 goto out_unmap_io_3;
2178
2179 /* configure irq polarity and type before connecting isr */
2180 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2181 intcfg |= INT_CFG_IRQ_POL_;
2182
2183 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2184 intcfg |= INT_CFG_IRQ_TYPE_;
2185
2186 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2187
2188 /* Ensure interrupts are globally disabled before connecting ISR */
2189 smsc911x_reg_write(pdata, INT_EN, 0);
2190 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2191
2192 retval = request_irq(dev->irq, smsc911x_irqhandler,
2193 irq_flags | IRQF_SHARED, dev->name, dev);
2194 if (retval) {
2195 SMSC_WARN(pdata, probe,
2196 "Unable to claim requested irq: %d", dev->irq);
2197 goto out_unmap_io_3;
2198 }
2199
2200 platform_set_drvdata(pdev, dev);
2201
2202 retval = register_netdev(dev);
2203 if (retval) {
2204 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2205 goto out_unset_drvdata_4;
2206 } else {
2207 SMSC_TRACE(pdata, probe,
2208 "Network interface: \"%s\"", dev->name);
2209 }
2210
2211 retval = smsc911x_mii_init(pdev, dev);
2212 if (retval) {
2213 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2214 goto out_unregister_netdev_5;
2215 }
2216
2217 spin_lock_irq(&pdata->mac_lock);
2218
2219 /* Check if mac address has been specified when bringing interface up */
2220 if (is_valid_ether_addr(dev->dev_addr)) {
2221 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2222 SMSC_TRACE(pdata, probe,
2223 "MAC Address is specified by configuration");
2224 } else if (is_valid_ether_addr(pdata->config.mac)) {
2225 memcpy(dev->dev_addr, pdata->config.mac, 6);
2226 SMSC_TRACE(pdata, probe,
2227 "MAC Address specified by platform data");
2228 } else {
2229 /* Try reading mac address from device. if EEPROM is present
2230 * it will already have been set */
2231 smsc_get_mac(dev);
2232
2233 if (is_valid_ether_addr(dev->dev_addr)) {
2234 /* eeprom values are valid so use them */
2235 SMSC_TRACE(pdata, probe,
2236 "Mac Address is read from LAN911x EEPROM");
2237 } else {
2238 /* eeprom values are invalid, generate random MAC */
2239 random_ether_addr(dev->dev_addr);
2240 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2241 SMSC_TRACE(pdata, probe,
2242 "MAC Address is set to random_ether_addr");
2243 }
2244 }
2245
2246 spin_unlock_irq(&pdata->mac_lock);
2247
2248 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2249
2250 return 0;
2251
2252out_unregister_netdev_5:
2253 unregister_netdev(dev);
2254out_unset_drvdata_4:
2255 platform_set_drvdata(pdev, NULL);
2256 free_irq(dev->irq, dev);
2257out_unmap_io_3:
2258 iounmap(pdata->ioaddr);
2259out_free_netdev_2:
2260 free_netdev(dev);
2261out_release_io_1:
2262 release_mem_region(res->start, resource_size(res));
2263out_0:
2264 return retval;
2265}
2266
2267#ifdef CONFIG_PM
2268/* This implementation assumes the devices remains powered on its VDDVARIO
2269 * pins during suspend. */
2270
2271/* TODO: implement freeze/thaw callbacks for hibernation.*/
2272
2273static int smsc911x_suspend(struct device *dev)
2274{
2275 struct net_device *ndev = dev_get_drvdata(dev);
2276 struct smsc911x_data *pdata = netdev_priv(ndev);
2277
2278 /* enable wake on LAN, energy detection and the external PME
2279 * signal. */
2280 smsc911x_reg_write(pdata, PMT_CTRL,
2281 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2282 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2283
2284 return 0;
2285}
2286
2287static int smsc911x_resume(struct device *dev)
2288{
2289 struct net_device *ndev = dev_get_drvdata(dev);
2290 struct smsc911x_data *pdata = netdev_priv(ndev);
2291 unsigned int to = 100;
2292
2293 /* Note 3.11 from the datasheet:
2294 * "When the LAN9220 is in a power saving state, a write of any
2295 * data to the BYTE_TEST register will wake-up the device."
2296 */
2297 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2298
2299 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2300 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2301 * if it failed. */
2302 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2303 udelay(1000);
2304
2305 return (to == 0) ? -EIO : 0;
2306}
2307
2308static const struct dev_pm_ops smsc911x_pm_ops = {
2309 .suspend = smsc911x_suspend,
2310 .resume = smsc911x_resume,
2311};
2312
2313#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2314
2315#else
2316#define SMSC911X_PM_OPS NULL
2317#endif
2318
2319static struct platform_driver smsc911x_driver = {
2320 .probe = smsc911x_drv_probe,
2321 .remove = __devexit_p(smsc911x_drv_remove),
2322 .driver = {
2323 .name = SMSC_CHIPNAME,
2324 .owner = THIS_MODULE,
2325 .pm = SMSC911X_PM_OPS,
2326 },
2327};
2328
2329/* Entry point for loading the module */
2330static int __init smsc911x_init_module(void)
2331{
2332 SMSC_INITIALIZE();
2333 return platform_driver_register(&smsc911x_driver);
2334}
2335
2336/* entry point for unloading the module */
2337static void __exit smsc911x_cleanup_module(void)
2338{
2339 platform_driver_unregister(&smsc911x_driver);
2340}
2341
2342module_init(smsc911x_init_module);
2343module_exit(smsc911x_cleanup_module);