1// SPDX-License-Identifier: GPL-2.0
  2
  3#include <linux/cpumask.h>
  4#include <linux/acpi.h>
 
 
 
 
  5
  6#include "local.h"
 
  7
  8int x2apic_phys;
  9
 10static struct apic apic_x2apic_phys;
 11u32 x2apic_max_apicid __ro_after_init = UINT_MAX;
 12
 13void __init x2apic_set_max_apicid(u32 apicid)
 14{
 15	x2apic_max_apicid = apicid;
 16	if (apic->x2apic_set_max_apicid)
 17		apic->max_apic_id = apicid;
 18}
 19
 20static int __init set_x2apic_phys_mode(char *arg)
 21{
 22	x2apic_phys = 1;
 23	return 0;
 24}
 25early_param("x2apic_phys", set_x2apic_phys_mode);
 26
 27static bool x2apic_fadt_phys(void)
 28{
 29#ifdef CONFIG_ACPI
 30	if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
 31		(acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
 32		printk(KERN_DEBUG "System requires x2apic physical mode\n");
 33		return true;
 34	}
 35#endif
 36	return false;
 37}
 38
 39static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 40{
 41	return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
 42}
 43
 44static void x2apic_send_IPI(int cpu, int vector)
 45{
 46	u32 dest = per_cpu(x86_cpu_to_apicid, cpu);
 47
 48	/* x2apic MSRs are special and need a special fence: */
 49	weak_wrmsr_fence();
 50	__x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL);
 51}
 52
 53static void
 54__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
 55{
 56	unsigned long query_cpu;
 57	unsigned long this_cpu;
 58	unsigned long flags;
 59
 60	/* x2apic MSRs are special and need a special fence: */
 61	weak_wrmsr_fence();
 62
 63	local_irq_save(flags);
 64
 65	this_cpu = smp_processor_id();
 66	for_each_cpu(query_cpu, mask) {
 67		if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
 68			continue;
 69		__x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
 70				       vector, APIC_DEST_PHYSICAL);
 71	}
 72	local_irq_restore(flags);
 73}
 74
 75static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 76{
 77	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
 78}
 79
 80static void
 81 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 82{
 83	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
 84}
 85
 86static void __x2apic_send_IPI_shorthand(int vector, u32 which)
 87{
 88	unsigned long cfg = __prepare_ICR(which, vector, 0);
 89
 90	/* x2apic MSRs are special and need a special fence: */
 91	weak_wrmsr_fence();
 92	native_x2apic_icr_write(cfg, 0);
 93}
 94
 95void x2apic_send_IPI_allbutself(int vector)
 96{
 97	__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
 98}
 99
100void x2apic_send_IPI_all(int vector)
101{
102	__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
 
 
 
 
 
 
 
 
 
103}
104
105void x2apic_send_IPI_self(int vector)
 
 
106{
107	apic_write(APIC_SELF_IPI, vector);
 
 
 
 
 
 
 
 
 
 
 
108}
109
110void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
111{
112	unsigned long cfg = __prepare_ICR(0, vector, dest);
113	native_x2apic_icr_write(cfg, apicid);
114}
115
116static int x2apic_phys_probe(void)
117{
118	if (!x2apic_mode)
119		return 0;
120
121	if (x2apic_phys || x2apic_fadt_phys())
122		return 1;
123
124	return apic == &apic_x2apic_phys;
125}
126
127u32 x2apic_get_apic_id(u32 id)
128{
129	return id;
130}
131
132static struct apic apic_x2apic_phys __ro_after_init = {
133
134	.name				= "physical x2apic",
135	.probe				= x2apic_phys_probe,
136	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
 
137
138	.dest_mode_logical		= false,
 
139
 
140	.disable_esr			= 0,
141
 
 
 
 
 
 
 
 
 
142	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 
 
 
 
 
143
144	.max_apic_id			= UINT_MAX,
145	.x2apic_set_max_apicid		= true,
146	.get_apic_id			= x2apic_get_apic_id,
 
 
147
148	.calc_dest_apicid		= apic_default_calc_apicid,
 
149
150	.send_IPI			= x2apic_send_IPI,
151	.send_IPI_mask			= x2apic_send_IPI_mask,
152	.send_IPI_mask_allbutself	= x2apic_send_IPI_mask_allbutself,
153	.send_IPI_allbutself		= x2apic_send_IPI_allbutself,
154	.send_IPI_all			= x2apic_send_IPI_all,
155	.send_IPI_self			= x2apic_send_IPI_self,
156	.nmi_to_offline_cpu		= true,
 
 
 
 
 
157
158	.read				= native_apic_msr_read,
159	.write				= native_apic_msr_write,
160	.eoi				= native_apic_msr_eoi,
161	.icr_read			= native_x2apic_icr_read,
162	.icr_write			= native_x2apic_icr_write,
 
 
163};
164
165apic_driver(apic_x2apic_phys);

  1#include <linux/threads.h>
 
  2#include <linux/cpumask.h>
  3#include <linux/string.h>
  4#include <linux/kernel.h>
  5#include <linux/ctype.h>
  6#include <linux/init.h>
  7#include <linux/dmar.h>
  8
  9#include <asm/smp.h>
 10#include <asm/x2apic.h>
 11
 12int x2apic_phys;
 13
 14static struct apic apic_x2apic_phys;
 
 
 
 
 
 
 
 
 15
 16static int set_x2apic_phys_mode(char *arg)
 17{
 18	x2apic_phys = 1;
 19	return 0;
 20}
 21early_param("x2apic_phys", set_x2apic_phys_mode);
 22
 
 
 
 
 
 
 
 
 
 
 
 
 23static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 24{
 25	if (x2apic_phys)
 26		return x2apic_enabled();
 27	else
 28		return 0;
 
 
 
 
 
 
 29}
 30
 31static void
 32__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
 33{
 34	unsigned long query_cpu;
 35	unsigned long this_cpu;
 36	unsigned long flags;
 37
 38	x2apic_wrmsr_fence();
 
 39
 40	local_irq_save(flags);
 41
 42	this_cpu = smp_processor_id();
 43	for_each_cpu(query_cpu, mask) {
 44		if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
 45			continue;
 46		__x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
 47				       vector, APIC_DEST_PHYSICAL);
 48	}
 49	local_irq_restore(flags);
 50}
 51
 52static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 53{
 54	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
 55}
 56
 57static void
 58 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 59{
 60	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
 61}
 62
 63static void x2apic_send_IPI_allbutself(int vector)
 64{
 65	__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
 
 
 
 
 66}
 67
 68static void x2apic_send_IPI_all(int vector)
 69{
 70	__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
 71}
 72
 73static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 74{
 75	/*
 76	 * We're using fixed IRQ delivery, can only return one phys APIC ID.
 77	 * May as well be the first.
 78	 */
 79	int cpu = cpumask_first(cpumask);
 80
 81	if ((unsigned)cpu < nr_cpu_ids)
 82		return per_cpu(x86_cpu_to_apicid, cpu);
 83	else
 84		return BAD_APICID;
 85}
 86
 87static unsigned int
 88x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 89			      const struct cpumask *andmask)
 90{
 91	int cpu;
 92
 93	/*
 94	 * We're using fixed IRQ delivery, can only return one phys APIC ID.
 95	 * May as well be the first.
 96	 */
 97	for_each_cpu_and(cpu, cpumask, andmask) {
 98		if (cpumask_test_cpu(cpu, cpu_online_mask))
 99			break;
100	}
101
102	return per_cpu(x86_cpu_to_apicid, cpu);
103}
104
105static void init_x2apic_ldr(void)
106{
 
 
107}
108
109static int x2apic_phys_probe(void)
110{
111	if (x2apic_mode && x2apic_phys)
 
 
 
112		return 1;
113
114	return apic == &apic_x2apic_phys;
115}
116
117static struct apic apic_x2apic_phys = {
 
 
 
 
 
118
119	.name				= "physical x2apic",
120	.probe				= x2apic_phys_probe,
121	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
122	.apic_id_registered		= x2apic_apic_id_registered,
123
124	.irq_delivery_mode		= dest_Fixed,
125	.irq_dest_mode			= 0, /* physical */
126
127	.target_cpus			= x2apic_target_cpus,
128	.disable_esr			= 0,
129	.dest_logical			= 0,
130	.check_apicid_used		= NULL,
131	.check_apicid_present		= NULL,
132
133	.vector_allocation_domain	= x2apic_vector_allocation_domain,
134	.init_apic_ldr			= init_x2apic_ldr,
135
136	.ioapic_phys_id_map		= NULL,
137	.setup_apic_routing		= NULL,
138	.multi_timer_check		= NULL,
139	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
140	.apicid_to_cpu_present		= NULL,
141	.setup_portio_remap		= NULL,
142	.check_phys_apicid_present	= default_check_phys_apicid_present,
143	.enable_apic_mode		= NULL,
144	.phys_pkg_id			= x2apic_phys_pkg_id,
145	.mps_oem_check			= NULL,
146
 
 
147	.get_apic_id			= x2apic_get_apic_id,
148	.set_apic_id			= x2apic_set_apic_id,
149	.apic_id_mask			= 0xFFFFFFFFu,
150
151	.cpu_mask_to_apicid		= x2apic_cpu_mask_to_apicid,
152	.cpu_mask_to_apicid_and		= x2apic_cpu_mask_to_apicid_and,
153
 
154	.send_IPI_mask			= x2apic_send_IPI_mask,
155	.send_IPI_mask_allbutself	= x2apic_send_IPI_mask_allbutself,
156	.send_IPI_allbutself		= x2apic_send_IPI_allbutself,
157	.send_IPI_all			= x2apic_send_IPI_all,
158	.send_IPI_self			= x2apic_send_IPI_self,
159
160	.trampoline_phys_low		= DEFAULT_TRAMPOLINE_PHYS_LOW,
161	.trampoline_phys_high		= DEFAULT_TRAMPOLINE_PHYS_HIGH,
162	.wait_for_init_deassert		= NULL,
163	.smp_callin_clear_local_apic	= NULL,
164	.inquire_remote_apic		= NULL,
165
166	.read				= native_apic_msr_read,
167	.write				= native_apic_msr_write,
 
168	.icr_read			= native_x2apic_icr_read,
169	.icr_write			= native_x2apic_icr_write,
170	.wait_icr_idle			= native_x2apic_wait_icr_idle,
171	.safe_wait_icr_idle		= native_safe_x2apic_wait_icr_idle,
172};
173
174apic_driver(apic_x2apic_phys);