1/*
  2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
  3 *	Jaswinder Singh <jassi.brar@samsung.com>
  4 *
  5 * This program is free software; you can redistribute it and/or modify
  6 * it under the terms of the GNU General Public License as published by
  7 * the Free Software Foundation; either version 2 of the License, or
  8 * (at your option) any later version.
  9 *
 10 * This program is distributed in the hope that it will be useful,
 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13 * GNU General Public License for more details.
 14 *
 15 * You should have received a copy of the GNU General Public License
 16 * along with this program; if not, write to the Free Software
 17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 18 */
 19
 20#include <linux/platform_device.h>
 21#include <linux/dma-mapping.h>
 22
 23#include <plat/devs.h>
 24#include <plat/irqs.h>
 25
 26#include <mach/map.h>
 27#include <mach/irqs.h>
 28
 29#include <plat/s3c-pl330-pdata.h>
 30
 31static u64 dma_dmamask = DMA_BIT_MASK(32);
 32
 33static struct resource s5pv210_pdma0_resource[] = {
 34	[0] = {
 35		.start  = S5PV210_PA_PDMA0,
 36		.end    = S5PV210_PA_PDMA0 + SZ_4K,
 37		.flags = IORESOURCE_MEM,
 38	},
 39	[1] = {
 40		.start	= IRQ_PDMA0,
 41		.end	= IRQ_PDMA0,
 42		.flags	= IORESOURCE_IRQ,
 43	},
 44};
 45
 46static struct s3c_pl330_platdata s5pv210_pdma0_pdata = {
 47	.peri = {
 48		[0] = DMACH_UART0_RX,
 49		[1] = DMACH_UART0_TX,
 50		[2] = DMACH_UART1_RX,
 51		[3] = DMACH_UART1_TX,
 52		[4] = DMACH_UART2_RX,
 53		[5] = DMACH_UART2_TX,
 54		[6] = DMACH_UART3_RX,
 55		[7] = DMACH_UART3_TX,
 56		[8] = DMACH_MAX,
 57		[9] = DMACH_I2S0_RX,
 58		[10] = DMACH_I2S0_TX,
 59		[11] = DMACH_I2S0S_TX,
 60		[12] = DMACH_I2S1_RX,
 61		[13] = DMACH_I2S1_TX,
 62		[14] = DMACH_MAX,
 63		[15] = DMACH_MAX,
 64		[16] = DMACH_SPI0_RX,
 65		[17] = DMACH_SPI0_TX,
 66		[18] = DMACH_SPI1_RX,
 67		[19] = DMACH_SPI1_TX,
 68		[20] = DMACH_MAX,
 69		[21] = DMACH_MAX,
 70		[22] = DMACH_AC97_MICIN,
 71		[23] = DMACH_AC97_PCMIN,
 72		[24] = DMACH_AC97_PCMOUT,
 73		[25] = DMACH_MAX,
 74		[26] = DMACH_PWM,
 75		[27] = DMACH_SPDIF,
 76		[28] = DMACH_MAX,
 77		[29] = DMACH_MAX,
 78		[30] = DMACH_MAX,
 79		[31] = DMACH_MAX,
 80	},
 81};
 82
 83static struct platform_device s5pv210_device_pdma0 = {
 84	.name		= "s3c-pl330",
 85	.id		= 0,
 86	.num_resources	= ARRAY_SIZE(s5pv210_pdma0_resource),
 87	.resource	= s5pv210_pdma0_resource,
 88	.dev		= {
 89		.dma_mask = &dma_dmamask,
 90		.coherent_dma_mask = DMA_BIT_MASK(32),
 91		.platform_data = &s5pv210_pdma0_pdata,
 92	},
 93};
 94
 95static struct resource s5pv210_pdma1_resource[] = {
 96	[0] = {
 97		.start  = S5PV210_PA_PDMA1,
 98		.end    = S5PV210_PA_PDMA1 + SZ_4K,
 99		.flags = IORESOURCE_MEM,
100	},
101	[1] = {
102		.start	= IRQ_PDMA1,
103		.end	= IRQ_PDMA1,
104		.flags	= IORESOURCE_IRQ,
105	},
106};
107
108static struct s3c_pl330_platdata s5pv210_pdma1_pdata = {
109	.peri = {
110		[0] = DMACH_UART0_RX,
111		[1] = DMACH_UART0_TX,
112		[2] = DMACH_UART1_RX,
113		[3] = DMACH_UART1_TX,
114		[4] = DMACH_UART2_RX,
115		[5] = DMACH_UART2_TX,
116		[6] = DMACH_UART3_RX,
117		[7] = DMACH_UART3_TX,
118		[8] = DMACH_MAX,
119		[9] = DMACH_I2S0_RX,
120		[10] = DMACH_I2S0_TX,
121		[11] = DMACH_I2S0S_TX,
122		[12] = DMACH_I2S1_RX,
123		[13] = DMACH_I2S1_TX,
124		[14] = DMACH_I2S2_RX,
125		[15] = DMACH_I2S2_TX,
126		[16] = DMACH_SPI0_RX,
127		[17] = DMACH_SPI0_TX,
128		[18] = DMACH_SPI1_RX,
129		[19] = DMACH_SPI1_TX,
130		[20] = DMACH_MAX,
131		[21] = DMACH_MAX,
132		[22] = DMACH_PCM0_RX,
133		[23] = DMACH_PCM0_TX,
134		[24] = DMACH_PCM1_RX,
135		[25] = DMACH_PCM1_TX,
136		[26] = DMACH_MSM_REQ0,
137		[27] = DMACH_MSM_REQ1,
138		[28] = DMACH_MSM_REQ2,
139		[29] = DMACH_MSM_REQ3,
140		[30] = DMACH_PCM2_RX,
141		[31] = DMACH_PCM2_TX,
142	},
143};
144
145static struct platform_device s5pv210_device_pdma1 = {
146	.name		= "s3c-pl330",
147	.id		= 1,
148	.num_resources	= ARRAY_SIZE(s5pv210_pdma1_resource),
149	.resource	= s5pv210_pdma1_resource,
150	.dev		= {
151		.dma_mask = &dma_dmamask,
152		.coherent_dma_mask = DMA_BIT_MASK(32),
153		.platform_data = &s5pv210_pdma1_pdata,
154	},
155};
156
157static struct platform_device *s5pv210_dmacs[] __initdata = {
158	&s5pv210_device_pdma0,
159	&s5pv210_device_pdma1,
160};
161
162static int __init s5pv210_dma_init(void)
163{
164	platform_add_devices(s5pv210_dmacs, ARRAY_SIZE(s5pv210_dmacs));
165
166	return 0;
167}
168arch_initcall(s5pv210_dma_init);