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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * linux/arch/arm/mach-omap2/devices.c
4 *
5 * OMAP2 platform device setup/initialization
6 */
7
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/io.h>
12#include <linux/clk.h>
13#include <linux/dma-mapping.h>
14#include <linux/err.h>
15#include <linux/slab.h>
16#include <linux/of.h>
17
18#include <asm/mach-types.h>
19#include <asm/mach/map.h>
20
21#include <linux/omap-dma.h>
22
23#include "iomap.h"
24#include "omap_hwmod.h"
25#include "omap_device.h"
26
27#include "soc.h"
28#include "common.h"
29#include "control.h"
30#include "display.h"
31
32#define L3_MODULES_MAX_LEN 12
33#define L3_MODULES 3
34
35/*-------------------------------------------------------------------------*/
36
37#if IS_ENABLED(CONFIG_VIDEO_OMAP2_VOUT)
38#if IS_ENABLED(CONFIG_FB_OMAP2)
39static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
40};
41#else
42static struct resource omap_vout_resource[2] = {
43};
44#endif
45
46static u64 omap_vout_dma_mask = DMA_BIT_MASK(32);
47
48static struct platform_device omap_vout_device = {
49 .name = "omap_vout",
50 .num_resources = ARRAY_SIZE(omap_vout_resource),
51 .resource = &omap_vout_resource[0],
52 .id = -1,
53 .dev = {
54 .dma_mask = &omap_vout_dma_mask,
55 .coherent_dma_mask = DMA_BIT_MASK(32),
56 },
57};
58
59int __init omap_init_vout(void)
60{
61 return platform_device_register(&omap_vout_device);
62}
63#else
64int __init omap_init_vout(void) { return 0; }
65#endif
1/*
2 * linux/arch/arm/mach-omap2/devices.c
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/clk.h>
17#include <linux/err.h>
18#include <linux/slab.h>
19
20#include <mach/hardware.h>
21#include <mach/irqs.h>
22#include <asm/mach-types.h>
23#include <asm/mach/map.h>
24#include <asm/pmu.h>
25
26#include <plat/tc.h>
27#include <plat/board.h>
28#include <plat/mcbsp.h>
29#include <mach/gpio.h>
30#include <plat/mmc.h>
31#include <plat/dma.h>
32#include <plat/omap_hwmod.h>
33#include <plat/omap_device.h>
34#include <plat/omap4-keypad.h>
35
36#include "mux.h"
37#include "control.h"
38#include "devices.h"
39
40#define L3_MODULES_MAX_LEN 12
41#define L3_MODULES 3
42
43static int __init omap3_l3_init(void)
44{
45 int l;
46 struct omap_hwmod *oh;
47 struct omap_device *od;
48 char oh_name[L3_MODULES_MAX_LEN];
49
50 /*
51 * To avoid code running on other OMAPs in
52 * multi-omap builds
53 */
54 if (!(cpu_is_omap34xx()))
55 return -ENODEV;
56
57 l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
58
59 oh = omap_hwmod_lookup(oh_name);
60
61 if (!oh)
62 pr_err("could not look up %s\n", oh_name);
63
64 od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
65 NULL, 0, 0);
66
67 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
68
69 return IS_ERR(od) ? PTR_ERR(od) : 0;
70}
71postcore_initcall(omap3_l3_init);
72
73static int __init omap4_l3_init(void)
74{
75 int l, i;
76 struct omap_hwmod *oh[3];
77 struct omap_device *od;
78 char oh_name[L3_MODULES_MAX_LEN];
79
80 /*
81 * To avoid code running on other OMAPs in
82 * multi-omap builds
83 */
84 if (!(cpu_is_omap44xx()))
85 return -ENODEV;
86
87 for (i = 0; i < L3_MODULES; i++) {
88 l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
89
90 oh[i] = omap_hwmod_lookup(oh_name);
91 if (!(oh[i]))
92 pr_err("could not look up %s\n", oh_name);
93 }
94
95 od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
96 0, NULL, 0, 0);
97
98 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
99
100 return IS_ERR(od) ? PTR_ERR(od) : 0;
101}
102postcore_initcall(omap4_l3_init);
103
104#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
105
106static struct resource omap2cam_resources[] = {
107 {
108 .start = OMAP24XX_CAMERA_BASE,
109 .end = OMAP24XX_CAMERA_BASE + 0xfff,
110 .flags = IORESOURCE_MEM,
111 },
112 {
113 .start = INT_24XX_CAM_IRQ,
114 .flags = IORESOURCE_IRQ,
115 }
116};
117
118static struct platform_device omap2cam_device = {
119 .name = "omap24xxcam",
120 .id = -1,
121 .num_resources = ARRAY_SIZE(omap2cam_resources),
122 .resource = omap2cam_resources,
123};
124#endif
125
126static struct resource omap3isp_resources[] = {
127 {
128 .start = OMAP3430_ISP_BASE,
129 .end = OMAP3430_ISP_END,
130 .flags = IORESOURCE_MEM,
131 },
132 {
133 .start = OMAP3430_ISP_CCP2_BASE,
134 .end = OMAP3430_ISP_CCP2_END,
135 .flags = IORESOURCE_MEM,
136 },
137 {
138 .start = OMAP3430_ISP_CCDC_BASE,
139 .end = OMAP3430_ISP_CCDC_END,
140 .flags = IORESOURCE_MEM,
141 },
142 {
143 .start = OMAP3430_ISP_HIST_BASE,
144 .end = OMAP3430_ISP_HIST_END,
145 .flags = IORESOURCE_MEM,
146 },
147 {
148 .start = OMAP3430_ISP_H3A_BASE,
149 .end = OMAP3430_ISP_H3A_END,
150 .flags = IORESOURCE_MEM,
151 },
152 {
153 .start = OMAP3430_ISP_PREV_BASE,
154 .end = OMAP3430_ISP_PREV_END,
155 .flags = IORESOURCE_MEM,
156 },
157 {
158 .start = OMAP3430_ISP_RESZ_BASE,
159 .end = OMAP3430_ISP_RESZ_END,
160 .flags = IORESOURCE_MEM,
161 },
162 {
163 .start = OMAP3430_ISP_SBL_BASE,
164 .end = OMAP3430_ISP_SBL_END,
165 .flags = IORESOURCE_MEM,
166 },
167 {
168 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
169 .end = OMAP3430_ISP_CSI2A_REGS1_END,
170 .flags = IORESOURCE_MEM,
171 },
172 {
173 .start = OMAP3430_ISP_CSIPHY2_BASE,
174 .end = OMAP3430_ISP_CSIPHY2_END,
175 .flags = IORESOURCE_MEM,
176 },
177 {
178 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
179 .end = OMAP3630_ISP_CSI2A_REGS2_END,
180 .flags = IORESOURCE_MEM,
181 },
182 {
183 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
184 .end = OMAP3630_ISP_CSI2C_REGS1_END,
185 .flags = IORESOURCE_MEM,
186 },
187 {
188 .start = OMAP3630_ISP_CSIPHY1_BASE,
189 .end = OMAP3630_ISP_CSIPHY1_END,
190 .flags = IORESOURCE_MEM,
191 },
192 {
193 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
194 .end = OMAP3630_ISP_CSI2C_REGS2_END,
195 .flags = IORESOURCE_MEM,
196 },
197 {
198 .start = INT_34XX_CAM_IRQ,
199 .flags = IORESOURCE_IRQ,
200 }
201};
202
203static struct platform_device omap3isp_device = {
204 .name = "omap3isp",
205 .id = -1,
206 .num_resources = ARRAY_SIZE(omap3isp_resources),
207 .resource = omap3isp_resources,
208};
209
210int omap3_init_camera(struct isp_platform_data *pdata)
211{
212 omap3isp_device.dev.platform_data = pdata;
213 return platform_device_register(&omap3isp_device);
214}
215
216static inline void omap_init_camera(void)
217{
218#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
219 if (cpu_is_omap24xx())
220 platform_device_register(&omap2cam_device);
221#endif
222}
223
224struct omap_device_pm_latency omap_keyboard_latency[] = {
225 {
226 .deactivate_func = omap_device_idle_hwmods,
227 .activate_func = omap_device_enable_hwmods,
228 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
229 },
230};
231
232int __init omap4_keyboard_init(struct omap4_keypad_platform_data
233 *sdp4430_keypad_data, struct omap_board_data *bdata)
234{
235 struct omap_device *od;
236 struct omap_hwmod *oh;
237 struct omap4_keypad_platform_data *keypad_data;
238 unsigned int id = -1;
239 char *oh_name = "kbd";
240 char *name = "omap4-keypad";
241
242 oh = omap_hwmod_lookup(oh_name);
243 if (!oh) {
244 pr_err("Could not look up %s\n", oh_name);
245 return -ENODEV;
246 }
247
248 keypad_data = sdp4430_keypad_data;
249
250 od = omap_device_build(name, id, oh, keypad_data,
251 sizeof(struct omap4_keypad_platform_data),
252 omap_keyboard_latency,
253 ARRAY_SIZE(omap_keyboard_latency), 0);
254
255 if (IS_ERR(od)) {
256 WARN(1, "Can't build omap_device for %s:%s.\n",
257 name, oh->name);
258 return PTR_ERR(od);
259 }
260 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
261
262 return 0;
263}
264
265#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
266static struct omap_device_pm_latency mbox_latencies[] = {
267 [0] = {
268 .activate_func = omap_device_enable_hwmods,
269 .deactivate_func = omap_device_idle_hwmods,
270 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
271 },
272};
273
274static inline void omap_init_mbox(void)
275{
276 struct omap_hwmod *oh;
277 struct omap_device *od;
278
279 oh = omap_hwmod_lookup("mailbox");
280 if (!oh) {
281 pr_err("%s: unable to find hwmod\n", __func__);
282 return;
283 }
284
285 od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
286 mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
287 WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
288 __func__, PTR_ERR(od));
289}
290#else
291static inline void omap_init_mbox(void) { }
292#endif /* CONFIG_OMAP_MBOX_FWK */
293
294static inline void omap_init_sti(void) {}
295
296#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
297
298static struct platform_device omap_pcm = {
299 .name = "omap-pcm-audio",
300 .id = -1,
301};
302
303/*
304 * OMAP2420 has 2 McBSP ports
305 * OMAP2430 has 5 McBSP ports
306 * OMAP3 has 5 McBSP ports
307 * OMAP4 has 4 McBSP ports
308 */
309OMAP_MCBSP_PLATFORM_DEVICE(1);
310OMAP_MCBSP_PLATFORM_DEVICE(2);
311OMAP_MCBSP_PLATFORM_DEVICE(3);
312OMAP_MCBSP_PLATFORM_DEVICE(4);
313OMAP_MCBSP_PLATFORM_DEVICE(5);
314
315static void omap_init_audio(void)
316{
317 platform_device_register(&omap_mcbsp1);
318 platform_device_register(&omap_mcbsp2);
319 if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
320 platform_device_register(&omap_mcbsp3);
321 platform_device_register(&omap_mcbsp4);
322 }
323 if (cpu_is_omap243x() || cpu_is_omap34xx())
324 platform_device_register(&omap_mcbsp5);
325
326 platform_device_register(&omap_pcm);
327}
328
329#else
330static inline void omap_init_audio(void) {}
331#endif
332
333#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
334
335#include <plat/mcspi.h>
336
337struct omap_device_pm_latency omap_mcspi_latency[] = {
338 [0] = {
339 .deactivate_func = omap_device_idle_hwmods,
340 .activate_func = omap_device_enable_hwmods,
341 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
342 },
343};
344
345static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
346{
347 struct omap_device *od;
348 char *name = "omap2_mcspi";
349 struct omap2_mcspi_platform_config *pdata;
350 static int spi_num;
351 struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
352
353 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
354 if (!pdata) {
355 pr_err("Memory allocation for McSPI device failed\n");
356 return -ENOMEM;
357 }
358
359 pdata->num_cs = mcspi_attrib->num_chipselect;
360 switch (oh->class->rev) {
361 case OMAP2_MCSPI_REV:
362 case OMAP3_MCSPI_REV:
363 pdata->regs_offset = 0;
364 break;
365 case OMAP4_MCSPI_REV:
366 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
367 break;
368 default:
369 pr_err("Invalid McSPI Revision value\n");
370 return -EINVAL;
371 }
372
373 spi_num++;
374 od = omap_device_build(name, spi_num, oh, pdata,
375 sizeof(*pdata), omap_mcspi_latency,
376 ARRAY_SIZE(omap_mcspi_latency), 0);
377 WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
378 name, oh->name);
379 kfree(pdata);
380 return 0;
381}
382
383static void omap_init_mcspi(void)
384{
385 omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
386}
387
388#else
389static inline void omap_init_mcspi(void) {}
390#endif
391
392static struct resource omap2_pmu_resource = {
393 .start = 3,
394 .end = 3,
395 .flags = IORESOURCE_IRQ,
396};
397
398static struct resource omap3_pmu_resource = {
399 .start = INT_34XX_BENCH_MPU_EMUL,
400 .end = INT_34XX_BENCH_MPU_EMUL,
401 .flags = IORESOURCE_IRQ,
402};
403
404static struct platform_device omap_pmu_device = {
405 .name = "arm-pmu",
406 .id = ARM_PMU_DEVICE_CPU,
407 .num_resources = 1,
408};
409
410static void omap_init_pmu(void)
411{
412 if (cpu_is_omap24xx())
413 omap_pmu_device.resource = &omap2_pmu_resource;
414 else if (cpu_is_omap34xx())
415 omap_pmu_device.resource = &omap3_pmu_resource;
416 else
417 return;
418
419 platform_device_register(&omap_pmu_device);
420}
421
422
423#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
424
425#ifdef CONFIG_ARCH_OMAP2
426static struct resource omap2_sham_resources[] = {
427 {
428 .start = OMAP24XX_SEC_SHA1MD5_BASE,
429 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
430 .flags = IORESOURCE_MEM,
431 },
432 {
433 .start = INT_24XX_SHA1MD5,
434 .flags = IORESOURCE_IRQ,
435 }
436};
437static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
438#else
439#define omap2_sham_resources NULL
440#define omap2_sham_resources_sz 0
441#endif
442
443#ifdef CONFIG_ARCH_OMAP3
444static struct resource omap3_sham_resources[] = {
445 {
446 .start = OMAP34XX_SEC_SHA1MD5_BASE,
447 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
448 .flags = IORESOURCE_MEM,
449 },
450 {
451 .start = INT_34XX_SHA1MD52_IRQ,
452 .flags = IORESOURCE_IRQ,
453 },
454 {
455 .start = OMAP34XX_DMA_SHA1MD5_RX,
456 .flags = IORESOURCE_DMA,
457 }
458};
459static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
460#else
461#define omap3_sham_resources NULL
462#define omap3_sham_resources_sz 0
463#endif
464
465static struct platform_device sham_device = {
466 .name = "omap-sham",
467 .id = -1,
468};
469
470static void omap_init_sham(void)
471{
472 if (cpu_is_omap24xx()) {
473 sham_device.resource = omap2_sham_resources;
474 sham_device.num_resources = omap2_sham_resources_sz;
475 } else if (cpu_is_omap34xx()) {
476 sham_device.resource = omap3_sham_resources;
477 sham_device.num_resources = omap3_sham_resources_sz;
478 } else {
479 pr_err("%s: platform not supported\n", __func__);
480 return;
481 }
482 platform_device_register(&sham_device);
483}
484#else
485static inline void omap_init_sham(void) { }
486#endif
487
488#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
489
490#ifdef CONFIG_ARCH_OMAP2
491static struct resource omap2_aes_resources[] = {
492 {
493 .start = OMAP24XX_SEC_AES_BASE,
494 .end = OMAP24XX_SEC_AES_BASE + 0x4C,
495 .flags = IORESOURCE_MEM,
496 },
497 {
498 .start = OMAP24XX_DMA_AES_TX,
499 .flags = IORESOURCE_DMA,
500 },
501 {
502 .start = OMAP24XX_DMA_AES_RX,
503 .flags = IORESOURCE_DMA,
504 }
505};
506static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
507#else
508#define omap2_aes_resources NULL
509#define omap2_aes_resources_sz 0
510#endif
511
512#ifdef CONFIG_ARCH_OMAP3
513static struct resource omap3_aes_resources[] = {
514 {
515 .start = OMAP34XX_SEC_AES_BASE,
516 .end = OMAP34XX_SEC_AES_BASE + 0x4C,
517 .flags = IORESOURCE_MEM,
518 },
519 {
520 .start = OMAP34XX_DMA_AES2_TX,
521 .flags = IORESOURCE_DMA,
522 },
523 {
524 .start = OMAP34XX_DMA_AES2_RX,
525 .flags = IORESOURCE_DMA,
526 }
527};
528static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
529#else
530#define omap3_aes_resources NULL
531#define omap3_aes_resources_sz 0
532#endif
533
534static struct platform_device aes_device = {
535 .name = "omap-aes",
536 .id = -1,
537};
538
539static void omap_init_aes(void)
540{
541 if (cpu_is_omap24xx()) {
542 aes_device.resource = omap2_aes_resources;
543 aes_device.num_resources = omap2_aes_resources_sz;
544 } else if (cpu_is_omap34xx()) {
545 aes_device.resource = omap3_aes_resources;
546 aes_device.num_resources = omap3_aes_resources_sz;
547 } else {
548 pr_err("%s: platform not supported\n", __func__);
549 return;
550 }
551 platform_device_register(&aes_device);
552}
553
554#else
555static inline void omap_init_aes(void) { }
556#endif
557
558/*-------------------------------------------------------------------------*/
559
560#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
561
562static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
563 *mmc_controller)
564{
565 if ((mmc_controller->slots[0].switch_pin > 0) && \
566 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
567 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
568 OMAP_PIN_INPUT_PULLUP);
569 if ((mmc_controller->slots[0].gpio_wp > 0) && \
570 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
571 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
572 OMAP_PIN_INPUT_PULLUP);
573
574 omap_mux_init_signal("sdmmc_cmd", 0);
575 omap_mux_init_signal("sdmmc_clki", 0);
576 omap_mux_init_signal("sdmmc_clko", 0);
577 omap_mux_init_signal("sdmmc_dat0", 0);
578 omap_mux_init_signal("sdmmc_dat_dir0", 0);
579 omap_mux_init_signal("sdmmc_cmd_dir", 0);
580 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
581 omap_mux_init_signal("sdmmc_dat1", 0);
582 omap_mux_init_signal("sdmmc_dat2", 0);
583 omap_mux_init_signal("sdmmc_dat3", 0);
584 omap_mux_init_signal("sdmmc_dat_dir1", 0);
585 omap_mux_init_signal("sdmmc_dat_dir2", 0);
586 omap_mux_init_signal("sdmmc_dat_dir3", 0);
587 }
588
589 /*
590 * Use internal loop-back in MMC/SDIO Module Input Clock
591 * selection
592 */
593 if (mmc_controller->slots[0].internal_clock) {
594 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
595 v |= (1 << 24);
596 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
597 }
598}
599
600void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
601{
602 char *name = "mmci-omap";
603
604 if (!mmc_data[0]) {
605 pr_err("%s fails: Incomplete platform data\n", __func__);
606 return;
607 }
608
609 omap242x_mmc_mux(mmc_data[0]);
610 omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
611 INT_24XX_MMC_IRQ, mmc_data[0]);
612}
613
614#endif
615
616/*-------------------------------------------------------------------------*/
617
618#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
619#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
620#define OMAP_HDQ_BASE 0x480B2000
621#endif
622static struct resource omap_hdq_resources[] = {
623 {
624 .start = OMAP_HDQ_BASE,
625 .end = OMAP_HDQ_BASE + 0x1C,
626 .flags = IORESOURCE_MEM,
627 },
628 {
629 .start = INT_24XX_HDQ_IRQ,
630 .flags = IORESOURCE_IRQ,
631 },
632};
633static struct platform_device omap_hdq_dev = {
634 .name = "omap_hdq",
635 .id = 0,
636 .dev = {
637 .platform_data = NULL,
638 },
639 .num_resources = ARRAY_SIZE(omap_hdq_resources),
640 .resource = omap_hdq_resources,
641};
642static inline void omap_hdq_init(void)
643{
644 (void) platform_device_register(&omap_hdq_dev);
645}
646#else
647static inline void omap_hdq_init(void) {}
648#endif
649
650/*---------------------------------------------------------------------------*/
651
652#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
653 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
654#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
655static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
656};
657#else
658static struct resource omap_vout_resource[2] = {
659};
660#endif
661
662static struct platform_device omap_vout_device = {
663 .name = "omap_vout",
664 .num_resources = ARRAY_SIZE(omap_vout_resource),
665 .resource = &omap_vout_resource[0],
666 .id = -1,
667};
668static void omap_init_vout(void)
669{
670 if (platform_device_register(&omap_vout_device) < 0)
671 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
672}
673#else
674static inline void omap_init_vout(void) {}
675#endif
676
677/*-------------------------------------------------------------------------*/
678
679static int __init omap2_init_devices(void)
680{
681 /*
682 * please keep these calls, and their implementations above,
683 * in alphabetical order so they're easier to sort through.
684 */
685 omap_init_audio();
686 omap_init_camera();
687 omap_init_mbox();
688 omap_init_mcspi();
689 omap_init_pmu();
690 omap_hdq_init();
691 omap_init_sti();
692 omap_init_sham();
693 omap_init_aes();
694 omap_init_vout();
695
696 return 0;
697}
698arch_initcall(omap2_init_devices);
699
700#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
701static struct omap_device_pm_latency omap_wdt_latency[] = {
702 [0] = {
703 .deactivate_func = omap_device_idle_hwmods,
704 .activate_func = omap_device_enable_hwmods,
705 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
706 },
707};
708
709static int __init omap_init_wdt(void)
710{
711 int id = -1;
712 struct omap_device *od;
713 struct omap_hwmod *oh;
714 char *oh_name = "wd_timer2";
715 char *dev_name = "omap_wdt";
716
717 if (!cpu_class_is_omap2())
718 return 0;
719
720 oh = omap_hwmod_lookup(oh_name);
721 if (!oh) {
722 pr_err("Could not look up wd_timer%d hwmod\n", id);
723 return -EINVAL;
724 }
725
726 od = omap_device_build(dev_name, id, oh, NULL, 0,
727 omap_wdt_latency,
728 ARRAY_SIZE(omap_wdt_latency), 0);
729 WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
730 dev_name, oh->name);
731 return 0;
732}
733subsys_initcall(omap_init_wdt);
734#endif