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1/*
2 * sn95031.c - TI sn95031 Codec driver
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * Author: Harsha Priya <priya.harsha@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */
26#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27
28#include <linux/platform_device.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31
32#include <asm/intel_scu_ipc.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/soc.h>
36#include <sound/soc-dapm.h>
37#include <sound/initval.h>
38#include <sound/tlv.h>
39#include <sound/jack.h>
40#include "sn95031.h"
41
42#define SN95031_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
43#define SN95031_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
44
45/* adc helper functions */
46
47/* enables mic bias voltage */
48static void sn95031_enable_mic_bias(struct snd_soc_codec *codec)
49{
50 snd_soc_write(codec, SN95031_VAUD, BIT(2)|BIT(1)|BIT(0));
51 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(2), BIT(2));
52}
53
54/* Enable/Disable the ADC depending on the argument */
55static void configure_adc(struct snd_soc_codec *sn95031_codec, int val)
56{
57 int value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
58
59 if (val) {
60 /* Enable and start the ADC */
61 value |= (SN95031_ADC_ENBL | SN95031_ADC_START);
62 value &= (~SN95031_ADC_NO_LOOP);
63 } else {
64 /* Just stop the ADC */
65 value &= (~SN95031_ADC_START);
66 }
67 snd_soc_write(sn95031_codec, SN95031_ADC1CNTL1, value);
68}
69
70/*
71 * finds an empty channel for conversion
72 * If the ADC is not enabled then start using 0th channel
73 * itself. Otherwise find an empty channel by looking for a
74 * channel in which the stopbit is set to 1. returns the index
75 * of the first free channel if succeeds or an error code.
76 *
77 * Context: can sleep
78 *
79 */
80static int find_free_channel(struct snd_soc_codec *sn95031_codec)
81{
82 int ret = 0, i, value;
83
84 /* check whether ADC is enabled */
85 value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
86
87 if ((value & SN95031_ADC_ENBL) == 0)
88 return 0;
89
90 /* ADC is already enabled; Looking for an empty channel */
91 for (i = 0; i < SN95031_ADC_CHANLS_MAX; i++) {
92 value = snd_soc_read(sn95031_codec,
93 SN95031_ADC_CHNL_START_ADDR + i);
94 if (value & SN95031_STOPBIT_MASK) {
95 ret = i;
96 break;
97 }
98 }
99 return (ret > SN95031_ADC_LOOP_MAX) ? (-EINVAL) : ret;
100}
101
102/* Initialize the ADC for reading micbias values. Can sleep. */
103static int sn95031_initialize_adc(struct snd_soc_codec *sn95031_codec)
104{
105 int base_addr, chnl_addr;
106 int value;
107 static int channel_index;
108
109 /* Index of the first channel in which the stop bit is set */
110 channel_index = find_free_channel(sn95031_codec);
111 if (channel_index < 0) {
112 pr_err("No free ADC channels");
113 return channel_index;
114 }
115
116 base_addr = SN95031_ADC_CHNL_START_ADDR + channel_index;
117
118 if (!(channel_index == 0 || channel_index == SN95031_ADC_LOOP_MAX)) {
119 /* Reset stop bit for channels other than 0 and 12 */
120 value = snd_soc_read(sn95031_codec, base_addr);
121 /* Set the stop bit to zero */
122 snd_soc_write(sn95031_codec, base_addr, value & 0xEF);
123 /* Index of the first free channel */
124 base_addr++;
125 channel_index++;
126 }
127
128 /* Since this is the last channel, set the stop bit
129 to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
130 snd_soc_write(sn95031_codec, base_addr,
131 SN95031_AUDIO_DETECT_CODE | 0x10);
132
133 chnl_addr = SN95031_ADC_DATA_START_ADDR + 2 * channel_index;
134 pr_debug("mid_initialize : %x", chnl_addr);
135 configure_adc(sn95031_codec, 1);
136 return chnl_addr;
137}
138
139
140/* reads the ADC registers and gets the mic bias value in mV. */
141static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec)
142{
143 u16 adc_adr = sn95031_initialize_adc(codec);
144 u16 adc_val1, adc_val2;
145 unsigned int mic_bias;
146
147 sn95031_enable_mic_bias(codec);
148
149 /* Enable the sound card for conversion before reading */
150 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x05);
151 /* Re-toggle the RRDATARD bit */
152 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x04);
153
154 /* Read the higher bits of data */
155 msleep(1000);
156 adc_val1 = snd_soc_read(codec, adc_adr);
157 adc_adr++;
158 adc_val2 = snd_soc_read(codec, adc_adr);
159
160 /* Adding lower two bits to the higher bits */
161 mic_bias = (adc_val1 << 2) + (adc_val2 & 3);
162 mic_bias = (mic_bias * SN95031_ADC_ONE_LSB_MULTIPLIER) / 1000;
163 pr_debug("mic bias = %dmV\n", mic_bias);
164 return mic_bias;
165}
166EXPORT_SYMBOL_GPL(sn95031_get_mic_bias);
167/*end - adc helper functions */
168
169static inline unsigned int sn95031_read(struct snd_soc_codec *codec,
170 unsigned int reg)
171{
172 u8 value = 0;
173 int ret;
174
175 ret = intel_scu_ipc_ioread8(reg, &value);
176 if (ret)
177 pr_err("read of %x failed, err %d\n", reg, ret);
178 return value;
179
180}
181
182static inline int sn95031_write(struct snd_soc_codec *codec,
183 unsigned int reg, unsigned int value)
184{
185 int ret;
186
187 ret = intel_scu_ipc_iowrite8(reg, value);
188 if (ret)
189 pr_err("write of %x failed, err %d\n", reg, ret);
190 return ret;
191}
192
193static int sn95031_set_vaud_bias(struct snd_soc_codec *codec,
194 enum snd_soc_bias_level level)
195{
196 switch (level) {
197 case SND_SOC_BIAS_ON:
198 break;
199
200 case SND_SOC_BIAS_PREPARE:
201 if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
202 pr_debug("vaud_bias powering up pll\n");
203 /* power up the pll */
204 snd_soc_write(codec, SN95031_AUDPLLCTRL, BIT(5));
205 /* enable pcm 2 */
206 snd_soc_update_bits(codec, SN95031_PCM2C2,
207 BIT(0), BIT(0));
208 }
209 break;
210
211 case SND_SOC_BIAS_STANDBY:
212 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
213 pr_debug("vaud_bias power up rail\n");
214 /* power up the rail */
215 snd_soc_write(codec, SN95031_VAUD,
216 BIT(2)|BIT(1)|BIT(0));
217 msleep(1);
218 } else if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE) {
219 /* turn off pcm */
220 pr_debug("vaud_bias power dn pcm\n");
221 snd_soc_update_bits(codec, SN95031_PCM2C2, BIT(0), 0);
222 snd_soc_write(codec, SN95031_AUDPLLCTRL, 0);
223 }
224 break;
225
226
227 case SND_SOC_BIAS_OFF:
228 pr_debug("vaud_bias _OFF doing rail shutdown\n");
229 snd_soc_write(codec, SN95031_VAUD, BIT(3));
230 break;
231 }
232
233 codec->dapm.bias_level = level;
234 return 0;
235}
236
237static int sn95031_vhs_event(struct snd_soc_dapm_widget *w,
238 struct snd_kcontrol *kcontrol, int event)
239{
240 if (SND_SOC_DAPM_EVENT_ON(event)) {
241 pr_debug("VHS SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
242 /* power up the rail */
243 snd_soc_write(w->codec, SN95031_VHSP, 0x3D);
244 snd_soc_write(w->codec, SN95031_VHSN, 0x3F);
245 msleep(1);
246 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
247 pr_debug("VHS SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
248 snd_soc_write(w->codec, SN95031_VHSP, 0xC4);
249 snd_soc_write(w->codec, SN95031_VHSN, 0x04);
250 }
251 return 0;
252}
253
254static int sn95031_vihf_event(struct snd_soc_dapm_widget *w,
255 struct snd_kcontrol *kcontrol, int event)
256{
257 if (SND_SOC_DAPM_EVENT_ON(event)) {
258 pr_debug("VIHF SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
259 /* power up the rail */
260 snd_soc_write(w->codec, SN95031_VIHF, 0x27);
261 msleep(1);
262 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
263 pr_debug("VIHF SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
264 snd_soc_write(w->codec, SN95031_VIHF, 0x24);
265 }
266 return 0;
267}
268
269static int sn95031_dmic12_event(struct snd_soc_dapm_widget *w,
270 struct snd_kcontrol *k, int event)
271{
272 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
273
274 if (SND_SOC_DAPM_EVENT_ON(event)) {
275 ldo = BIT(5)|BIT(4);
276 clk_dir = BIT(0);
277 data_dir = BIT(7);
278 }
279 /* program DMIC LDO, clock and set clock */
280 snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
281 snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(0), clk_dir);
282 snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(7), data_dir);
283 return 0;
284}
285
286static int sn95031_dmic34_event(struct snd_soc_dapm_widget *w,
287 struct snd_kcontrol *k, int event)
288{
289 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
290
291 if (SND_SOC_DAPM_EVENT_ON(event)) {
292 ldo = BIT(5)|BIT(4);
293 clk_dir = BIT(2);
294 data_dir = BIT(1);
295 }
296 /* program DMIC LDO, clock and set clock */
297 snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
298 snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(2), clk_dir);
299 snd_soc_update_bits(w->codec, SN95031_DMICBUF45, BIT(1), data_dir);
300 return 0;
301}
302
303static int sn95031_dmic56_event(struct snd_soc_dapm_widget *w,
304 struct snd_kcontrol *k, int event)
305{
306 unsigned int ldo = 0;
307
308 if (SND_SOC_DAPM_EVENT_ON(event))
309 ldo = BIT(7)|BIT(6);
310
311 /* program DMIC LDO */
312 snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(7)|BIT(6), ldo);
313 return 0;
314}
315
316/* mux controls */
317static const char *sn95031_mic_texts[] = { "AMIC", "LineIn" };
318
319static const struct soc_enum sn95031_micl_enum =
320 SOC_ENUM_SINGLE(SN95031_ADCCONFIG, 1, 2, sn95031_mic_texts);
321
322static const struct snd_kcontrol_new sn95031_micl_mux_control =
323 SOC_DAPM_ENUM("Route", sn95031_micl_enum);
324
325static const struct soc_enum sn95031_micr_enum =
326 SOC_ENUM_SINGLE(SN95031_ADCCONFIG, 3, 2, sn95031_mic_texts);
327
328static const struct snd_kcontrol_new sn95031_micr_mux_control =
329 SOC_DAPM_ENUM("Route", sn95031_micr_enum);
330
331static const char *sn95031_input_texts[] = { "DMIC1", "DMIC2", "DMIC3",
332 "DMIC4", "DMIC5", "DMIC6",
333 "ADC Left", "ADC Right" };
334
335static const struct soc_enum sn95031_input1_enum =
336 SOC_ENUM_SINGLE(SN95031_AUDIOMUX12, 0, 8, sn95031_input_texts);
337
338static const struct snd_kcontrol_new sn95031_input1_mux_control =
339 SOC_DAPM_ENUM("Route", sn95031_input1_enum);
340
341static const struct soc_enum sn95031_input2_enum =
342 SOC_ENUM_SINGLE(SN95031_AUDIOMUX12, 4, 8, sn95031_input_texts);
343
344static const struct snd_kcontrol_new sn95031_input2_mux_control =
345 SOC_DAPM_ENUM("Route", sn95031_input2_enum);
346
347static const struct soc_enum sn95031_input3_enum =
348 SOC_ENUM_SINGLE(SN95031_AUDIOMUX34, 0, 8, sn95031_input_texts);
349
350static const struct snd_kcontrol_new sn95031_input3_mux_control =
351 SOC_DAPM_ENUM("Route", sn95031_input3_enum);
352
353static const struct soc_enum sn95031_input4_enum =
354 SOC_ENUM_SINGLE(SN95031_AUDIOMUX34, 4, 8, sn95031_input_texts);
355
356static const struct snd_kcontrol_new sn95031_input4_mux_control =
357 SOC_DAPM_ENUM("Route", sn95031_input4_enum);
358
359/* capture path controls */
360
361static const char *sn95031_micmode_text[] = {"Single Ended", "Differential"};
362
363/* 0dB to 30dB in 10dB steps */
364static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 10, 0);
365
366static const struct soc_enum sn95031_micmode1_enum =
367 SOC_ENUM_SINGLE(SN95031_MICAMP1, 1, 2, sn95031_micmode_text);
368static const struct soc_enum sn95031_micmode2_enum =
369 SOC_ENUM_SINGLE(SN95031_MICAMP2, 1, 2, sn95031_micmode_text);
370
371static const char *sn95031_dmic_cfg_text[] = {"GPO", "DMIC"};
372
373static const struct soc_enum sn95031_dmic12_cfg_enum =
374 SOC_ENUM_SINGLE(SN95031_DMICMUX, 0, 2, sn95031_dmic_cfg_text);
375static const struct soc_enum sn95031_dmic34_cfg_enum =
376 SOC_ENUM_SINGLE(SN95031_DMICMUX, 1, 2, sn95031_dmic_cfg_text);
377static const struct soc_enum sn95031_dmic56_cfg_enum =
378 SOC_ENUM_SINGLE(SN95031_DMICMUX, 2, 2, sn95031_dmic_cfg_text);
379
380static const struct snd_kcontrol_new sn95031_snd_controls[] = {
381 SOC_ENUM("Mic1Mode Capture Route", sn95031_micmode1_enum),
382 SOC_ENUM("Mic2Mode Capture Route", sn95031_micmode2_enum),
383 SOC_ENUM("DMIC12 Capture Route", sn95031_dmic12_cfg_enum),
384 SOC_ENUM("DMIC34 Capture Route", sn95031_dmic34_cfg_enum),
385 SOC_ENUM("DMIC56 Capture Route", sn95031_dmic56_cfg_enum),
386 SOC_SINGLE_TLV("Mic1 Capture Volume", SN95031_MICAMP1,
387 2, 4, 0, mic_tlv),
388 SOC_SINGLE_TLV("Mic2 Capture Volume", SN95031_MICAMP2,
389 2, 4, 0, mic_tlv),
390};
391
392/* DAPM widgets */
393static const struct snd_soc_dapm_widget sn95031_dapm_widgets[] = {
394
395 /* all end points mic, hs etc */
396 SND_SOC_DAPM_OUTPUT("HPOUTL"),
397 SND_SOC_DAPM_OUTPUT("HPOUTR"),
398 SND_SOC_DAPM_OUTPUT("EPOUT"),
399 SND_SOC_DAPM_OUTPUT("IHFOUTL"),
400 SND_SOC_DAPM_OUTPUT("IHFOUTR"),
401 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
402 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
403 SND_SOC_DAPM_OUTPUT("VIB1OUT"),
404 SND_SOC_DAPM_OUTPUT("VIB2OUT"),
405
406 SND_SOC_DAPM_INPUT("AMIC1"), /* headset mic */
407 SND_SOC_DAPM_INPUT("AMIC2"),
408 SND_SOC_DAPM_INPUT("DMIC1"),
409 SND_SOC_DAPM_INPUT("DMIC2"),
410 SND_SOC_DAPM_INPUT("DMIC3"),
411 SND_SOC_DAPM_INPUT("DMIC4"),
412 SND_SOC_DAPM_INPUT("DMIC5"),
413 SND_SOC_DAPM_INPUT("DMIC6"),
414 SND_SOC_DAPM_INPUT("LINEINL"),
415 SND_SOC_DAPM_INPUT("LINEINR"),
416
417 SND_SOC_DAPM_MICBIAS("AMIC1Bias", SN95031_MICBIAS, 2, 0),
418 SND_SOC_DAPM_MICBIAS("AMIC2Bias", SN95031_MICBIAS, 3, 0),
419 SND_SOC_DAPM_MICBIAS("DMIC12Bias", SN95031_DMICMUX, 3, 0),
420 SND_SOC_DAPM_MICBIAS("DMIC34Bias", SN95031_DMICMUX, 4, 0),
421 SND_SOC_DAPM_MICBIAS("DMIC56Bias", SN95031_DMICMUX, 5, 0),
422
423 SND_SOC_DAPM_SUPPLY("DMIC12supply", SN95031_DMICLK, 0, 0,
424 sn95031_dmic12_event,
425 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
426 SND_SOC_DAPM_SUPPLY("DMIC34supply", SN95031_DMICLK, 1, 0,
427 sn95031_dmic34_event,
428 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
429 SND_SOC_DAPM_SUPPLY("DMIC56supply", SN95031_DMICLK, 2, 0,
430 sn95031_dmic56_event,
431 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
432
433 SND_SOC_DAPM_AIF_OUT("PCM_Out", "Capture", 0,
434 SND_SOC_NOPM, 0, 0),
435
436 SND_SOC_DAPM_SUPPLY("Headset Rail", SND_SOC_NOPM, 0, 0,
437 sn95031_vhs_event,
438 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
439 SND_SOC_DAPM_SUPPLY("Speaker Rail", SND_SOC_NOPM, 0, 0,
440 sn95031_vihf_event,
441 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
442
443 /* playback path driver enables */
444 SND_SOC_DAPM_PGA("Headset Left Playback",
445 SN95031_DRIVEREN, 0, 0, NULL, 0),
446 SND_SOC_DAPM_PGA("Headset Right Playback",
447 SN95031_DRIVEREN, 1, 0, NULL, 0),
448 SND_SOC_DAPM_PGA("Speaker Left Playback",
449 SN95031_DRIVEREN, 2, 0, NULL, 0),
450 SND_SOC_DAPM_PGA("Speaker Right Playback",
451 SN95031_DRIVEREN, 3, 0, NULL, 0),
452 SND_SOC_DAPM_PGA("Vibra1 Playback",
453 SN95031_DRIVEREN, 4, 0, NULL, 0),
454 SND_SOC_DAPM_PGA("Vibra2 Playback",
455 SN95031_DRIVEREN, 5, 0, NULL, 0),
456 SND_SOC_DAPM_PGA("Earpiece Playback",
457 SN95031_DRIVEREN, 6, 0, NULL, 0),
458 SND_SOC_DAPM_PGA("Lineout Left Playback",
459 SN95031_LOCTL, 0, 0, NULL, 0),
460 SND_SOC_DAPM_PGA("Lineout Right Playback",
461 SN95031_LOCTL, 4, 0, NULL, 0),
462
463 /* playback path filter enable */
464 SND_SOC_DAPM_PGA("Headset Left Filter",
465 SN95031_HSEPRXCTRL, 4, 0, NULL, 0),
466 SND_SOC_DAPM_PGA("Headset Right Filter",
467 SN95031_HSEPRXCTRL, 5, 0, NULL, 0),
468 SND_SOC_DAPM_PGA("Speaker Left Filter",
469 SN95031_IHFRXCTRL, 0, 0, NULL, 0),
470 SND_SOC_DAPM_PGA("Speaker Right Filter",
471 SN95031_IHFRXCTRL, 1, 0, NULL, 0),
472
473 /* DACs */
474 SND_SOC_DAPM_DAC("HSDAC Left", "Headset",
475 SN95031_DACCONFIG, 0, 0),
476 SND_SOC_DAPM_DAC("HSDAC Right", "Headset",
477 SN95031_DACCONFIG, 1, 0),
478 SND_SOC_DAPM_DAC("IHFDAC Left", "Speaker",
479 SN95031_DACCONFIG, 2, 0),
480 SND_SOC_DAPM_DAC("IHFDAC Right", "Speaker",
481 SN95031_DACCONFIG, 3, 0),
482 SND_SOC_DAPM_DAC("Vibra1 DAC", "Vibra1",
483 SN95031_VIB1C5, 1, 0),
484 SND_SOC_DAPM_DAC("Vibra2 DAC", "Vibra2",
485 SN95031_VIB2C5, 1, 0),
486
487 /* capture widgets */
488 SND_SOC_DAPM_PGA("LineIn Enable Left", SN95031_MICAMP1,
489 7, 0, NULL, 0),
490 SND_SOC_DAPM_PGA("LineIn Enable Right", SN95031_MICAMP2,
491 7, 0, NULL, 0),
492
493 SND_SOC_DAPM_PGA("MIC1 Enable", SN95031_MICAMP1, 0, 0, NULL, 0),
494 SND_SOC_DAPM_PGA("MIC2 Enable", SN95031_MICAMP2, 0, 0, NULL, 0),
495 SND_SOC_DAPM_PGA("TX1 Enable", SN95031_AUDIOTXEN, 2, 0, NULL, 0),
496 SND_SOC_DAPM_PGA("TX2 Enable", SN95031_AUDIOTXEN, 3, 0, NULL, 0),
497 SND_SOC_DAPM_PGA("TX3 Enable", SN95031_AUDIOTXEN, 4, 0, NULL, 0),
498 SND_SOC_DAPM_PGA("TX4 Enable", SN95031_AUDIOTXEN, 5, 0, NULL, 0),
499
500 /* ADC have null stream as they will be turned ON by TX path */
501 SND_SOC_DAPM_ADC("ADC Left", NULL,
502 SN95031_ADCCONFIG, 0, 0),
503 SND_SOC_DAPM_ADC("ADC Right", NULL,
504 SN95031_ADCCONFIG, 2, 0),
505
506 SND_SOC_DAPM_MUX("Mic_InputL Capture Route",
507 SND_SOC_NOPM, 0, 0, &sn95031_micl_mux_control),
508 SND_SOC_DAPM_MUX("Mic_InputR Capture Route",
509 SND_SOC_NOPM, 0, 0, &sn95031_micr_mux_control),
510
511 SND_SOC_DAPM_MUX("Txpath1 Capture Route",
512 SND_SOC_NOPM, 0, 0, &sn95031_input1_mux_control),
513 SND_SOC_DAPM_MUX("Txpath2 Capture Route",
514 SND_SOC_NOPM, 0, 0, &sn95031_input2_mux_control),
515 SND_SOC_DAPM_MUX("Txpath3 Capture Route",
516 SND_SOC_NOPM, 0, 0, &sn95031_input3_mux_control),
517 SND_SOC_DAPM_MUX("Txpath4 Capture Route",
518 SND_SOC_NOPM, 0, 0, &sn95031_input4_mux_control),
519
520};
521
522static const struct snd_soc_dapm_route sn95031_audio_map[] = {
523 /* headset and earpiece map */
524 { "HPOUTL", NULL, "Headset Rail"},
525 { "HPOUTR", NULL, "Headset Rail"},
526 { "HPOUTL", NULL, "Headset Left Playback" },
527 { "HPOUTR", NULL, "Headset Right Playback" },
528 { "EPOUT", NULL, "Earpiece Playback" },
529 { "Headset Left Playback", NULL, "Headset Left Filter"},
530 { "Headset Right Playback", NULL, "Headset Right Filter"},
531 { "Earpiece Playback", NULL, "Headset Left Filter"},
532 { "Headset Left Filter", NULL, "HSDAC Left"},
533 { "Headset Right Filter", NULL, "HSDAC Right"},
534
535 /* speaker map */
536 { "IHFOUTL", NULL, "Speaker Rail"},
537 { "IHFOUTR", NULL, "Speaker Rail"},
538 { "IHFOUTL", "NULL", "Speaker Left Playback"},
539 { "IHFOUTR", "NULL", "Speaker Right Playback"},
540 { "Speaker Left Playback", NULL, "Speaker Left Filter"},
541 { "Speaker Right Playback", NULL, "Speaker Right Filter"},
542 { "Speaker Left Filter", NULL, "IHFDAC Left"},
543 { "Speaker Right Filter", NULL, "IHFDAC Right"},
544
545 /* vibra map */
546 { "VIB1OUT", NULL, "Vibra1 Playback"},
547 { "Vibra1 Playback", NULL, "Vibra1 DAC"},
548
549 { "VIB2OUT", NULL, "Vibra2 Playback"},
550 { "Vibra2 Playback", NULL, "Vibra2 DAC"},
551
552 /* lineout */
553 { "LINEOUTL", NULL, "Lineout Left Playback"},
554 { "LINEOUTR", NULL, "Lineout Right Playback"},
555 { "Lineout Left Playback", NULL, "Headset Left Filter"},
556 { "Lineout Left Playback", NULL, "Speaker Left Filter"},
557 { "Lineout Left Playback", NULL, "Vibra1 DAC"},
558 { "Lineout Right Playback", NULL, "Headset Right Filter"},
559 { "Lineout Right Playback", NULL, "Speaker Right Filter"},
560 { "Lineout Right Playback", NULL, "Vibra2 DAC"},
561
562 /* Headset (AMIC1) mic */
563 { "AMIC1Bias", NULL, "AMIC1"},
564 { "MIC1 Enable", NULL, "AMIC1Bias"},
565 { "Mic_InputL Capture Route", "AMIC", "MIC1 Enable"},
566
567 /* AMIC2 */
568 { "AMIC2Bias", NULL, "AMIC2"},
569 { "MIC2 Enable", NULL, "AMIC2Bias"},
570 { "Mic_InputR Capture Route", "AMIC", "MIC2 Enable"},
571
572
573 /* Linein */
574 { "LineIn Enable Left", NULL, "LINEINL"},
575 { "LineIn Enable Right", NULL, "LINEINR"},
576 { "Mic_InputL Capture Route", "LineIn", "LineIn Enable Left"},
577 { "Mic_InputR Capture Route", "LineIn", "LineIn Enable Right"},
578
579 /* ADC connection */
580 { "ADC Left", NULL, "Mic_InputL Capture Route"},
581 { "ADC Right", NULL, "Mic_InputR Capture Route"},
582
583 /*DMIC connections */
584 { "DMIC1", NULL, "DMIC12supply"},
585 { "DMIC2", NULL, "DMIC12supply"},
586 { "DMIC3", NULL, "DMIC34supply"},
587 { "DMIC4", NULL, "DMIC34supply"},
588 { "DMIC5", NULL, "DMIC56supply"},
589 { "DMIC6", NULL, "DMIC56supply"},
590
591 { "DMIC12Bias", NULL, "DMIC1"},
592 { "DMIC12Bias", NULL, "DMIC2"},
593 { "DMIC34Bias", NULL, "DMIC3"},
594 { "DMIC34Bias", NULL, "DMIC4"},
595 { "DMIC56Bias", NULL, "DMIC5"},
596 { "DMIC56Bias", NULL, "DMIC6"},
597
598 /*TX path inputs*/
599 { "Txpath1 Capture Route", "ADC Left", "ADC Left"},
600 { "Txpath2 Capture Route", "ADC Left", "ADC Left"},
601 { "Txpath3 Capture Route", "ADC Left", "ADC Left"},
602 { "Txpath4 Capture Route", "ADC Left", "ADC Left"},
603 { "Txpath1 Capture Route", "ADC Right", "ADC Right"},
604 { "Txpath2 Capture Route", "ADC Right", "ADC Right"},
605 { "Txpath3 Capture Route", "ADC Right", "ADC Right"},
606 { "Txpath4 Capture Route", "ADC Right", "ADC Right"},
607 { "Txpath1 Capture Route", "DMIC1", "DMIC1"},
608 { "Txpath2 Capture Route", "DMIC1", "DMIC1"},
609 { "Txpath3 Capture Route", "DMIC1", "DMIC1"},
610 { "Txpath4 Capture Route", "DMIC1", "DMIC1"},
611 { "Txpath1 Capture Route", "DMIC2", "DMIC2"},
612 { "Txpath2 Capture Route", "DMIC2", "DMIC2"},
613 { "Txpath3 Capture Route", "DMIC2", "DMIC2"},
614 { "Txpath4 Capture Route", "DMIC2", "DMIC2"},
615 { "Txpath1 Capture Route", "DMIC3", "DMIC3"},
616 { "Txpath2 Capture Route", "DMIC3", "DMIC3"},
617 { "Txpath3 Capture Route", "DMIC3", "DMIC3"},
618 { "Txpath4 Capture Route", "DMIC3", "DMIC3"},
619 { "Txpath1 Capture Route", "DMIC4", "DMIC4"},
620 { "Txpath2 Capture Route", "DMIC4", "DMIC4"},
621 { "Txpath3 Capture Route", "DMIC4", "DMIC4"},
622 { "Txpath4 Capture Route", "DMIC4", "DMIC4"},
623 { "Txpath1 Capture Route", "DMIC5", "DMIC5"},
624 { "Txpath2 Capture Route", "DMIC5", "DMIC5"},
625 { "Txpath3 Capture Route", "DMIC5", "DMIC5"},
626 { "Txpath4 Capture Route", "DMIC5", "DMIC5"},
627 { "Txpath1 Capture Route", "DMIC6", "DMIC6"},
628 { "Txpath2 Capture Route", "DMIC6", "DMIC6"},
629 { "Txpath3 Capture Route", "DMIC6", "DMIC6"},
630 { "Txpath4 Capture Route", "DMIC6", "DMIC6"},
631
632 /* tx path */
633 { "TX1 Enable", NULL, "Txpath1 Capture Route"},
634 { "TX2 Enable", NULL, "Txpath2 Capture Route"},
635 { "TX3 Enable", NULL, "Txpath3 Capture Route"},
636 { "TX4 Enable", NULL, "Txpath4 Capture Route"},
637 { "PCM_Out", NULL, "TX1 Enable"},
638 { "PCM_Out", NULL, "TX2 Enable"},
639 { "PCM_Out", NULL, "TX3 Enable"},
640 { "PCM_Out", NULL, "TX4 Enable"},
641
642};
643
644/* speaker and headset mutes, for audio pops and clicks */
645static int sn95031_pcm_hs_mute(struct snd_soc_dai *dai, int mute)
646{
647 snd_soc_update_bits(dai->codec,
648 SN95031_HSLVOLCTRL, BIT(7), (!mute << 7));
649 snd_soc_update_bits(dai->codec,
650 SN95031_HSRVOLCTRL, BIT(7), (!mute << 7));
651 return 0;
652}
653
654static int sn95031_pcm_spkr_mute(struct snd_soc_dai *dai, int mute)
655{
656 snd_soc_update_bits(dai->codec,
657 SN95031_IHFLVOLCTRL, BIT(7), (!mute << 7));
658 snd_soc_update_bits(dai->codec,
659 SN95031_IHFRVOLCTRL, BIT(7), (!mute << 7));
660 return 0;
661}
662
663int sn95031_pcm_hw_params(struct snd_pcm_substream *substream,
664 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
665{
666 unsigned int format, rate;
667
668 switch (params_format(params)) {
669 case SNDRV_PCM_FORMAT_S16_LE:
670 format = BIT(4)|BIT(5);
671 break;
672
673 case SNDRV_PCM_FORMAT_S24_LE:
674 format = 0;
675 break;
676 default:
677 return -EINVAL;
678 }
679 snd_soc_update_bits(dai->codec, SN95031_PCM2C2,
680 BIT(4)|BIT(5), format);
681
682 switch (params_rate(params)) {
683 case 48000:
684 pr_debug("RATE_48000\n");
685 rate = 0;
686 break;
687
688 case 44100:
689 pr_debug("RATE_44100\n");
690 rate = BIT(7);
691 break;
692
693 default:
694 pr_err("ERR rate %d\n", params_rate(params));
695 return -EINVAL;
696 }
697 snd_soc_update_bits(dai->codec, SN95031_PCM1C1, BIT(7), rate);
698
699 return 0;
700}
701
702/* Codec DAI section */
703static struct snd_soc_dai_ops sn95031_headset_dai_ops = {
704 .digital_mute = sn95031_pcm_hs_mute,
705 .hw_params = sn95031_pcm_hw_params,
706};
707
708static struct snd_soc_dai_ops sn95031_speaker_dai_ops = {
709 .digital_mute = sn95031_pcm_spkr_mute,
710 .hw_params = sn95031_pcm_hw_params,
711};
712
713static struct snd_soc_dai_ops sn95031_vib1_dai_ops = {
714 .hw_params = sn95031_pcm_hw_params,
715};
716
717static struct snd_soc_dai_ops sn95031_vib2_dai_ops = {
718 .hw_params = sn95031_pcm_hw_params,
719};
720
721struct snd_soc_dai_driver sn95031_dais[] = {
722{
723 .name = "SN95031 Headset",
724 .playback = {
725 .stream_name = "Headset",
726 .channels_min = 2,
727 .channels_max = 2,
728 .rates = SN95031_RATES,
729 .formats = SN95031_FORMATS,
730 },
731 .capture = {
732 .stream_name = "Capture",
733 .channels_min = 1,
734 .channels_max = 5,
735 .rates = SN95031_RATES,
736 .formats = SN95031_FORMATS,
737 },
738 .ops = &sn95031_headset_dai_ops,
739},
740{ .name = "SN95031 Speaker",
741 .playback = {
742 .stream_name = "Speaker",
743 .channels_min = 2,
744 .channels_max = 2,
745 .rates = SN95031_RATES,
746 .formats = SN95031_FORMATS,
747 },
748 .ops = &sn95031_speaker_dai_ops,
749},
750{ .name = "SN95031 Vibra1",
751 .playback = {
752 .stream_name = "Vibra1",
753 .channels_min = 1,
754 .channels_max = 1,
755 .rates = SN95031_RATES,
756 .formats = SN95031_FORMATS,
757 },
758 .ops = &sn95031_vib1_dai_ops,
759},
760{ .name = "SN95031 Vibra2",
761 .playback = {
762 .stream_name = "Vibra2",
763 .channels_min = 1,
764 .channels_max = 1,
765 .rates = SN95031_RATES,
766 .formats = SN95031_FORMATS,
767 },
768 .ops = &sn95031_vib2_dai_ops,
769},
770};
771
772static inline void sn95031_disable_jack_btn(struct snd_soc_codec *codec)
773{
774 snd_soc_write(codec, SN95031_BTNCTRL2, 0x00);
775}
776
777static inline void sn95031_enable_jack_btn(struct snd_soc_codec *codec)
778{
779 snd_soc_write(codec, SN95031_BTNCTRL1, 0x77);
780 snd_soc_write(codec, SN95031_BTNCTRL2, 0x01);
781}
782
783static int sn95031_get_headset_state(struct snd_soc_jack *mfld_jack)
784{
785 int micbias = sn95031_get_mic_bias(mfld_jack->codec);
786
787 int jack_type = snd_soc_jack_get_type(mfld_jack, micbias);
788
789 pr_debug("jack type detected = %d\n", jack_type);
790 if (jack_type == SND_JACK_HEADSET)
791 sn95031_enable_jack_btn(mfld_jack->codec);
792 return jack_type;
793}
794
795void sn95031_jack_detection(struct mfld_jack_data *jack_data)
796{
797 unsigned int status;
798 unsigned int mask = SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_HEADSET;
799
800 pr_debug("interrupt id read in sram = 0x%x\n", jack_data->intr_id);
801 if (jack_data->intr_id & 0x1) {
802 pr_debug("short_push detected\n");
803 status = SND_JACK_HEADSET | SND_JACK_BTN_0;
804 } else if (jack_data->intr_id & 0x2) {
805 pr_debug("long_push detected\n");
806 status = SND_JACK_HEADSET | SND_JACK_BTN_1;
807 } else if (jack_data->intr_id & 0x4) {
808 pr_debug("headset or headphones inserted\n");
809 status = sn95031_get_headset_state(jack_data->mfld_jack);
810 } else if (jack_data->intr_id & 0x8) {
811 pr_debug("headset or headphones removed\n");
812 status = 0;
813 sn95031_disable_jack_btn(jack_data->mfld_jack->codec);
814 } else {
815 pr_err("unidentified interrupt\n");
816 return;
817 }
818
819 snd_soc_jack_report(jack_data->mfld_jack, status, mask);
820 /*button pressed and released so we send explicit button release */
821 if ((status & SND_JACK_BTN_0) | (status & SND_JACK_BTN_1))
822 snd_soc_jack_report(jack_data->mfld_jack,
823 SND_JACK_HEADSET, mask);
824}
825EXPORT_SYMBOL_GPL(sn95031_jack_detection);
826
827/* codec registration */
828static int sn95031_codec_probe(struct snd_soc_codec *codec)
829{
830 pr_debug("codec_probe called\n");
831
832 codec->dapm.bias_level = SND_SOC_BIAS_OFF;
833 codec->dapm.idle_bias_off = 1;
834
835 /* PCM interface config
836 * This sets the pcm rx slot conguration to max 6 slots
837 * for max 4 dais (2 stereo and 2 mono)
838 */
839 snd_soc_write(codec, SN95031_PCM2RXSLOT01, 0x10);
840 snd_soc_write(codec, SN95031_PCM2RXSLOT23, 0x32);
841 snd_soc_write(codec, SN95031_PCM2RXSLOT45, 0x54);
842 snd_soc_write(codec, SN95031_PCM2TXSLOT01, 0x10);
843 snd_soc_write(codec, SN95031_PCM2TXSLOT23, 0x32);
844 /* pcm port setting
845 * This sets the pcm port to slave and clock at 19.2Mhz which
846 * can support 6slots, sampling rate set per stream in hw-params
847 */
848 snd_soc_write(codec, SN95031_PCM1C1, 0x00);
849 snd_soc_write(codec, SN95031_PCM2C1, 0x01);
850 snd_soc_write(codec, SN95031_PCM2C2, 0x0A);
851 snd_soc_write(codec, SN95031_HSMIXER, BIT(0)|BIT(4));
852 /* vendor vibra workround, the vibras are muted by
853 * custom register so unmute them
854 */
855 snd_soc_write(codec, SN95031_SSR5, 0x80);
856 snd_soc_write(codec, SN95031_SSR6, 0x80);
857 snd_soc_write(codec, SN95031_VIB1C5, 0x00);
858 snd_soc_write(codec, SN95031_VIB2C5, 0x00);
859 /* configure vibras for pcm port */
860 snd_soc_write(codec, SN95031_VIB1C3, 0x00);
861 snd_soc_write(codec, SN95031_VIB2C3, 0x00);
862
863 /* soft mute ramp time */
864 snd_soc_write(codec, SN95031_SOFTMUTE, 0x3);
865 /* fix the initial volume at 1dB,
866 * default in +9dB,
867 * 1dB give optimal swing on DAC, amps
868 */
869 snd_soc_write(codec, SN95031_HSLVOLCTRL, 0x08);
870 snd_soc_write(codec, SN95031_HSRVOLCTRL, 0x08);
871 snd_soc_write(codec, SN95031_IHFLVOLCTRL, 0x08);
872 snd_soc_write(codec, SN95031_IHFRVOLCTRL, 0x08);
873 /* dac mode and lineout workaround */
874 snd_soc_write(codec, SN95031_SSR2, 0x10);
875 snd_soc_write(codec, SN95031_SSR3, 0x40);
876
877 snd_soc_add_controls(codec, sn95031_snd_controls,
878 ARRAY_SIZE(sn95031_snd_controls));
879
880 return 0;
881}
882
883static int sn95031_codec_remove(struct snd_soc_codec *codec)
884{
885 pr_debug("codec_remove called\n");
886 sn95031_set_vaud_bias(codec, SND_SOC_BIAS_OFF);
887
888 return 0;
889}
890
891struct snd_soc_codec_driver sn95031_codec = {
892 .probe = sn95031_codec_probe,
893 .remove = sn95031_codec_remove,
894 .read = sn95031_read,
895 .write = sn95031_write,
896 .set_bias_level = sn95031_set_vaud_bias,
897 .dapm_widgets = sn95031_dapm_widgets,
898 .num_dapm_widgets = ARRAY_SIZE(sn95031_dapm_widgets),
899 .dapm_routes = sn95031_audio_map,
900 .num_dapm_routes = ARRAY_SIZE(sn95031_audio_map),
901};
902
903static int __devinit sn95031_device_probe(struct platform_device *pdev)
904{
905 pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev));
906 return snd_soc_register_codec(&pdev->dev, &sn95031_codec,
907 sn95031_dais, ARRAY_SIZE(sn95031_dais));
908}
909
910static int __devexit sn95031_device_remove(struct platform_device *pdev)
911{
912 pr_debug("codec device remove called\n");
913 snd_soc_unregister_codec(&pdev->dev);
914 return 0;
915}
916
917static struct platform_driver sn95031_codec_driver = {
918 .driver = {
919 .name = "sn95031",
920 .owner = THIS_MODULE,
921 },
922 .probe = sn95031_device_probe,
923 .remove = __devexit_p(sn95031_device_remove),
924};
925
926static int __init sn95031_init(void)
927{
928 pr_debug("driver init called\n");
929 return platform_driver_register(&sn95031_codec_driver);
930}
931module_init(sn95031_init);
932
933static void __exit sn95031_exit(void)
934{
935 pr_debug("driver exit called\n");
936 platform_driver_unregister(&sn95031_codec_driver);
937}
938module_exit(sn95031_exit);
939
940MODULE_DESCRIPTION("ASoC TI SN95031 codec driver");
941MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
942MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
943MODULE_LICENSE("GPL v2");
944MODULE_ALIAS("platform:sn95031");