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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * PCAP2 Regulator Driver
4 *
5 * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com>
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/err.h>
12#include <linux/platform_device.h>
13#include <linux/regulator/driver.h>
14#include <linux/regulator/machine.h>
15#include <linux/mfd/ezx-pcap.h>
16
17static const unsigned int V1_table[] = {
18 2775000, 1275000, 1600000, 1725000, 1825000, 1925000, 2075000, 2275000,
19};
20
21static const unsigned int V2_table[] = {
22 2500000, 2775000,
23};
24
25static const unsigned int V3_table[] = {
26 1075000, 1275000, 1550000, 1725000, 1876000, 1950000, 2075000, 2275000,
27};
28
29static const unsigned int V4_table[] = {
30 1275000, 1550000, 1725000, 1875000, 1950000, 2075000, 2275000, 2775000,
31};
32
33static const unsigned int V5_table[] = {
34 1875000, 2275000, 2475000, 2775000,
35};
36
37static const unsigned int V6_table[] = {
38 2475000, 2775000,
39};
40
41static const unsigned int V7_table[] = {
42 1875000, 2775000,
43};
44
45#define V8_table V4_table
46
47static const unsigned int V9_table[] = {
48 1575000, 1875000, 2475000, 2775000,
49};
50
51static const unsigned int V10_table[] = {
52 5000000,
53};
54
55static const unsigned int VAUX1_table[] = {
56 1875000, 2475000, 2775000, 3000000,
57};
58
59#define VAUX2_table VAUX1_table
60
61static const unsigned int VAUX3_table[] = {
62 1200000, 1200000, 1200000, 1200000, 1400000, 1600000, 1800000, 2000000,
63 2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000, 3600000,
64};
65
66static const unsigned int VAUX4_table[] = {
67 1800000, 1800000, 3000000, 5000000,
68};
69
70static const unsigned int VSIM_table[] = {
71 1875000, 3000000,
72};
73
74static const unsigned int VSIM2_table[] = {
75 1875000,
76};
77
78static const unsigned int VVIB_table[] = {
79 1300000, 1800000, 2000000, 3000000,
80};
81
82static const unsigned int SW1_table[] = {
83 900000, 950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1250000,
84 1300000, 1350000, 1400000, 1450000, 1500000, 1600000, 1875000, 2250000,
85};
86
87#define SW2_table SW1_table
88
89struct pcap_regulator {
90 const u8 reg;
91 const u8 en;
92 const u8 index;
93 const u8 stby;
94 const u8 lowpwr;
95};
96
97#define NA 0xff
98
99#define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \
100 [_vreg] = { \
101 .reg = _reg, \
102 .en = _en, \
103 .index = _index, \
104 .stby = _stby, \
105 .lowpwr = _lowpwr, \
106 }
107
108static const struct pcap_regulator vreg_table[] = {
109 VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0),
110 VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22),
111 VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23),
112 VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24),
113 /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */
114 VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19),
115
116 VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20),
117 VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21),
118 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
119 VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23),
120 VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
121
122 VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23),
123 /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */
124 VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1),
125 VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3),
126 VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5),
127 VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
128 VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
129 VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
130
131 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
132 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
133 /* SW3 STBY is on PCAP_REG_AUXVREG */
134 VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
135
136 /* SWxS used to control SWx voltage on standby */
137/* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA),
138 VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */
139};
140
141static int pcap_regulator_set_voltage_sel(struct regulator_dev *rdev,
142 unsigned selector)
143{
144 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
145 void *pcap = rdev_get_drvdata(rdev);
146
147 /* the regulator doesn't support voltage switching */
148 if (rdev->desc->n_voltages == 1)
149 return -EINVAL;
150
151 return ezx_pcap_set_bits(pcap, vreg->reg,
152 (rdev->desc->n_voltages - 1) << vreg->index,
153 selector << vreg->index);
154}
155
156static int pcap_regulator_get_voltage_sel(struct regulator_dev *rdev)
157{
158 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
159 void *pcap = rdev_get_drvdata(rdev);
160 u32 tmp;
161
162 if (rdev->desc->n_voltages == 1)
163 return 0;
164
165 ezx_pcap_read(pcap, vreg->reg, &tmp);
166 tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1));
167 return tmp;
168}
169
170static int pcap_regulator_enable(struct regulator_dev *rdev)
171{
172 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
173 void *pcap = rdev_get_drvdata(rdev);
174
175 if (vreg->en == NA)
176 return -EINVAL;
177
178 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
179}
180
181static int pcap_regulator_disable(struct regulator_dev *rdev)
182{
183 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
184 void *pcap = rdev_get_drvdata(rdev);
185
186 if (vreg->en == NA)
187 return -EINVAL;
188
189 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
190}
191
192static int pcap_regulator_is_enabled(struct regulator_dev *rdev)
193{
194 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
195 void *pcap = rdev_get_drvdata(rdev);
196 u32 tmp;
197
198 if (vreg->en == NA)
199 return -EINVAL;
200
201 ezx_pcap_read(pcap, vreg->reg, &tmp);
202 return (tmp >> vreg->en) & 1;
203}
204
205static const struct regulator_ops pcap_regulator_ops = {
206 .list_voltage = regulator_list_voltage_table,
207 .set_voltage_sel = pcap_regulator_set_voltage_sel,
208 .get_voltage_sel = pcap_regulator_get_voltage_sel,
209 .enable = pcap_regulator_enable,
210 .disable = pcap_regulator_disable,
211 .is_enabled = pcap_regulator_is_enabled,
212};
213
214#define VREG(_vreg) \
215 [_vreg] = { \
216 .name = #_vreg, \
217 .id = _vreg, \
218 .n_voltages = ARRAY_SIZE(_vreg##_table), \
219 .volt_table = _vreg##_table, \
220 .ops = &pcap_regulator_ops, \
221 .type = REGULATOR_VOLTAGE, \
222 .owner = THIS_MODULE, \
223 }
224
225static const struct regulator_desc pcap_regulators[] = {
226 VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
227 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
229};
230
231static int pcap_regulator_probe(struct platform_device *pdev)
232{
233 struct regulator_dev *rdev;
234 void *pcap = dev_get_drvdata(pdev->dev.parent);
235 struct regulator_config config = { };
236
237 config.dev = &pdev->dev;
238 config.init_data = dev_get_platdata(&pdev->dev);
239 config.driver_data = pcap;
240
241 rdev = devm_regulator_register(&pdev->dev, &pcap_regulators[pdev->id],
242 &config);
243 if (IS_ERR(rdev))
244 return PTR_ERR(rdev);
245
246 platform_set_drvdata(pdev, rdev);
247
248 return 0;
249}
250
251static struct platform_driver pcap_regulator_driver = {
252 .driver = {
253 .name = "pcap-regulator",
254 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
255 },
256 .probe = pcap_regulator_probe,
257};
258
259static int __init pcap_regulator_init(void)
260{
261 return platform_driver_register(&pcap_regulator_driver);
262}
263
264static void __exit pcap_regulator_exit(void)
265{
266 platform_driver_unregister(&pcap_regulator_driver);
267}
268
269subsys_initcall(pcap_regulator_init);
270module_exit(pcap_regulator_exit);
271
272MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>");
273MODULE_DESCRIPTION("PCAP2 Regulator Driver");
274MODULE_LICENSE("GPL");
1/*
2 * PCAP2 Regulator Driver
3 *
4 * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/err.h>
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
19#include <linux/mfd/ezx-pcap.h>
20
21static const u16 V1_table[] = {
22 2775, 1275, 1600, 1725, 1825, 1925, 2075, 2275,
23};
24
25static const u16 V2_table[] = {
26 2500, 2775,
27};
28
29static const u16 V3_table[] = {
30 1075, 1275, 1550, 1725, 1876, 1950, 2075, 2275,
31};
32
33static const u16 V4_table[] = {
34 1275, 1550, 1725, 1875, 1950, 2075, 2275, 2775,
35};
36
37static const u16 V5_table[] = {
38 1875, 2275, 2475, 2775,
39};
40
41static const u16 V6_table[] = {
42 2475, 2775,
43};
44
45static const u16 V7_table[] = {
46 1875, 2775,
47};
48
49#define V8_table V4_table
50
51static const u16 V9_table[] = {
52 1575, 1875, 2475, 2775,
53};
54
55static const u16 V10_table[] = {
56 5000,
57};
58
59static const u16 VAUX1_table[] = {
60 1875, 2475, 2775, 3000,
61};
62
63#define VAUX2_table VAUX1_table
64
65static const u16 VAUX3_table[] = {
66 1200, 1200, 1200, 1200, 1400, 1600, 1800, 2000,
67 2200, 2400, 2600, 2800, 3000, 3200, 3400, 3600,
68};
69
70static const u16 VAUX4_table[] = {
71 1800, 1800, 3000, 5000,
72};
73
74static const u16 VSIM_table[] = {
75 1875, 3000,
76};
77
78static const u16 VSIM2_table[] = {
79 1875,
80};
81
82static const u16 VVIB_table[] = {
83 1300, 1800, 2000, 3000,
84};
85
86static const u16 SW1_table[] = {
87 900, 950, 1000, 1050, 1100, 1150, 1200, 1250,
88 1300, 1350, 1400, 1450, 1500, 1600, 1875, 2250,
89};
90
91#define SW2_table SW1_table
92
93static const u16 SW3_table[] = {
94 4000, 4500, 5000, 5500,
95};
96
97struct pcap_regulator {
98 const u8 reg;
99 const u8 en;
100 const u8 index;
101 const u8 stby;
102 const u8 lowpwr;
103 const u8 n_voltages;
104 const u16 *voltage_table;
105};
106
107#define NA 0xff
108
109#define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \
110 [_vreg] = { \
111 .reg = _reg, \
112 .en = _en, \
113 .index = _index, \
114 .stby = _stby, \
115 .lowpwr = _lowpwr, \
116 .n_voltages = ARRAY_SIZE(_vreg##_table), \
117 .voltage_table = _vreg##_table, \
118 }
119
120static struct pcap_regulator vreg_table[] = {
121 VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0),
122 VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22),
123 VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23),
124 VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24),
125 /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */
126 VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19),
127
128 VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20),
129 VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21),
130 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
131 VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23),
132 VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
133
134 VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23),
135 /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */
136 VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1),
137 VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3),
138 VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5),
139 VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
140 VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
141 VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
142
143 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
144 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
145 /* SW3 STBY is on PCAP_REG_AUXVREG */
146 VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
147
148 /* SWxS used to control SWx voltage on standby */
149/* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA),
150 VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */
151};
152
153static int pcap_regulator_set_voltage(struct regulator_dev *rdev,
154 int min_uV, int max_uV,
155 unsigned *selector)
156{
157 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
158 void *pcap = rdev_get_drvdata(rdev);
159 int uV;
160 u8 i;
161
162 /* the regulator doesn't support voltage switching */
163 if (vreg->n_voltages == 1)
164 return -EINVAL;
165
166 for (i = 0; i < vreg->n_voltages; i++) {
167 /* For V1 the first is not the best match */
168 if (i == 0 && rdev_get_id(rdev) == V1)
169 i = 1;
170 else if (i + 1 == vreg->n_voltages && rdev_get_id(rdev) == V1)
171 i = 0;
172
173 uV = vreg->voltage_table[i] * 1000;
174 if (min_uV <= uV && uV <= max_uV) {
175 *selector = i;
176 return ezx_pcap_set_bits(pcap, vreg->reg,
177 (vreg->n_voltages - 1) << vreg->index,
178 i << vreg->index);
179 }
180
181 if (i == 0 && rdev_get_id(rdev) == V1)
182 i = vreg->n_voltages - 1;
183 }
184
185 /* the requested voltage range is not supported by this regulator */
186 return -EINVAL;
187}
188
189static int pcap_regulator_get_voltage(struct regulator_dev *rdev)
190{
191 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
192 void *pcap = rdev_get_drvdata(rdev);
193 u32 tmp;
194 int mV;
195
196 if (vreg->n_voltages == 1)
197 return vreg->voltage_table[0] * 1000;
198
199 ezx_pcap_read(pcap, vreg->reg, &tmp);
200 tmp = ((tmp >> vreg->index) & (vreg->n_voltages - 1));
201 mV = vreg->voltage_table[tmp];
202
203 return mV * 1000;
204}
205
206static int pcap_regulator_enable(struct regulator_dev *rdev)
207{
208 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
209 void *pcap = rdev_get_drvdata(rdev);
210
211 if (vreg->en == NA)
212 return -EINVAL;
213
214 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
215}
216
217static int pcap_regulator_disable(struct regulator_dev *rdev)
218{
219 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
220 void *pcap = rdev_get_drvdata(rdev);
221
222 if (vreg->en == NA)
223 return -EINVAL;
224
225 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
226}
227
228static int pcap_regulator_is_enabled(struct regulator_dev *rdev)
229{
230 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
231 void *pcap = rdev_get_drvdata(rdev);
232 u32 tmp;
233
234 if (vreg->en == NA)
235 return -EINVAL;
236
237 ezx_pcap_read(pcap, vreg->reg, &tmp);
238 return (tmp >> vreg->en) & 1;
239}
240
241static int pcap_regulator_list_voltage(struct regulator_dev *rdev,
242 unsigned int index)
243{
244 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
245
246 return vreg->voltage_table[index] * 1000;
247}
248
249static struct regulator_ops pcap_regulator_ops = {
250 .list_voltage = pcap_regulator_list_voltage,
251 .set_voltage = pcap_regulator_set_voltage,
252 .get_voltage = pcap_regulator_get_voltage,
253 .enable = pcap_regulator_enable,
254 .disable = pcap_regulator_disable,
255 .is_enabled = pcap_regulator_is_enabled,
256};
257
258#define VREG(_vreg) \
259 [_vreg] = { \
260 .name = #_vreg, \
261 .id = _vreg, \
262 .n_voltages = ARRAY_SIZE(_vreg##_table), \
263 .ops = &pcap_regulator_ops, \
264 .type = REGULATOR_VOLTAGE, \
265 .owner = THIS_MODULE, \
266 }
267
268static struct regulator_desc pcap_regulators[] = {
269 VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
270 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
271 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
272};
273
274static int __devinit pcap_regulator_probe(struct platform_device *pdev)
275{
276 struct regulator_dev *rdev;
277 void *pcap = dev_get_drvdata(pdev->dev.parent);
278
279 rdev = regulator_register(&pcap_regulators[pdev->id], &pdev->dev,
280 pdev->dev.platform_data, pcap);
281 if (IS_ERR(rdev))
282 return PTR_ERR(rdev);
283
284 platform_set_drvdata(pdev, rdev);
285
286 return 0;
287}
288
289static int __devexit pcap_regulator_remove(struct platform_device *pdev)
290{
291 struct regulator_dev *rdev = platform_get_drvdata(pdev);
292
293 regulator_unregister(rdev);
294 platform_set_drvdata(pdev, NULL);
295
296 return 0;
297}
298
299static struct platform_driver pcap_regulator_driver = {
300 .driver = {
301 .name = "pcap-regulator",
302 .owner = THIS_MODULE,
303 },
304 .probe = pcap_regulator_probe,
305 .remove = __devexit_p(pcap_regulator_remove),
306};
307
308static int __init pcap_regulator_init(void)
309{
310 return platform_driver_register(&pcap_regulator_driver);
311}
312
313static void __exit pcap_regulator_exit(void)
314{
315 platform_driver_unregister(&pcap_regulator_driver);
316}
317
318subsys_initcall(pcap_regulator_init);
319module_exit(pcap_regulator_exit);
320
321MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>");
322MODULE_DESCRIPTION("PCAP2 Regulator Driver");
323MODULE_LICENSE("GPL");