1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _ASM_X86_MICROCODE_H
 3#define _ASM_X86_MICROCODE_H
 4
 5struct cpu_signature {
 6	unsigned int sig;
 7	unsigned int pf;
 8	unsigned int rev;
 9};
10
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
11struct ucode_cpu_info {
12	struct cpu_signature	cpu_sig;
 
13	void			*mc;
14};
 
15
16#ifdef CONFIG_MICROCODE
17void load_ucode_bsp(void);
18void load_ucode_ap(void);
19void microcode_bsp_resume(void);
20#else
21static inline void load_ucode_bsp(void)	{ }
22static inline void load_ucode_ap(void) { }
23static inline void microcode_bsp_resume(void) { }
24#endif
25
26extern unsigned long initrd_start_early;
27
28#ifdef CONFIG_CPU_SUP_INTEL
29/* Intel specific microcode defines. Public for IFS */
30struct microcode_header_intel {
31	unsigned int	hdrver;
32	unsigned int	rev;
33	unsigned int	date;
34	unsigned int	sig;
35	unsigned int	cksum;
36	unsigned int	ldrver;
37	unsigned int	pf;
38	unsigned int	datasize;
39	unsigned int	totalsize;
40	unsigned int	metasize;
41	unsigned int	min_req_ver;
42	unsigned int	reserved;
43};
44
45struct microcode_intel {
46	struct microcode_header_intel	hdr;
47	unsigned int			bits[];
48};
49
50#define DEFAULT_UCODE_DATASIZE		(2000)
51#define MC_HEADER_SIZE			(sizeof(struct microcode_header_intel))
52#define MC_HEADER_TYPE_MICROCODE	1
53#define MC_HEADER_TYPE_IFS		2
54
55static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
56{
57	return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
58}
 
59
60static inline u32 intel_get_microcode_revision(void)
61{
62	u32 rev, dummy;
63
64	native_wrmsrl(MSR_IA32_UCODE_REV, 0);
65
66	/* As documented in the SDM: Do a CPUID 1 here */
67	native_cpuid_eax(1);
68
69	/* get the current revision from MSR 0x8B */
70	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
71
72	return rev;
 
 
73}
74#endif /* !CONFIG_CPU_SUP_INTEL */
75
76bool microcode_nmi_handler(void);
77void microcode_offline_nmi_handler(void);
78
79#ifdef CONFIG_MICROCODE_LATE_LOADING
80DECLARE_STATIC_KEY_FALSE(microcode_nmi_handler_enable);
81static __always_inline bool microcode_nmi_handler_enabled(void)
82{
83	return static_branch_unlikely(&microcode_nmi_handler_enable);
84}
85#else
86static __always_inline bool microcode_nmi_handler_enabled(void) { return false; }
87#endif
88
89#endif /* _ASM_X86_MICROCODE_H */

 
 1#ifndef _ASM_X86_MICROCODE_H
 2#define _ASM_X86_MICROCODE_H
 3
 4struct cpu_signature {
 5	unsigned int sig;
 6	unsigned int pf;
 7	unsigned int rev;
 8};
 9
10struct device;
11
12enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
13
14struct microcode_ops {
15	enum ucode_state (*request_microcode_user) (int cpu,
16				const void __user *buf, size_t size);
17
18	enum ucode_state (*request_microcode_fw) (int cpu,
19				struct device *device);
20
21	void (*microcode_fini_cpu) (int cpu);
22
23	/*
24	 * The generic 'microcode_core' part guarantees that
25	 * the callbacks below run on a target cpu when they
26	 * are being called.
27	 * See also the "Synchronization" section in microcode_core.c.
28	 */
29	int (*apply_microcode) (int cpu);
30	int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
31};
32
33struct ucode_cpu_info {
34	struct cpu_signature	cpu_sig;
35	int			valid;
36	void			*mc;
37};
38extern struct ucode_cpu_info ucode_cpu_info[];
39
40#ifdef CONFIG_MICROCODE_INTEL
41extern struct microcode_ops * __init init_intel_microcode(void);
 
 
42#else
43static inline struct microcode_ops * __init init_intel_microcode(void)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
44{
45	return NULL;
46}
47#endif /* CONFIG_MICROCODE_INTEL */
48
49#ifdef CONFIG_MICROCODE_AMD
50extern struct microcode_ops * __init init_amd_microcode(void);
 
 
 
 
 
 
 
 
 
51
52static inline void get_ucode_data(void *to, const u8 *from, size_t n)
53{
54	memcpy(to, from, n);
55}
 
 
 
 
56
57#else
58static inline struct microcode_ops * __init init_amd_microcode(void)
 
59{
60	return NULL;
61}
 
 
62#endif
63
64#endif /* _ASM_X86_MICROCODE_H */