1/*
  2 * linux/arch/arm/mach-sa1100/nanoengine.c
  3 *
  4 * Bright Star Engineering's nanoEngine board init code.
  5 *
  6 * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
  7 *
  8 * This program is free software; you can redistribute it and/or modify
  9 * it under the terms of the GNU General Public License version 2 as
 10 * published by the Free Software Foundation.
 11 *
 12 */
 13
 14#include <linux/init.h>
 15#include <linux/kernel.h>
 16#include <linux/mtd/mtd.h>
 17#include <linux/mtd/partitions.h>
 18#include <linux/root_dev.h>
 19
 20#include <asm/mach-types.h>
 21#include <asm/setup.h>
 22
 23#include <asm/mach/arch.h>
 24#include <asm/mach/flash.h>
 25#include <asm/mach/map.h>
 26#include <asm/mach/serial_sa1100.h>
 27
 28#include <mach/hardware.h>
 29#include <mach/nanoengine.h>
 30
 31#include "generic.h"
 32
 33/* Flash bank 0 */
 34static struct mtd_partition nanoengine_partitions[] = {
 35	{
 36		.name	= "nanoEngine boot firmware and parameter table",
 37		.size		= 0x00010000,  /* 32K */
 38		.offset		= 0,
 39		.mask_flags	= MTD_WRITEABLE,
 40	}, {
 41		.name		= "kernel/initrd reserved",
 42		.size		= 0x002f0000,
 43		.offset		= 0x00010000,
 44		.mask_flags	= MTD_WRITEABLE,
 45	}, {
 46		.name		= "experimental filesystem allocation",
 47		.size		= 0x00100000,
 48		.offset		= 0x00300000,
 49		.mask_flags	= MTD_WRITEABLE,
 50	}
 51};
 52
 53static struct flash_platform_data nanoengine_flash_data = {
 54	.map_name	= "jedec_probe",
 55	.parts		= nanoengine_partitions,
 56	.nr_parts	= ARRAY_SIZE(nanoengine_partitions),
 57};
 58
 59static struct resource nanoengine_flash_resources[] = {
 60	{
 61		.start	= SA1100_CS0_PHYS,
 62		.end	= SA1100_CS0_PHYS + SZ_32M - 1,
 63		.flags	= IORESOURCE_MEM,
 64	}, {
 65		.start	= SA1100_CS1_PHYS,
 66		.end	= SA1100_CS1_PHYS + SZ_32M - 1,
 67		.flags	= IORESOURCE_MEM,
 68	}
 69};
 70
 71static struct map_desc nanoengine_io_desc[] __initdata = {
 72	{
 73		/* System Registers */
 74		.virtual	= 0xf0000000,
 75		.pfn		= __phys_to_pfn(0x10000000),
 76		.length		= 0x00100000,
 77		.type		= MT_DEVICE
 78	}, {
 79		/* Internal PCI Memory Read/Write */
 80		.virtual	= NANO_PCI_MEM_RW_VIRT,
 81		.pfn		= __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
 82		.length		= NANO_PCI_MEM_RW_SIZE,
 83		.type		= MT_DEVICE
 84	}, {
 85		/* Internal PCI Config Space */
 86		.virtual	= NANO_PCI_CONFIG_SPACE_VIRT,
 87		.pfn		= __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
 88		.length		= NANO_PCI_CONFIG_SPACE_SIZE,
 89		.type		= MT_DEVICE
 90	}
 91};
 92
 93static void __init nanoengine_map_io(void)
 94{
 95	sa1100_map_io();
 96	iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
 97
 98	sa1100_register_uart(0, 1);
 99	sa1100_register_uart(1, 2);
100	sa1100_register_uart(2, 3);
101	Ser1SDCR0 |= SDCR0_UART;
102	/* disable IRDA -- UART2 is used as a normal serial port */
103	Ser2UTCR4 = 0;
104	Ser2HSCR0 = 0;
105}
106
107static void __init nanoengine_init(void)
108{
109	sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
110		ARRAY_SIZE(nanoengine_flash_resources));
111}
112
113MACHINE_START(NANOENGINE, "BSE nanoEngine")
114	.boot_params	= 0xc0000000,
115	.map_io		= nanoengine_map_io,
116	.init_irq	= sa1100_init_irq,
117	.timer		= &sa1100_timer,
118	.init_machine	= nanoengine_init,
119MACHINE_END