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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/mach-omap1/opp_data.c
4 *
5 * Copyright (C) 2004 - 2005 Nokia corporation
6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
7 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
8 */
9
10#include "clock.h"
11#include "opp.h"
12
13/*-------------------------------------------------------------------------
14 * Omap1 MPU rate table
15 *-------------------------------------------------------------------------*/
16struct mpu_rate omap1_rate_table[] = {
17 /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
18 * NOTE: Comment order here is different from bits in CKCTL value:
19 * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
20 */
21 { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */
22 CK_1710 },
23 { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */
24 CK_7XX },
25 { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */
26 CK_16XX },
27 { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */
28 CK_16XX },
29 { 96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */
30 CK_16XX },
31 { 48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */
32 CK_16XX },
33 { 24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */
34 CK_16XX },
35 { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */
36 CK_7XX },
37 { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */
38 CK_16XX|CK_7XX },
39 { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */
40 CK_1510 },
41 { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */
42 CK_16XX|CK_1510|CK_310|CK_7XX },
43 { 96000000, 12000000, 96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */
44 CK_16XX|CK_1510|CK_310|CK_7XX },
45 { 60000000, 12000000, 60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */
46 CK_16XX|CK_1510|CK_310|CK_7XX },
47 { 30000000, 12000000, 60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */
48 CK_16XX|CK_1510|CK_310|CK_7XX },
49 { 0, 0, 0, 0, 0 },
50};
51
1/*
2 * linux/arch/arm/mach-omap1/opp_data.c
3 *
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include "opp.h"
14
15/*-------------------------------------------------------------------------
16 * Omap1 MPU rate table
17 *-------------------------------------------------------------------------*/
18struct mpu_rate omap1_rate_table[] = {
19 /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
20 * NOTE: Comment order here is different from bits in CKCTL value:
21 * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
22 */
23#if defined(CONFIG_OMAP_ARM_216MHZ)
24 { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
25#endif
26#if defined(CONFIG_OMAP_ARM_195MHZ)
27 { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
28#endif
29#if defined(CONFIG_OMAP_ARM_192MHZ)
30 { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
31 { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
32 { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
33 { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
34 { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
35#endif
36#if defined(CONFIG_OMAP_ARM_182MHZ)
37 { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
38#endif
39#if defined(CONFIG_OMAP_ARM_168MHZ)
40 { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
41#endif
42#if defined(CONFIG_OMAP_ARM_150MHZ)
43 { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
44#endif
45#if defined(CONFIG_OMAP_ARM_120MHZ)
46 { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
47#endif
48#if defined(CONFIG_OMAP_ARM_96MHZ)
49 { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
50#endif
51#if defined(CONFIG_OMAP_ARM_60MHZ)
52 { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
53#endif
54#if defined(CONFIG_OMAP_ARM_30MHZ)
55 { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
56#endif
57 { 0, 0, 0, 0, 0 },
58};
59