Linux Audio

Check our new training course

Loading...
Note: File does not exist in v6.13.7.
  1/*
  2 * linux/arch/arm/mach-omap1/board-h3.c
  3 *
  4 * This file contains OMAP1710 H3 specific code.
  5 *
  6 * Copyright (C) 2004 Texas Instruments, Inc.
  7 * Copyright (C) 2002 MontaVista Software, Inc.
  8 * Copyright (C) 2001 RidgeRun, Inc.
  9 * Author: RidgeRun, Inc.
 10 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 11 *
 12 * This program is free software; you can redistribute it and/or modify
 13 * it under the terms of the GNU General Public License version 2 as
 14 * published by the Free Software Foundation.
 15 */
 16
 17#include <linux/types.h>
 18#include <linux/init.h>
 19#include <linux/major.h>
 20#include <linux/kernel.h>
 21#include <linux/platform_device.h>
 22#include <linux/errno.h>
 23#include <linux/workqueue.h>
 24#include <linux/i2c.h>
 25#include <linux/mtd/mtd.h>
 26#include <linux/mtd/nand.h>
 27#include <linux/mtd/partitions.h>
 28#include <linux/mtd/physmap.h>
 29#include <linux/input.h>
 30#include <linux/spi/spi.h>
 31#include <linux/i2c/tps65010.h>
 32#include <linux/smc91x.h>
 33
 34#include <asm/setup.h>
 35#include <asm/page.h>
 36#include <mach/hardware.h>
 37#include <asm/gpio.h>
 38
 39#include <asm/mach-types.h>
 40#include <asm/mach/arch.h>
 41#include <asm/mach/map.h>
 42
 43#include <mach/irqs.h>
 44#include <plat/mux.h>
 45#include <plat/tc.h>
 46#include <plat/usb.h>
 47#include <plat/keypad.h>
 48#include <plat/dma.h>
 49#include <plat/common.h>
 50#include <plat/flash.h>
 51
 52#include "board-h3.h"
 53
 54/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
 55#define OMAP1710_ETHR_START		0x04000300
 56
 57#define H3_TS_GPIO	48
 58
 59static const unsigned int h3_keymap[] = {
 60	KEY(0, 0, KEY_LEFT),
 61	KEY(1, 0, KEY_RIGHT),
 62	KEY(2, 0, KEY_3),
 63	KEY(3, 0, KEY_F10),
 64	KEY(4, 0, KEY_F5),
 65	KEY(5, 0, KEY_9),
 66	KEY(0, 1, KEY_DOWN),
 67	KEY(1, 1, KEY_UP),
 68	KEY(2, 1, KEY_2),
 69	KEY(3, 1, KEY_F9),
 70	KEY(4, 1, KEY_F7),
 71	KEY(5, 1, KEY_0),
 72	KEY(0, 2, KEY_ENTER),
 73	KEY(1, 2, KEY_6),
 74	KEY(2, 2, KEY_1),
 75	KEY(3, 2, KEY_F2),
 76	KEY(4, 2, KEY_F6),
 77	KEY(5, 2, KEY_HOME),
 78	KEY(0, 3, KEY_8),
 79	KEY(1, 3, KEY_5),
 80	KEY(2, 3, KEY_F12),
 81	KEY(3, 3, KEY_F3),
 82	KEY(4, 3, KEY_F8),
 83	KEY(5, 3, KEY_END),
 84	KEY(0, 4, KEY_7),
 85	KEY(1, 4, KEY_4),
 86	KEY(2, 4, KEY_F11),
 87	KEY(3, 4, KEY_F1),
 88	KEY(4, 4, KEY_F4),
 89	KEY(5, 4, KEY_ESC),
 90	KEY(0, 5, KEY_F13),
 91	KEY(1, 5, KEY_F14),
 92	KEY(2, 5, KEY_F15),
 93	KEY(3, 5, KEY_F16),
 94	KEY(4, 5, KEY_SLEEP),
 95};
 96
 97
 98static struct mtd_partition nor_partitions[] = {
 99	/* bootloader (U-Boot, etc) in first sector */
100	{
101	      .name		= "bootloader",
102	      .offset		= 0,
103	      .size		= SZ_128K,
104	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
105	},
106	/* bootloader params in the next sector */
107	{
108	      .name		= "params",
109	      .offset		= MTDPART_OFS_APPEND,
110	      .size		= SZ_128K,
111	      .mask_flags	= 0,
112	},
113	/* kernel */
114	{
115	      .name		= "kernel",
116	      .offset		= MTDPART_OFS_APPEND,
117	      .size		= SZ_2M,
118	      .mask_flags	= 0
119	},
120	/* file system */
121	{
122	      .name		= "filesystem",
123	      .offset		= MTDPART_OFS_APPEND,
124	      .size		= MTDPART_SIZ_FULL,
125	      .mask_flags	= 0
126	}
127};
128
129static struct physmap_flash_data nor_data = {
130	.width		= 2,
131	.set_vpp	= omap1_set_vpp,
132	.parts		= nor_partitions,
133	.nr_parts	= ARRAY_SIZE(nor_partitions),
134};
135
136static struct resource nor_resource = {
137	/* This is on CS3, wherever it's mapped */
138	.flags		= IORESOURCE_MEM,
139};
140
141static struct platform_device nor_device = {
142	.name		= "physmap-flash",
143	.id		= 0,
144	.dev		= {
145		.platform_data	= &nor_data,
146	},
147	.num_resources	= 1,
148	.resource	= &nor_resource,
149};
150
151static struct mtd_partition nand_partitions[] = {
152#if 0
153	/* REVISIT: enable these partitions if you make NAND BOOT work */
154	{
155		.name		= "xloader",
156		.offset		= 0,
157		.size		= 64 * 1024,
158		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
159	},
160	{
161		.name		= "bootloader",
162		.offset		= MTDPART_OFS_APPEND,
163		.size		= 256 * 1024,
164		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
165	},
166	{
167		.name		= "params",
168		.offset		= MTDPART_OFS_APPEND,
169		.size		= 192 * 1024,
170	},
171	{
172		.name		= "kernel",
173		.offset		= MTDPART_OFS_APPEND,
174		.size		= 2 * SZ_1M,
175	},
176#endif
177	{
178		.name		= "filesystem",
179		.size		= MTDPART_SIZ_FULL,
180		.offset		= MTDPART_OFS_APPEND,
181	},
182};
183
184static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
185{
186	struct nand_chip *this = mtd->priv;
187	unsigned long mask;
188
189	if (cmd == NAND_CMD_NONE)
190		return;
191
192	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
193	if (ctrl & NAND_ALE)
194		mask |= 0x04;
195	writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
196}
197
198#define H3_NAND_RB_GPIO_PIN	10
199
200static int nand_dev_ready(struct mtd_info *mtd)
201{
202	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
203}
204
205static const char *part_probes[] = { "cmdlinepart", NULL };
206
207static struct platform_nand_data nand_platdata = {
208	.chip	= {
209		.nr_chips		= 1,
210		.chip_offset		= 0,
211		.nr_partitions		= ARRAY_SIZE(nand_partitions),
212		.partitions		= nand_partitions,
213		.options		= NAND_SAMSUNG_LP_OPTIONS,
214		.part_probe_types	= part_probes,
215	},
216	.ctrl	= {
217		.cmd_ctrl	= nand_cmd_ctl,
218		.dev_ready	= nand_dev_ready,
219
220	},
221};
222
223static struct resource nand_resource = {
224	.flags		= IORESOURCE_MEM,
225};
226
227static struct platform_device nand_device = {
228	.name		= "gen_nand",
229	.id		= 0,
230	.dev		= {
231		.platform_data	= &nand_platdata,
232	},
233	.num_resources	= 1,
234	.resource	= &nand_resource,
235};
236
237static struct smc91x_platdata smc91x_info = {
238	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
239	.leda	= RPC_LED_100_10,
240	.ledb	= RPC_LED_TX_RX,
241};
242
243static struct resource smc91x_resources[] = {
244	[0] = {
245		.start	= OMAP1710_ETHR_START,		/* Physical */
246		.end	= OMAP1710_ETHR_START + 0xf,
247		.flags	= IORESOURCE_MEM,
248	},
249	[1] = {
250		.start	= OMAP_GPIO_IRQ(40),
251		.end	= OMAP_GPIO_IRQ(40),
252		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
253	},
254};
255
256static struct platform_device smc91x_device = {
257	.name		= "smc91x",
258	.id		= 0,
259	.dev	= {
260		.platform_data	= &smc91x_info,
261	},
262	.num_resources	= ARRAY_SIZE(smc91x_resources),
263	.resource	= smc91x_resources,
264};
265
266static void __init h3_init_smc91x(void)
267{
268	omap_cfg_reg(W15_1710_GPIO40);
269	if (gpio_request(40, "SMC91x irq") < 0) {
270		printk("Error requesting gpio 40 for smc91x irq\n");
271		return;
272	}
273}
274
275#define GPTIMER_BASE		0xFFFB1400
276#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
277#define GPTIMER_REGS_SIZE	0x46
278
279static struct resource intlat_resources[] = {
280	[0] = {
281		.start  = GPTIMER_REGS(0),	      /* Physical */
282		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
283		.flags  = IORESOURCE_MEM,
284	},
285	[1] = {
286		.start  = INT_1610_GPTIMER1,
287		.end    = INT_1610_GPTIMER1,
288		.flags  = IORESOURCE_IRQ,
289	},
290};
291
292static struct platform_device intlat_device = {
293	.name	   = "omap_intlat",
294	.id	     = 0,
295	.num_resources  = ARRAY_SIZE(intlat_resources),
296	.resource       = intlat_resources,
297};
298
299static struct resource h3_kp_resources[] = {
300	[0] = {
301		.start	= INT_KEYBOARD,
302		.end	= INT_KEYBOARD,
303		.flags	= IORESOURCE_IRQ,
304	},
305};
306
307static const struct matrix_keymap_data h3_keymap_data = {
308	.keymap		= h3_keymap,
309	.keymap_size	= ARRAY_SIZE(h3_keymap),
310};
311
312static struct omap_kp_platform_data h3_kp_data = {
313	.rows		= 8,
314	.cols		= 8,
315	.keymap_data	= &h3_keymap_data,
316	.rep		= true,
317	.delay		= 9,
318	.dbounce	= true,
319};
320
321static struct platform_device h3_kp_device = {
322	.name		= "omap-keypad",
323	.id		= -1,
324	.dev		= {
325		.platform_data = &h3_kp_data,
326	},
327	.num_resources	= ARRAY_SIZE(h3_kp_resources),
328	.resource	= h3_kp_resources,
329};
330
331static struct platform_device h3_lcd_device = {
332	.name		= "lcd_h3",
333	.id		= -1,
334};
335
336static struct spi_board_info h3_spi_board_info[] __initdata = {
337	[0] = {
338		.modalias	= "tsc2101",
339		.bus_num	= 2,
340		.chip_select	= 0,
341		.irq		= OMAP_GPIO_IRQ(H3_TS_GPIO),
342		.max_speed_hz	= 16000000,
343		/* .platform_data	= &tsc_platform_data, */
344	},
345};
346
347static struct platform_device *devices[] __initdata = {
348	&nor_device,
349	&nand_device,
350        &smc91x_device,
351	&intlat_device,
352	&h3_kp_device,
353	&h3_lcd_device,
354};
355
356static struct omap_usb_config h3_usb_config __initdata = {
357	/* usb1 has a Mini-AB port and external isp1301 transceiver */
358	.otg	    = 2,
359
360#ifdef CONFIG_USB_GADGET_OMAP
361	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
362#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
363	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
364	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
365#endif
366
367	.pins[1]	= 3,
368};
369
370static struct omap_lcd_config h3_lcd_config __initdata = {
371	.ctrl_name	= "internal",
372};
373
374static struct omap_board_config_kernel h3_config[] __initdata = {
375	{ OMAP_TAG_LCD,		&h3_lcd_config },
376};
377
378static struct i2c_board_info __initdata h3_i2c_board_info[] = {
379       {
380		I2C_BOARD_INFO("tps65013", 0x48),
381               /* .irq         = OMAP_GPIO_IRQ(??), */
382       },
383	{
384		I2C_BOARD_INFO("isp1301_omap", 0x2d),
385		.irq		= OMAP_GPIO_IRQ(14),
386	},
387};
388
389static void __init h3_init(void)
390{
391	h3_init_smc91x();
392
393	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
394	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
395	 * notice whether a NAND chip is enabled at probe time.
396	 *
397	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
398	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
399	 * to avoid probing every possible flash configuration...
400	 */
401	nor_resource.end = nor_resource.start = omap_cs3_phys();
402	nor_resource.end += SZ_32M - 1;
403
404	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
405	nand_resource.end += SZ_4K - 1;
406	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
407		BUG();
408	gpio_direction_input(H3_NAND_RB_GPIO_PIN);
409
410	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
411	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
412	omap_cfg_reg(V2_1710_GPIO10);
413
414	/* Mux pins for keypad */
415	omap_cfg_reg(F18_1610_KBC0);
416	omap_cfg_reg(D20_1610_KBC1);
417	omap_cfg_reg(D19_1610_KBC2);
418	omap_cfg_reg(E18_1610_KBC3);
419	omap_cfg_reg(C21_1610_KBC4);
420	omap_cfg_reg(G18_1610_KBR0);
421	omap_cfg_reg(F19_1610_KBR1);
422	omap_cfg_reg(H14_1610_KBR2);
423	omap_cfg_reg(E20_1610_KBR3);
424	omap_cfg_reg(E19_1610_KBR4);
425	omap_cfg_reg(N19_1610_KBR5);
426
427	platform_add_devices(devices, ARRAY_SIZE(devices));
428	spi_register_board_info(h3_spi_board_info,
429				ARRAY_SIZE(h3_spi_board_info));
430	omap_board_config = h3_config;
431	omap_board_config_size = ARRAY_SIZE(h3_config);
432	omap_serial_init();
433	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
434			      ARRAY_SIZE(h3_i2c_board_info));
435	omap1_usb_init(&h3_usb_config);
436	h3_mmc_init();
437}
438
439static void __init h3_init_irq(void)
440{
441	omap1_init_common_hw();
442	omap1_init_irq();
443}
444
445static void __init h3_map_io(void)
446{
447	omap1_map_common_io();
448}
449
450MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
451	/* Maintainer: Texas Instruments, Inc. */
452	.boot_params	= 0x10000100,
453	.map_io		= h3_map_io,
454	.reserve	= omap_reserve,
455	.init_irq	= h3_init_irq,
456	.init_machine	= h3_init,
457	.timer		= &omap1_timer,
458MACHINE_END