1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *  linux/arch/arm/include/asm/perf_event.h
 4 *
 5 *  Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
 
 
 
 
 
 6 */
 7
 8#ifndef __ARM_PERF_EVENT_H__
 9#define __ARM_PERF_EVENT_H__
10
11#define perf_arch_fetch_caller_regs(regs, __ip) { \
12	(regs)->ARM_pc = (__ip); \
13	frame_pointer((regs)) = (unsigned long) __builtin_frame_address(0); \
14	(regs)->ARM_sp = current_stack_pointer; \
15	(regs)->ARM_cpsr = SVC_MODE; \
16}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
17
18#endif /* __ARM_PERF_EVENT_H__ */

 
 1/*
 2 *  linux/arch/arm/include/asm/perf_event.h
 3 *
 4 *  Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License version 2 as
 8 * published by the Free Software Foundation.
 9 *
10 */
11
12#ifndef __ARM_PERF_EVENT_H__
13#define __ARM_PERF_EVENT_H__
14
15/* ARM performance counters start from 1 (in the cp15 accesses) so use the
16 * same indexes here for consistency. */
17#define PERF_EVENT_INDEX_OFFSET 1
18
19/* ARM perf PMU IDs for use by internal perf clients. */
20enum arm_perf_pmu_ids {
21	ARM_PERF_PMU_ID_XSCALE1	= 0,
22	ARM_PERF_PMU_ID_XSCALE2,
23	ARM_PERF_PMU_ID_V6,
24	ARM_PERF_PMU_ID_V6MP,
25	ARM_PERF_PMU_ID_CA8,
26	ARM_PERF_PMU_ID_CA9,
27	ARM_PERF_PMU_ID_CA5,
28	ARM_PERF_PMU_ID_CA15,
29	ARM_NUM_PMU_IDS,
30};
31
32extern enum arm_perf_pmu_ids
33armpmu_get_pmu_id(void);
34
35extern int
36armpmu_get_max_events(void);
37
38#endif /* __ARM_PERF_EVENT_H__ */