1ROCKCHIP USB2 PHY
 2
 3Required properties:
 4 - compatible: matching the soc type, one of
 5     "rockchip,rk3066a-usb-phy"
 6     "rockchip,rk3188-usb-phy"
 7     "rockchip,rk3288-usb-phy"
 8 - #address-cells: should be 1
 9 - #size-cells: should be 0
10
11Deprecated properties:
12 - rockchip,grf : phandle to the syscon managing the "general
13   register files" - phy should be a child of the GRF instead
14
15Sub-nodes:
16Each PHY should be represented as a sub-node.
17
18Sub-nodes
19required properties:
20- #phy-cells: should be 0
21- reg: PHY configure reg address offset in GRF
22		"0x320" - for PHY attach to OTG controller
23		"0x334" - for PHY attach to HOST0 controller
24		"0x348" - for PHY attach to HOST1 controller
25
26Optional Properties:
27- clocks : phandle + clock specifier for the phy clocks
28- clock-names: string, clock name, must be "phyclk"
29- #clock-cells: for users of the phy-pll, should be 0
30- reset-names: Only allow the following entries:
31 - phy-reset
32- resets: Must contain an entry for each entry in reset-names.
33- vbus-supply: power-supply phandle for vbus power source
34
35Example:
36
37grf: syscon@ff770000 {
38	compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
39
40...
41
42	usbphy: phy {
43		compatible = "rockchip,rk3288-usb-phy";
44		#address-cells = <1>;
45		#size-cells = <0>;
46
47		usbphy0: usb-phy0 {
48			#phy-cells = <0>;
49			reg = <0x320>;
50		};
51	};
52};