1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
  4 *     Author: Alex Williamson <alex.williamson@redhat.com>
  5 *
  6 * Derived from original vfio:
  7 * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
  8 * Author: Tom Lyon, pugs@cisco.com
  9 */
 10
 11#include <linux/mutex.h>
 12#include <linux/pci.h>
 13#include <linux/vfio.h>
 14#include <linux/irqbypass.h>
 15#include <linux/types.h>
 16#include <linux/uuid.h>
 17#include <linux/notifier.h>
 18
 19#ifndef VFIO_PCI_CORE_H
 20#define VFIO_PCI_CORE_H
 21
 22#define VFIO_PCI_OFFSET_SHIFT   40
 23#define VFIO_PCI_OFFSET_TO_INDEX(off)	(off >> VFIO_PCI_OFFSET_SHIFT)
 24#define VFIO_PCI_INDEX_TO_OFFSET(index)	((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
 25#define VFIO_PCI_OFFSET_MASK	(((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
 26
 27struct vfio_pci_core_device;
 28struct vfio_pci_region;
 29
 30struct vfio_pci_regops {
 31	ssize_t (*rw)(struct vfio_pci_core_device *vdev, char __user *buf,
 32		      size_t count, loff_t *ppos, bool iswrite);
 33	void	(*release)(struct vfio_pci_core_device *vdev,
 34			   struct vfio_pci_region *region);
 35	int	(*mmap)(struct vfio_pci_core_device *vdev,
 36			struct vfio_pci_region *region,
 37			struct vm_area_struct *vma);
 38	int	(*add_capability)(struct vfio_pci_core_device *vdev,
 39				  struct vfio_pci_region *region,
 40				  struct vfio_info_cap *caps);
 41};
 42
 43struct vfio_pci_region {
 44	u32				type;
 45	u32				subtype;
 46	const struct vfio_pci_regops	*ops;
 47	void				*data;
 48	size_t				size;
 49	u32				flags;
 50};
 51
 52struct vfio_pci_core_device {
 53	struct vfio_device	vdev;
 54	struct pci_dev		*pdev;
 55	void __iomem		*barmap[PCI_STD_NUM_BARS];
 56	bool			bar_mmap_supported[PCI_STD_NUM_BARS];
 57	u8			*pci_config_map;
 58	u8			*vconfig;
 59	struct perm_bits	*msi_perm;
 60	spinlock_t		irqlock;
 61	struct mutex		igate;
 62	struct xarray		ctx;
 63	int			irq_type;
 64	int			num_regions;
 65	struct vfio_pci_region	*region;
 66	u8			msi_qmax;
 67	u8			msix_bar;
 68	u16			msix_size;
 69	u32			msix_offset;
 70	u32			rbar[7];
 71	bool			has_dyn_msix:1;
 72	bool			pci_2_3:1;
 73	bool			virq_disabled:1;
 74	bool			reset_works:1;
 75	bool			extended_caps:1;
 76	bool			bardirty:1;
 77	bool			has_vga:1;
 78	bool			needs_reset:1;
 79	bool			nointx:1;
 80	bool			needs_pm_restore:1;
 81	bool			pm_intx_masked:1;
 82	bool			pm_runtime_engaged:1;
 83	struct pci_saved_state	*pci_saved_state;
 84	struct pci_saved_state	*pm_save;
 85	int			ioeventfds_nr;
 86	struct eventfd_ctx	*err_trigger;
 87	struct eventfd_ctx	*req_trigger;
 88	struct eventfd_ctx	*pm_wake_eventfd_ctx;
 89	struct list_head	dummy_resources_list;
 90	struct mutex		ioeventfds_lock;
 91	struct list_head	ioeventfds_list;
 92	struct vfio_pci_vf_token	*vf_token;
 93	struct list_head		sriov_pfs_item;
 94	struct vfio_pci_core_device	*sriov_pf_core_dev;
 95	struct notifier_block	nb;
 96	struct mutex		vma_lock;
 97	struct list_head	vma_list;
 98	struct rw_semaphore	memory_lock;
 99};
100
101/* Will be exported for vfio pci drivers usage */
102int vfio_pci_core_register_dev_region(struct vfio_pci_core_device *vdev,
103				      unsigned int type, unsigned int subtype,
104				      const struct vfio_pci_regops *ops,
105				      size_t size, u32 flags, void *data);
106void vfio_pci_core_set_params(bool nointxmask, bool is_disable_vga,
107			      bool is_disable_idle_d3);
108void vfio_pci_core_close_device(struct vfio_device *core_vdev);
109int vfio_pci_core_init_dev(struct vfio_device *core_vdev);
110void vfio_pci_core_release_dev(struct vfio_device *core_vdev);
111int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev);
112void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev);
113extern const struct pci_error_handlers vfio_pci_core_err_handlers;
114int vfio_pci_core_sriov_configure(struct vfio_pci_core_device *vdev,
115				  int nr_virtfn);
116long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd,
117		unsigned long arg);
118int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags,
119				void __user *arg, size_t argsz);
120ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf,
121		size_t count, loff_t *ppos);
122ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf,
123		size_t count, loff_t *ppos);
124int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma);
125void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count);
126int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf);
127int vfio_pci_core_enable(struct vfio_pci_core_device *vdev);
128void vfio_pci_core_disable(struct vfio_pci_core_device *vdev);
129void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev);
130int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar);
131pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev,
132						pci_channel_state_t state);
133ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
134			       void __iomem *io, char __user *buf,
135			       loff_t off, size_t count, size_t x_start,
136			       size_t x_end, bool iswrite);
137bool vfio_pci_core_range_intersect_range(loff_t buf_start, size_t buf_cnt,
138					 loff_t reg_start, size_t reg_cnt,
139					 loff_t *buf_offset,
140					 size_t *intersect_count,
141					 size_t *register_offset);
142#define VFIO_IOWRITE_DECLATION(size) \
143int vfio_pci_core_iowrite##size(struct vfio_pci_core_device *vdev,	\
144			bool test_mem, u##size val, void __iomem *io);
145
146VFIO_IOWRITE_DECLATION(8)
147VFIO_IOWRITE_DECLATION(16)
148VFIO_IOWRITE_DECLATION(32)
149#ifdef iowrite64
150VFIO_IOWRITE_DECLATION(64)
151#endif
152
153#define VFIO_IOREAD_DECLATION(size) \
154int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev,	\
155			bool test_mem, u##size *val, void __iomem *io);
156
157VFIO_IOREAD_DECLATION(8)
158VFIO_IOREAD_DECLATION(16)
159VFIO_IOREAD_DECLATION(32)
160
161#endif /* VFIO_PCI_CORE_H */