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v5.9
  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// rcpm.c - Freescale QorIQ RCPM driver
  4//
  5// Copyright 2019 NXP
  6//
  7// Author: Ran Wang <ran.wang_1@nxp.com>
  8
  9#include <linux/init.h>
 10#include <linux/module.h>
 11#include <linux/platform_device.h>
 12#include <linux/of_address.h>
 13#include <linux/slab.h>
 14#include <linux/suspend.h>
 15#include <linux/kernel.h>
 
 16
 17#define RCPM_WAKEUP_CELL_MAX_SIZE	7
 18
 19struct rcpm {
 20	unsigned int	wakeup_cells;
 21	void __iomem	*ippdexpcr_base;
 22	bool		little_endian;
 23};
 24
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 25/**
 26 * rcpm_pm_prepare - performs device-level tasks associated with power
 27 * management, such as programming related to the wakeup source control.
 28 * @dev: Device to handle.
 29 *
 30 */
 31static int rcpm_pm_prepare(struct device *dev)
 32{
 33	int i, ret, idx;
 34	void __iomem *base;
 35	struct wakeup_source	*ws;
 36	struct rcpm		*rcpm;
 37	struct device_node	*np = dev->of_node;
 38	u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
 39	u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
 40
 41	rcpm = dev_get_drvdata(dev);
 42	if (!rcpm)
 43		return -EINVAL;
 44
 45	base = rcpm->ippdexpcr_base;
 46	idx = wakeup_sources_read_lock();
 47
 48	/* Begin with first registered wakeup source */
 49	for_each_wakeup_source(ws) {
 50
 51		/* skip object which is not attached to device */
 52		if (!ws->dev || !ws->dev->parent)
 53			continue;
 54
 55		ret = device_property_read_u32_array(ws->dev->parent,
 56				"fsl,rcpm-wakeup", value,
 57				rcpm->wakeup_cells + 1);
 58
 59		/*  Wakeup source should refer to current rcpm device */
 60		if (ret || (np->phandle != value[0]))
 61			continue;
 62
 
 
 
 
 
 
 
 
 
 
 
 63		/* Property "#fsl,rcpm-wakeup-cells" of rcpm node defines the
 64		 * number of IPPDEXPCR register cells, and "fsl,rcpm-wakeup"
 65		 * of wakeup source IP contains an integer array: <phandle to
 66		 * RCPM node, IPPDEXPCR0 setting, IPPDEXPCR1 setting,
 67		 * IPPDEXPCR2 setting, etc>.
 68		 *
 69		 * So we will go thought them to collect setting data.
 70		 */
 71		for (i = 0; i < rcpm->wakeup_cells; i++)
 72			setting[i] |= value[i + 1];
 73	}
 74
 75	wakeup_sources_read_unlock(idx);
 76
 77	/* Program all IPPDEXPCRn once */
 78	for (i = 0; i < rcpm->wakeup_cells; i++) {
 79		u32 tmp = setting[i];
 80		void __iomem *address = base + i * 4;
 81
 82		if (!tmp)
 83			continue;
 84
 85		/* We can only OR related bits */
 86		if (rcpm->little_endian) {
 87			tmp |= ioread32(address);
 88			iowrite32(tmp, address);
 89		} else {
 90			tmp |= ioread32be(address);
 91			iowrite32be(tmp, address);
 92		}
 
 
 
 
 
 
 
 
 
 
 
 93	}
 94
 95	return 0;
 96}
 97
 98static const struct dev_pm_ops rcpm_pm_ops = {
 99	.prepare =  rcpm_pm_prepare,
100};
101
102static int rcpm_probe(struct platform_device *pdev)
103{
104	struct device	*dev = &pdev->dev;
105	struct resource *r;
106	struct rcpm	*rcpm;
107	int ret;
108
109	rcpm = devm_kzalloc(dev, sizeof(*rcpm), GFP_KERNEL);
110	if (!rcpm)
111		return -ENOMEM;
112
113	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
114	if (!r)
115		return -ENODEV;
116
117	rcpm->ippdexpcr_base = devm_ioremap_resource(&pdev->dev, r);
118	if (IS_ERR(rcpm->ippdexpcr_base)) {
119		ret =  PTR_ERR(rcpm->ippdexpcr_base);
120		return ret;
121	}
122
123	rcpm->little_endian = device_property_read_bool(
124			&pdev->dev, "little-endian");
125
126	ret = device_property_read_u32(&pdev->dev,
127			"#fsl,rcpm-wakeup-cells", &rcpm->wakeup_cells);
128	if (ret)
129		return ret;
130
131	dev_set_drvdata(&pdev->dev, rcpm);
132
133	return 0;
134}
135
136static const struct of_device_id rcpm_of_match[] = {
137	{ .compatible = "fsl,qoriq-rcpm-2.1+", },
138	{}
139};
140MODULE_DEVICE_TABLE(of, rcpm_of_match);
141
 
 
 
 
 
 
 
 
142static struct platform_driver rcpm_driver = {
143	.driver = {
144		.name = "rcpm",
145		.of_match_table = rcpm_of_match,
 
146		.pm	= &rcpm_pm_ops,
147	},
148	.probe = rcpm_probe,
149};
150
151module_platform_driver(rcpm_driver);
v6.9.4
  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// rcpm.c - Freescale QorIQ RCPM driver
  4//
  5// Copyright 2019-2020 NXP
  6//
  7// Author: Ran Wang <ran.wang_1@nxp.com>
  8
  9#include <linux/init.h>
 10#include <linux/module.h>
 11#include <linux/platform_device.h>
 12#include <linux/of_address.h>
 13#include <linux/slab.h>
 14#include <linux/suspend.h>
 15#include <linux/kernel.h>
 16#include <linux/acpi.h>
 17
 18#define RCPM_WAKEUP_CELL_MAX_SIZE	7
 19
 20struct rcpm {
 21	unsigned int	wakeup_cells;
 22	void __iomem	*ippdexpcr_base;
 23	bool		little_endian;
 24};
 25
 26#define  SCFG_SPARECR8	0x051c
 27
 28static void copy_ippdexpcr1_setting(u32 val)
 29{
 30	struct device_node *np;
 31	void __iomem *regs;
 32	u32 reg_val;
 33
 34	np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-scfg");
 35	if (!np)
 36		return;
 37
 38	regs = of_iomap(np, 0);
 39	if (!regs)
 40		return;
 41
 42	reg_val = ioread32be(regs + SCFG_SPARECR8);
 43	iowrite32be(val | reg_val, regs + SCFG_SPARECR8);
 44
 45	iounmap(regs);
 46}
 47
 48/**
 49 * rcpm_pm_prepare - performs device-level tasks associated with power
 50 * management, such as programming related to the wakeup source control.
 51 * @dev: Device to handle.
 52 *
 53 */
 54static int rcpm_pm_prepare(struct device *dev)
 55{
 56	int i, ret, idx;
 57	void __iomem *base;
 58	struct wakeup_source	*ws;
 59	struct rcpm		*rcpm;
 60	struct device_node	*np = dev->of_node;
 61	u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
 62	u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
 63
 64	rcpm = dev_get_drvdata(dev);
 65	if (!rcpm)
 66		return -EINVAL;
 67
 68	base = rcpm->ippdexpcr_base;
 69	idx = wakeup_sources_read_lock();
 70
 71	/* Begin with first registered wakeup source */
 72	for_each_wakeup_source(ws) {
 73
 74		/* skip object which is not attached to device */
 75		if (!ws->dev || !ws->dev->parent)
 76			continue;
 77
 78		ret = device_property_read_u32_array(ws->dev->parent,
 79				"fsl,rcpm-wakeup", value,
 80				rcpm->wakeup_cells + 1);
 81
 82		if (ret)
 
 83			continue;
 84
 85		/*
 86		 * For DT mode, would handle devices with "fsl,rcpm-wakeup"
 87		 * pointing to the current RCPM node.
 88		 *
 89		 * For ACPI mode, currently we assume there is only one
 90		 * RCPM controller existing.
 91		 */
 92		if (is_of_node(dev->fwnode))
 93			if (np->phandle != value[0])
 94				continue;
 95
 96		/* Property "#fsl,rcpm-wakeup-cells" of rcpm node defines the
 97		 * number of IPPDEXPCR register cells, and "fsl,rcpm-wakeup"
 98		 * of wakeup source IP contains an integer array: <phandle to
 99		 * RCPM node, IPPDEXPCR0 setting, IPPDEXPCR1 setting,
100		 * IPPDEXPCR2 setting, etc>.
101		 *
102		 * So we will go thought them to collect setting data.
103		 */
104		for (i = 0; i < rcpm->wakeup_cells; i++)
105			setting[i] |= value[i + 1];
106	}
107
108	wakeup_sources_read_unlock(idx);
109
110	/* Program all IPPDEXPCRn once */
111	for (i = 0; i < rcpm->wakeup_cells; i++) {
112		u32 tmp = setting[i];
113		void __iomem *address = base + i * 4;
114
115		if (!tmp)
116			continue;
117
118		/* We can only OR related bits */
119		if (rcpm->little_endian) {
120			tmp |= ioread32(address);
121			iowrite32(tmp, address);
122		} else {
123			tmp |= ioread32be(address);
124			iowrite32be(tmp, address);
125		}
126		/*
127		 * Workaround of errata A-008646 on SoC LS1021A:
128		 * There is a bug of register ippdexpcr1.
129		 * Reading configuration register RCPM_IPPDEXPCR1
130		 * always return zero. So save ippdexpcr1's value
131		 * to register SCFG_SPARECR8.And the value of
132		 * ippdexpcr1 will be read from SCFG_SPARECR8.
133		 */
134		if (dev_of_node(dev) && (i == 1))
135			if (of_device_is_compatible(np, "fsl,ls1021a-rcpm"))
136				copy_ippdexpcr1_setting(tmp);
137	}
138
139	return 0;
140}
141
142static const struct dev_pm_ops rcpm_pm_ops = {
143	.prepare =  rcpm_pm_prepare,
144};
145
146static int rcpm_probe(struct platform_device *pdev)
147{
148	struct device	*dev = &pdev->dev;
 
149	struct rcpm	*rcpm;
150	int ret;
151
152	rcpm = devm_kzalloc(dev, sizeof(*rcpm), GFP_KERNEL);
153	if (!rcpm)
154		return -ENOMEM;
155
156	rcpm->ippdexpcr_base = devm_platform_ioremap_resource(pdev, 0);
 
 
 
 
157	if (IS_ERR(rcpm->ippdexpcr_base)) {
158		ret =  PTR_ERR(rcpm->ippdexpcr_base);
159		return ret;
160	}
161
162	rcpm->little_endian = device_property_read_bool(
163			&pdev->dev, "little-endian");
164
165	ret = device_property_read_u32(&pdev->dev,
166			"#fsl,rcpm-wakeup-cells", &rcpm->wakeup_cells);
167	if (ret)
168		return ret;
169
170	dev_set_drvdata(&pdev->dev, rcpm);
171
172	return 0;
173}
174
175static const struct of_device_id rcpm_of_match[] = {
176	{ .compatible = "fsl,qoriq-rcpm-2.1+", },
177	{}
178};
179MODULE_DEVICE_TABLE(of, rcpm_of_match);
180
181#ifdef CONFIG_ACPI
182static const struct acpi_device_id rcpm_acpi_ids[] = {
183	{"NXP0015",},
184	{ }
185};
186MODULE_DEVICE_TABLE(acpi, rcpm_acpi_ids);
187#endif
188
189static struct platform_driver rcpm_driver = {
190	.driver = {
191		.name = "rcpm",
192		.of_match_table = rcpm_of_match,
193		.acpi_match_table = ACPI_PTR(rcpm_acpi_ids),
194		.pm	= &rcpm_pm_ops,
195	},
196	.probe = rcpm_probe,
197};
198
199module_platform_driver(rcpm_driver);