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1/* SPDX-License-Identifier: GPL-2.0 OR MIT */
2/* Copyright 2018-2019 Qiang Yu <yuq825@gmail.com> */
3
4#ifndef __LIMA_DEVICE_H__
5#define __LIMA_DEVICE_H__
6
7#include <drm/drm_device.h>
8#include <linux/delay.h>
9#include <linux/list.h>
10#include <linux/mutex.h>
11
12#include "lima_sched.h"
13#include "lima_dump.h"
14#include "lima_devfreq.h"
15
16enum lima_gpu_id {
17 lima_gpu_mali400 = 0,
18 lima_gpu_mali450,
19 lima_gpu_num,
20};
21
22enum lima_ip_id {
23 lima_ip_pmu,
24 lima_ip_gpmmu,
25 lima_ip_ppmmu0,
26 lima_ip_ppmmu1,
27 lima_ip_ppmmu2,
28 lima_ip_ppmmu3,
29 lima_ip_ppmmu4,
30 lima_ip_ppmmu5,
31 lima_ip_ppmmu6,
32 lima_ip_ppmmu7,
33 lima_ip_gp,
34 lima_ip_pp0,
35 lima_ip_pp1,
36 lima_ip_pp2,
37 lima_ip_pp3,
38 lima_ip_pp4,
39 lima_ip_pp5,
40 lima_ip_pp6,
41 lima_ip_pp7,
42 lima_ip_l2_cache0,
43 lima_ip_l2_cache1,
44 lima_ip_l2_cache2,
45 lima_ip_dlbu,
46 lima_ip_bcast,
47 lima_ip_pp_bcast,
48 lima_ip_ppmmu_bcast,
49 lima_ip_num,
50};
51
52struct lima_device;
53
54struct lima_ip {
55 struct lima_device *dev;
56 enum lima_ip_id id;
57 bool present;
58
59 void __iomem *iomem;
60 int irq;
61
62 union {
63 /* gp/pp */
64 bool async_reset;
65 /* l2 cache */
66 spinlock_t lock;
67 /* pmu/bcast */
68 u32 mask;
69 } data;
70};
71
72enum lima_pipe_id {
73 lima_pipe_gp,
74 lima_pipe_pp,
75 lima_pipe_num,
76};
77
78struct lima_device {
79 struct device *dev;
80 struct drm_device *ddev;
81
82 enum lima_gpu_id id;
83 u32 gp_version;
84 u32 pp_version;
85 int num_pp;
86
87 void __iomem *iomem;
88 struct clk *clk_bus;
89 struct clk *clk_gpu;
90 struct reset_control *reset;
91 struct regulator *regulator;
92
93 struct lima_ip ip[lima_ip_num];
94 struct lima_sched_pipe pipe[lima_pipe_num];
95
96 struct lima_vm *empty_vm;
97 uint64_t va_start;
98 uint64_t va_end;
99
100 u32 *dlbu_cpu;
101 dma_addr_t dlbu_dma;
102
103 struct lima_devfreq devfreq;
104
105 /* debug info */
106 struct lima_dump_head dump;
107 struct list_head error_task_list;
108 struct mutex error_task_list_lock;
109};
110
111static inline struct lima_device *
112to_lima_dev(struct drm_device *dev)
113{
114 return dev->dev_private;
115}
116
117int lima_device_init(struct lima_device *ldev);
118void lima_device_fini(struct lima_device *ldev);
119
120const char *lima_ip_name(struct lima_ip *ip);
121
122typedef int (*lima_poll_func_t)(struct lima_ip *);
123
124static inline int lima_poll_timeout(struct lima_ip *ip, lima_poll_func_t func,
125 int sleep_us, int timeout_us)
126{
127 ktime_t timeout = ktime_add_us(ktime_get(), timeout_us);
128
129 might_sleep_if(sleep_us);
130 while (1) {
131 if (func(ip))
132 return 0;
133
134 if (timeout_us && ktime_compare(ktime_get(), timeout) > 0)
135 return -ETIMEDOUT;
136
137 if (sleep_us)
138 usleep_range((sleep_us >> 2) + 1, sleep_us);
139 }
140 return 0;
141}
142
143int lima_device_suspend(struct device *dev);
144int lima_device_resume(struct device *dev);
145
146#endif
1/* SPDX-License-Identifier: GPL-2.0 OR MIT */
2/* Copyright 2018-2019 Qiang Yu <yuq825@gmail.com> */
3
4#ifndef __LIMA_DEVICE_H__
5#define __LIMA_DEVICE_H__
6
7#include <drm/drm_device.h>
8#include <linux/delay.h>
9#include <linux/list.h>
10#include <linux/mutex.h>
11
12#include "lima_sched.h"
13#include "lima_dump.h"
14#include "lima_devfreq.h"
15
16enum lima_gpu_id {
17 lima_gpu_mali400 = 0,
18 lima_gpu_mali450,
19 lima_gpu_num,
20};
21
22enum lima_ip_id {
23 lima_ip_pmu,
24 lima_ip_gpmmu,
25 lima_ip_ppmmu0,
26 lima_ip_ppmmu1,
27 lima_ip_ppmmu2,
28 lima_ip_ppmmu3,
29 lima_ip_ppmmu4,
30 lima_ip_ppmmu5,
31 lima_ip_ppmmu6,
32 lima_ip_ppmmu7,
33 lima_ip_gp,
34 lima_ip_pp0,
35 lima_ip_pp1,
36 lima_ip_pp2,
37 lima_ip_pp3,
38 lima_ip_pp4,
39 lima_ip_pp5,
40 lima_ip_pp6,
41 lima_ip_pp7,
42 lima_ip_l2_cache0,
43 lima_ip_l2_cache1,
44 lima_ip_l2_cache2,
45 lima_ip_dlbu,
46 lima_ip_bcast,
47 lima_ip_pp_bcast,
48 lima_ip_ppmmu_bcast,
49 lima_ip_num,
50};
51
52struct lima_device;
53
54struct lima_ip {
55 struct lima_device *dev;
56 enum lima_ip_id id;
57 bool present;
58
59 void __iomem *iomem;
60 int irq;
61
62 union {
63 /* gp/pp */
64 bool async_reset;
65 /* l2 cache */
66 spinlock_t lock;
67 /* pmu/bcast */
68 u32 mask;
69 } data;
70};
71
72enum lima_pipe_id {
73 lima_pipe_gp,
74 lima_pipe_pp,
75 lima_pipe_num,
76};
77
78struct lima_device {
79 struct device *dev;
80 struct drm_device *ddev;
81
82 enum lima_gpu_id id;
83 u32 gp_version;
84 u32 pp_version;
85 int num_pp;
86
87 void __iomem *iomem;
88 struct clk *clk_bus;
89 struct clk *clk_gpu;
90 struct reset_control *reset;
91 struct regulator *regulator;
92
93 struct lima_ip ip[lima_ip_num];
94 struct lima_sched_pipe pipe[lima_pipe_num];
95
96 struct lima_vm *empty_vm;
97 uint64_t va_start;
98 uint64_t va_end;
99
100 u32 *dlbu_cpu;
101 dma_addr_t dlbu_dma;
102
103 struct lima_devfreq devfreq;
104
105 /* debug info */
106 struct lima_dump_head dump;
107 struct list_head error_task_list;
108 struct mutex error_task_list_lock;
109};
110
111static inline struct lima_device *
112to_lima_dev(struct drm_device *dev)
113{
114 return dev->dev_private;
115}
116
117int lima_device_init(struct lima_device *ldev);
118void lima_device_fini(struct lima_device *ldev);
119
120const char *lima_ip_name(struct lima_ip *ip);
121
122typedef int (*lima_poll_func_t)(struct lima_ip *);
123
124static inline int lima_poll_timeout(struct lima_ip *ip, lima_poll_func_t func,
125 int sleep_us, int timeout_us)
126{
127 ktime_t timeout = ktime_add_us(ktime_get(), timeout_us);
128
129 might_sleep_if(sleep_us);
130 while (1) {
131 if (func(ip))
132 return 0;
133
134 if (timeout_us && ktime_compare(ktime_get(), timeout) > 0)
135 return -ETIMEDOUT;
136
137 if (sleep_us)
138 usleep_range((sleep_us >> 2) + 1, sleep_us);
139 }
140 return 0;
141}
142
143int lima_device_suspend(struct device *dev);
144int lima_device_resume(struct device *dev);
145
146#endif