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1// SPDX-License-Identifier: GPL-2.0
2// Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
3
4#include <linux/platform_device.h>
5#include <linux/module.h>
6#include <linux/init.h>
7#include <linux/rtc.h>
8#include <linux/types.h>
9#include <linux/bcd.h>
10#include <linux/platform_data/rtc-ds2404.h>
11#include <linux/delay.h>
12#include <linux/gpio.h>
13#include <linux/slab.h>
14
15#include <linux/io.h>
16
17#define DS2404_STATUS_REG 0x200
18#define DS2404_CONTROL_REG 0x201
19#define DS2404_RTC_REG 0x202
20
21#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
22#define DS2404_READ_SCRATCHPAD_CMD 0xaa
23#define DS2404_COPY_SCRATCHPAD_CMD 0x55
24#define DS2404_READ_MEMORY_CMD 0xf0
25
26#define DS2404_RST 0
27#define DS2404_CLK 1
28#define DS2404_DQ 2
29
30struct ds2404_gpio {
31 const char *name;
32 unsigned int gpio;
33};
34
35struct ds2404 {
36 struct ds2404_gpio *gpio;
37 struct rtc_device *rtc;
38};
39
40static struct ds2404_gpio ds2404_gpio[] = {
41 { "RTC RST", 0 },
42 { "RTC CLK", 0 },
43 { "RTC DQ", 0 },
44};
45
46static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev,
47 struct ds2404_platform_data *pdata)
48{
49 int i, err;
50
51 ds2404_gpio[DS2404_RST].gpio = pdata->gpio_rst;
52 ds2404_gpio[DS2404_CLK].gpio = pdata->gpio_clk;
53 ds2404_gpio[DS2404_DQ].gpio = pdata->gpio_dq;
54
55 for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++) {
56 err = gpio_request(ds2404_gpio[i].gpio, ds2404_gpio[i].name);
57 if (err) {
58 dev_err(&pdev->dev, "error mapping gpio %s: %d\n",
59 ds2404_gpio[i].name, err);
60 goto err_request;
61 }
62 if (i != DS2404_DQ)
63 gpio_direction_output(ds2404_gpio[i].gpio, 1);
64 }
65
66 chip->gpio = ds2404_gpio;
67 return 0;
68
69err_request:
70 while (--i >= 0)
71 gpio_free(ds2404_gpio[i].gpio);
72 return err;
73}
74
75static void ds2404_gpio_unmap(void *data)
76{
77 int i;
78
79 for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++)
80 gpio_free(ds2404_gpio[i].gpio);
81}
82
83static void ds2404_reset(struct device *dev)
84{
85 gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 0);
86 udelay(1000);
87 gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 1);
88 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
89 gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 0);
90 udelay(10);
91}
92
93static void ds2404_write_byte(struct device *dev, u8 byte)
94{
95 int i;
96
97 gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 1);
98 for (i = 0; i < 8; i++) {
99 gpio_set_value(ds2404_gpio[DS2404_DQ].gpio, byte & (1 << i));
100 udelay(10);
101 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
102 udelay(10);
103 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
104 udelay(10);
105 }
106}
107
108static u8 ds2404_read_byte(struct device *dev)
109{
110 int i;
111 u8 ret = 0;
112
113 gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
114
115 for (i = 0; i < 8; i++) {
116 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
117 udelay(10);
118 if (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
119 ret |= 1 << i;
120 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
121 udelay(10);
122 }
123 return ret;
124}
125
126static void ds2404_read_memory(struct device *dev, u16 offset,
127 int length, u8 *out)
128{
129 ds2404_reset(dev);
130 ds2404_write_byte(dev, DS2404_READ_MEMORY_CMD);
131 ds2404_write_byte(dev, offset & 0xff);
132 ds2404_write_byte(dev, (offset >> 8) & 0xff);
133 while (length--)
134 *out++ = ds2404_read_byte(dev);
135}
136
137static void ds2404_write_memory(struct device *dev, u16 offset,
138 int length, u8 *out)
139{
140 int i;
141 u8 ta01, ta02, es;
142
143 ds2404_reset(dev);
144 ds2404_write_byte(dev, DS2404_WRITE_SCRATCHPAD_CMD);
145 ds2404_write_byte(dev, offset & 0xff);
146 ds2404_write_byte(dev, (offset >> 8) & 0xff);
147
148 for (i = 0; i < length; i++)
149 ds2404_write_byte(dev, out[i]);
150
151 ds2404_reset(dev);
152 ds2404_write_byte(dev, DS2404_READ_SCRATCHPAD_CMD);
153
154 ta01 = ds2404_read_byte(dev);
155 ta02 = ds2404_read_byte(dev);
156 es = ds2404_read_byte(dev);
157
158 for (i = 0; i < length; i++) {
159 if (out[i] != ds2404_read_byte(dev)) {
160 dev_err(dev, "read invalid data\n");
161 return;
162 }
163 }
164
165 ds2404_reset(dev);
166 ds2404_write_byte(dev, DS2404_COPY_SCRATCHPAD_CMD);
167 ds2404_write_byte(dev, ta01);
168 ds2404_write_byte(dev, ta02);
169 ds2404_write_byte(dev, es);
170
171 gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
172 while (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
173 ;
174}
175
176static void ds2404_enable_osc(struct device *dev)
177{
178 u8 in[1] = { 0x10 }; /* enable oscillator */
179 ds2404_write_memory(dev, 0x201, 1, in);
180}
181
182static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
183{
184 unsigned long time = 0;
185 __le32 hw_time = 0;
186
187 ds2404_read_memory(dev, 0x203, 4, (u8 *)&hw_time);
188 time = le32_to_cpu(hw_time);
189
190 rtc_time64_to_tm(time, dt);
191 return 0;
192}
193
194static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
195{
196 u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
197 ds2404_write_memory(dev, 0x203, 4, (u8 *)&time);
198 return 0;
199}
200
201static const struct rtc_class_ops ds2404_rtc_ops = {
202 .read_time = ds2404_read_time,
203 .set_time = ds2404_set_time,
204};
205
206static int rtc_probe(struct platform_device *pdev)
207{
208 struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
209 struct ds2404 *chip;
210 int retval = -EBUSY;
211
212 chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
213 if (!chip)
214 return -ENOMEM;
215
216 chip->rtc = devm_rtc_allocate_device(&pdev->dev);
217 if (IS_ERR(chip->rtc))
218 return PTR_ERR(chip->rtc);
219
220 retval = ds2404_gpio_map(chip, pdev, pdata);
221 if (retval)
222 return retval;
223
224 retval = devm_add_action_or_reset(&pdev->dev, ds2404_gpio_unmap, chip);
225 if (retval)
226 return retval;
227
228 dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
229 chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
230 chip->gpio[DS2404_DQ].gpio);
231
232 platform_set_drvdata(pdev, chip);
233
234 chip->rtc->ops = &ds2404_rtc_ops;
235 chip->rtc->range_max = U32_MAX;
236
237 retval = rtc_register_device(chip->rtc);
238 if (retval)
239 return retval;
240
241 ds2404_enable_osc(&pdev->dev);
242 return 0;
243}
244
245static struct platform_driver rtc_device_driver = {
246 .probe = rtc_probe,
247 .driver = {
248 .name = "ds2404",
249 },
250};
251module_platform_driver(rtc_device_driver);
252
253MODULE_DESCRIPTION("DS2404 RTC");
254MODULE_AUTHOR("Sven Schnelle");
255MODULE_LICENSE("GPL");
256MODULE_ALIAS("platform:ds2404");
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
3
4#include <linux/platform_device.h>
5#include <linux/module.h>
6#include <linux/init.h>
7#include <linux/rtc.h>
8#include <linux/types.h>
9#include <linux/bcd.h>
10#include <linux/delay.h>
11#include <linux/gpio/consumer.h>
12#include <linux/slab.h>
13
14#include <linux/io.h>
15
16#define DS2404_STATUS_REG 0x200
17#define DS2404_CONTROL_REG 0x201
18#define DS2404_RTC_REG 0x202
19
20#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
21#define DS2404_READ_SCRATCHPAD_CMD 0xaa
22#define DS2404_COPY_SCRATCHPAD_CMD 0x55
23#define DS2404_READ_MEMORY_CMD 0xf0
24
25#define DS2404_RST 0
26#define DS2404_CLK 1
27#define DS2404_DQ 2
28
29struct ds2404 {
30 struct device *dev;
31 struct gpio_desc *rst_gpiod;
32 struct gpio_desc *clk_gpiod;
33 struct gpio_desc *dq_gpiod;
34 struct rtc_device *rtc;
35};
36
37static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev)
38{
39 struct device *dev = &pdev->dev;
40
41 /* This will de-assert RESET, declare this GPIO as GPIOD_ACTIVE_LOW */
42 chip->rst_gpiod = devm_gpiod_get(dev, "rst", GPIOD_OUT_LOW);
43 if (IS_ERR(chip->rst_gpiod))
44 return PTR_ERR(chip->rst_gpiod);
45
46 chip->clk_gpiod = devm_gpiod_get(dev, "clk", GPIOD_OUT_HIGH);
47 if (IS_ERR(chip->clk_gpiod))
48 return PTR_ERR(chip->clk_gpiod);
49
50 chip->dq_gpiod = devm_gpiod_get(dev, "dq", GPIOD_ASIS);
51 if (IS_ERR(chip->dq_gpiod))
52 return PTR_ERR(chip->dq_gpiod);
53
54 return 0;
55}
56
57static void ds2404_reset(struct ds2404 *chip)
58{
59 gpiod_set_value(chip->rst_gpiod, 1);
60 udelay(1000);
61 gpiod_set_value(chip->rst_gpiod, 0);
62 gpiod_set_value(chip->clk_gpiod, 0);
63 gpiod_direction_output(chip->dq_gpiod, 0);
64 udelay(10);
65}
66
67static void ds2404_write_byte(struct ds2404 *chip, u8 byte)
68{
69 int i;
70
71 gpiod_direction_output(chip->dq_gpiod, 1);
72 for (i = 0; i < 8; i++) {
73 gpiod_set_value(chip->dq_gpiod, byte & (1 << i));
74 udelay(10);
75 gpiod_set_value(chip->clk_gpiod, 1);
76 udelay(10);
77 gpiod_set_value(chip->clk_gpiod, 0);
78 udelay(10);
79 }
80}
81
82static u8 ds2404_read_byte(struct ds2404 *chip)
83{
84 int i;
85 u8 ret = 0;
86
87 gpiod_direction_input(chip->dq_gpiod);
88
89 for (i = 0; i < 8; i++) {
90 gpiod_set_value(chip->clk_gpiod, 0);
91 udelay(10);
92 if (gpiod_get_value(chip->dq_gpiod))
93 ret |= 1 << i;
94 gpiod_set_value(chip->clk_gpiod, 1);
95 udelay(10);
96 }
97 return ret;
98}
99
100static void ds2404_read_memory(struct ds2404 *chip, u16 offset,
101 int length, u8 *out)
102{
103 ds2404_reset(chip);
104 ds2404_write_byte(chip, DS2404_READ_MEMORY_CMD);
105 ds2404_write_byte(chip, offset & 0xff);
106 ds2404_write_byte(chip, (offset >> 8) & 0xff);
107 while (length--)
108 *out++ = ds2404_read_byte(chip);
109}
110
111static void ds2404_write_memory(struct ds2404 *chip, u16 offset,
112 int length, u8 *out)
113{
114 int i;
115 u8 ta01, ta02, es;
116
117 ds2404_reset(chip);
118 ds2404_write_byte(chip, DS2404_WRITE_SCRATCHPAD_CMD);
119 ds2404_write_byte(chip, offset & 0xff);
120 ds2404_write_byte(chip, (offset >> 8) & 0xff);
121
122 for (i = 0; i < length; i++)
123 ds2404_write_byte(chip, out[i]);
124
125 ds2404_reset(chip);
126 ds2404_write_byte(chip, DS2404_READ_SCRATCHPAD_CMD);
127
128 ta01 = ds2404_read_byte(chip);
129 ta02 = ds2404_read_byte(chip);
130 es = ds2404_read_byte(chip);
131
132 for (i = 0; i < length; i++) {
133 if (out[i] != ds2404_read_byte(chip)) {
134 dev_err(chip->dev, "read invalid data\n");
135 return;
136 }
137 }
138
139 ds2404_reset(chip);
140 ds2404_write_byte(chip, DS2404_COPY_SCRATCHPAD_CMD);
141 ds2404_write_byte(chip, ta01);
142 ds2404_write_byte(chip, ta02);
143 ds2404_write_byte(chip, es);
144
145 while (gpiod_get_value(chip->dq_gpiod))
146 ;
147}
148
149static void ds2404_enable_osc(struct ds2404 *chip)
150{
151 u8 in[1] = { 0x10 }; /* enable oscillator */
152
153 ds2404_write_memory(chip, 0x201, 1, in);
154}
155
156static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
157{
158 struct ds2404 *chip = dev_get_drvdata(dev);
159 unsigned long time = 0;
160 __le32 hw_time = 0;
161
162 ds2404_read_memory(chip, 0x203, 4, (u8 *)&hw_time);
163 time = le32_to_cpu(hw_time);
164
165 rtc_time64_to_tm(time, dt);
166 return 0;
167}
168
169static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
170{
171 struct ds2404 *chip = dev_get_drvdata(dev);
172 u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
173 ds2404_write_memory(chip, 0x203, 4, (u8 *)&time);
174 return 0;
175}
176
177static const struct rtc_class_ops ds2404_rtc_ops = {
178 .read_time = ds2404_read_time,
179 .set_time = ds2404_set_time,
180};
181
182static int rtc_probe(struct platform_device *pdev)
183{
184 struct ds2404 *chip;
185 int retval = -EBUSY;
186
187 chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
188 if (!chip)
189 return -ENOMEM;
190
191 chip->dev = &pdev->dev;
192
193 chip->rtc = devm_rtc_allocate_device(&pdev->dev);
194 if (IS_ERR(chip->rtc))
195 return PTR_ERR(chip->rtc);
196
197 retval = ds2404_gpio_map(chip, pdev);
198 if (retval)
199 return retval;
200
201 platform_set_drvdata(pdev, chip);
202
203 chip->rtc->ops = &ds2404_rtc_ops;
204 chip->rtc->range_max = U32_MAX;
205
206 retval = devm_rtc_register_device(chip->rtc);
207 if (retval)
208 return retval;
209
210 ds2404_enable_osc(chip);
211 return 0;
212}
213
214static struct platform_driver rtc_device_driver = {
215 .probe = rtc_probe,
216 .driver = {
217 .name = "ds2404",
218 },
219};
220module_platform_driver(rtc_device_driver);
221
222MODULE_DESCRIPTION("DS2404 RTC");
223MODULE_AUTHOR("Sven Schnelle");
224MODULE_LICENSE("GPL");
225MODULE_ALIAS("platform:ds2404");